2 * Copyright © 1997-2003 by The XFree86 Project, Inc.
3 * Copyright © 2007 Dave Airlie
4 * Copyright © 2007-2008 Intel Corporation
5 * Jesse Barnes <jesse.barnes@intel.com>
6 * Copyright 2005-2006 Luc Verhaegen
7 * Copyright (c) 2001, Andy Ritger aritger@nvidia.com
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10 * copy of this software and associated documentation files (the "Software"),
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14 * Software is furnished to do so, subject to the following conditions:
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19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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33 #include <sys/cdefs.h>
34 #include <dev/drm2/drmP.h>
35 #include <dev/drm2/drm_crtc.h>
38 * drm_mode_debug_printmodeline - debug print a mode
40 * @mode: mode to print
45 * Describe @mode using DRM_DEBUG.
47 void drm_mode_debug_printmodeline(const struct drm_display_mode *mode)
49 DRM_DEBUG_KMS("Modeline %d:\"%s\" %d %d %d %d %d %d %d %d %d %d "
51 mode->base.id, mode->name, mode->vrefresh, mode->clock,
52 mode->hdisplay, mode->hsync_start,
53 mode->hsync_end, mode->htotal,
54 mode->vdisplay, mode->vsync_start,
55 mode->vsync_end, mode->vtotal, mode->type, mode->flags);
57 EXPORT_SYMBOL(drm_mode_debug_printmodeline);
60 * drm_cvt_mode -create a modeline based on CVT algorithm
62 * @hdisplay: hdisplay size
63 * @vdisplay: vdisplay size
64 * @vrefresh : vrefresh rate
65 * @reduced : Whether the GTF calculation is simplified
66 * @interlaced:Whether the interlace is supported
71 * return the modeline based on CVT algorithm
73 * This function is called to generate the modeline based on CVT algorithm
74 * according to the hdisplay, vdisplay, vrefresh.
75 * It is based from the VESA(TM) Coordinated Video Timing Generator by
76 * Graham Loveridge April 9, 2003 available at
77 * http://www.elo.utfsm.cl/~elo212/docs/CVTd6r1.xls
79 * And it is copied from xf86CVTmode in xserver/hw/xfree86/modes/xf86cvt.c.
80 * What I have done is to translate it by using integer calculation.
82 #define HV_FACTOR 1000
83 struct drm_display_mode *drm_cvt_mode(struct drm_device *dev, int hdisplay,
84 int vdisplay, int vrefresh,
85 bool reduced, bool interlaced, bool margins)
87 /* 1) top/bottom margin size (% of height) - default: 1.8, */
88 #define CVT_MARGIN_PERCENTAGE 18
89 /* 2) character cell horizontal granularity (pixels) - default 8 */
90 #define CVT_H_GRANULARITY 8
91 /* 3) Minimum vertical porch (lines) - default 3 */
92 #define CVT_MIN_V_PORCH 3
93 /* 4) Minimum number of vertical back porch lines - default 6 */
94 #define CVT_MIN_V_BPORCH 6
95 /* Pixel Clock step (kHz) */
96 #define CVT_CLOCK_STEP 250
97 struct drm_display_mode *drm_mode;
98 unsigned int vfieldrate, hperiod;
99 int hdisplay_rnd, hmargin, vdisplay_rnd, vmargin, vsync;
102 /* allocate the drm_display_mode structure. If failure, we will
105 drm_mode = drm_mode_create(dev);
109 /* the CVT default refresh rate is 60Hz */
113 /* the required field fresh rate */
115 vfieldrate = vrefresh * 2;
117 vfieldrate = vrefresh;
119 /* horizontal pixels */
120 hdisplay_rnd = hdisplay - (hdisplay % CVT_H_GRANULARITY);
122 /* determine the left&right borders */
125 hmargin = hdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000;
126 hmargin -= hmargin % CVT_H_GRANULARITY;
128 /* find the total active pixels */
129 drm_mode->hdisplay = hdisplay_rnd + 2 * hmargin;
131 /* find the number of lines per field */
133 vdisplay_rnd = vdisplay / 2;
135 vdisplay_rnd = vdisplay;
137 /* find the top & bottom borders */
140 vmargin = vdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000;
142 drm_mode->vdisplay = vdisplay + 2 * vmargin;
150 /* Determine VSync Width from aspect ratio */
151 if (!(vdisplay % 3) && ((vdisplay * 4 / 3) == hdisplay))
153 else if (!(vdisplay % 9) && ((vdisplay * 16 / 9) == hdisplay))
155 else if (!(vdisplay % 10) && ((vdisplay * 16 / 10) == hdisplay))
157 else if (!(vdisplay % 4) && ((vdisplay * 5 / 4) == hdisplay))
159 else if (!(vdisplay % 9) && ((vdisplay * 15 / 9) == hdisplay))
165 /* simplify the GTF calculation */
166 /* 4) Minimum time of vertical sync + back porch interval (µs)
170 #define CVT_MIN_VSYNC_BP 550
171 /* 3) Nominal HSync width (% of line period) - default 8 */
172 #define CVT_HSYNC_PERCENTAGE 8
173 unsigned int hblank_percentage;
174 int vsyncandback_porch, hblank;
176 /* estimated the horizontal period */
177 tmp1 = HV_FACTOR * 1000000 -
178 CVT_MIN_VSYNC_BP * HV_FACTOR * vfieldrate;
179 tmp2 = (vdisplay_rnd + 2 * vmargin + CVT_MIN_V_PORCH) * 2 +
181 hperiod = tmp1 * 2 / (tmp2 * vfieldrate);
183 tmp1 = CVT_MIN_VSYNC_BP * HV_FACTOR / hperiod + 1;
184 /* 9. Find number of lines in sync + backporch */
185 if (tmp1 < (vsync + CVT_MIN_V_PORCH))
186 vsyncandback_porch = vsync + CVT_MIN_V_PORCH;
188 vsyncandback_porch = tmp1;
189 drm_mode->vtotal = vdisplay_rnd + 2 * vmargin +
190 vsyncandback_porch + CVT_MIN_V_PORCH;
191 /* 5) Definition of Horizontal blanking time limitation */
192 /* Gradient (%/kHz) - default 600 */
193 #define CVT_M_FACTOR 600
194 /* Offset (%) - default 40 */
195 #define CVT_C_FACTOR 40
196 /* Blanking time scaling factor - default 128 */
197 #define CVT_K_FACTOR 128
198 /* Scaling factor weighting - default 20 */
199 #define CVT_J_FACTOR 20
200 #define CVT_M_PRIME (CVT_M_FACTOR * CVT_K_FACTOR / 256)
201 #define CVT_C_PRIME ((CVT_C_FACTOR - CVT_J_FACTOR) * CVT_K_FACTOR / 256 + \
203 /* 12. Find ideal blanking duty cycle from formula */
204 hblank_percentage = CVT_C_PRIME * HV_FACTOR - CVT_M_PRIME *
206 /* 13. Blanking time */
207 if (hblank_percentage < 20 * HV_FACTOR)
208 hblank_percentage = 20 * HV_FACTOR;
209 hblank = drm_mode->hdisplay * hblank_percentage /
210 (100 * HV_FACTOR - hblank_percentage);
211 hblank -= hblank % (2 * CVT_H_GRANULARITY);
212 /* 14. find the total pixes per line */
213 drm_mode->htotal = drm_mode->hdisplay + hblank;
214 drm_mode->hsync_end = drm_mode->hdisplay + hblank / 2;
215 drm_mode->hsync_start = drm_mode->hsync_end -
216 (drm_mode->htotal * CVT_HSYNC_PERCENTAGE) / 100;
217 drm_mode->hsync_start += CVT_H_GRANULARITY -
218 drm_mode->hsync_start % CVT_H_GRANULARITY;
219 /* fill the Vsync values */
220 drm_mode->vsync_start = drm_mode->vdisplay + CVT_MIN_V_PORCH;
221 drm_mode->vsync_end = drm_mode->vsync_start + vsync;
223 /* Reduced blanking */
224 /* Minimum vertical blanking interval time (µs)- default 460 */
225 #define CVT_RB_MIN_VBLANK 460
226 /* Fixed number of clocks for horizontal sync */
227 #define CVT_RB_H_SYNC 32
228 /* Fixed number of clocks for horizontal blanking */
229 #define CVT_RB_H_BLANK 160
230 /* Fixed number of lines for vertical front porch - default 3*/
231 #define CVT_RB_VFPORCH 3
234 /* 8. Estimate Horizontal period. */
235 tmp1 = HV_FACTOR * 1000000 -
236 CVT_RB_MIN_VBLANK * HV_FACTOR * vfieldrate;
237 tmp2 = vdisplay_rnd + 2 * vmargin;
238 hperiod = tmp1 / (tmp2 * vfieldrate);
239 /* 9. Find number of lines in vertical blanking */
240 vbilines = CVT_RB_MIN_VBLANK * HV_FACTOR / hperiod + 1;
241 /* 10. Check if vertical blanking is sufficient */
242 if (vbilines < (CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH))
243 vbilines = CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH;
244 /* 11. Find total number of lines in vertical field */
245 drm_mode->vtotal = vdisplay_rnd + 2 * vmargin + vbilines;
246 /* 12. Find total number of pixels in a line */
247 drm_mode->htotal = drm_mode->hdisplay + CVT_RB_H_BLANK;
248 /* Fill in HSync values */
249 drm_mode->hsync_end = drm_mode->hdisplay + CVT_RB_H_BLANK / 2;
250 drm_mode->hsync_start = drm_mode->hsync_end - CVT_RB_H_SYNC;
251 /* Fill in VSync values */
252 drm_mode->vsync_start = drm_mode->vdisplay + CVT_RB_VFPORCH;
253 drm_mode->vsync_end = drm_mode->vsync_start + vsync;
255 /* 15/13. Find pixel clock frequency (kHz for xf86) */
256 drm_mode->clock = drm_mode->htotal * HV_FACTOR * 1000 / hperiod;
257 drm_mode->clock -= drm_mode->clock % CVT_CLOCK_STEP;
258 /* 18/16. Find actual vertical frame frequency */
259 /* ignore - just set the mode flag for interlaced */
261 drm_mode->vtotal *= 2;
262 drm_mode->flags |= DRM_MODE_FLAG_INTERLACE;
264 /* Fill the mode line name */
265 drm_mode_set_name(drm_mode);
267 drm_mode->flags |= (DRM_MODE_FLAG_PHSYNC |
268 DRM_MODE_FLAG_NVSYNC);
270 drm_mode->flags |= (DRM_MODE_FLAG_PVSYNC |
271 DRM_MODE_FLAG_NHSYNC);
275 EXPORT_SYMBOL(drm_cvt_mode);
278 * drm_gtf_mode_complex - create the modeline based on full GTF algorithm
281 * @hdisplay :hdisplay size
282 * @vdisplay :vdisplay size
283 * @vrefresh :vrefresh rate.
284 * @interlaced :whether the interlace is supported
285 * @margins :desired margin size
286 * @GTF_[MCKJ] :extended GTF formula parameters
291 * return the modeline based on full GTF algorithm.
293 * GTF feature blocks specify C and J in multiples of 0.5, so we pass them
294 * in here multiplied by two. For a C of 40, pass in 80.
296 struct drm_display_mode *
297 drm_gtf_mode_complex(struct drm_device *dev, int hdisplay, int vdisplay,
298 int vrefresh, bool interlaced, int margins,
299 int GTF_M, int GTF_2C, int GTF_K, int GTF_2J)
300 { /* 1) top/bottom margin size (% of height) - default: 1.8, */
301 #define GTF_MARGIN_PERCENTAGE 18
302 /* 2) character cell horizontal granularity (pixels) - default 8 */
303 #define GTF_CELL_GRAN 8
304 /* 3) Minimum vertical porch (lines) - default 3 */
305 #define GTF_MIN_V_PORCH 1
306 /* width of vsync in lines */
308 /* width of hsync as % of total line */
309 #define H_SYNC_PERCENT 8
310 /* min time of vsync + back porch (microsec) */
311 #define MIN_VSYNC_PLUS_BP 550
312 /* C' and M' are part of the Blanking Duty Cycle computation */
313 #define GTF_C_PRIME ((((GTF_2C - GTF_2J) * GTF_K / 256) + GTF_2J) / 2)
314 #define GTF_M_PRIME (GTF_K * GTF_M / 256)
315 struct drm_display_mode *drm_mode;
316 unsigned int hdisplay_rnd, vdisplay_rnd, vfieldrate_rqd;
317 int top_margin, bottom_margin;
319 unsigned int hfreq_est;
321 unsigned int vtotal_lines;
322 int left_margin, right_margin;
323 unsigned int total_active_pixels, ideal_duty_cycle;
324 unsigned int hblank, total_pixels, pixel_freq;
325 int hsync, hfront_porch, vodd_front_porch_lines;
326 unsigned int tmp1, tmp2;
328 drm_mode = drm_mode_create(dev);
332 /* 1. In order to give correct results, the number of horizontal
333 * pixels requested is first processed to ensure that it is divisible
334 * by the character size, by rounding it to the nearest character
337 hdisplay_rnd = (hdisplay + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN;
338 hdisplay_rnd = hdisplay_rnd * GTF_CELL_GRAN;
340 /* 2. If interlace is requested, the number of vertical lines assumed
341 * by the calculation must be halved, as the computation calculates
342 * the number of vertical lines per field.
345 vdisplay_rnd = vdisplay / 2;
347 vdisplay_rnd = vdisplay;
349 /* 3. Find the frame rate required: */
351 vfieldrate_rqd = vrefresh * 2;
353 vfieldrate_rqd = vrefresh;
355 /* 4. Find number of lines in Top margin: */
358 top_margin = (vdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) /
360 /* 5. Find number of lines in bottom margin: */
361 bottom_margin = top_margin;
363 /* 6. If interlace is required, then set variable interlace: */
369 /* 7. Estimate the Horizontal frequency */
371 tmp1 = (1000000 - MIN_VSYNC_PLUS_BP * vfieldrate_rqd) / 500;
372 tmp2 = (vdisplay_rnd + 2 * top_margin + GTF_MIN_V_PORCH) *
374 hfreq_est = (tmp2 * 1000 * vfieldrate_rqd) / tmp1;
377 /* 8. Find the number of lines in V sync + back porch */
378 /* [V SYNC+BP] = RINT(([MIN VSYNC+BP] * hfreq_est / 1000000)) */
379 vsync_plus_bp = MIN_VSYNC_PLUS_BP * hfreq_est / 1000;
380 vsync_plus_bp = (vsync_plus_bp + 500) / 1000;
381 /* 10. Find the total number of lines in Vertical field period: */
382 vtotal_lines = vdisplay_rnd + top_margin + bottom_margin +
383 vsync_plus_bp + GTF_MIN_V_PORCH;
385 /* 15. Find number of pixels in left margin: */
387 left_margin = (hdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) /
392 /* 16.Find number of pixels in right margin: */
393 right_margin = left_margin;
394 /* 17.Find total number of active pixels in image and left and right */
395 total_active_pixels = hdisplay_rnd + left_margin + right_margin;
396 /* 18.Find the ideal blanking duty cycle from blanking duty cycle */
397 ideal_duty_cycle = GTF_C_PRIME * 1000 -
398 (GTF_M_PRIME * 1000000 / hfreq_est);
399 /* 19.Find the number of pixels in the blanking time to the nearest
400 * double character cell: */
401 hblank = total_active_pixels * ideal_duty_cycle /
402 (100000 - ideal_duty_cycle);
403 hblank = (hblank + GTF_CELL_GRAN) / (2 * GTF_CELL_GRAN);
404 hblank = hblank * 2 * GTF_CELL_GRAN;
405 /* 20.Find total number of pixels: */
406 total_pixels = total_active_pixels + hblank;
407 /* 21.Find pixel clock frequency: */
408 pixel_freq = total_pixels * hfreq_est / 1000;
409 /* Stage 1 computations are now complete; I should really pass
410 * the results to another function and do the Stage 2 computations,
411 * but I only need a few more values so I'll just append the
412 * computations here for now */
413 /* 17. Find the number of pixels in the horizontal sync period: */
414 hsync = H_SYNC_PERCENT * total_pixels / 100;
415 hsync = (hsync + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN;
416 hsync = hsync * GTF_CELL_GRAN;
417 /* 18. Find the number of pixels in horizontal front porch period */
418 hfront_porch = hblank / 2 - hsync;
419 /* 36. Find the number of lines in the odd front porch period: */
420 vodd_front_porch_lines = GTF_MIN_V_PORCH ;
422 /* finally, pack the results in the mode struct */
423 drm_mode->hdisplay = hdisplay_rnd;
424 drm_mode->hsync_start = hdisplay_rnd + hfront_porch;
425 drm_mode->hsync_end = drm_mode->hsync_start + hsync;
426 drm_mode->htotal = total_pixels;
427 drm_mode->vdisplay = vdisplay_rnd;
428 drm_mode->vsync_start = vdisplay_rnd + vodd_front_porch_lines;
429 drm_mode->vsync_end = drm_mode->vsync_start + V_SYNC_RQD;
430 drm_mode->vtotal = vtotal_lines;
432 drm_mode->clock = pixel_freq;
435 drm_mode->vtotal *= 2;
436 drm_mode->flags |= DRM_MODE_FLAG_INTERLACE;
439 drm_mode_set_name(drm_mode);
440 if (GTF_M == 600 && GTF_2C == 80 && GTF_K == 128 && GTF_2J == 40)
441 drm_mode->flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC;
443 drm_mode->flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC;
447 EXPORT_SYMBOL(drm_gtf_mode_complex);
450 * drm_gtf_mode - create the modeline based on GTF algorithm
453 * @hdisplay :hdisplay size
454 * @vdisplay :vdisplay size
455 * @vrefresh :vrefresh rate.
456 * @interlaced :whether the interlace is supported
457 * @margins :whether the margin is supported
462 * return the modeline based on GTF algorithm
464 * This function is to create the modeline based on the GTF algorithm.
465 * Generalized Timing Formula is derived from:
466 * GTF Spreadsheet by Andy Morrish (1/5/97)
467 * available at http://www.vesa.org
469 * And it is copied from the file of xserver/hw/xfree86/modes/xf86gtf.c.
470 * What I have done is to translate it by using integer calculation.
471 * I also refer to the function of fb_get_mode in the file of
472 * drivers/video/fbmon.c
474 * Standard GTF parameters:
480 struct drm_display_mode *
481 drm_gtf_mode(struct drm_device *dev, int hdisplay, int vdisplay, int vrefresh,
482 bool lace, int margins)
484 return drm_gtf_mode_complex(dev, hdisplay, vdisplay, vrefresh, lace,
485 margins, 600, 40 * 2, 128, 20 * 2);
487 EXPORT_SYMBOL(drm_gtf_mode);
490 * drm_mode_set_name - set the name on a mode
491 * @mode: name will be set in this mode
496 * Set the name of @mode to a standard format.
498 void drm_mode_set_name(struct drm_display_mode *mode)
500 bool interlaced = !!(mode->flags & DRM_MODE_FLAG_INTERLACE);
502 snprintf(mode->name, DRM_DISPLAY_MODE_LEN, "%dx%d%s",
503 mode->hdisplay, mode->vdisplay,
504 interlaced ? "i" : "");
506 EXPORT_SYMBOL(drm_mode_set_name);
509 * drm_mode_list_concat - move modes from one list to another
514 * Caller must ensure both lists are locked.
516 * Move all the modes from @head to @new.
518 void drm_mode_list_concat(struct list_head *head, struct list_head *new)
521 struct list_head *entry, *tmp;
523 list_for_each_safe(entry, tmp, head) {
524 list_move_tail(entry, new);
527 EXPORT_SYMBOL(drm_mode_list_concat);
530 * drm_mode_width - get the width of a mode
536 * Return @mode's width (hdisplay) value.
538 * FIXME: is this needed?
543 int drm_mode_width(const struct drm_display_mode *mode)
545 return mode->hdisplay;
548 EXPORT_SYMBOL(drm_mode_width);
551 * drm_mode_height - get the height of a mode
557 * Return @mode's height (vdisplay) value.
559 * FIXME: is this needed?
564 int drm_mode_height(const struct drm_display_mode *mode)
566 return mode->vdisplay;
568 EXPORT_SYMBOL(drm_mode_height);
570 /** drm_mode_hsync - get the hsync of a mode
576 * Return @modes's hsync rate in kHz, rounded to the nearest int.
578 int drm_mode_hsync(const struct drm_display_mode *mode)
580 unsigned int calc_val;
585 if (mode->htotal < 0)
588 calc_val = (mode->clock * 1000) / mode->htotal; /* hsync in Hz */
589 calc_val += 500; /* round to 1000Hz */
590 calc_val /= 1000; /* truncate to kHz */
594 EXPORT_SYMBOL(drm_mode_hsync);
597 * drm_mode_vrefresh - get the vrefresh of a mode
603 * Return @mode's vrefresh rate in Hz or calculate it if necessary.
605 * FIXME: why is this needed? shouldn't vrefresh be set already?
608 * Vertical refresh rate. It will be the result of actual value plus 0.5.
609 * If it is 70.288, it will return 70Hz.
610 * If it is 59.6, it will return 60Hz.
612 int drm_mode_vrefresh(const struct drm_display_mode *mode)
615 unsigned int calc_val;
617 if (mode->vrefresh > 0)
618 refresh = mode->vrefresh;
619 else if (mode->htotal > 0 && mode->vtotal > 0) {
621 vtotal = mode->vtotal;
622 /* work out vrefresh the value will be x1000 */
623 calc_val = (mode->clock * 1000);
624 calc_val /= mode->htotal;
625 refresh = (calc_val + vtotal / 2) / vtotal;
627 if (mode->flags & DRM_MODE_FLAG_INTERLACE)
629 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
632 refresh /= mode->vscan;
636 EXPORT_SYMBOL(drm_mode_vrefresh);
639 * drm_mode_set_crtcinfo - set CRTC modesetting parameters
641 * @adjust_flags: unused? (FIXME)
646 * Setup the CRTC modesetting parameters for @p, adjusting if necessary.
648 void drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags)
650 if ((p == NULL) || ((p->type & DRM_MODE_TYPE_CRTC_C) == DRM_MODE_TYPE_BUILTIN))
653 p->crtc_hdisplay = p->hdisplay;
654 p->crtc_hsync_start = p->hsync_start;
655 p->crtc_hsync_end = p->hsync_end;
656 p->crtc_htotal = p->htotal;
657 p->crtc_hskew = p->hskew;
658 p->crtc_vdisplay = p->vdisplay;
659 p->crtc_vsync_start = p->vsync_start;
660 p->crtc_vsync_end = p->vsync_end;
661 p->crtc_vtotal = p->vtotal;
663 if (p->flags & DRM_MODE_FLAG_INTERLACE) {
664 if (adjust_flags & CRTC_INTERLACE_HALVE_V) {
665 p->crtc_vdisplay /= 2;
666 p->crtc_vsync_start /= 2;
667 p->crtc_vsync_end /= 2;
672 if (p->flags & DRM_MODE_FLAG_DBLSCAN) {
673 p->crtc_vdisplay *= 2;
674 p->crtc_vsync_start *= 2;
675 p->crtc_vsync_end *= 2;
680 p->crtc_vdisplay *= p->vscan;
681 p->crtc_vsync_start *= p->vscan;
682 p->crtc_vsync_end *= p->vscan;
683 p->crtc_vtotal *= p->vscan;
686 p->crtc_vblank_start = min(p->crtc_vsync_start, p->crtc_vdisplay);
687 p->crtc_vblank_end = max(p->crtc_vsync_end, p->crtc_vtotal);
688 p->crtc_hblank_start = min(p->crtc_hsync_start, p->crtc_hdisplay);
689 p->crtc_hblank_end = max(p->crtc_hsync_end, p->crtc_htotal);
691 EXPORT_SYMBOL(drm_mode_set_crtcinfo);
695 * drm_mode_copy - copy the mode
696 * @dst: mode to overwrite
702 * Copy an existing mode into another mode, preserving the object id
703 * of the destination mode.
705 void drm_mode_copy(struct drm_display_mode *dst, const struct drm_display_mode *src)
707 int id = dst->base.id;
711 INIT_LIST_HEAD(&dst->head);
713 EXPORT_SYMBOL(drm_mode_copy);
716 * drm_mode_duplicate - allocate and duplicate an existing mode
717 * @m: mode to duplicate
722 * Just allocate a new mode, copy the existing mode into it, and return
723 * a pointer to it. Used to create new instances of established modes.
725 struct drm_display_mode *drm_mode_duplicate(struct drm_device *dev,
726 const struct drm_display_mode *mode)
728 struct drm_display_mode *nmode;
730 nmode = drm_mode_create(dev);
734 drm_mode_copy(nmode, mode);
738 EXPORT_SYMBOL(drm_mode_duplicate);
741 * drm_mode_equal - test modes for equality
743 * @mode2: second mode
748 * Check to see if @mode1 and @mode2 are equivalent.
751 * True if the modes are equal, false otherwise.
753 bool drm_mode_equal(const struct drm_display_mode *mode1, const struct drm_display_mode *mode2)
755 /* do clock check convert to PICOS so fb modes get matched
757 if (mode1->clock && mode2->clock) {
758 if (KHZ2PICOS(mode1->clock) != KHZ2PICOS(mode2->clock))
760 } else if (mode1->clock != mode2->clock)
763 if (mode1->hdisplay == mode2->hdisplay &&
764 mode1->hsync_start == mode2->hsync_start &&
765 mode1->hsync_end == mode2->hsync_end &&
766 mode1->htotal == mode2->htotal &&
767 mode1->hskew == mode2->hskew &&
768 mode1->vdisplay == mode2->vdisplay &&
769 mode1->vsync_start == mode2->vsync_start &&
770 mode1->vsync_end == mode2->vsync_end &&
771 mode1->vtotal == mode2->vtotal &&
772 mode1->vscan == mode2->vscan &&
773 mode1->flags == mode2->flags)
778 EXPORT_SYMBOL(drm_mode_equal);
781 * drm_mode_validate_size - make sure modes adhere to size constraints
783 * @mode_list: list of modes to check
784 * @maxX: maximum width
785 * @maxY: maximum height
786 * @maxPitch: max pitch
789 * Caller must hold a lock protecting @mode_list.
791 * The DRM device (@dev) has size and pitch limits. Here we validate the
792 * modes we probed for @dev against those limits and set their status as
795 void drm_mode_validate_size(struct drm_device *dev,
796 struct list_head *mode_list,
797 int maxX, int maxY, int maxPitch)
799 struct drm_display_mode *mode;
801 list_for_each_entry(mode, mode_list, head) {
802 if (maxPitch > 0 && mode->hdisplay > maxPitch)
803 mode->status = MODE_BAD_WIDTH;
805 if (maxX > 0 && mode->hdisplay > maxX)
806 mode->status = MODE_VIRTUAL_X;
808 if (maxY > 0 && mode->vdisplay > maxY)
809 mode->status = MODE_VIRTUAL_Y;
812 EXPORT_SYMBOL(drm_mode_validate_size);
815 * drm_mode_validate_clocks - validate modes against clock limits
817 * @mode_list: list of modes to check
818 * @min: minimum clock rate array
819 * @max: maximum clock rate array
820 * @n_ranges: number of clock ranges (size of arrays)
823 * Caller must hold a lock protecting @mode_list.
825 * Some code may need to check a mode list against the clock limits of the
826 * device in question. This function walks the mode list, testing to make
827 * sure each mode falls within a given range (defined by @min and @max
828 * arrays) and sets @mode->status as needed.
830 void drm_mode_validate_clocks(struct drm_device *dev,
831 struct list_head *mode_list,
832 int *min, int *max, int n_ranges)
834 struct drm_display_mode *mode;
837 list_for_each_entry(mode, mode_list, head) {
839 for (i = 0; i < n_ranges; i++) {
840 if (mode->clock >= min[i] && mode->clock <= max[i]) {
846 mode->status = MODE_CLOCK_RANGE;
849 EXPORT_SYMBOL(drm_mode_validate_clocks);
852 * drm_mode_prune_invalid - remove invalid modes from mode list
854 * @mode_list: list of modes to check
855 * @verbose: be verbose about it
858 * Caller must hold a lock protecting @mode_list.
860 * Once mode list generation is complete, a caller can use this routine to
861 * remove invalid modes from a mode list. If any of the modes have a
862 * status other than %MODE_OK, they are removed from @mode_list and freed.
864 void drm_mode_prune_invalid(struct drm_device *dev,
865 struct list_head *mode_list, bool verbose)
867 struct drm_display_mode *mode, *t;
869 list_for_each_entry_safe(mode, t, mode_list, head) {
870 if (mode->status != MODE_OK) {
871 list_del(&mode->head);
873 drm_mode_debug_printmodeline(mode);
874 DRM_DEBUG_KMS("Not using %s mode %d\n",
875 mode->name, mode->status);
877 drm_mode_destroy(dev, mode);
881 EXPORT_SYMBOL(drm_mode_prune_invalid);
884 * drm_mode_compare - compare modes for favorability
886 * @lh_a: list_head for first mode
887 * @lh_b: list_head for second mode
892 * Compare two modes, given by @lh_a and @lh_b, returning a value indicating
896 * Negative if @lh_a is better than @lh_b, zero if they're equivalent, or
897 * positive if @lh_b is better than @lh_a.
899 static int drm_mode_compare(void *priv, struct list_head *lh_a, struct list_head *lh_b)
901 struct drm_display_mode *a = list_entry(lh_a, struct drm_display_mode, head);
902 struct drm_display_mode *b = list_entry(lh_b, struct drm_display_mode, head);
905 diff = ((b->type & DRM_MODE_TYPE_PREFERRED) != 0) -
906 ((a->type & DRM_MODE_TYPE_PREFERRED) != 0);
909 diff = b->hdisplay * b->vdisplay - a->hdisplay * a->vdisplay;
913 diff = b->vrefresh - a->vrefresh;
917 diff = b->clock - a->clock;
922 * drm_mode_sort - sort mode list
923 * @mode_list: list to sort
926 * Caller must hold a lock protecting @mode_list.
928 * Sort @mode_list by favorability, putting good modes first.
930 void drm_mode_sort(struct list_head *mode_list)
932 drm_list_sort(NULL, mode_list, drm_mode_compare);
934 EXPORT_SYMBOL(drm_mode_sort);
937 * drm_mode_connector_list_update - update the mode list for the connector
938 * @connector: the connector to update
941 * Caller must hold a lock protecting @mode_list.
943 * This moves the modes from the @connector probed_modes list
944 * to the actual mode list. It compares the probed mode against the current
945 * list and only adds different modes. All modes unverified after this point
946 * will be removed by the prune invalid modes.
948 void drm_mode_connector_list_update(struct drm_connector *connector)
950 struct drm_display_mode *mode;
951 struct drm_display_mode *pmode, *pt;
954 list_for_each_entry_safe(pmode, pt, &connector->probed_modes,
957 /* go through current modes checking for the new probed mode */
958 list_for_each_entry(mode, &connector->modes, head) {
959 if (drm_mode_equal(pmode, mode)) {
961 /* if equal delete the probed mode */
962 mode->status = pmode->status;
963 /* Merge type bits together */
964 mode->type |= pmode->type;
965 list_del(&pmode->head);
966 drm_mode_destroy(connector->dev, pmode);
972 list_move_tail(&pmode->head, &connector->modes);
976 EXPORT_SYMBOL(drm_mode_connector_list_update);
979 * drm_mode_parse_command_line_for_connector - parse command line for connector
980 * @mode_option - per connector mode option
981 * @connector - connector to parse line for
983 * This parses the connector specific then generic command lines for
984 * modes and options to configure the connector.
986 * This uses the same parameters as the fb modedb.c, except for extra
987 * <xres>x<yres>[M][R][-<bpp>][@<refresh>][i][m][eDd]
989 * enable/enable Digital/disable bit at the end
991 bool drm_mode_parse_command_line_for_connector(const char *mode_option,
992 struct drm_connector *connector,
993 struct drm_cmdline_mode *mode)
996 unsigned int namelen;
997 bool res_specified = false, bpp_specified = false, refresh_specified = false;
998 unsigned int xres = 0, yres = 0, bpp = 32, refresh = 0;
999 bool yres_specified = false, cvt = false, rb = false;
1000 bool interlace = false, margins = false, was_digit = false;
1002 enum drm_connector_force force = DRM_FORCE_UNSPECIFIED;
1006 mode_option = fb_mode_option;
1010 mode->specified = false;
1015 namelen = strlen(name);
1016 for (i = namelen-1; i >= 0; i--) {
1019 if (!refresh_specified && !bpp_specified &&
1020 !yres_specified && !cvt && !rb && was_digit) {
1021 refresh = simple_strtol(&name[i+1], NULL, 10);
1022 refresh_specified = true;
1028 if (!bpp_specified && !yres_specified && !cvt &&
1030 bpp = simple_strtol(&name[i+1], NULL, 10);
1031 bpp_specified = true;
1037 if (!yres_specified && was_digit) {
1038 yres = simple_strtol(&name[i+1], NULL, 10);
1039 yres_specified = true;
1047 if (yres_specified || cvt || was_digit)
1052 if (yres_specified || cvt || rb || was_digit)
1057 if (cvt || yres_specified || was_digit)
1062 if (cvt || yres_specified || was_digit)
1067 if (yres_specified || bpp_specified || refresh_specified ||
1068 was_digit || (force != DRM_FORCE_UNSPECIFIED))
1071 force = DRM_FORCE_ON;
1074 if (yres_specified || bpp_specified || refresh_specified ||
1075 was_digit || (force != DRM_FORCE_UNSPECIFIED))
1078 if ((connector->connector_type != DRM_MODE_CONNECTOR_DVII) &&
1079 (connector->connector_type != DRM_MODE_CONNECTOR_HDMIB))
1080 force = DRM_FORCE_ON;
1082 force = DRM_FORCE_ON_DIGITAL;
1085 if (yres_specified || bpp_specified || refresh_specified ||
1086 was_digit || (force != DRM_FORCE_UNSPECIFIED))
1089 force = DRM_FORCE_OFF;
1096 if (i < 0 && yres_specified) {
1098 xres = simple_strtol(name, &ch, 10);
1099 if ((ch != NULL) && (*ch == 'x'))
1100 res_specified = true;
1103 } else if (!yres_specified && was_digit) {
1104 /* catch mode that begins with digits but has no 'x' */
1110 "parse error at position %i in video mode '%s'\n",
1112 mode->specified = false;
1116 if (res_specified) {
1117 mode->specified = true;
1122 if (refresh_specified) {
1123 mode->refresh_specified = true;
1124 mode->refresh = refresh;
1127 if (bpp_specified) {
1128 mode->bpp_specified = true;
1133 mode->interlace = interlace;
1134 mode->margins = margins;
1135 mode->force = force;
1139 EXPORT_SYMBOL(drm_mode_parse_command_line_for_connector);
1141 struct drm_display_mode *
1142 drm_mode_create_from_cmdline_mode(struct drm_device *dev,
1143 struct drm_cmdline_mode *cmd)
1145 struct drm_display_mode *mode;
1148 mode = drm_cvt_mode(dev,
1149 cmd->xres, cmd->yres,
1150 cmd->refresh_specified ? cmd->refresh : 60,
1151 cmd->rb, cmd->interlace,
1154 mode = drm_gtf_mode(dev,
1155 cmd->xres, cmd->yres,
1156 cmd->refresh_specified ? cmd->refresh : 60,
1162 drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V);
1165 EXPORT_SYMBOL(drm_mode_create_from_cmdline_mode);