2 * Copyright 2003 Eric Anholt.
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19 * AUTHOR BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
21 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24 #include <sys/cdefs.h>
25 __FBSDID("$FreeBSD$");
29 * \brief PCI consistent, DMA-accessible memory allocation.
31 * \author Eric Anholt <anholt@FreeBSD.org>
34 #include <dev/drm2/drmP.h>
36 /**********************************************************************/
37 /** \name PCI memory */
41 drm_pci_busdma_callback(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
43 drm_dma_handle_t *dmah = arg;
48 KASSERT(nsegs == 1, ("drm_pci_busdma_callback: bad dma segment count"));
49 dmah->busaddr = segs[0].ds_addr;
53 * \brief Allocate a physically contiguous DMA-accessible consistent
57 drm_pci_alloc(struct drm_device *dev, size_t size,
58 size_t align, dma_addr_t maxaddr)
60 drm_dma_handle_t *dmah;
63 /* Need power-of-two alignment, so fail the allocation if it isn't. */
64 if ((align & (align - 1)) != 0) {
65 DRM_ERROR("drm_pci_alloc with non-power-of-two alignment %d\n",
70 dmah = malloc(sizeof(drm_dma_handle_t), DRM_MEM_DMA, M_ZERO | M_NOWAIT);
74 /* Make sure we aren't holding mutexes here */
75 mtx_assert(&dev->dma_lock, MA_NOTOWNED);
76 if (mtx_owned(&dev->dma_lock))
77 DRM_ERROR("called while holding dma_lock\n");
79 ret = bus_dma_tag_create(NULL, align, 0, /* tag, align, boundary */
80 maxaddr, BUS_SPACE_MAXADDR, /* lowaddr, highaddr */
81 NULL, NULL, /* filtfunc, filtfuncargs */
82 size, 1, size, /* maxsize, nsegs, maxsegsize */
83 0, NULL, NULL, /* flags, lockfunc, lockfuncargs */
86 free(dmah, DRM_MEM_DMA);
90 ret = bus_dmamem_alloc(dmah->tag, &dmah->vaddr,
91 BUS_DMA_WAITOK | BUS_DMA_ZERO | BUS_DMA_NOCACHE, &dmah->map);
93 bus_dma_tag_destroy(dmah->tag);
94 free(dmah, DRM_MEM_DMA);
98 ret = bus_dmamap_load(dmah->tag, dmah->map, dmah->vaddr, size,
99 drm_pci_busdma_callback, dmah, BUS_DMA_NOWAIT);
101 bus_dmamem_free(dmah->tag, dmah->vaddr, dmah->map);
102 bus_dma_tag_destroy(dmah->tag);
103 free(dmah, DRM_MEM_DMA);
111 * \brief Free a DMA-accessible consistent memory block.
114 drm_pci_free(struct drm_device *dev, drm_dma_handle_t *dmah)
119 bus_dmamap_unload(dmah->tag, dmah->map);
120 bus_dmamem_free(dmah->tag, dmah->vaddr, dmah->map);
121 bus_dma_tag_destroy(dmah->tag);
123 free(dmah, DRM_MEM_DMA);
128 int drm_pcie_get_speed_cap_mask(struct drm_device *dev, u32 *mask)
132 u32 lnkcap = 0, lnkcap2 = 0;
135 if (!drm_device_is_pcie(dev))
139 device_get_parent( /* pcib */
140 device_get_parent( /* `-- pci */
141 device_get_parent( /* `-- vgapci */
142 dev->device))); /* `-- drmn */
145 pci_find_cap(root, PCIY_EXPRESS, &pos);
149 /* we've been informed via and serverworks don't make the cut */
150 if (pci_get_vendor(root) == PCI_VENDOR_ID_VIA ||
151 pci_get_vendor(root) == PCI_VENDOR_ID_SERVERWORKS)
154 lnkcap = pci_read_config(root, pos + PCIER_LINK_CAP, 4);
155 lnkcap2 = pci_read_config(root, pos + PCIER_LINK_CAP2, 4);
157 lnkcap &= PCIEM_LINK_CAP_MAX_SPEED;
160 #define PCI_EXP_LNKCAP2_SLS_2_5GB 0x02 /* Supported Link Speed 2.5GT/s */
161 #define PCI_EXP_LNKCAP2_SLS_5_0GB 0x04 /* Supported Link Speed 5.0GT/s */
162 #define PCI_EXP_LNKCAP2_SLS_8_0GB 0x08 /* Supported Link Speed 8.0GT/s */
164 if (lnkcap2) { /* PCIE GEN 3.0 */
165 if (lnkcap2 & PCI_EXP_LNKCAP2_SLS_2_5GB)
166 *mask |= DRM_PCIE_SPEED_25;
167 if (lnkcap2 & PCI_EXP_LNKCAP2_SLS_5_0GB)
168 *mask |= DRM_PCIE_SPEED_50;
169 if (lnkcap2 & PCI_EXP_LNKCAP2_SLS_8_0GB)
170 *mask |= DRM_PCIE_SPEED_80;
173 *mask |= DRM_PCIE_SPEED_25;
175 *mask |= DRM_PCIE_SPEED_50;
178 DRM_INFO("probing gen 2 caps for device %x:%x = %x/%x\n", pci_get_vendor(root), pci_get_device(root), lnkcap, lnkcap2);