sys/dev/drm2/i915/intel_crt.c

   1 /*
   2  * Copyright © 2006-2007 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21  * DEALINGS IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *      Eric Anholt <eric@anholt.net>
  25  */
  26
  27 #include <sys/cdefs.h>
  28 __FBSDID("$FreeBSD$");
  29
  30 #include <dev/drm2/drmP.h>
  31 #include <dev/drm2/drm_crtc.h>
  32 #include <dev/drm2/drm_crtc_helper.h>
  33 #include <dev/drm2/drm_edid.h>
  34 #include <dev/drm2/i915/intel_drv.h>
  35 #include <dev/drm2/i915/i915_drm.h>
  36 #include <dev/drm2/i915/i915_drv.h>
  37
  38 /* Here's the desired hotplug mode */
  39 #define ADPA_HOTPLUG_BITS (ADPA_CRT_HOTPLUG_PERIOD_128 |                \
  40                            ADPA_CRT_HOTPLUG_WARMUP_10MS |               \
  41                            ADPA_CRT_HOTPLUG_SAMPLE_4S |                 \
  42                            ADPA_CRT_HOTPLUG_VOLTAGE_50 |                \
  43                            ADPA_CRT_HOTPLUG_VOLREF_325MV |              \
  44                            ADPA_CRT_HOTPLUG_ENABLE)
  45
  46 struct intel_crt {
  47         struct intel_encoder base;
  48         /* DPMS state is stored in the connector, which we need in the
  49          * encoder's enable/disable callbacks */
  50         struct intel_connector *connector;
  51         bool force_hotplug_required;
  52         u32 adpa_reg;
  53 };
  54
  55 static struct intel_crt *intel_attached_crt(struct drm_connector *connector)
  56 {
  57         return container_of(intel_attached_encoder(connector),
  58                             struct intel_crt, base);
  59 }
  60
  61 static struct intel_crt *intel_encoder_to_crt(struct intel_encoder *encoder)
  62 {
  63         return container_of(encoder, struct intel_crt, base);
  64 }
  65
  66 static bool intel_crt_get_hw_state(struct intel_encoder *encoder,
  67                                    enum pipe *pipe)
  68 {
  69         struct drm_device *dev = encoder->base.dev;
  70         struct drm_i915_private *dev_priv = dev->dev_private;
  71         struct intel_crt *crt = intel_encoder_to_crt(encoder);
  72         u32 tmp;
  73
  74         tmp = I915_READ(crt->adpa_reg);
  75
  76         if (!(tmp & ADPA_DAC_ENABLE))
  77                 return false;
  78
  79         if (HAS_PCH_CPT(dev))
  80                 *pipe = PORT_TO_PIPE_CPT(tmp);
  81         else
  82                 *pipe = PORT_TO_PIPE(tmp);
  83
  84         return true;
  85 }
  86
  87 /* Note: The caller is required to filter out dpms modes not supported by the
  88  * platform. */
  89 static void intel_crt_set_dpms(struct intel_encoder *encoder, int mode)
  90 {
  91         struct drm_device *dev = encoder->base.dev;
  92         struct drm_i915_private *dev_priv = dev->dev_private;
  93         struct intel_crt *crt = intel_encoder_to_crt(encoder);
  94         u32 temp;
  95
  96         temp = I915_READ(crt->adpa_reg);
  97         temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE);
  98         temp &= ~ADPA_DAC_ENABLE;
  99
 100         switch (mode) {
 101         case DRM_MODE_DPMS_ON:
 102                 temp |= ADPA_DAC_ENABLE;
 103                 break;
 104         case DRM_MODE_DPMS_STANDBY:
 105                 temp |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE;
 106                 break;
 107         case DRM_MODE_DPMS_SUSPEND:
 108                 temp |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE;
 109                 break;
 110         case DRM_MODE_DPMS_OFF:
 111                 temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE;
 112                 break;
 113         }
 114
 115         I915_WRITE(crt->adpa_reg, temp);
 116 }
 117
 118 static void intel_disable_crt(struct intel_encoder *encoder)
 119 {
 120         intel_crt_set_dpms(encoder, DRM_MODE_DPMS_OFF);
 121 }
 122
 123 static void intel_enable_crt(struct intel_encoder *encoder)
 124 {
 125         struct intel_crt *crt = intel_encoder_to_crt(encoder);
 126
 127         intel_crt_set_dpms(encoder, crt->connector->base.dpms);
 128 }
 129
 130
 131 static void intel_crt_dpms(struct drm_connector *connector, int mode)
 132 {
 133         struct drm_device *dev = connector->dev;
 134         struct intel_encoder *encoder = intel_attached_encoder(connector);
 135         struct drm_crtc *crtc;
 136         int old_dpms;
 137
 138         /* PCH platforms and VLV only support on/off. */
 139         if (INTEL_INFO(dev)->gen >= 5 && mode != DRM_MODE_DPMS_ON)
 140                 mode = DRM_MODE_DPMS_OFF;
 141
 142         if (mode == connector->dpms)
 143                 return;
 144
 145         old_dpms = connector->dpms;
 146         connector->dpms = mode;
 147
 148         /* Only need to change hw state when actually enabled */
 149         crtc = encoder->base.crtc;
 150         if (!crtc) {
 151                 encoder->connectors_active = false;
 152                 return;
 153         }
 154
 155         /* We need the pipe to run for anything but OFF. */
 156         if (mode == DRM_MODE_DPMS_OFF)
 157                 encoder->connectors_active = false;
 158         else
 159                 encoder->connectors_active = true;
 160
 161         if (mode < old_dpms) {
 162                 /* From off to on, enable the pipe first. */
 163                 intel_crtc_update_dpms(crtc);
 164
 165                 intel_crt_set_dpms(encoder, mode);
 166         } else {
 167                 intel_crt_set_dpms(encoder, mode);
 168
 169                 intel_crtc_update_dpms(crtc);
 170         }
 171
 172         intel_modeset_check_state(connector->dev);
 173 }
 174
 175 static int intel_crt_mode_valid(struct drm_connector *connector,
 176                                 struct drm_display_mode *mode)
 177 {
 178         struct drm_device *dev = connector->dev;
 179
 180         int max_clock = 0;
 181         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
 182                 return MODE_NO_DBLESCAN;
 183
 184         if (mode->clock < 25000)
 185                 return MODE_CLOCK_LOW;
 186
 187         if (IS_GEN2(dev))
 188                 max_clock = 350000;
 189         else
 190                 max_clock = 400000;
 191         if (mode->clock > max_clock)
 192                 return MODE_CLOCK_HIGH;
 193
 194         /* The FDI receiver on LPT only supports 8bpc and only has 2 lanes. */
 195         if (HAS_PCH_LPT(dev) &&
 196             (ironlake_get_lanes_required(mode->clock, 270000, 24) > 2))
 197                 return MODE_CLOCK_HIGH;
 198
 199         return MODE_OK;
 200 }
 201
 202 static bool intel_crt_mode_fixup(struct drm_encoder *encoder,
 203                                  const struct drm_display_mode *mode,
 204                                  struct drm_display_mode *adjusted_mode)
 205 {
 206         return true;
 207 }
 208
 209 static void intel_crt_mode_set(struct drm_encoder *encoder,
 210                                struct drm_display_mode *mode,
 211                                struct drm_display_mode *adjusted_mode)
 212 {
 213
 214         struct drm_device *dev = encoder->dev;
 215         struct drm_crtc *crtc = encoder->crtc;
 216         struct intel_crt *crt =
 217                 intel_encoder_to_crt(to_intel_encoder(encoder));
 218         struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
 219         struct drm_i915_private *dev_priv = dev->dev_private;
 220         u32 adpa;
 221
 222         if (HAS_PCH_SPLIT(dev))
 223                 adpa = ADPA_HOTPLUG_BITS;
 224         else
 225                 adpa = 0;
 226
 227         if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
 228                 adpa |= ADPA_HSYNC_ACTIVE_HIGH;
 229         if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
 230                 adpa |= ADPA_VSYNC_ACTIVE_HIGH;
 231
 232         /* For CPT allow 3 pipe config, for others just use A or B */
 233         if (HAS_PCH_LPT(dev))
 234                 ; /* Those bits don't exist here */
 235         else if (HAS_PCH_CPT(dev))
 236                 adpa |= PORT_TRANS_SEL_CPT(intel_crtc->pipe);
 237         else if (intel_crtc->pipe == 0)
 238                 adpa |= ADPA_PIPE_A_SELECT;
 239         else
 240                 adpa |= ADPA_PIPE_B_SELECT;
 241
 242         if (!HAS_PCH_SPLIT(dev))
 243                 I915_WRITE(BCLRPAT(intel_crtc->pipe), 0);
 244
 245         I915_WRITE(crt->adpa_reg, adpa);
 246 }
 247
 248 static bool intel_ironlake_crt_detect_hotplug(struct drm_connector *connector)
 249 {
 250         struct drm_device *dev = connector->dev;
 251         struct intel_crt *crt = intel_attached_crt(connector);
 252         struct drm_i915_private *dev_priv = dev->dev_private;
 253         u32 adpa;
 254         bool ret;
 255
 256         /* The first time through, trigger an explicit detection cycle */
 257         if (crt->force_hotplug_required) {
 258                 bool turn_off_dac = HAS_PCH_SPLIT(dev);
 259                 u32 save_adpa;
 260
 261                 crt->force_hotplug_required = 0;
 262
 263                 save_adpa = adpa = I915_READ(PCH_ADPA);
 264                 DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
 265
 266                 adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
 267                 if (turn_off_dac)
 268                         adpa &= ~ADPA_DAC_ENABLE;
 269
 270                 I915_WRITE(PCH_ADPA, adpa);
 271
 272                 if (wait_for((I915_READ(PCH_ADPA) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
 273                              1000))
 274                         DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
 275
 276                 if (turn_off_dac) {
 277                         I915_WRITE(PCH_ADPA, save_adpa);
 278                         POSTING_READ(PCH_ADPA);
 279                 }
 280         }
 281
 282         /* Check the status to see if both blue and green are on now */
 283         adpa = I915_READ(PCH_ADPA);
 284         if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
 285                 ret = true;
 286         else
 287                 ret = false;
 288         DRM_DEBUG_KMS("ironlake hotplug adpa=0x%x, result %d\n", adpa, ret);
 289
 290         return ret;
 291 }
 292
 293 static bool valleyview_crt_detect_hotplug(struct drm_connector *connector)
 294 {
 295         struct drm_device *dev = connector->dev;
 296         struct drm_i915_private *dev_priv = dev->dev_private;
 297         u32 adpa;
 298         bool ret;
 299         u32 save_adpa;
 300
 301         save_adpa = adpa = I915_READ(ADPA);
 302         DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
 303
 304         adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
 305
 306         I915_WRITE(ADPA, adpa);
 307
 308         if (wait_for((I915_READ(ADPA) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
 309                      1000)) {
 310                 DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
 311                 I915_WRITE(ADPA, save_adpa);
 312         }
 313
 314         /* Check the status to see if both blue and green are on now */
 315         adpa = I915_READ(ADPA);
 316         if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
 317                 ret = true;
 318         else
 319                 ret = false;
 320
 321         DRM_DEBUG_KMS("valleyview hotplug adpa=0x%x, result %d\n", adpa, ret);
 322
 323         /* FIXME: debug force function and remove */
 324         ret = true;
 325
 326         return ret;
 327 }
 328
 329 /**
 330  * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
 331  *
 332  * Not for i915G/i915GM
 333  *
 334  * \return true if CRT is connected.
 335  * \return false if CRT is disconnected.
 336  */
 337 static bool intel_crt_detect_hotplug(struct drm_connector *connector)
 338 {
 339         struct drm_device *dev = connector->dev;
 340         struct drm_i915_private *dev_priv = dev->dev_private;
 341         u32 hotplug_en, orig, stat;
 342         bool ret = false;
 343         int i, tries = 0;
 344
 345         if (HAS_PCH_SPLIT(dev))
 346                 return intel_ironlake_crt_detect_hotplug(connector);
 347
 348         if (IS_VALLEYVIEW(dev))
 349                 return valleyview_crt_detect_hotplug(connector);
 350
 351         /*
 352          * On 4 series desktop, CRT detect sequence need to be done twice
 353          * to get a reliable result.
 354          */
 355
 356         if (IS_G4X(dev) && !IS_GM45(dev))
 357                 tries = 2;
 358         else
 359                 tries = 1;
 360         hotplug_en = orig = I915_READ(PORT_HOTPLUG_EN);
 361         hotplug_en |= CRT_HOTPLUG_FORCE_DETECT;
 362
 363         for (i = 0; i < tries ; i++) {
 364                 /* turn on the FORCE_DETECT */
 365                 I915_WRITE(PORT_HOTPLUG_EN, hotplug_en);
 366                 /* wait for FORCE_DETECT to go off */
 367                 if (wait_for((I915_READ(PORT_HOTPLUG_EN) &
 368                               CRT_HOTPLUG_FORCE_DETECT) == 0,
 369                              1000))
 370                         DRM_DEBUG_KMS("timed out waiting for FORCE_DETECT to go off");
 371         }
 372
 373         stat = I915_READ(PORT_HOTPLUG_STAT);
 374         if ((stat & CRT_HOTPLUG_MONITOR_MASK) != CRT_HOTPLUG_MONITOR_NONE)
 375                 ret = true;
 376
 377         /* clear the interrupt we just generated, if any */
 378         I915_WRITE(PORT_HOTPLUG_STAT, CRT_HOTPLUG_INT_STATUS);
 379
 380         /* and put the bits back */
 381         I915_WRITE(PORT_HOTPLUG_EN, orig);
 382
 383         return ret;
 384 }
 385
 386 static struct edid *intel_crt_get_edid(struct drm_connector *connector,
 387                                 device_t i2c)
 388 {
 389         struct edid *edid;
 390
 391         edid = drm_get_edid(connector, i2c);
 392
 393         if (!edid && !intel_gmbus_is_forced_bit(i2c)) {
 394                 DRM_DEBUG_KMS("CRT GMBUS EDID read failed, retry using GPIO bit-banging\n");
 395                 intel_gmbus_force_bit(i2c, true);
 396                 edid = drm_get_edid(connector, i2c);
 397                 intel_gmbus_force_bit(i2c, false);
 398         }
 399
 400         return edid;
 401 }
 402
 403 /* local version of intel_ddc_get_modes() to use intel_crt_get_edid() */
 404 static int intel_crt_ddc_get_modes(struct drm_connector *connector,
 405                                 device_t adapter)
 406 {
 407         struct edid *edid;
 408         int ret;
 409
 410         edid = intel_crt_get_edid(connector, adapter);
 411         if (!edid)
 412                 return 0;
 413
 414         ret = intel_connector_update_modes(connector, edid);
 415         free(edid, DRM_MEM_KMS);
 416
 417         return ret;
 418 }
 419
 420 static bool intel_crt_detect_ddc(struct drm_connector *connector)
 421 {
 422         struct intel_crt *crt = intel_attached_crt(connector);
 423         struct drm_i915_private *dev_priv = crt->base.base.dev->dev_private;
 424         struct edid *edid;
 425         device_t i2c;
 426         bool res = false;
 427
 428         BUG_ON(crt->base.type != INTEL_OUTPUT_ANALOG);
 429
 430         i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->crt_ddc_pin);
 431         edid = intel_crt_get_edid(connector, i2c);
 432
 433         if (edid) {
 434                 bool is_digital = edid->input & DRM_EDID_INPUT_DIGITAL;
 435
 436                 /*
 437                  * This may be a DVI-I connector with a shared DDC
 438                  * link between analog and digital outputs, so we
 439                  * have to check the EDID input spec of the attached device.
 440                  */
 441                 if (!is_digital) {
 442                         DRM_DEBUG_KMS("CRT detected via DDC:0x50 [EDID]\n");
 443                         res = true;
 444                         goto out;
 445                 }
 446
 447                 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [EDID reports a digital panel]\n");
 448         } else {
 449                 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [no valid EDID found]\n");
 450         }
 451
 452 out:
 453         free(edid, DRM_MEM_KMS);
 454
 455         return res;
 456 }
 457
 458 static enum drm_connector_status
 459 intel_crt_load_detect(struct intel_crt *crt)
 460 {
 461         struct drm_device *dev = crt->base.base.dev;
 462         struct drm_i915_private *dev_priv = dev->dev_private;
 463         uint32_t pipe = to_intel_crtc(crt->base.base.crtc)->pipe;
 464         uint32_t save_bclrpat;
 465         uint32_t save_vtotal;
 466         uint32_t vtotal, vactive;
 467         uint32_t vsample;
 468         uint32_t vblank, vblank_start, vblank_end;
 469         uint32_t dsl;
 470         uint32_t bclrpat_reg;
 471         uint32_t vtotal_reg;
 472         uint32_t vblank_reg;
 473         uint32_t vsync_reg;
 474         uint32_t pipeconf_reg;
 475         uint32_t pipe_dsl_reg;
 476         uint8_t st00;
 477         enum drm_connector_status status;
 478
 479         DRM_DEBUG_KMS("starting load-detect on CRT\n");
 480
 481         bclrpat_reg = BCLRPAT(pipe);
 482         vtotal_reg = VTOTAL(pipe);
 483         vblank_reg = VBLANK(pipe);
 484         vsync_reg = VSYNC(pipe);
 485         pipeconf_reg = PIPECONF(pipe);
 486         pipe_dsl_reg = PIPEDSL(pipe);
 487
 488         save_bclrpat = I915_READ(bclrpat_reg);
 489         save_vtotal = I915_READ(vtotal_reg);
 490         vblank = I915_READ(vblank_reg);
 491
 492         vtotal = ((save_vtotal >> 16) & 0xfff) + 1;
 493         vactive = (save_vtotal & 0x7ff) + 1;
 494
 495         vblank_start = (vblank & 0xfff) + 1;
 496         vblank_end = ((vblank >> 16) & 0xfff) + 1;
 497
 498         /* Set the border color to purple. */
 499         I915_WRITE(bclrpat_reg, 0x500050);
 500
 501         if (!IS_GEN2(dev)) {
 502                 uint32_t pipeconf = I915_READ(pipeconf_reg);
 503                 I915_WRITE(pipeconf_reg, pipeconf | PIPECONF_FORCE_BORDER);
 504                 POSTING_READ(pipeconf_reg);
 505                 /* Wait for next Vblank to substitue
 506                  * border color for Color info */
 507                 intel_wait_for_vblank(dev, pipe);
 508                 st00 = I915_READ8(VGA_MSR_WRITE);
 509                 status = ((st00 & (1 << 4)) != 0) ?
 510                         connector_status_connected :
 511                         connector_status_disconnected;
 512
 513                 I915_WRITE(pipeconf_reg, pipeconf);
 514         } else {
 515                 bool restore_vblank = false;
 516                 int count, detect;
 517
 518                 /*
 519                 * If there isn't any border, add some.
 520                 * Yes, this will flicker
 521                 */
 522                 if (vblank_start <= vactive && vblank_end >= vtotal) {
 523                         uint32_t vsync = I915_READ(vsync_reg);
 524                         uint32_t vsync_start = (vsync & 0xffff) + 1;
 525
 526                         vblank_start = vsync_start;
 527                         I915_WRITE(vblank_reg,
 528                                    (vblank_start - 1) |
 529                                    ((vblank_end - 1) << 16));
 530                         restore_vblank = true;
 531                 }
 532                 /* sample in the vertical border, selecting the larger one */
 533                 if (vblank_start - vactive >= vtotal - vblank_end)
 534                         vsample = (vblank_start + vactive) >> 1;
 535                 else
 536                         vsample = (vtotal + vblank_end) >> 1;
 537
 538                 /*
 539                  * Wait for the border to be displayed
 540                  */
 541                 while (I915_READ(pipe_dsl_reg) >= vactive)
 542                         ;
 543                 while ((dsl = I915_READ(pipe_dsl_reg)) <= vsample)
 544                         ;
 545                 /*
 546                  * Watch ST00 for an entire scanline
 547                  */
 548                 detect = 0;
 549                 count = 0;
 550                 do {
 551                         count++;
 552                         /* Read the ST00 VGA status register */
 553                         st00 = I915_READ8(VGA_MSR_WRITE);
 554                         if (st00 & (1 << 4))
 555                                 detect++;
 556                 } while ((I915_READ(pipe_dsl_reg) == dsl));
 557
 558                 /* restore vblank if necessary */
 559                 if (restore_vblank)
 560                         I915_WRITE(vblank_reg, vblank);
 561                 /*
 562                  * If more than 3/4 of the scanline detected a monitor,
 563                  * then it is assumed to be present. This works even on i830,
 564                  * where there isn't any way to force the border color across
 565                  * the screen
 566                  */
 567                 status = detect * 4 > count * 3 ?
 568                          connector_status_connected :
 569                          connector_status_disconnected;
 570         }
 571
 572         /* Restore previous settings */
 573         I915_WRITE(bclrpat_reg, save_bclrpat);
 574
 575         return status;
 576 }
 577
 578 static enum drm_connector_status
 579 intel_crt_detect(struct drm_connector *connector, bool force)
 580 {
 581         struct drm_device *dev = connector->dev;
 582         struct intel_crt *crt = intel_attached_crt(connector);
 583         enum drm_connector_status status;
 584         struct intel_load_detect_pipe tmp;
 585
 586         if (I915_HAS_HOTPLUG(dev)) {
 587                 /* We can not rely on the HPD pin always being correctly wired
 588                  * up, for example many KVM do not pass it through, and so
 589                  * only trust an assertion that the monitor is connected.
 590                  */
 591                 if (intel_crt_detect_hotplug(connector)) {
 592                         DRM_DEBUG_KMS("CRT detected via hotplug\n");
 593                         return connector_status_connected;
 594                 } else
 595                         DRM_DEBUG_KMS("CRT not detected via hotplug\n");
 596         }
 597
 598         if (intel_crt_detect_ddc(connector))
 599                 return connector_status_connected;
 600
 601         /* Load detection is broken on HPD capable machines. Whoever wants a
 602          * broken monitor (without edid) to work behind a broken kvm (that fails
 603          * to have the right resistors for HP detection) needs to fix this up.
 604          * For now just bail out. */
 605         if (I915_HAS_HOTPLUG(dev))
 606                 return connector_status_disconnected;
 607
 608         if (!force)
 609                 return connector->status;
 610
 611         /* for pre-945g platforms use load detect */
 612         if (intel_get_load_detect_pipe(connector, NULL, &tmp)) {
 613                 if (intel_crt_detect_ddc(connector))
 614                         status = connector_status_connected;
 615                 else
 616                         status = intel_crt_load_detect(crt);
 617                 intel_release_load_detect_pipe(connector, &tmp);
 618         } else
 619                 status = connector_status_unknown;
 620
 621         return status;
 622 }
 623
 624 static void intel_crt_destroy(struct drm_connector *connector)
 625 {
 626         drm_connector_cleanup(connector);
 627         free(connector, DRM_MEM_KMS);
 628 }
 629
 630 static int intel_crt_get_modes(struct drm_connector *connector)
 631 {
 632         struct drm_device *dev = connector->dev;
 633         struct drm_i915_private *dev_priv = dev->dev_private;
 634         int ret;
 635         device_t i2c;
 636
 637         i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->crt_ddc_pin);
 638         ret = intel_crt_ddc_get_modes(connector, i2c);
 639         if (ret || !IS_G4X(dev))
 640                 return ret;
 641
 642         /* Try to probe digital port for output in DVI-I -> VGA mode. */
 643         i2c = intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPB);
 644         return intel_crt_ddc_get_modes(connector, i2c);
 645 }
 646
 647 static int intel_crt_set_property(struct drm_connector *connector,
 648                                   struct drm_property *property,
 649                                   uint64_t value)
 650 {
 651         return 0;
 652 }
 653
 654 static void intel_crt_reset(struct drm_connector *connector)
 655 {
 656         struct drm_device *dev = connector->dev;
 657         struct drm_i915_private *dev_priv = dev->dev_private;
 658         struct intel_crt *crt = intel_attached_crt(connector);
 659
 660         if (HAS_PCH_SPLIT(dev)) {
 661                 u32 adpa;
 662
 663                 adpa = I915_READ(PCH_ADPA);
 664                 adpa &= ~ADPA_CRT_HOTPLUG_MASK;
 665                 adpa |= ADPA_HOTPLUG_BITS;
 666                 I915_WRITE(PCH_ADPA, adpa);
 667                 POSTING_READ(PCH_ADPA);
 668
 669                 DRM_DEBUG_KMS("pch crt adpa set to 0x%x\n", adpa);
 670                 crt->force_hotplug_required = 1;
 671         }
 672
 673 }
 674
 675 /*
 676  * Routines for controlling stuff on the analog port
 677  */
 678
 679 static const struct drm_encoder_helper_funcs crt_encoder_funcs = {
 680         .mode_fixup = intel_crt_mode_fixup,
 681         .mode_set = intel_crt_mode_set,
 682         .disable = intel_encoder_noop,
 683 };
 684
 685 static const struct drm_connector_funcs intel_crt_connector_funcs = {
 686         .reset = intel_crt_reset,
 687         .dpms = intel_crt_dpms,
 688         .detect = intel_crt_detect,
 689         .fill_modes = drm_helper_probe_single_connector_modes,
 690         .destroy = intel_crt_destroy,
 691         .set_property = intel_crt_set_property,
 692 };
 693
 694 static const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs = {
 695         .mode_valid = intel_crt_mode_valid,
 696         .get_modes = intel_crt_get_modes,
 697         .best_encoder = intel_best_encoder,
 698 };
 699
 700 static const struct drm_encoder_funcs intel_crt_enc_funcs = {
 701         .destroy = intel_encoder_destroy,
 702 };
 703
 704 static int __init intel_no_crt_dmi_callback(const struct dmi_system_id *id)
 705 {
 706         DRM_INFO("Skipping CRT initialization for %s\n", id->ident);
 707         return 1;
 708 }
 709
 710 static const struct dmi_system_id intel_no_crt[] = {
 711         {
 712                 .callback = intel_no_crt_dmi_callback,
 713                 .ident = "ACER ZGB",
 714                 .matches = {
 715                         DMI_MATCH(DMI_SYS_VENDOR, "ACER"),
 716                         DMI_MATCH(DMI_PRODUCT_NAME, "ZGB"),
 717                 },
 718         },
 719         { }
 720 };
 721
 722 void intel_crt_init(struct drm_device *dev)
 723 {
 724         struct drm_connector *connector;
 725         struct intel_crt *crt;
 726         struct intel_connector *intel_connector;
 727         struct drm_i915_private *dev_priv = dev->dev_private;
 728
 729         /* Skip machines without VGA that falsely report hotplug events */
 730         if (dmi_check_system(intel_no_crt))
 731                 return;
 732
 733         crt = malloc(sizeof(struct intel_crt), DRM_MEM_KMS, M_WAITOK | M_ZERO);
 734         if (!crt)
 735                 return;
 736
 737         intel_connector = malloc(sizeof(struct intel_connector), DRM_MEM_KMS, M_WAITOK | M_ZERO);
 738         if (!intel_connector) {
 739                 free(crt, DRM_MEM_KMS);
 740                 return;
 741         }
 742
 743         connector = &intel_connector->base;
 744         crt->connector = intel_connector;
 745         drm_connector_init(dev, &intel_connector->base,
 746                            &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
 747
 748         drm_encoder_init(dev, &crt->base.base, &intel_crt_enc_funcs,
 749                          DRM_MODE_ENCODER_DAC);
 750
 751         intel_connector_attach_encoder(intel_connector, &crt->base);
 752
 753         crt->base.type = INTEL_OUTPUT_ANALOG;
 754         crt->base.cloneable = true;
 755         if (IS_I830(dev))
 756                 crt->base.crtc_mask = (1 << 0);
 757         else
 758                 crt->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
 759
 760         if (IS_GEN2(dev))
 761                 connector->interlace_allowed = 0;
 762         else
 763                 connector->interlace_allowed = 1;
 764         connector->doublescan_allowed = 0;
 765
 766         if (HAS_PCH_SPLIT(dev))
 767                 crt->adpa_reg = PCH_ADPA;
 768         else if (IS_VALLEYVIEW(dev))
 769                 crt->adpa_reg = VLV_ADPA;
 770         else
 771                 crt->adpa_reg = ADPA;
 772
 773         crt->base.disable = intel_disable_crt;
 774         crt->base.enable = intel_enable_crt;
 775         if (IS_HASWELL(dev))
 776                 crt->base.get_hw_state = intel_ddi_get_hw_state;
 777         else
 778                 crt->base.get_hw_state = intel_crt_get_hw_state;
 779         intel_connector->get_hw_state = intel_connector_get_hw_state;
 780
 781         drm_encoder_helper_add(&crt->base.base, &crt_encoder_funcs);
 782         drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs);
 783
 784         if (I915_HAS_HOTPLUG(dev))
 785                 connector->polled = DRM_CONNECTOR_POLL_HPD;
 786         else
 787                 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
 788
 789         /*
 790          * Configure the automatic hotplug detection stuff
 791          */
 792         crt->force_hotplug_required = 0;
 793
 794         dev_priv->hotplug_supported_mask |= CRT_HOTPLUG_INT_STATUS;
 795
 796         /*
 797          * TODO: find a proper way to discover whether we need to set the
 798          * polarity and link reversal bits or not, instead of relying on the
 799          * BIOS.
 800          */
 801         if (HAS_PCH_LPT(dev)) {
 802                 u32 fdi_config = FDI_RX_POLARITY_REVERSED_LPT |
 803                                  FDI_RX_LINK_REVERSAL_OVERRIDE;
 804
 805                 dev_priv->fdi_rx_config = I915_READ(_FDI_RXA_CTL) & fdi_config;
 806         }
 807 }