sys/dev/drm2/i915/intel_drv.h

   1 /*
   2  * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
   3  * Copyright (c) 2007-2008 Intel Corporation
   4  *   Jesse Barnes <jesse.barnes@intel.com>
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the next
  14  * paragraph) shall be included in all copies or substantial portions of the
  15  * Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  22  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  23  * IN THE SOFTWARE.
  24  *
  25  * $FreeBSD$
  26  */
  27 #ifndef __INTEL_DRV_H__
  28 #define __INTEL_DRV_H__
  29
  30 #include <dev/drm2/i915/i915_drm.h>
  31 #include <dev/drm2/i915/i915_drv.h>
  32 #include <dev/drm2/drm_crtc.h>
  33 #include <dev/drm2/drm_crtc_helper.h>
  34 #include <dev/drm2/drm_fb_helper.h>
  35 #include <dev/drm2/drm_dp_helper.h>
  36
  37 #define _intel_wait_for(DEV, COND, MS, W, WMSG)                         \
  38 ({                                                                      \
  39         int end, ret;                                                   \
  40                                                                         \
  41         end = ticks + (MS) * hz / 1000;                                 \
  42         ret = 0;                                                        \
  43                                                                         \
  44         while (!(COND)) {                                               \
  45                 if (time_after(ticks, end)) {                           \
  46                         ret = -ETIMEDOUT;                               \
  47                         break;                                          \
  48                 }                                                       \
  49                 if (W)                                                  \
  50                         pause((WMSG), 1);                               \
  51                 else                                                    \
  52                         DELAY(1000);                                    \
  53         }                                                               \
  54                                                                         \
  55         ret;                                                            \
  56 })
  57
  58 #define _wait_for(COND, MS, W, WMSG) ({ \
  59         int timeout__ = ticks + (MS) * hz / 1000;                       \
  60         int ret__ = 0;                                                  \
  61         while (!(COND)) {                                               \
  62                 if (time_after(ticks, timeout__)) {                     \
  63                         ret__ = -ETIMEDOUT;                             \
  64                         break;                                          \
  65                 }                                                       \
  66                 if (W) {                                                \
  67                         pause((WMSG), 1);                               \
  68                 } else {                                                \
  69                         DELAY(1000);                                    \
  70                 }                                                       \
  71         }                                                               \
  72         ret__;                                                          \
  73 })
  74
  75 #define wait_for_atomic_us(COND, US) ({ \
  76         int i, ret__ = -ETIMEDOUT;      \
  77         for (i = 0; i < (US); i++) {    \
  78                 if ((COND)) {           \
  79                         ret__ = 0;      \
  80                         break;          \
  81                 }                       \
  82                 DELAY(1);               \
  83         }                               \
  84         ret__;                          \
  85 })
  86
  87 #define wait_for(COND, MS) _intel_wait_for(NULL, COND, MS, 1, "915wfi")
  88 #define wait_for_atomic(COND, MS) _intel_wait_for(NULL, COND, MS, 0, "915wfa")
  89
  90 #define KHz(x) (1000*x)
  91 #define MHz(x) KHz(1000*x)
  92
  93 /*
  94  * Display related stuff
  95  */
  96
  97 /* store information about an Ixxx DVO */
  98 /* The i830->i865 use multiple DVOs with multiple i2cs */
  99 /* the i915, i945 have a single sDVO i2c bus - which is different */
 100 #define MAX_OUTPUTS 6
 101 /* maximum connectors per crtcs in the mode set */
 102 #define INTELFB_CONN_LIMIT 4
 103
 104 #define INTEL_I2C_BUS_DVO 1
 105 #define INTEL_I2C_BUS_SDVO 2
 106
 107 /* these are outputs from the chip - integrated only
 108    external chips are via DVO or SDVO output */
 109 #define INTEL_OUTPUT_UNUSED 0
 110 #define INTEL_OUTPUT_ANALOG 1
 111 #define INTEL_OUTPUT_DVO 2
 112 #define INTEL_OUTPUT_SDVO 3
 113 #define INTEL_OUTPUT_LVDS 4
 114 #define INTEL_OUTPUT_TVOUT 5
 115 #define INTEL_OUTPUT_HDMI 6
 116 #define INTEL_OUTPUT_DISPLAYPORT 7
 117 #define INTEL_OUTPUT_EDP 8
 118 #define INTEL_OUTPUT_UNKNOWN 9
 119
 120 #define INTEL_DVO_CHIP_NONE 0
 121 #define INTEL_DVO_CHIP_LVDS 1
 122 #define INTEL_DVO_CHIP_TMDS 2
 123 #define INTEL_DVO_CHIP_TVOUT 4
 124
 125 /* drm_display_mode->private_flags */
 126 #define INTEL_MODE_PIXEL_MULTIPLIER_SHIFT (0x0)
 127 #define INTEL_MODE_PIXEL_MULTIPLIER_MASK (0xf << INTEL_MODE_PIXEL_MULTIPLIER_SHIFT)
 128 #define INTEL_MODE_DP_FORCE_6BPC (0x10)
 129 /* This flag must be set by the encoder's mode_fixup if it changes the crtc
 130  * timings in the mode to prevent the crtc fixup from overwriting them.
 131  * Currently only lvds needs that. */
 132 #define INTEL_MODE_CRTC_TIMINGS_SET (0x20)
 133
 134 static inline void
 135 intel_mode_set_pixel_multiplier(struct drm_display_mode *mode,
 136                                 int multiplier)
 137 {
 138         mode->clock *= multiplier;
 139         mode->private_flags |= multiplier;
 140 }
 141
 142 static inline int
 143 intel_mode_get_pixel_multiplier(const struct drm_display_mode *mode)
 144 {
 145         return (mode->private_flags & INTEL_MODE_PIXEL_MULTIPLIER_MASK) >> INTEL_MODE_PIXEL_MULTIPLIER_SHIFT;
 146 }
 147
 148 struct intel_framebuffer {
 149         struct drm_framebuffer base;
 150         struct drm_i915_gem_object *obj;
 151 };
 152
 153 struct intel_fbdev {
 154         struct drm_fb_helper helper;
 155         struct intel_framebuffer ifb;
 156         struct list_head fbdev_list;
 157         struct drm_display_mode *our_mode;
 158 };
 159
 160 struct intel_encoder {
 161         struct drm_encoder base;
 162         /*
 163          * The new crtc this encoder will be driven from. Only differs from
 164          * base->crtc while a modeset is in progress.
 165          */
 166         struct intel_crtc *new_crtc;
 167
 168         int type;
 169         bool needs_tv_clock;
 170         /*
 171          * Intel hw has only one MUX where encoders could be clone, hence a
 172          * simple flag is enough to compute the possible_clones mask.
 173          */
 174         bool cloneable;
 175         bool connectors_active;
 176         void (*hot_plug)(struct intel_encoder *);
 177         void (*pre_enable)(struct intel_encoder *);
 178         void (*enable)(struct intel_encoder *);
 179         void (*disable)(struct intel_encoder *);
 180         void (*post_disable)(struct intel_encoder *);
 181         /* Read out the current hw state of this connector, returning true if
 182          * the encoder is active. If the encoder is enabled it also set the pipe
 183          * it is connected to in the pipe parameter. */
 184         bool (*get_hw_state)(struct intel_encoder *, enum pipe *pipe);
 185         int crtc_mask;
 186 };
 187
 188 struct intel_panel {
 189         struct drm_display_mode *fixed_mode;
 190         int fitting_mode;
 191 };
 192
 193 struct intel_connector {
 194         struct drm_connector base;
 195         /*
 196          * The fixed encoder this connector is connected to.
 197          */
 198         struct intel_encoder *encoder;
 199
 200         /*
 201          * The new encoder this connector will be driven. Only differs from
 202          * encoder while a modeset is in progress.
 203          */
 204         struct intel_encoder *new_encoder;
 205
 206         /* Reads out the current hw, returning true if the connector is enabled
 207          * and active (i.e. dpms ON state). */
 208         bool (*get_hw_state)(struct intel_connector *);
 209
 210         /* Panel info for eDP and LVDS */
 211         struct intel_panel panel;
 212
 213         /* Cached EDID for eDP and LVDS. May hold ERR_PTR for invalid EDID. */
 214         struct edid *edid;
 215         int edid_err;
 216 };
 217
 218 struct intel_crtc {
 219         struct drm_crtc base;
 220         enum pipe pipe;
 221         enum plane plane;
 222         enum transcoder cpu_transcoder;
 223         u8 lut_r[256], lut_g[256], lut_b[256];
 224         /*
 225          * Whether the crtc and the connected output pipeline is active. Implies
 226          * that crtc->enabled is set, i.e. the current mode configuration has
 227          * some outputs connected to this crtc.
 228          */
 229         bool active;
 230         bool primary_disabled; /* is the crtc obscured by a plane? */
 231         bool lowfreq_avail;
 232         struct intel_overlay *overlay;
 233         struct intel_unpin_work *unpin_work;
 234         int fdi_lanes;
 235
 236         atomic_t unpin_work_count;
 237
 238         /* Display surface base address adjustement for pageflips. Note that on
 239          * gen4+ this only adjusts up to a tile, offsets within a tile are
 240          * handled in the hw itself (with the TILEOFF register). */
 241         unsigned long dspaddr_offset;
 242
 243         struct drm_i915_gem_object *cursor_bo;
 244         uint32_t cursor_addr;
 245         int16_t cursor_x, cursor_y;
 246         int16_t cursor_width, cursor_height;
 247         bool cursor_visible;
 248         unsigned int bpp;
 249
 250         /* We can share PLLs across outputs if the timings match */
 251         struct intel_pch_pll *pch_pll;
 252         uint32_t ddi_pll_sel;
 253 };
 254
 255 struct intel_plane {
 256         struct drm_plane base;
 257         enum pipe pipe;
 258         struct drm_i915_gem_object *obj;
 259         bool can_scale;
 260         int max_downscale;
 261         u32 lut_r[1024], lut_g[1024], lut_b[1024];
 262         void (*update_plane)(struct drm_plane *plane,
 263                              struct drm_framebuffer *fb,
 264                              struct drm_i915_gem_object *obj,
 265                              int crtc_x, int crtc_y,
 266                              unsigned int crtc_w, unsigned int crtc_h,
 267                              uint32_t x, uint32_t y,
 268                              uint32_t src_w, uint32_t src_h);
 269         void (*disable_plane)(struct drm_plane *plane);
 270         int (*update_colorkey)(struct drm_plane *plane,
 271                                struct drm_intel_sprite_colorkey *key);
 272         void (*get_colorkey)(struct drm_plane *plane,
 273                              struct drm_intel_sprite_colorkey *key);
 274 };
 275
 276 struct intel_watermark_params {
 277         unsigned long fifo_size;
 278         unsigned long max_wm;
 279         unsigned long default_wm;
 280         unsigned long guard_size;
 281         unsigned long cacheline_size;
 282 };
 283
 284 struct cxsr_latency {
 285         int is_desktop;
 286         int is_ddr3;
 287         unsigned long fsb_freq;
 288         unsigned long mem_freq;
 289         unsigned long display_sr;
 290         unsigned long display_hpll_disable;
 291         unsigned long cursor_sr;
 292         unsigned long cursor_hpll_disable;
 293 };
 294
 295 #define to_intel_crtc(x) container_of(x, struct intel_crtc, base)
 296 #define to_intel_connector(x) container_of(x, struct intel_connector, base)
 297 #define to_intel_encoder(x) container_of(x, struct intel_encoder, base)
 298 #define to_intel_framebuffer(x) container_of(x, struct intel_framebuffer, base)
 299 #define to_intel_plane(x) container_of(x, struct intel_plane, base)
 300
 301 #define DIP_HEADER_SIZE 5
 302
 303 #define DIP_TYPE_AVI    0x82
 304 #define DIP_VERSION_AVI 0x2
 305 #define DIP_LEN_AVI     13
 306 #define DIP_AVI_PR_1    0
 307 #define DIP_AVI_PR_2    1
 308
 309 #define DIP_TYPE_SPD    0x83
 310 #define DIP_VERSION_SPD 0x1
 311 #define DIP_LEN_SPD     25
 312 #define DIP_SPD_UNKNOWN 0
 313 #define DIP_SPD_DSTB    0x1
 314 #define DIP_SPD_DVDP    0x2
 315 #define DIP_SPD_DVHS    0x3
 316 #define DIP_SPD_HDDVR   0x4
 317 #define DIP_SPD_DVC     0x5
 318 #define DIP_SPD_DSC     0x6
 319 #define DIP_SPD_VCD     0x7
 320 #define DIP_SPD_GAME    0x8
 321 #define DIP_SPD_PC      0x9
 322 #define DIP_SPD_BD      0xa
 323 #define DIP_SPD_SCD     0xb
 324
 325 struct dip_infoframe {
 326         uint8_t type;           /* HB0 */
 327         uint8_t ver;            /* HB1 */
 328         uint8_t len;            /* HB2 - body len, not including checksum */
 329         uint8_t ecc;            /* Header ECC */
 330         uint8_t checksum;       /* PB0 */
 331         union {
 332                 struct {
 333                         /* PB1 - Y 6:5, A 4:4, B 3:2, S 1:0 */
 334                         uint8_t Y_A_B_S;
 335                         /* PB2 - C 7:6, M 5:4, R 3:0 */
 336                         uint8_t C_M_R;
 337                         /* PB3 - ITC 7:7, EC 6:4, Q 3:2, SC 1:0 */
 338                         uint8_t ITC_EC_Q_SC;
 339                         /* PB4 - VIC 6:0 */
 340                         uint8_t VIC;
 341                         /* PB5 - YQ 7:6, CN 5:4, PR 3:0 */
 342                         uint8_t YQ_CN_PR;
 343                         /* PB6 to PB13 */
 344                         uint16_t top_bar_end;
 345                         uint16_t bottom_bar_start;
 346                         uint16_t left_bar_end;
 347                         uint16_t right_bar_start;
 348                 } __attribute__ ((packed)) avi;
 349                 struct {
 350                         uint8_t vn[8];
 351                         uint8_t pd[16];
 352                         uint8_t sdi;
 353                 } __attribute__ ((packed)) spd;
 354                 uint8_t payload[27];
 355         } __attribute__ ((packed)) body;
 356 } __attribute__((packed));
 357
 358 struct intel_hdmi {
 359         u32 sdvox_reg;
 360         int ddc_bus;
 361         uint32_t color_range;
 362         bool has_hdmi_sink;
 363         bool has_audio;
 364         enum hdmi_force_audio force_audio;
 365         void (*write_infoframe)(struct drm_encoder *encoder,
 366                                 struct dip_infoframe *frame);
 367         void (*set_infoframes)(struct drm_encoder *encoder,
 368                                struct drm_display_mode *adjusted_mode);
 369 };
 370
 371 #define DP_MAX_DOWNSTREAM_PORTS         0x10
 372 #define DP_LINK_CONFIGURATION_SIZE      9
 373
 374 struct intel_dp {
 375         uint32_t output_reg;
 376         uint32_t DP;
 377         uint8_t  link_configuration[DP_LINK_CONFIGURATION_SIZE];
 378         bool has_audio;
 379         enum hdmi_force_audio force_audio;
 380         uint32_t color_range;
 381         uint8_t link_bw;
 382         uint8_t lane_count;
 383         uint8_t dpcd[DP_RECEIVER_CAP_SIZE];
 384         uint8_t downstream_ports[DP_MAX_DOWNSTREAM_PORTS];
 385         device_t dp_iic_bus;
 386         device_t adapter;
 387         bool is_pch_edp;
 388         uint8_t train_set[4];
 389         int panel_power_up_delay;
 390         int panel_power_down_delay;
 391         int panel_power_cycle_delay;
 392         int backlight_on_delay;
 393         int backlight_off_delay;
 394         struct timeout_task panel_vdd_work;
 395         bool want_panel_vdd;
 396         struct intel_connector *attached_connector;
 397 };
 398
 399 struct intel_digital_port {
 400         struct intel_encoder base;
 401         enum port port;
 402         u32 port_reversal;
 403         struct intel_dp dp;
 404         struct intel_hdmi hdmi;
 405 };
 406
 407 static inline struct drm_crtc *
 408 intel_get_crtc_for_pipe(struct drm_device *dev, int pipe)
 409 {
 410         struct drm_i915_private *dev_priv = dev->dev_private;
 411         return dev_priv->pipe_to_crtc_mapping[pipe];
 412 }
 413
 414 static inline struct drm_crtc *
 415 intel_get_crtc_for_plane(struct drm_device *dev, int plane)
 416 {
 417         struct drm_i915_private *dev_priv = dev->dev_private;
 418         return dev_priv->plane_to_crtc_mapping[plane];
 419 }
 420
 421 struct intel_unpin_work {
 422         struct task work;
 423         struct drm_crtc *crtc;
 424         struct drm_i915_gem_object *old_fb_obj;
 425         struct drm_i915_gem_object *pending_flip_obj;
 426         struct drm_pending_vblank_event *event;
 427         atomic_t pending;
 428 #define INTEL_FLIP_INACTIVE     0
 429 #define INTEL_FLIP_PENDING      1
 430 #define INTEL_FLIP_COMPLETE     2
 431         bool enable_stall_check;
 432 };
 433
 434 struct intel_fbc_work {
 435         struct timeout_task work;
 436         struct drm_crtc *crtc;
 437         struct drm_framebuffer *fb;
 438         int interval;
 439 };
 440
 441 int intel_pch_rawclk(struct drm_device *dev);
 442
 443 int intel_connector_update_modes(struct drm_connector *connector,
 444                                 struct edid *edid);
 445 int intel_ddc_get_modes(struct drm_connector *c, device_t adapter);
 446
 447 extern void intel_attach_force_audio_property(struct drm_connector *connector);
 448 extern void intel_attach_broadcast_rgb_property(struct drm_connector *connector);
 449
 450 extern void intel_crt_init(struct drm_device *dev);
 451 extern void intel_hdmi_init(struct drm_device *dev,
 452                             int sdvox_reg, enum port port);
 453 extern void intel_hdmi_init_connector(struct intel_digital_port *intel_dig_port,
 454                                       struct intel_connector *intel_connector);
 455 extern struct intel_hdmi *enc_to_intel_hdmi(struct drm_encoder *encoder);
 456 extern bool intel_hdmi_mode_fixup(struct drm_encoder *encoder,
 457                                   const struct drm_display_mode *mode,
 458                                   struct drm_display_mode *adjusted_mode);
 459 extern void intel_dip_infoframe_csum(struct dip_infoframe *avi_if);
 460 extern bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg,
 461                             bool is_sdvob);
 462 extern void intel_dvo_init(struct drm_device *dev);
 463 extern void intel_tv_init(struct drm_device *dev);
 464 extern void intel_mark_busy(struct drm_device *dev);
 465 extern void intel_mark_fb_busy(struct drm_i915_gem_object *obj);
 466 extern void intel_mark_idle(struct drm_device *dev);
 467 extern bool intel_lvds_init(struct drm_device *dev);
 468 extern void intel_dp_init(struct drm_device *dev, int output_reg,
 469                           enum port port);
 470 extern void intel_dp_init_connector(struct intel_digital_port *intel_dig_port,
 471                                     struct intel_connector *intel_connector);
 472 void
 473 intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode,
 474                  struct drm_display_mode *adjusted_mode);
 475 extern void intel_dp_init_link_config(struct intel_dp *intel_dp);
 476 extern void intel_dp_start_link_train(struct intel_dp *intel_dp);
 477 extern void intel_dp_complete_link_train(struct intel_dp *intel_dp);
 478 extern void intel_dp_sink_dpms(struct intel_dp *intel_dp, int mode);
 479 extern void intel_dp_encoder_destroy(struct drm_encoder *encoder);
 480 extern void intel_dp_check_link_status(struct intel_dp *intel_dp);
 481 extern bool intel_dp_mode_fixup(struct drm_encoder *encoder,
 482                                 const struct drm_display_mode *mode,
 483                                 struct drm_display_mode *adjusted_mode);
 484 extern bool intel_dpd_is_edp(struct drm_device *dev);
 485 extern void ironlake_edp_backlight_on(struct intel_dp *intel_dp);
 486 extern void ironlake_edp_backlight_off(struct intel_dp *intel_dp);
 487 extern void ironlake_edp_panel_on(struct intel_dp *intel_dp);
 488 extern void ironlake_edp_panel_off(struct intel_dp *intel_dp);
 489 extern void ironlake_edp_panel_vdd_on(struct intel_dp *intel_dp);
 490 extern void ironlake_edp_panel_vdd_off(struct intel_dp *intel_dp, bool sync);
 491 extern void intel_edp_link_config(struct intel_encoder *, int *, int *);
 492 extern int intel_edp_target_clock(struct intel_encoder *,
 493                                   struct drm_display_mode *mode);
 494 extern bool intel_encoder_is_pch_edp(struct drm_encoder *encoder);
 495 extern int intel_plane_init(struct drm_device *dev, enum pipe pipe);
 496 extern void intel_flush_display_plane(struct drm_i915_private *dev_priv,
 497                                       enum plane plane);
 498
 499 /* intel_panel.c */
 500 extern int intel_panel_init(struct intel_panel *panel,
 501                             struct drm_display_mode *fixed_mode);
 502 extern void intel_panel_fini(struct intel_panel *panel);
 503
 504 extern void intel_fixed_panel_mode(struct drm_display_mode *fixed_mode,
 505                                    struct drm_display_mode *adjusted_mode);
 506 extern void intel_pch_panel_fitting(struct drm_device *dev,
 507                                     int fitting_mode,
 508                                     const struct drm_display_mode *mode,
 509                                     struct drm_display_mode *adjusted_mode);
 510 extern u32 intel_panel_get_max_backlight(struct drm_device *dev);
 511 extern void intel_panel_set_backlight(struct drm_device *dev, u32 level);
 512 extern int intel_panel_setup_backlight(struct drm_connector *connector);
 513 extern void intel_panel_enable_backlight(struct drm_device *dev,
 514                                          enum pipe pipe);
 515 extern void intel_panel_disable_backlight(struct drm_device *dev);
 516 extern void intel_panel_destroy_backlight(struct drm_device *dev);
 517 extern enum drm_connector_status intel_panel_detect(struct drm_device *dev);
 518
 519 struct intel_set_config {
 520         struct drm_encoder **save_connector_encoders;
 521         struct drm_crtc **save_encoder_crtcs;
 522
 523         bool fb_changed;
 524         bool mode_changed;
 525 };
 526
 527 extern bool intel_set_mode(struct drm_crtc *crtc, struct drm_display_mode *mode,
 528                            int x, int y, struct drm_framebuffer *old_fb);
 529 extern void intel_modeset_disable(struct drm_device *dev);
 530 extern void intel_crtc_load_lut(struct drm_crtc *crtc);
 531 extern void intel_crtc_update_dpms(struct drm_crtc *crtc);
 532 extern void intel_encoder_noop(struct drm_encoder *encoder);
 533 extern void intel_encoder_destroy(struct drm_encoder *encoder);
 534 extern void intel_encoder_dpms(struct intel_encoder *encoder, int mode);
 535 extern bool intel_encoder_check_is_cloned(struct intel_encoder *encoder);
 536 extern void intel_connector_dpms(struct drm_connector *, int mode);
 537 extern bool intel_connector_get_hw_state(struct intel_connector *connector);
 538 extern void intel_modeset_check_state(struct drm_device *dev);
 539
 540
 541 static inline struct intel_encoder *intel_attached_encoder(struct drm_connector *connector)
 542 {
 543         return to_intel_connector(connector)->encoder;
 544 }
 545
 546 static inline struct intel_dp *enc_to_intel_dp(struct drm_encoder *encoder)
 547 {
 548         struct intel_digital_port *intel_dig_port =
 549                 container_of(encoder, struct intel_digital_port, base.base);
 550         return &intel_dig_port->dp;
 551 }
 552
 553 static inline struct intel_digital_port *
 554 enc_to_dig_port(struct drm_encoder *encoder)
 555 {
 556         return container_of(encoder, struct intel_digital_port, base.base);
 557 }
 558
 559 static inline struct intel_digital_port *
 560 dp_to_dig_port(struct intel_dp *intel_dp)
 561 {
 562         return container_of(intel_dp, struct intel_digital_port, dp);
 563 }
 564
 565 static inline struct intel_digital_port *
 566 hdmi_to_dig_port(struct intel_hdmi *intel_hdmi)
 567 {
 568         return container_of(intel_hdmi, struct intel_digital_port, hdmi);
 569 }
 570
 571 extern void intel_connector_attach_encoder(struct intel_connector *connector,
 572                                            struct intel_encoder *encoder);
 573 extern struct drm_encoder *intel_best_encoder(struct drm_connector *connector);
 574
 575 extern struct drm_display_mode *intel_crtc_mode_get(struct drm_device *dev,
 576                                                     struct drm_crtc *crtc);
 577 int intel_get_pipe_from_crtc_id(struct drm_device *dev, void *data,
 578                                 struct drm_file *file_priv);
 579 extern enum transcoder
 580 intel_pipe_to_cpu_transcoder(struct drm_i915_private *dev_priv,
 581                              enum pipe pipe);
 582 extern void intel_wait_for_vblank(struct drm_device *dev, int pipe);
 583 extern void intel_wait_for_pipe_off(struct drm_device *dev, int pipe);
 584 extern int ironlake_get_lanes_required(int target_clock, int link_bw, int bpp);
 585
 586 struct intel_load_detect_pipe {
 587         struct drm_framebuffer *release_fb;
 588         bool load_detect_temp;
 589         int dpms_mode;
 590 };
 591 extern bool intel_get_load_detect_pipe(struct drm_connector *connector,
 592                                        struct drm_display_mode *mode,
 593                                        struct intel_load_detect_pipe *old);
 594 extern void intel_release_load_detect_pipe(struct drm_connector *connector,
 595                                            struct intel_load_detect_pipe *old);
 596
 597 extern void intelfb_restore(void);
 598 extern void intel_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
 599                                     u16 blue, int regno);
 600 extern void intel_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
 601                                     u16 *blue, int regno);
 602 extern void intel_enable_clock_gating(struct drm_device *dev);
 603
 604 extern int intel_pin_and_fence_fb_obj(struct drm_device *dev,
 605                                       struct drm_i915_gem_object *obj,
 606                                       struct intel_ring_buffer *pipelined);
 607 extern void intel_unpin_fb_obj(struct drm_i915_gem_object *obj);
 608
 609 extern int intel_framebuffer_init(struct drm_device *dev,
 610                                   struct intel_framebuffer *ifb,
 611                                   struct drm_mode_fb_cmd2 *mode_cmd,
 612                                   struct drm_i915_gem_object *obj);
 613 extern int intel_fbdev_init(struct drm_device *dev);
 614 extern void intel_fbdev_fini(struct drm_device *dev);
 615 extern void intel_fbdev_set_suspend(struct drm_device *dev, int state);
 616 extern void intel_prepare_page_flip(struct drm_device *dev, int plane);
 617 extern void intel_finish_page_flip(struct drm_device *dev, int pipe);
 618 extern void intel_finish_page_flip_plane(struct drm_device *dev, int plane);
 619
 620 extern void intel_setup_overlay(struct drm_device *dev);
 621 extern void intel_cleanup_overlay(struct drm_device *dev);
 622 extern int intel_overlay_switch_off(struct intel_overlay *overlay);
 623 extern int intel_overlay_put_image(struct drm_device *dev, void *data,
 624                                    struct drm_file *file_priv);
 625 extern int intel_overlay_attrs(struct drm_device *dev, void *data,
 626                                struct drm_file *file_priv);
 627
 628 extern void intel_fb_output_poll_changed(struct drm_device *dev);
 629 extern void intel_fb_restore_mode(struct drm_device *dev);
 630
 631 extern void assert_pipe(struct drm_i915_private *dev_priv, enum pipe pipe,
 632                         bool state);
 633 #define assert_pipe_enabled(d, p) assert_pipe(d, p, true)
 634 #define assert_pipe_disabled(d, p) assert_pipe(d, p, false)
 635
 636 extern void intel_init_clock_gating(struct drm_device *dev);
 637 extern void intel_write_eld(struct drm_encoder *encoder,
 638                             struct drm_display_mode *mode);
 639 extern void intel_cpt_verify_modeset(struct drm_device *dev, int pipe);
 640 extern void intel_prepare_ddi(struct drm_device *dev);
 641 extern void hsw_fdi_link_train(struct drm_crtc *crtc);
 642 extern void intel_ddi_init(struct drm_device *dev, enum port port);
 643
 644 /* For use by IVB LP watermark workaround in intel_sprite.c */
 645 extern void intel_update_watermarks(struct drm_device *dev);
 646 extern void intel_update_sprite_watermarks(struct drm_device *dev, int pipe,
 647                                            uint32_t sprite_width,
 648                                            int pixel_size);
 649 extern void intel_update_linetime_watermarks(struct drm_device *dev, int pipe,
 650                          struct drm_display_mode *mode);
 651
 652 extern unsigned long intel_gen4_compute_page_offset(int *x, int *y,
 653                                                     unsigned int tiling_mode,
 654                                                     unsigned int bpp,
 655                                                     unsigned int pitch);
 656
 657 extern int intel_sprite_set_colorkey(struct drm_device *dev, void *data,
 658                                      struct drm_file *file_priv);
 659 extern int intel_sprite_get_colorkey(struct drm_device *dev, void *data,
 660                                      struct drm_file *file_priv);
 661
 662 extern u32 intel_dpio_read(struct drm_i915_private *dev_priv, int reg);
 663
 664 /* Power-related functions, located in intel_pm.c */
 665 extern void intel_init_pm(struct drm_device *dev);
 666 /* FBC */
 667 extern bool intel_fbc_enabled(struct drm_device *dev);
 668 extern void intel_enable_fbc(struct drm_crtc *crtc, unsigned long interval);
 669 extern void intel_update_fbc(struct drm_device *dev);
 670 /* IPS */
 671 extern void intel_gpu_ips_init(struct drm_i915_private *dev_priv);
 672 extern void intel_gpu_ips_teardown(void);
 673
 674 extern void intel_init_power_wells(struct drm_device *dev);
 675 extern void intel_enable_gt_powersave(struct drm_device *dev);
 676 extern void intel_disable_gt_powersave(struct drm_device *dev);
 677 extern void gen6_gt_check_fifodbg(struct drm_i915_private *dev_priv);
 678 extern void ironlake_teardown_rc6(struct drm_device *dev);
 679
 680 extern bool intel_ddi_get_hw_state(struct intel_encoder *encoder,
 681                                    enum pipe *pipe);
 682 extern int intel_ddi_get_cdclk_freq(struct drm_i915_private *dev_priv);
 683 extern void intel_ddi_pll_init(struct drm_device *dev);
 684 extern void intel_ddi_enable_pipe_func(struct drm_crtc *crtc);
 685 extern void intel_ddi_disable_transcoder_func(struct drm_i915_private *dev_priv,
 686                                               enum transcoder cpu_transcoder);
 687 extern void intel_ddi_enable_pipe_clock(struct intel_crtc *intel_crtc);
 688 extern void intel_ddi_disable_pipe_clock(struct intel_crtc *intel_crtc);
 689 extern void intel_ddi_setup_hw_pll_state(struct drm_device *dev);
 690 extern bool intel_ddi_pll_mode_set(struct drm_crtc *crtc, int clock);
 691 extern void intel_ddi_put_crtc_pll(struct drm_crtc *crtc);
 692 extern void intel_ddi_set_pipe_settings(struct drm_crtc *crtc);
 693 extern void intel_ddi_prepare_link_retrain(struct drm_encoder *encoder);
 694 extern bool
 695 intel_ddi_connector_get_hw_state(struct intel_connector *intel_connector);
 696 extern void intel_ddi_fdi_disable(struct drm_crtc *crtc);
 697
 698 #endif /* __INTEL_DRV_H__ */