2 * Copyright 2009 VMware, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
22 * Authors: Michel Dänzer
25 #include <sys/cdefs.h>
26 __FBSDID("$FreeBSD$");
28 #include <dev/drm2/drmP.h>
29 #include <dev/drm2/radeon/radeon_drm.h>
30 #include "radeon_reg.h"
33 #define RADEON_TEST_COPY_BLIT 1
34 #define RADEON_TEST_COPY_DMA 0
37 /* Test BO GTT->VRAM and VRAM->GTT GPU copies across the whole GTT aperture */
38 static void radeon_do_test_moves(struct radeon_device *rdev, int flag)
40 struct radeon_bo *vram_obj = NULL;
41 struct radeon_bo **gtt_obj = NULL;
42 struct radeon_fence *fence = NULL;
43 uint64_t gtt_addr, vram_addr;
48 case RADEON_TEST_COPY_DMA:
49 ring = radeon_copy_dma_ring_index(rdev);
51 case RADEON_TEST_COPY_BLIT:
52 ring = radeon_copy_blit_ring_index(rdev);
55 DRM_ERROR("Unknown copy method\n");
62 * (Total GTT - IB pool - writeback page - ring buffers) / test size
64 n = rdev->mc.gtt_size - RADEON_IB_POOL_SIZE*64*1024;
65 for (i = 0; i < RADEON_NUM_RINGS; ++i)
66 n -= rdev->ring[i].ring_size;
68 n -= RADEON_GPU_PAGE_SIZE;
69 if (rdev->ih.ring_obj)
70 n -= rdev->ih.ring_size;
73 gtt_obj = malloc(n * sizeof(*gtt_obj), DRM_MEM_DRIVER, M_NOWAIT | M_ZERO);
75 DRM_ERROR("Failed to allocate %d pointers\n", n);
80 r = radeon_bo_create(rdev, size, PAGE_SIZE, true, RADEON_GEM_DOMAIN_VRAM,
83 DRM_ERROR("Failed to create VRAM object\n");
86 r = radeon_bo_reserve(vram_obj, false);
89 r = radeon_bo_pin(vram_obj, RADEON_GEM_DOMAIN_VRAM, &vram_addr);
91 DRM_ERROR("Failed to pin VRAM object\n");
94 for (i = 0; i < n; i++) {
95 void *gtt_map, *vram_map;
96 void **gtt_start, **gtt_end;
97 void **vram_start, **vram_end;
99 r = radeon_bo_create(rdev, size, PAGE_SIZE, true,
100 RADEON_GEM_DOMAIN_GTT, NULL, gtt_obj + i);
102 DRM_ERROR("Failed to create GTT object %d\n", i);
106 r = radeon_bo_reserve(gtt_obj[i], false);
107 if (unlikely(r != 0))
109 r = radeon_bo_pin(gtt_obj[i], RADEON_GEM_DOMAIN_GTT, >t_addr);
111 DRM_ERROR("Failed to pin GTT object %d\n", i);
115 r = radeon_bo_kmap(gtt_obj[i], >t_map);
117 DRM_ERROR("Failed to map GTT object %d\n", i);
121 for (gtt_start = gtt_map, gtt_end = (void *)((uintptr_t)gtt_map + size);
124 *gtt_start = gtt_start;
126 radeon_bo_kunmap(gtt_obj[i]);
128 if (ring == R600_RING_TYPE_DMA_INDEX)
129 r = radeon_copy_dma(rdev, gtt_addr, vram_addr, size / RADEON_GPU_PAGE_SIZE, &fence);
131 r = radeon_copy_blit(rdev, gtt_addr, vram_addr, size / RADEON_GPU_PAGE_SIZE, &fence);
133 DRM_ERROR("Failed GTT->VRAM copy %d\n", i);
137 r = radeon_fence_wait(fence, false);
139 DRM_ERROR("Failed to wait for GTT->VRAM fence %d\n", i);
143 radeon_fence_unref(&fence);
145 r = radeon_bo_kmap(vram_obj, &vram_map);
147 DRM_ERROR("Failed to map VRAM object after copy %d\n", i);
151 for (gtt_start = gtt_map, gtt_end = (void *)((uintptr_t)gtt_map + size),
152 vram_start = vram_map, vram_end = (void *)((uintptr_t)vram_map + size);
153 vram_start < vram_end;
154 gtt_start++, vram_start++) {
155 if (*vram_start != gtt_start) {
156 DRM_ERROR("Incorrect GTT->VRAM copy %d: Got 0x%p, "
157 "expected 0x%p (GTT/VRAM offset "
158 "0x%16llx/0x%16llx)\n",
159 i, *vram_start, gtt_start,
161 ((uintptr_t)gtt_addr - (uintptr_t)rdev->mc.gtt_start +
162 (uintptr_t)gtt_start - (uintptr_t)gtt_map),
164 ((uintptr_t)vram_addr - (uintptr_t)rdev->mc.vram_start +
165 (uintptr_t)gtt_start - (uintptr_t)gtt_map));
166 radeon_bo_kunmap(vram_obj);
169 *vram_start = vram_start;
172 radeon_bo_kunmap(vram_obj);
174 if (ring == R600_RING_TYPE_DMA_INDEX)
175 r = radeon_copy_dma(rdev, vram_addr, gtt_addr, size / RADEON_GPU_PAGE_SIZE, &fence);
177 r = radeon_copy_blit(rdev, vram_addr, gtt_addr, size / RADEON_GPU_PAGE_SIZE, &fence);
179 DRM_ERROR("Failed VRAM->GTT copy %d\n", i);
183 r = radeon_fence_wait(fence, false);
185 DRM_ERROR("Failed to wait for VRAM->GTT fence %d\n", i);
189 radeon_fence_unref(&fence);
191 r = radeon_bo_kmap(gtt_obj[i], >t_map);
193 DRM_ERROR("Failed to map GTT object after copy %d\n", i);
197 for (gtt_start = gtt_map, gtt_end = (void *)((uintptr_t)gtt_map + size),
198 vram_start = vram_map, vram_end = (void *)((uintptr_t)vram_map + size);
200 gtt_start++, vram_start++) {
201 if (*gtt_start != vram_start) {
202 DRM_ERROR("Incorrect VRAM->GTT copy %d: Got 0x%p, "
203 "expected 0x%p (VRAM/GTT offset "
204 "0x%16llx/0x%16llx)\n",
205 i, *gtt_start, vram_start,
207 ((uintptr_t)vram_addr - (uintptr_t)rdev->mc.vram_start +
208 (uintptr_t)vram_start - (uintptr_t)vram_map),
210 ((uintptr_t)gtt_addr - (uintptr_t)rdev->mc.gtt_start +
211 (uintptr_t)vram_start - (uintptr_t)vram_map));
212 radeon_bo_kunmap(gtt_obj[i]);
217 radeon_bo_kunmap(gtt_obj[i]);
219 DRM_INFO("Tested GTT->VRAM and VRAM->GTT copy for GTT offset 0x%jx\n",
220 (uintmax_t)gtt_addr - rdev->mc.gtt_start);
225 if (radeon_bo_is_reserved(vram_obj)) {
226 radeon_bo_unpin(vram_obj);
227 radeon_bo_unreserve(vram_obj);
229 radeon_bo_unref(&vram_obj);
232 for (i = 0; i < n; i++) {
234 if (radeon_bo_is_reserved(gtt_obj[i])) {
235 radeon_bo_unpin(gtt_obj[i]);
236 radeon_bo_unreserve(gtt_obj[i]);
238 radeon_bo_unref(>t_obj[i]);
241 free(gtt_obj, DRM_MEM_DRIVER);
244 radeon_fence_unref(&fence);
247 DRM_ERROR("Error while testing BO move.\n");
251 void radeon_test_moves(struct radeon_device *rdev)
253 if (rdev->asic->copy.dma)
254 radeon_do_test_moves(rdev, RADEON_TEST_COPY_DMA);
255 if (rdev->asic->copy.blit)
256 radeon_do_test_moves(rdev, RADEON_TEST_COPY_BLIT);
259 void radeon_test_ring_sync(struct radeon_device *rdev,
260 struct radeon_ring *ringA,
261 struct radeon_ring *ringB)
263 struct radeon_fence *fence1 = NULL, *fence2 = NULL;
264 struct radeon_semaphore *semaphore = NULL;
267 r = radeon_semaphore_create(rdev, &semaphore);
269 DRM_ERROR("Failed to create semaphore\n");
273 r = radeon_ring_lock(rdev, ringA, 64);
275 DRM_ERROR("Failed to lock ring A %d\n", ringA->idx);
278 radeon_semaphore_emit_wait(rdev, ringA->idx, semaphore);
279 r = radeon_fence_emit(rdev, &fence1, ringA->idx);
281 DRM_ERROR("Failed to emit fence 1\n");
282 radeon_ring_unlock_undo(rdev, ringA);
285 radeon_semaphore_emit_wait(rdev, ringA->idx, semaphore);
286 r = radeon_fence_emit(rdev, &fence2, ringA->idx);
288 DRM_ERROR("Failed to emit fence 2\n");
289 radeon_ring_unlock_undo(rdev, ringA);
292 radeon_ring_unlock_commit(rdev, ringA);
296 if (radeon_fence_signaled(fence1)) {
297 DRM_ERROR("Fence 1 signaled without waiting for semaphore.\n");
301 r = radeon_ring_lock(rdev, ringB, 64);
303 DRM_ERROR("Failed to lock ring B %p\n", ringB);
306 radeon_semaphore_emit_signal(rdev, ringB->idx, semaphore);
307 radeon_ring_unlock_commit(rdev, ringB);
309 r = radeon_fence_wait(fence1, false);
311 DRM_ERROR("Failed to wait for sync fence 1\n");
317 if (radeon_fence_signaled(fence2)) {
318 DRM_ERROR("Fence 2 signaled without waiting for semaphore.\n");
322 r = radeon_ring_lock(rdev, ringB, 64);
324 DRM_ERROR("Failed to lock ring B %p\n", ringB);
327 radeon_semaphore_emit_signal(rdev, ringB->idx, semaphore);
328 radeon_ring_unlock_commit(rdev, ringB);
330 r = radeon_fence_wait(fence2, false);
332 DRM_ERROR("Failed to wait for sync fence 1\n");
337 radeon_semaphore_free(rdev, &semaphore, NULL);
340 radeon_fence_unref(&fence1);
343 radeon_fence_unref(&fence2);
346 DRM_ERROR("Error while testing ring sync (%d).\n", r);
349 static void radeon_test_ring_sync2(struct radeon_device *rdev,
350 struct radeon_ring *ringA,
351 struct radeon_ring *ringB,
352 struct radeon_ring *ringC)
354 struct radeon_fence *fenceA = NULL, *fenceB = NULL;
355 struct radeon_semaphore *semaphore = NULL;
359 r = radeon_semaphore_create(rdev, &semaphore);
361 DRM_ERROR("Failed to create semaphore\n");
365 r = radeon_ring_lock(rdev, ringA, 64);
367 DRM_ERROR("Failed to lock ring A %d\n", ringA->idx);
370 radeon_semaphore_emit_wait(rdev, ringA->idx, semaphore);
371 r = radeon_fence_emit(rdev, &fenceA, ringA->idx);
373 DRM_ERROR("Failed to emit sync fence 1\n");
374 radeon_ring_unlock_undo(rdev, ringA);
377 radeon_ring_unlock_commit(rdev, ringA);
379 r = radeon_ring_lock(rdev, ringB, 64);
381 DRM_ERROR("Failed to lock ring B %d\n", ringB->idx);
384 radeon_semaphore_emit_wait(rdev, ringB->idx, semaphore);
385 r = radeon_fence_emit(rdev, &fenceB, ringB->idx);
387 DRM_ERROR("Failed to create sync fence 2\n");
388 radeon_ring_unlock_undo(rdev, ringB);
391 radeon_ring_unlock_commit(rdev, ringB);
395 if (radeon_fence_signaled(fenceA)) {
396 DRM_ERROR("Fence A signaled without waiting for semaphore.\n");
399 if (radeon_fence_signaled(fenceB)) {
400 DRM_ERROR("Fence A signaled without waiting for semaphore.\n");
404 r = radeon_ring_lock(rdev, ringC, 64);
406 DRM_ERROR("Failed to lock ring B %p\n", ringC);
409 radeon_semaphore_emit_signal(rdev, ringC->idx, semaphore);
410 radeon_ring_unlock_commit(rdev, ringC);
412 for (i = 0; i < 30; ++i) {
414 sigA = radeon_fence_signaled(fenceA);
415 sigB = radeon_fence_signaled(fenceB);
420 if (!sigA && !sigB) {
421 DRM_ERROR("Neither fence A nor B has been signaled\n");
423 } else if (sigA && sigB) {
424 DRM_ERROR("Both fence A and B has been signaled\n");
428 DRM_INFO("Fence %c was first signaled\n", sigA ? 'A' : 'B');
430 r = radeon_ring_lock(rdev, ringC, 64);
432 DRM_ERROR("Failed to lock ring B %p\n", ringC);
435 radeon_semaphore_emit_signal(rdev, ringC->idx, semaphore);
436 radeon_ring_unlock_commit(rdev, ringC);
440 r = radeon_fence_wait(fenceA, false);
442 DRM_ERROR("Failed to wait for sync fence A\n");
445 r = radeon_fence_wait(fenceB, false);
447 DRM_ERROR("Failed to wait for sync fence B\n");
452 radeon_semaphore_free(rdev, &semaphore, NULL);
455 radeon_fence_unref(&fenceA);
458 radeon_fence_unref(&fenceB);
461 DRM_ERROR("Error while testing ring sync (%d).\n", r);
464 void radeon_test_syncing(struct radeon_device *rdev)
468 for (i = 1; i < RADEON_NUM_RINGS; ++i) {
469 struct radeon_ring *ringA = &rdev->ring[i];
473 for (j = 0; j < i; ++j) {
474 struct radeon_ring *ringB = &rdev->ring[j];
478 DRM_INFO("Testing syncing between rings %d and %d...\n", i, j);
479 radeon_test_ring_sync(rdev, ringA, ringB);
481 DRM_INFO("Testing syncing between rings %d and %d...\n", j, i);
482 radeon_test_ring_sync(rdev, ringB, ringA);
484 for (k = 0; k < j; ++k) {
485 struct radeon_ring *ringC = &rdev->ring[k];
489 DRM_INFO("Testing syncing between rings %d, %d and %d...\n", i, j, k);
490 radeon_test_ring_sync2(rdev, ringA, ringB, ringC);
492 DRM_INFO("Testing syncing between rings %d, %d and %d...\n", i, k, j);
493 radeon_test_ring_sync2(rdev, ringA, ringC, ringB);
495 DRM_INFO("Testing syncing between rings %d, %d and %d...\n", j, i, k);
496 radeon_test_ring_sync2(rdev, ringB, ringA, ringC);
498 DRM_INFO("Testing syncing between rings %d, %d and %d...\n", j, k, i);
499 radeon_test_ring_sync2(rdev, ringB, ringC, ringA);
501 DRM_INFO("Testing syncing between rings %d, %d and %d...\n", k, i, j);
502 radeon_test_ring_sync2(rdev, ringC, ringA, ringB);
504 DRM_INFO("Testing syncing between rings %d, %d and %d...\n", k, j, i);
505 radeon_test_ring_sync2(rdev, ringC, ringB, ringA);