sys/dev/e1000/e1000_nvm.c

   1 /******************************************************************************
   2   SPDX-License-Identifier: BSD-3-Clause
   3
   4   Copyright (c) 2001-2015, Intel Corporation
   5   All rights reserved.
   6
   7   Redistribution and use in source and binary forms, with or without
   8   modification, are permitted provided that the following conditions are met:
   9
  10    1. Redistributions of source code must retain the above copyright notice,
  11       this list of conditions and the following disclaimer.
  12
  13    2. Redistributions in binary form must reproduce the above copyright
  14       notice, this list of conditions and the following disclaimer in the
  15       documentation and/or other materials provided with the distribution.
  16
  17    3. Neither the name of the Intel Corporation nor the names of its
  18       contributors may be used to endorse or promote products derived from
  19       this software without specific prior written permission.
  20
  21   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  22   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  23   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  24   ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
  25   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  26   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  27   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  28   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  29   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  30   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  31   POSSIBILITY OF SUCH DAMAGE.
  32
  33 ******************************************************************************/
  34 /*$FreeBSD$*/
  35
  36 #include "e1000_api.h"
  37
  38 static void e1000_reload_nvm_generic(struct e1000_hw *hw);
  39
  40 /**
  41  *  e1000_init_nvm_ops_generic - Initialize NVM function pointers
  42  *  @hw: pointer to the HW structure
  43  *
  44  *  Setups up the function pointers to no-op functions
  45  **/
  46 void e1000_init_nvm_ops_generic(struct e1000_hw *hw)
  47 {
  48         struct e1000_nvm_info *nvm = &hw->nvm;
  49         DEBUGFUNC("e1000_init_nvm_ops_generic");
  50
  51         /* Initialize function pointers */
  52         nvm->ops.init_params = e1000_null_ops_generic;
  53         nvm->ops.acquire = e1000_null_ops_generic;
  54         nvm->ops.read = e1000_null_read_nvm;
  55         nvm->ops.release = e1000_null_nvm_generic;
  56         nvm->ops.reload = e1000_reload_nvm_generic;
  57         nvm->ops.update = e1000_null_ops_generic;
  58         nvm->ops.valid_led_default = e1000_null_led_default;
  59         nvm->ops.validate = e1000_null_ops_generic;
  60         nvm->ops.write = e1000_null_write_nvm;
  61 }
  62
  63 /**
  64  *  e1000_null_nvm_read - No-op function, return 0
  65  *  @hw: pointer to the HW structure
  66  **/
  67 s32 e1000_null_read_nvm(struct e1000_hw E1000_UNUSEDARG *hw,
  68                         u16 E1000_UNUSEDARG a, u16 E1000_UNUSEDARG b,
  69                         u16 E1000_UNUSEDARG *c)
  70 {
  71         DEBUGFUNC("e1000_null_read_nvm");
  72         return E1000_SUCCESS;
  73 }
  74
  75 /**
  76  *  e1000_null_nvm_generic - No-op function, return void
  77  *  @hw: pointer to the HW structure
  78  **/
  79 void e1000_null_nvm_generic(struct e1000_hw E1000_UNUSEDARG *hw)
  80 {
  81         DEBUGFUNC("e1000_null_nvm_generic");
  82         return;
  83 }
  84
  85 /**
  86  *  e1000_null_led_default - No-op function, return 0
  87  *  @hw: pointer to the HW structure
  88  **/
  89 s32 e1000_null_led_default(struct e1000_hw E1000_UNUSEDARG *hw,
  90                            u16 E1000_UNUSEDARG *data)
  91 {
  92         DEBUGFUNC("e1000_null_led_default");
  93         return E1000_SUCCESS;
  94 }
  95
  96 /**
  97  *  e1000_null_write_nvm - No-op function, return 0
  98  *  @hw: pointer to the HW structure
  99  **/
 100 s32 e1000_null_write_nvm(struct e1000_hw E1000_UNUSEDARG *hw,
 101                          u16 E1000_UNUSEDARG a, u16 E1000_UNUSEDARG b,
 102                          u16 E1000_UNUSEDARG *c)
 103 {
 104         DEBUGFUNC("e1000_null_write_nvm");
 105         return E1000_SUCCESS;
 106 }
 107
 108 /**
 109  *  e1000_raise_eec_clk - Raise EEPROM clock
 110  *  @hw: pointer to the HW structure
 111  *  @eecd: pointer to the EEPROM
 112  *
 113  *  Enable/Raise the EEPROM clock bit.
 114  **/
 115 static void e1000_raise_eec_clk(struct e1000_hw *hw, u32 *eecd)
 116 {
 117         *eecd = *eecd | E1000_EECD_SK;
 118         E1000_WRITE_REG(hw, E1000_EECD, *eecd);
 119         E1000_WRITE_FLUSH(hw);
 120         usec_delay(hw->nvm.delay_usec);
 121 }
 122
 123 /**
 124  *  e1000_lower_eec_clk - Lower EEPROM clock
 125  *  @hw: pointer to the HW structure
 126  *  @eecd: pointer to the EEPROM
 127  *
 128  *  Clear/Lower the EEPROM clock bit.
 129  **/
 130 static void e1000_lower_eec_clk(struct e1000_hw *hw, u32 *eecd)
 131 {
 132         *eecd = *eecd & ~E1000_EECD_SK;
 133         E1000_WRITE_REG(hw, E1000_EECD, *eecd);
 134         E1000_WRITE_FLUSH(hw);
 135         usec_delay(hw->nvm.delay_usec);
 136 }
 137
 138 /**
 139  *  e1000_shift_out_eec_bits - Shift data bits our to the EEPROM
 140  *  @hw: pointer to the HW structure
 141  *  @data: data to send to the EEPROM
 142  *  @count: number of bits to shift out
 143  *
 144  *  We need to shift 'count' bits out to the EEPROM.  So, the value in the
 145  *  "data" parameter will be shifted out to the EEPROM one bit at a time.
 146  *  In order to do this, "data" must be broken down into bits.
 147  **/
 148 static void e1000_shift_out_eec_bits(struct e1000_hw *hw, u16 data, u16 count)
 149 {
 150         struct e1000_nvm_info *nvm = &hw->nvm;
 151         u32 eecd = E1000_READ_REG(hw, E1000_EECD);
 152         u32 mask;
 153
 154         DEBUGFUNC("e1000_shift_out_eec_bits");
 155
 156         mask = 0x01 << (count - 1);
 157         if (nvm->type == e1000_nvm_eeprom_microwire)
 158                 eecd &= ~E1000_EECD_DO;
 159         else
 160         if (nvm->type == e1000_nvm_eeprom_spi)
 161                 eecd |= E1000_EECD_DO;
 162
 163         do {
 164                 eecd &= ~E1000_EECD_DI;
 165
 166                 if (data & mask)
 167                         eecd |= E1000_EECD_DI;
 168
 169                 E1000_WRITE_REG(hw, E1000_EECD, eecd);
 170                 E1000_WRITE_FLUSH(hw);
 171
 172                 usec_delay(nvm->delay_usec);
 173
 174                 e1000_raise_eec_clk(hw, &eecd);
 175                 e1000_lower_eec_clk(hw, &eecd);
 176
 177                 mask >>= 1;
 178         } while (mask);
 179
 180         eecd &= ~E1000_EECD_DI;
 181         E1000_WRITE_REG(hw, E1000_EECD, eecd);
 182 }
 183
 184 /**
 185  *  e1000_shift_in_eec_bits - Shift data bits in from the EEPROM
 186  *  @hw: pointer to the HW structure
 187  *  @count: number of bits to shift in
 188  *
 189  *  In order to read a register from the EEPROM, we need to shift 'count' bits
 190  *  in from the EEPROM.  Bits are "shifted in" by raising the clock input to
 191  *  the EEPROM (setting the SK bit), and then reading the value of the data out
 192  *  "DO" bit.  During this "shifting in" process the data in "DI" bit should
 193  *  always be clear.
 194  **/
 195 static u16 e1000_shift_in_eec_bits(struct e1000_hw *hw, u16 count)
 196 {
 197         u32 eecd;
 198         u32 i;
 199         u16 data;
 200
 201         DEBUGFUNC("e1000_shift_in_eec_bits");
 202
 203         eecd = E1000_READ_REG(hw, E1000_EECD);
 204
 205         eecd &= ~(E1000_EECD_DO | E1000_EECD_DI);
 206         data = 0;
 207
 208         for (i = 0; i < count; i++) {
 209                 data <<= 1;
 210                 e1000_raise_eec_clk(hw, &eecd);
 211
 212                 eecd = E1000_READ_REG(hw, E1000_EECD);
 213
 214                 eecd &= ~E1000_EECD_DI;
 215                 if (eecd & E1000_EECD_DO)
 216                         data |= 1;
 217
 218                 e1000_lower_eec_clk(hw, &eecd);
 219         }
 220
 221         return data;
 222 }
 223
 224 /**
 225  *  e1000_poll_eerd_eewr_done - Poll for EEPROM read/write completion
 226  *  @hw: pointer to the HW structure
 227  *  @ee_reg: EEPROM flag for polling
 228  *
 229  *  Polls the EEPROM status bit for either read or write completion based
 230  *  upon the value of 'ee_reg'.
 231  **/
 232 s32 e1000_poll_eerd_eewr_done(struct e1000_hw *hw, int ee_reg)
 233 {
 234         u32 attempts = 100000;
 235         u32 i, reg = 0;
 236
 237         DEBUGFUNC("e1000_poll_eerd_eewr_done");
 238
 239         for (i = 0; i < attempts; i++) {
 240                 if (ee_reg == E1000_NVM_POLL_READ)
 241                         reg = E1000_READ_REG(hw, E1000_EERD);
 242                 else
 243                         reg = E1000_READ_REG(hw, E1000_EEWR);
 244
 245                 if (reg & E1000_NVM_RW_REG_DONE)
 246                         return E1000_SUCCESS;
 247
 248                 usec_delay(5);
 249         }
 250
 251         return -E1000_ERR_NVM;
 252 }
 253
 254 /**
 255  *  e1000_acquire_nvm_generic - Generic request for access to EEPROM
 256  *  @hw: pointer to the HW structure
 257  *
 258  *  Set the EEPROM access request bit and wait for EEPROM access grant bit.
 259  *  Return successful if access grant bit set, else clear the request for
 260  *  EEPROM access and return -E1000_ERR_NVM (-1).
 261  **/
 262 s32 e1000_acquire_nvm_generic(struct e1000_hw *hw)
 263 {
 264         u32 eecd = E1000_READ_REG(hw, E1000_EECD);
 265         s32 timeout = E1000_NVM_GRANT_ATTEMPTS;
 266
 267         DEBUGFUNC("e1000_acquire_nvm_generic");
 268
 269         E1000_WRITE_REG(hw, E1000_EECD, eecd | E1000_EECD_REQ);
 270         eecd = E1000_READ_REG(hw, E1000_EECD);
 271
 272         while (timeout) {
 273                 if (eecd & E1000_EECD_GNT)
 274                         break;
 275                 usec_delay(5);
 276                 eecd = E1000_READ_REG(hw, E1000_EECD);
 277                 timeout--;
 278         }
 279
 280         if (!timeout) {
 281                 eecd &= ~E1000_EECD_REQ;
 282                 E1000_WRITE_REG(hw, E1000_EECD, eecd);
 283                 DEBUGOUT("Could not acquire NVM grant\n");
 284                 return -E1000_ERR_NVM;
 285         }
 286
 287         return E1000_SUCCESS;
 288 }
 289
 290 /**
 291  *  e1000_standby_nvm - Return EEPROM to standby state
 292  *  @hw: pointer to the HW structure
 293  *
 294  *  Return the EEPROM to a standby state.
 295  **/
 296 static void e1000_standby_nvm(struct e1000_hw *hw)
 297 {
 298         struct e1000_nvm_info *nvm = &hw->nvm;
 299         u32 eecd = E1000_READ_REG(hw, E1000_EECD);
 300
 301         DEBUGFUNC("e1000_standby_nvm");
 302
 303         if (nvm->type == e1000_nvm_eeprom_microwire) {
 304                 eecd &= ~(E1000_EECD_CS | E1000_EECD_SK);
 305                 E1000_WRITE_REG(hw, E1000_EECD, eecd);
 306                 E1000_WRITE_FLUSH(hw);
 307                 usec_delay(nvm->delay_usec);
 308
 309                 e1000_raise_eec_clk(hw, &eecd);
 310
 311                 /* Select EEPROM */
 312                 eecd |= E1000_EECD_CS;
 313                 E1000_WRITE_REG(hw, E1000_EECD, eecd);
 314                 E1000_WRITE_FLUSH(hw);
 315                 usec_delay(nvm->delay_usec);
 316
 317                 e1000_lower_eec_clk(hw, &eecd);
 318         } else if (nvm->type == e1000_nvm_eeprom_spi) {
 319                 /* Toggle CS to flush commands */
 320                 eecd |= E1000_EECD_CS;
 321                 E1000_WRITE_REG(hw, E1000_EECD, eecd);
 322                 E1000_WRITE_FLUSH(hw);
 323                 usec_delay(nvm->delay_usec);
 324                 eecd &= ~E1000_EECD_CS;
 325                 E1000_WRITE_REG(hw, E1000_EECD, eecd);
 326                 E1000_WRITE_FLUSH(hw);
 327                 usec_delay(nvm->delay_usec);
 328         }
 329 }
 330
 331 /**
 332  *  e1000_stop_nvm - Terminate EEPROM command
 333  *  @hw: pointer to the HW structure
 334  *
 335  *  Terminates the current command by inverting the EEPROM's chip select pin.
 336  **/
 337 void e1000_stop_nvm(struct e1000_hw *hw)
 338 {
 339         u32 eecd;
 340
 341         DEBUGFUNC("e1000_stop_nvm");
 342
 343         eecd = E1000_READ_REG(hw, E1000_EECD);
 344         if (hw->nvm.type == e1000_nvm_eeprom_spi) {
 345                 /* Pull CS high */
 346                 eecd |= E1000_EECD_CS;
 347                 e1000_lower_eec_clk(hw, &eecd);
 348         } else if (hw->nvm.type == e1000_nvm_eeprom_microwire) {
 349                 /* CS on Microwire is active-high */
 350                 eecd &= ~(E1000_EECD_CS | E1000_EECD_DI);
 351                 E1000_WRITE_REG(hw, E1000_EECD, eecd);
 352                 e1000_raise_eec_clk(hw, &eecd);
 353                 e1000_lower_eec_clk(hw, &eecd);
 354         }
 355 }
 356
 357 /**
 358  *  e1000_release_nvm_generic - Release exclusive access to EEPROM
 359  *  @hw: pointer to the HW structure
 360  *
 361  *  Stop any current commands to the EEPROM and clear the EEPROM request bit.
 362  **/
 363 void e1000_release_nvm_generic(struct e1000_hw *hw)
 364 {
 365         u32 eecd;
 366
 367         DEBUGFUNC("e1000_release_nvm_generic");
 368
 369         e1000_stop_nvm(hw);
 370
 371         eecd = E1000_READ_REG(hw, E1000_EECD);
 372         eecd &= ~E1000_EECD_REQ;
 373         E1000_WRITE_REG(hw, E1000_EECD, eecd);
 374 }
 375
 376 /**
 377  *  e1000_ready_nvm_eeprom - Prepares EEPROM for read/write
 378  *  @hw: pointer to the HW structure
 379  *
 380  *  Setups the EEPROM for reading and writing.
 381  **/
 382 static s32 e1000_ready_nvm_eeprom(struct e1000_hw *hw)
 383 {
 384         struct e1000_nvm_info *nvm = &hw->nvm;
 385         u32 eecd = E1000_READ_REG(hw, E1000_EECD);
 386         u8 spi_stat_reg;
 387
 388         DEBUGFUNC("e1000_ready_nvm_eeprom");
 389
 390         if (nvm->type == e1000_nvm_eeprom_microwire) {
 391                 /* Clear SK and DI */
 392                 eecd &= ~(E1000_EECD_DI | E1000_EECD_SK);
 393                 E1000_WRITE_REG(hw, E1000_EECD, eecd);
 394                 /* Set CS */
 395                 eecd |= E1000_EECD_CS;
 396                 E1000_WRITE_REG(hw, E1000_EECD, eecd);
 397         } else if (nvm->type == e1000_nvm_eeprom_spi) {
 398                 u16 timeout = NVM_MAX_RETRY_SPI;
 399
 400                 /* Clear SK and CS */
 401                 eecd &= ~(E1000_EECD_CS | E1000_EECD_SK);
 402                 E1000_WRITE_REG(hw, E1000_EECD, eecd);
 403                 E1000_WRITE_FLUSH(hw);
 404                 usec_delay(1);
 405
 406                 /* Read "Status Register" repeatedly until the LSB is cleared.
 407                  * The EEPROM will signal that the command has been completed
 408                  * by clearing bit 0 of the internal status register.  If it's
 409                  * not cleared within 'timeout', then error out.
 410                  */
 411                 while (timeout) {
 412                         e1000_shift_out_eec_bits(hw, NVM_RDSR_OPCODE_SPI,
 413                                                  hw->nvm.opcode_bits);
 414                         spi_stat_reg = (u8)e1000_shift_in_eec_bits(hw, 8);
 415                         if (!(spi_stat_reg & NVM_STATUS_RDY_SPI))
 416                                 break;
 417
 418                         usec_delay(5);
 419                         e1000_standby_nvm(hw);
 420                         timeout--;
 421                 }
 422
 423                 if (!timeout) {
 424                         DEBUGOUT("SPI NVM Status error\n");
 425                         return -E1000_ERR_NVM;
 426                 }
 427         }
 428
 429         return E1000_SUCCESS;
 430 }
 431
 432 /**
 433  *  e1000_read_nvm_spi - Read EEPROM's using SPI
 434  *  @hw: pointer to the HW structure
 435  *  @offset: offset of word in the EEPROM to read
 436  *  @words: number of words to read
 437  *  @data: word read from the EEPROM
 438  *
 439  *  Reads a 16 bit word from the EEPROM.
 440  **/
 441 s32 e1000_read_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
 442 {
 443         struct e1000_nvm_info *nvm = &hw->nvm;
 444         u32 i = 0;
 445         s32 ret_val;
 446         u16 word_in;
 447         u8 read_opcode = NVM_READ_OPCODE_SPI;
 448
 449         DEBUGFUNC("e1000_read_nvm_spi");
 450
 451         /* A check for invalid values:  offset too large, too many words,
 452          * and not enough words.
 453          */
 454         if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||
 455             (words == 0)) {
 456                 DEBUGOUT("nvm parameter(s) out of bounds\n");
 457                 return -E1000_ERR_NVM;
 458         }
 459
 460         ret_val = nvm->ops.acquire(hw);
 461         if (ret_val)
 462                 return ret_val;
 463
 464         ret_val = e1000_ready_nvm_eeprom(hw);
 465         if (ret_val)
 466                 goto release;
 467
 468         e1000_standby_nvm(hw);
 469
 470         if ((nvm->address_bits == 8) && (offset >= 128))
 471                 read_opcode |= NVM_A8_OPCODE_SPI;
 472
 473         /* Send the READ command (opcode + addr) */
 474         e1000_shift_out_eec_bits(hw, read_opcode, nvm->opcode_bits);
 475         e1000_shift_out_eec_bits(hw, (u16)(offset*2), nvm->address_bits);
 476
 477         /* Read the data.  SPI NVMs increment the address with each byte
 478          * read and will roll over if reading beyond the end.  This allows
 479          * us to read the whole NVM from any offset
 480          */
 481         for (i = 0; i < words; i++) {
 482                 word_in = e1000_shift_in_eec_bits(hw, 16);
 483                 data[i] = (word_in >> 8) | (word_in << 8);
 484         }
 485
 486 release:
 487         nvm->ops.release(hw);
 488
 489         return ret_val;
 490 }
 491
 492 /**
 493  *  e1000_read_nvm_microwire - Reads EEPROM's using microwire
 494  *  @hw: pointer to the HW structure
 495  *  @offset: offset of word in the EEPROM to read
 496  *  @words: number of words to read
 497  *  @data: word read from the EEPROM
 498  *
 499  *  Reads a 16 bit word from the EEPROM.
 500  **/
 501 s32 e1000_read_nvm_microwire(struct e1000_hw *hw, u16 offset, u16 words,
 502                              u16 *data)
 503 {
 504         struct e1000_nvm_info *nvm = &hw->nvm;
 505         u32 i = 0;
 506         s32 ret_val;
 507         u8 read_opcode = NVM_READ_OPCODE_MICROWIRE;
 508
 509         DEBUGFUNC("e1000_read_nvm_microwire");
 510
 511         /* A check for invalid values:  offset too large, too many words,
 512          * and not enough words.
 513          */
 514         if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||
 515             (words == 0)) {
 516                 DEBUGOUT("nvm parameter(s) out of bounds\n");
 517                 return -E1000_ERR_NVM;
 518         }
 519
 520         ret_val = nvm->ops.acquire(hw);
 521         if (ret_val)
 522                 return ret_val;
 523
 524         ret_val = e1000_ready_nvm_eeprom(hw);
 525         if (ret_val)
 526                 goto release;
 527
 528         for (i = 0; i < words; i++) {
 529                 /* Send the READ command (opcode + addr) */
 530                 e1000_shift_out_eec_bits(hw, read_opcode, nvm->opcode_bits);
 531                 e1000_shift_out_eec_bits(hw, (u16)(offset + i),
 532                                         nvm->address_bits);
 533
 534                 /* Read the data.  For microwire, each word requires the
 535                  * overhead of setup and tear-down.
 536                  */
 537                 data[i] = e1000_shift_in_eec_bits(hw, 16);
 538                 e1000_standby_nvm(hw);
 539         }
 540
 541 release:
 542         nvm->ops.release(hw);
 543
 544         return ret_val;
 545 }
 546
 547 /**
 548  *  e1000_read_nvm_eerd - Reads EEPROM using EERD register
 549  *  @hw: pointer to the HW structure
 550  *  @offset: offset of word in the EEPROM to read
 551  *  @words: number of words to read
 552  *  @data: word read from the EEPROM
 553  *
 554  *  Reads a 16 bit word from the EEPROM using the EERD register.
 555  **/
 556 s32 e1000_read_nvm_eerd(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
 557 {
 558         struct e1000_nvm_info *nvm = &hw->nvm;
 559         u32 i, eerd = 0;
 560         s32 ret_val = E1000_SUCCESS;
 561
 562         DEBUGFUNC("e1000_read_nvm_eerd");
 563
 564         /* A check for invalid values:  offset too large, too many words,
 565          * too many words for the offset, and not enough words.
 566          */
 567         if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||
 568             (words == 0)) {
 569                 DEBUGOUT("nvm parameter(s) out of bounds\n");
 570                 return -E1000_ERR_NVM;
 571         }
 572
 573         for (i = 0; i < words; i++) {
 574                 eerd = ((offset+i) << E1000_NVM_RW_ADDR_SHIFT) +
 575                        E1000_NVM_RW_REG_START;
 576
 577                 E1000_WRITE_REG(hw, E1000_EERD, eerd);
 578                 ret_val = e1000_poll_eerd_eewr_done(hw, E1000_NVM_POLL_READ);
 579                 if (ret_val)
 580                         break;
 581
 582                 data[i] = (E1000_READ_REG(hw, E1000_EERD) >>
 583                            E1000_NVM_RW_REG_DATA);
 584         }
 585
 586         if (ret_val)
 587                 DEBUGOUT1("NVM read error: %d\n", ret_val);
 588
 589         return ret_val;
 590 }
 591
 592 /**
 593  *  e1000_write_nvm_spi - Write to EEPROM using SPI
 594  *  @hw: pointer to the HW structure
 595  *  @offset: offset within the EEPROM to be written to
 596  *  @words: number of words to write
 597  *  @data: 16 bit word(s) to be written to the EEPROM
 598  *
 599  *  Writes data to EEPROM at offset using SPI interface.
 600  *
 601  *  If e1000_update_nvm_checksum is not called after this function , the
 602  *  EEPROM will most likely contain an invalid checksum.
 603  **/
 604 s32 e1000_write_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
 605 {
 606         struct e1000_nvm_info *nvm = &hw->nvm;
 607         s32 ret_val = -E1000_ERR_NVM;
 608         u16 widx = 0;
 609
 610         DEBUGFUNC("e1000_write_nvm_spi");
 611
 612         /* A check for invalid values:  offset too large, too many words,
 613          * and not enough words.
 614          */
 615         if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||
 616             (words == 0)) {
 617                 DEBUGOUT("nvm parameter(s) out of bounds\n");
 618                 return -E1000_ERR_NVM;
 619         }
 620
 621         while (widx < words) {
 622                 u8 write_opcode = NVM_WRITE_OPCODE_SPI;
 623
 624                 ret_val = nvm->ops.acquire(hw);
 625                 if (ret_val)
 626                         return ret_val;
 627
 628                 ret_val = e1000_ready_nvm_eeprom(hw);
 629                 if (ret_val) {
 630                         nvm->ops.release(hw);
 631                         return ret_val;
 632                 }
 633
 634                 e1000_standby_nvm(hw);
 635
 636                 /* Send the WRITE ENABLE command (8 bit opcode) */
 637                 e1000_shift_out_eec_bits(hw, NVM_WREN_OPCODE_SPI,
 638                                          nvm->opcode_bits);
 639
 640                 e1000_standby_nvm(hw);
 641
 642                 /* Some SPI eeproms use the 8th address bit embedded in the
 643                  * opcode
 644                  */
 645                 if ((nvm->address_bits == 8) && (offset >= 128))
 646                         write_opcode |= NVM_A8_OPCODE_SPI;
 647
 648                 /* Send the Write command (8-bit opcode + addr) */
 649                 e1000_shift_out_eec_bits(hw, write_opcode, nvm->opcode_bits);
 650                 e1000_shift_out_eec_bits(hw, (u16)((offset + widx) * 2),
 651                                          nvm->address_bits);
 652
 653                 /* Loop to allow for up to whole page write of eeprom */
 654                 while (widx < words) {
 655                         u16 word_out = data[widx];
 656                         word_out = (word_out >> 8) | (word_out << 8);
 657                         e1000_shift_out_eec_bits(hw, word_out, 16);
 658                         widx++;
 659
 660                         if ((((offset + widx) * 2) % nvm->page_size) == 0) {
 661                                 e1000_standby_nvm(hw);
 662                                 break;
 663                         }
 664                 }
 665                 msec_delay(10);
 666                 nvm->ops.release(hw);
 667         }
 668
 669         return ret_val;
 670 }
 671
 672 /**
 673  *  e1000_write_nvm_microwire - Writes EEPROM using microwire
 674  *  @hw: pointer to the HW structure
 675  *  @offset: offset within the EEPROM to be written to
 676  *  @words: number of words to write
 677  *  @data: 16 bit word(s) to be written to the EEPROM
 678  *
 679  *  Writes data to EEPROM at offset using microwire interface.
 680  *
 681  *  If e1000_update_nvm_checksum is not called after this function , the
 682  *  EEPROM will most likely contain an invalid checksum.
 683  **/
 684 s32 e1000_write_nvm_microwire(struct e1000_hw *hw, u16 offset, u16 words,
 685                               u16 *data)
 686 {
 687         struct e1000_nvm_info *nvm = &hw->nvm;
 688         s32  ret_val;
 689         u32 eecd;
 690         u16 words_written = 0;
 691         u16 widx = 0;
 692
 693         DEBUGFUNC("e1000_write_nvm_microwire");
 694
 695         /* A check for invalid values:  offset too large, too many words,
 696          * and not enough words.
 697          */
 698         if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||
 699             (words == 0)) {
 700                 DEBUGOUT("nvm parameter(s) out of bounds\n");
 701                 return -E1000_ERR_NVM;
 702         }
 703
 704         ret_val = nvm->ops.acquire(hw);
 705         if (ret_val)
 706                 return ret_val;
 707
 708         ret_val = e1000_ready_nvm_eeprom(hw);
 709         if (ret_val)
 710                 goto release;
 711
 712         e1000_shift_out_eec_bits(hw, NVM_EWEN_OPCODE_MICROWIRE,
 713                                  (u16)(nvm->opcode_bits + 2));
 714
 715         e1000_shift_out_eec_bits(hw, 0, (u16)(nvm->address_bits - 2));
 716
 717         e1000_standby_nvm(hw);
 718
 719         while (words_written < words) {
 720                 e1000_shift_out_eec_bits(hw, NVM_WRITE_OPCODE_MICROWIRE,
 721                                          nvm->opcode_bits);
 722
 723                 e1000_shift_out_eec_bits(hw, (u16)(offset + words_written),
 724                                          nvm->address_bits);
 725
 726                 e1000_shift_out_eec_bits(hw, data[words_written], 16);
 727
 728                 e1000_standby_nvm(hw);
 729
 730                 for (widx = 0; widx < 200; widx++) {
 731                         eecd = E1000_READ_REG(hw, E1000_EECD);
 732                         if (eecd & E1000_EECD_DO)
 733                                 break;
 734                         usec_delay(50);
 735                 }
 736
 737                 if (widx == 200) {
 738                         DEBUGOUT("NVM Write did not complete\n");
 739                         ret_val = -E1000_ERR_NVM;
 740                         goto release;
 741                 }
 742
 743                 e1000_standby_nvm(hw);
 744
 745                 words_written++;
 746         }
 747
 748         e1000_shift_out_eec_bits(hw, NVM_EWDS_OPCODE_MICROWIRE,
 749                                  (u16)(nvm->opcode_bits + 2));
 750
 751         e1000_shift_out_eec_bits(hw, 0, (u16)(nvm->address_bits - 2));
 752
 753 release:
 754         nvm->ops.release(hw);
 755
 756         return ret_val;
 757 }
 758
 759 /**
 760  *  e1000_read_pba_string_generic - Read device part number
 761  *  @hw: pointer to the HW structure
 762  *  @pba_num: pointer to device part number
 763  *  @pba_num_size: size of part number buffer
 764  *
 765  *  Reads the product board assembly (PBA) number from the EEPROM and stores
 766  *  the value in pba_num.
 767  **/
 768 s32 e1000_read_pba_string_generic(struct e1000_hw *hw, u8 *pba_num,
 769                                   u32 pba_num_size)
 770 {
 771         s32 ret_val;
 772         u16 nvm_data;
 773         u16 pba_ptr;
 774         u16 offset;
 775         u16 length;
 776
 777         DEBUGFUNC("e1000_read_pba_string_generic");
 778
 779         if ((hw->mac.type >= e1000_i210) &&
 780             !e1000_get_flash_presence_i210(hw)) {
 781                 DEBUGOUT("Flashless no PBA string\n");
 782                 return -E1000_ERR_NVM_PBA_SECTION;
 783         }
 784
 785         if (pba_num == NULL) {
 786                 DEBUGOUT("PBA string buffer was null\n");
 787                 return -E1000_ERR_INVALID_ARGUMENT;
 788         }
 789
 790         ret_val = hw->nvm.ops.read(hw, NVM_PBA_OFFSET_0, 1, &nvm_data);
 791         if (ret_val) {
 792                 DEBUGOUT("NVM Read Error\n");
 793                 return ret_val;
 794         }
 795
 796         ret_val = hw->nvm.ops.read(hw, NVM_PBA_OFFSET_1, 1, &pba_ptr);
 797         if (ret_val) {
 798                 DEBUGOUT("NVM Read Error\n");
 799                 return ret_val;
 800         }
 801
 802         /* if nvm_data is not ptr guard the PBA must be in legacy format which
 803          * means pba_ptr is actually our second data word for the PBA number
 804          * and we can decode it into an ascii string
 805          */
 806         if (nvm_data != NVM_PBA_PTR_GUARD) {
 807                 DEBUGOUT("NVM PBA number is not stored as string\n");
 808
 809                 /* make sure callers buffer is big enough to store the PBA */
 810                 if (pba_num_size < E1000_PBANUM_LENGTH) {
 811                         DEBUGOUT("PBA string buffer too small\n");
 812                         return E1000_ERR_NO_SPACE;
 813                 }
 814
 815                 /* extract hex string from data and pba_ptr */
 816                 pba_num[0] = (nvm_data >> 12) & 0xF;
 817                 pba_num[1] = (nvm_data >> 8) & 0xF;
 818                 pba_num[2] = (nvm_data >> 4) & 0xF;
 819                 pba_num[3] = nvm_data & 0xF;
 820                 pba_num[4] = (pba_ptr >> 12) & 0xF;
 821                 pba_num[5] = (pba_ptr >> 8) & 0xF;
 822                 pba_num[6] = '-';
 823                 pba_num[7] = 0;
 824                 pba_num[8] = (pba_ptr >> 4) & 0xF;
 825                 pba_num[9] = pba_ptr & 0xF;
 826
 827                 /* put a null character on the end of our string */
 828                 pba_num[10] = '\0';
 829
 830                 /* switch all the data but the '-' to hex char */
 831                 for (offset = 0; offset < 10; offset++) {
 832                         if (pba_num[offset] < 0xA)
 833                                 pba_num[offset] += '0';
 834                         else if (pba_num[offset] < 0x10)
 835                                 pba_num[offset] += 'A' - 0xA;
 836                 }
 837
 838                 return E1000_SUCCESS;
 839         }
 840
 841         ret_val = hw->nvm.ops.read(hw, pba_ptr, 1, &length);
 842         if (ret_val) {
 843                 DEBUGOUT("NVM Read Error\n");
 844                 return ret_val;
 845         }
 846
 847         if (length == 0xFFFF || length == 0) {
 848                 DEBUGOUT("NVM PBA number section invalid length\n");
 849                 return -E1000_ERR_NVM_PBA_SECTION;
 850         }
 851         /* check if pba_num buffer is big enough */
 852         if (pba_num_size < (((u32)length * 2) - 1)) {
 853                 DEBUGOUT("PBA string buffer too small\n");
 854                 return -E1000_ERR_NO_SPACE;
 855         }
 856
 857         /* trim pba length from start of string */
 858         pba_ptr++;
 859         length--;
 860
 861         for (offset = 0; offset < length; offset++) {
 862                 ret_val = hw->nvm.ops.read(hw, pba_ptr + offset, 1, &nvm_data);
 863                 if (ret_val) {
 864                         DEBUGOUT("NVM Read Error\n");
 865                         return ret_val;
 866                 }
 867                 pba_num[offset * 2] = (u8)(nvm_data >> 8);
 868                 pba_num[(offset * 2) + 1] = (u8)(nvm_data & 0xFF);
 869         }
 870         pba_num[offset * 2] = '\0';
 871
 872         return E1000_SUCCESS;
 873 }
 874
 875 /**
 876  *  e1000_read_pba_length_generic - Read device part number length
 877  *  @hw: pointer to the HW structure
 878  *  @pba_num_size: size of part number buffer
 879  *
 880  *  Reads the product board assembly (PBA) number length from the EEPROM and
 881  *  stores the value in pba_num_size.
 882  **/
 883 s32 e1000_read_pba_length_generic(struct e1000_hw *hw, u32 *pba_num_size)
 884 {
 885         s32 ret_val;
 886         u16 nvm_data;
 887         u16 pba_ptr;
 888         u16 length;
 889
 890         DEBUGFUNC("e1000_read_pba_length_generic");
 891
 892         if (pba_num_size == NULL) {
 893                 DEBUGOUT("PBA buffer size was null\n");
 894                 return -E1000_ERR_INVALID_ARGUMENT;
 895         }
 896
 897         ret_val = hw->nvm.ops.read(hw, NVM_PBA_OFFSET_0, 1, &nvm_data);
 898         if (ret_val) {
 899                 DEBUGOUT("NVM Read Error\n");
 900                 return ret_val;
 901         }
 902
 903         ret_val = hw->nvm.ops.read(hw, NVM_PBA_OFFSET_1, 1, &pba_ptr);
 904         if (ret_val) {
 905                 DEBUGOUT("NVM Read Error\n");
 906                 return ret_val;
 907         }
 908
 909          /* if data is not ptr guard the PBA must be in legacy format */
 910         if (nvm_data != NVM_PBA_PTR_GUARD) {
 911                 *pba_num_size = E1000_PBANUM_LENGTH;
 912                 return E1000_SUCCESS;
 913         }
 914
 915         ret_val = hw->nvm.ops.read(hw, pba_ptr, 1, &length);
 916         if (ret_val) {
 917                 DEBUGOUT("NVM Read Error\n");
 918                 return ret_val;
 919         }
 920
 921         if (length == 0xFFFF || length == 0) {
 922                 DEBUGOUT("NVM PBA number section invalid length\n");
 923                 return -E1000_ERR_NVM_PBA_SECTION;
 924         }
 925
 926         /* Convert from length in u16 values to u8 chars, add 1 for NULL,
 927          * and subtract 2 because length field is included in length.
 928          */
 929         *pba_num_size = ((u32)length * 2) - 1;
 930
 931         return E1000_SUCCESS;
 932 }
 933
 934
 935 /**
 936  *  e1000_read_pba_raw
 937  *  @hw: pointer to the HW structure
 938  *  @eeprom_buf: optional pointer to EEPROM image
 939  *  @eeprom_buf_size: size of EEPROM image in words
 940  *  @max_pba_block_size: PBA block size limit
 941  *  @pba: pointer to output PBA structure
 942  *
 943  *  Reads PBA from EEPROM image when eeprom_buf is not NULL.
 944  *  Reads PBA from physical EEPROM device when eeprom_buf is NULL.
 945  *
 946  **/
 947 s32 e1000_read_pba_raw(struct e1000_hw *hw, u16 *eeprom_buf,
 948                        u32 eeprom_buf_size, u16 max_pba_block_size,
 949                        struct e1000_pba *pba)
 950 {
 951         s32 ret_val;
 952         u16 pba_block_size;
 953
 954         if (pba == NULL)
 955                 return -E1000_ERR_PARAM;
 956
 957         if (eeprom_buf == NULL) {
 958                 ret_val = e1000_read_nvm(hw, NVM_PBA_OFFSET_0, 2,
 959                                          &pba->word[0]);
 960                 if (ret_val)
 961                         return ret_val;
 962         } else {
 963                 if (eeprom_buf_size > NVM_PBA_OFFSET_1) {
 964                         pba->word[0] = eeprom_buf[NVM_PBA_OFFSET_0];
 965                         pba->word[1] = eeprom_buf[NVM_PBA_OFFSET_1];
 966                 } else {
 967                         return -E1000_ERR_PARAM;
 968                 }
 969         }
 970
 971         if (pba->word[0] == NVM_PBA_PTR_GUARD) {
 972                 if (pba->pba_block == NULL)
 973                         return -E1000_ERR_PARAM;
 974
 975                 ret_val = e1000_get_pba_block_size(hw, eeprom_buf,
 976                                                    eeprom_buf_size,
 977                                                    &pba_block_size);
 978                 if (ret_val)
 979                         return ret_val;
 980
 981                 if (pba_block_size > max_pba_block_size)
 982                         return -E1000_ERR_PARAM;
 983
 984                 if (eeprom_buf == NULL) {
 985                         ret_val = e1000_read_nvm(hw, pba->word[1],
 986                                                  pba_block_size,
 987                                                  pba->pba_block);
 988                         if (ret_val)
 989                                 return ret_val;
 990                 } else {
 991                         if (eeprom_buf_size > (u32)(pba->word[1] +
 992                                               pba_block_size)) {
 993                                 memcpy(pba->pba_block,
 994                                        &eeprom_buf[pba->word[1]],
 995                                        pba_block_size * sizeof(u16));
 996                         } else {
 997                                 return -E1000_ERR_PARAM;
 998                         }
 999                 }
1000         }
1001
1002         return E1000_SUCCESS;
1003 }
1004
1005 /**
1006  *  e1000_write_pba_raw
1007  *  @hw: pointer to the HW structure
1008  *  @eeprom_buf: optional pointer to EEPROM image
1009  *  @eeprom_buf_size: size of EEPROM image in words
1010  *  @pba: pointer to PBA structure
1011  *
1012  *  Writes PBA to EEPROM image when eeprom_buf is not NULL.
1013  *  Writes PBA to physical EEPROM device when eeprom_buf is NULL.
1014  *
1015  **/
1016 s32 e1000_write_pba_raw(struct e1000_hw *hw, u16 *eeprom_buf,
1017                         u32 eeprom_buf_size, struct e1000_pba *pba)
1018 {
1019         s32 ret_val;
1020
1021         if (pba == NULL)
1022                 return -E1000_ERR_PARAM;
1023
1024         if (eeprom_buf == NULL) {
1025                 ret_val = e1000_write_nvm(hw, NVM_PBA_OFFSET_0, 2,
1026                                           &pba->word[0]);
1027                 if (ret_val)
1028                         return ret_val;
1029         } else {
1030                 if (eeprom_buf_size > NVM_PBA_OFFSET_1) {
1031                         eeprom_buf[NVM_PBA_OFFSET_0] = pba->word[0];
1032                         eeprom_buf[NVM_PBA_OFFSET_1] = pba->word[1];
1033                 } else {
1034                         return -E1000_ERR_PARAM;
1035                 }
1036         }
1037
1038         if (pba->word[0] == NVM_PBA_PTR_GUARD) {
1039                 if (pba->pba_block == NULL)
1040                         return -E1000_ERR_PARAM;
1041
1042                 if (eeprom_buf == NULL) {
1043                         ret_val = e1000_write_nvm(hw, pba->word[1],
1044                                                   pba->pba_block[0],
1045                                                   pba->pba_block);
1046                         if (ret_val)
1047                                 return ret_val;
1048                 } else {
1049                         if (eeprom_buf_size > (u32)(pba->word[1] +
1050                                               pba->pba_block[0])) {
1051                                 memcpy(&eeprom_buf[pba->word[1]],
1052                                        pba->pba_block,
1053                                        pba->pba_block[0] * sizeof(u16));
1054                         } else {
1055                                 return -E1000_ERR_PARAM;
1056                         }
1057                 }
1058         }
1059
1060         return E1000_SUCCESS;
1061 }
1062
1063 /**
1064  *  e1000_get_pba_block_size
1065  *  @hw: pointer to the HW structure
1066  *  @eeprom_buf: optional pointer to EEPROM image
1067  *  @eeprom_buf_size: size of EEPROM image in words
1068  *  @pba_data_size: pointer to output variable
1069  *
1070  *  Returns the size of the PBA block in words. Function operates on EEPROM
1071  *  image if the eeprom_buf pointer is not NULL otherwise it accesses physical
1072  *  EEPROM device.
1073  *
1074  **/
1075 s32 e1000_get_pba_block_size(struct e1000_hw *hw, u16 *eeprom_buf,
1076                              u32 eeprom_buf_size, u16 *pba_block_size)
1077 {
1078         s32 ret_val;
1079         u16 pba_word[2];
1080         u16 length;
1081
1082         DEBUGFUNC("e1000_get_pba_block_size");
1083
1084         if (eeprom_buf == NULL) {
1085                 ret_val = e1000_read_nvm(hw, NVM_PBA_OFFSET_0, 2, &pba_word[0]);
1086                 if (ret_val)
1087                         return ret_val;
1088         } else {
1089                 if (eeprom_buf_size > NVM_PBA_OFFSET_1) {
1090                         pba_word[0] = eeprom_buf[NVM_PBA_OFFSET_0];
1091                         pba_word[1] = eeprom_buf[NVM_PBA_OFFSET_1];
1092                 } else {
1093                         return -E1000_ERR_PARAM;
1094                 }
1095         }
1096
1097         if (pba_word[0] == NVM_PBA_PTR_GUARD) {
1098                 if (eeprom_buf == NULL) {
1099                         ret_val = e1000_read_nvm(hw, pba_word[1] + 0, 1,
1100                                                  &length);
1101                         if (ret_val)
1102                                 return ret_val;
1103                 } else {
1104                         if (eeprom_buf_size > pba_word[1])
1105                                 length = eeprom_buf[pba_word[1] + 0];
1106                         else
1107                                 return -E1000_ERR_PARAM;
1108                 }
1109
1110                 if (length == 0xFFFF || length == 0)
1111                         return -E1000_ERR_NVM_PBA_SECTION;
1112         } else {
1113                 /* PBA number in legacy format, there is no PBA Block. */
1114                 length = 0;
1115         }
1116
1117         if (pba_block_size != NULL)
1118                 *pba_block_size = length;
1119
1120         return E1000_SUCCESS;
1121 }
1122
1123 /**
1124  *  e1000_read_mac_addr_generic - Read device MAC address
1125  *  @hw: pointer to the HW structure
1126  *
1127  *  Reads the device MAC address from the EEPROM and stores the value.
1128  *  Since devices with two ports use the same EEPROM, we increment the
1129  *  last bit in the MAC address for the second port.
1130  **/
1131 s32 e1000_read_mac_addr_generic(struct e1000_hw *hw)
1132 {
1133         u32 rar_high;
1134         u32 rar_low;
1135         u16 i;
1136
1137         rar_high = E1000_READ_REG(hw, E1000_RAH(0));
1138         rar_low = E1000_READ_REG(hw, E1000_RAL(0));
1139
1140         for (i = 0; i < E1000_RAL_MAC_ADDR_LEN; i++)
1141                 hw->mac.perm_addr[i] = (u8)(rar_low >> (i*8));
1142
1143         for (i = 0; i < E1000_RAH_MAC_ADDR_LEN; i++)
1144                 hw->mac.perm_addr[i+4] = (u8)(rar_high >> (i*8));
1145
1146         for (i = 0; i < ETH_ADDR_LEN; i++)
1147                 hw->mac.addr[i] = hw->mac.perm_addr[i];
1148
1149         return E1000_SUCCESS;
1150 }
1151
1152 /**
1153  *  e1000_validate_nvm_checksum_generic - Validate EEPROM checksum
1154  *  @hw: pointer to the HW structure
1155  *
1156  *  Calculates the EEPROM checksum by reading/adding each word of the EEPROM
1157  *  and then verifies that the sum of the EEPROM is equal to 0xBABA.
1158  **/
1159 s32 e1000_validate_nvm_checksum_generic(struct e1000_hw *hw)
1160 {
1161         s32 ret_val;
1162         u16 checksum = 0;
1163         u16 i, nvm_data;
1164
1165         DEBUGFUNC("e1000_validate_nvm_checksum_generic");
1166
1167         for (i = 0; i < (NVM_CHECKSUM_REG + 1); i++) {
1168                 ret_val = hw->nvm.ops.read(hw, i, 1, &nvm_data);
1169                 if (ret_val) {
1170                         DEBUGOUT("NVM Read Error\n");
1171                         return ret_val;
1172                 }
1173                 checksum += nvm_data;
1174         }
1175
1176         if (checksum != (u16) NVM_SUM) {
1177                 DEBUGOUT("NVM Checksum Invalid\n");
1178                 return -E1000_ERR_NVM;
1179         }
1180
1181         return E1000_SUCCESS;
1182 }
1183
1184 /**
1185  *  e1000_update_nvm_checksum_generic - Update EEPROM checksum
1186  *  @hw: pointer to the HW structure
1187  *
1188  *  Updates the EEPROM checksum by reading/adding each word of the EEPROM
1189  *  up to the checksum.  Then calculates the EEPROM checksum and writes the
1190  *  value to the EEPROM.
1191  **/
1192 s32 e1000_update_nvm_checksum_generic(struct e1000_hw *hw)
1193 {
1194         s32 ret_val;
1195         u16 checksum = 0;
1196         u16 i, nvm_data;
1197
1198         DEBUGFUNC("e1000_update_nvm_checksum");
1199
1200         for (i = 0; i < NVM_CHECKSUM_REG; i++) {
1201                 ret_val = hw->nvm.ops.read(hw, i, 1, &nvm_data);
1202                 if (ret_val) {
1203                         DEBUGOUT("NVM Read Error while updating checksum.\n");
1204                         return ret_val;
1205                 }
1206                 checksum += nvm_data;
1207         }
1208         checksum = (u16) NVM_SUM - checksum;
1209         ret_val = hw->nvm.ops.write(hw, NVM_CHECKSUM_REG, 1, &checksum);
1210         if (ret_val)
1211                 DEBUGOUT("NVM Write Error while updating checksum.\n");
1212
1213         return ret_val;
1214 }
1215
1216 /**
1217  *  e1000_reload_nvm_generic - Reloads EEPROM
1218  *  @hw: pointer to the HW structure
1219  *
1220  *  Reloads the EEPROM by setting the "Reinitialize from EEPROM" bit in the
1221  *  extended control register.
1222  **/
1223 static void e1000_reload_nvm_generic(struct e1000_hw *hw)
1224 {
1225         u32 ctrl_ext;
1226
1227         DEBUGFUNC("e1000_reload_nvm_generic");
1228
1229         usec_delay(10);
1230         ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
1231         ctrl_ext |= E1000_CTRL_EXT_EE_RST;
1232         E1000_WRITE_REG(hw, E1000_CTRL_EXT, ctrl_ext);
1233         E1000_WRITE_FLUSH(hw);
1234 }
1235
1236