1 /******************************************************************************
3 Copyright (c) 2001-2010, Intel Corporation
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
9 1. Redistributions of source code must retain the above copyright notice,
10 this list of conditions and the following disclaimer.
12 2. Redistributions in binary form must reproduce the above copyright
13 notice, this list of conditions and the following disclaimer in the
14 documentation and/or other materials provided with the distribution.
16 3. Neither the name of the Intel Corporation nor the names of its
17 contributors may be used to endorse or promote products derived from
18 this software without specific prior written permission.
20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 POSSIBILITY OF SUCH DAMAGE.
32 ******************************************************************************/
35 #ifdef HAVE_KERNEL_OPTION_HEADERS
36 #include "opt_device_polling.h"
40 #include <sys/param.h>
41 #include <sys/systm.h>
42 #if __FreeBSD_version >= 800000
43 #include <sys/buf_ring.h>
46 #include <sys/endian.h>
47 #include <sys/kernel.h>
48 #include <sys/kthread.h>
49 #include <sys/malloc.h>
51 #include <sys/module.h>
53 #include <sys/socket.h>
54 #include <sys/sockio.h>
55 #include <sys/sysctl.h>
56 #include <sys/taskqueue.h>
57 #include <sys/eventhandler.h>
58 #include <machine/bus.h>
59 #include <machine/resource.h>
62 #include <net/ethernet.h>
64 #include <net/if_arp.h>
65 #include <net/if_dl.h>
66 #include <net/if_media.h>
68 #include <net/if_types.h>
69 #include <net/if_vlan_var.h>
71 #include <netinet/in_systm.h>
72 #include <netinet/in.h>
73 #include <netinet/if_ether.h>
74 #include <netinet/ip.h>
75 #include <netinet/ip6.h>
76 #include <netinet/tcp.h>
77 #include <netinet/udp.h>
79 #include <machine/in_cksum.h>
80 #include <dev/led/led.h>
81 #include <dev/pci/pcivar.h>
82 #include <dev/pci/pcireg.h>
84 #include "e1000_api.h"
85 #include "e1000_82571.h"
88 /*********************************************************************
89 * Set this to one to display debug statistics
90 *********************************************************************/
91 int em_display_debug_stats = 0;
93 /*********************************************************************
95 *********************************************************************/
96 char em_driver_version[] = "7.0.5";
99 /*********************************************************************
100 * PCI Device ID Table
102 * Used by probe to select devices to load on
103 * Last field stores an index into e1000_strings
104 * Last entry must be all 0s
106 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID, String Index }
107 *********************************************************************/
109 static em_vendor_info_t em_vendor_info_array[] =
111 /* Intel(R) PRO/1000 Network Connection */
112 { 0x8086, E1000_DEV_ID_82571EB_COPPER, PCI_ANY_ID, PCI_ANY_ID, 0},
113 { 0x8086, E1000_DEV_ID_82571EB_FIBER, PCI_ANY_ID, PCI_ANY_ID, 0},
114 { 0x8086, E1000_DEV_ID_82571EB_SERDES, PCI_ANY_ID, PCI_ANY_ID, 0},
115 { 0x8086, E1000_DEV_ID_82571EB_SERDES_DUAL,
116 PCI_ANY_ID, PCI_ANY_ID, 0},
117 { 0x8086, E1000_DEV_ID_82571EB_SERDES_QUAD,
118 PCI_ANY_ID, PCI_ANY_ID, 0},
119 { 0x8086, E1000_DEV_ID_82571EB_QUAD_COPPER,
120 PCI_ANY_ID, PCI_ANY_ID, 0},
121 { 0x8086, E1000_DEV_ID_82571EB_QUAD_COPPER_LP,
122 PCI_ANY_ID, PCI_ANY_ID, 0},
123 { 0x8086, E1000_DEV_ID_82571EB_QUAD_FIBER,
124 PCI_ANY_ID, PCI_ANY_ID, 0},
125 { 0x8086, E1000_DEV_ID_82571PT_QUAD_COPPER,
126 PCI_ANY_ID, PCI_ANY_ID, 0},
127 { 0x8086, E1000_DEV_ID_82572EI_COPPER, PCI_ANY_ID, PCI_ANY_ID, 0},
128 { 0x8086, E1000_DEV_ID_82572EI_FIBER, PCI_ANY_ID, PCI_ANY_ID, 0},
129 { 0x8086, E1000_DEV_ID_82572EI_SERDES, PCI_ANY_ID, PCI_ANY_ID, 0},
130 { 0x8086, E1000_DEV_ID_82572EI, PCI_ANY_ID, PCI_ANY_ID, 0},
132 { 0x8086, E1000_DEV_ID_82573E, PCI_ANY_ID, PCI_ANY_ID, 0},
133 { 0x8086, E1000_DEV_ID_82573E_IAMT, PCI_ANY_ID, PCI_ANY_ID, 0},
134 { 0x8086, E1000_DEV_ID_82573L, PCI_ANY_ID, PCI_ANY_ID, 0},
135 { 0x8086, E1000_DEV_ID_82583V, PCI_ANY_ID, PCI_ANY_ID, 0},
136 { 0x8086, E1000_DEV_ID_80003ES2LAN_COPPER_SPT,
137 PCI_ANY_ID, PCI_ANY_ID, 0},
138 { 0x8086, E1000_DEV_ID_80003ES2LAN_SERDES_SPT,
139 PCI_ANY_ID, PCI_ANY_ID, 0},
140 { 0x8086, E1000_DEV_ID_80003ES2LAN_COPPER_DPT,
141 PCI_ANY_ID, PCI_ANY_ID, 0},
142 { 0x8086, E1000_DEV_ID_80003ES2LAN_SERDES_DPT,
143 PCI_ANY_ID, PCI_ANY_ID, 0},
144 { 0x8086, E1000_DEV_ID_ICH8_IGP_M_AMT, PCI_ANY_ID, PCI_ANY_ID, 0},
145 { 0x8086, E1000_DEV_ID_ICH8_IGP_AMT, PCI_ANY_ID, PCI_ANY_ID, 0},
146 { 0x8086, E1000_DEV_ID_ICH8_IGP_C, PCI_ANY_ID, PCI_ANY_ID, 0},
147 { 0x8086, E1000_DEV_ID_ICH8_IFE, PCI_ANY_ID, PCI_ANY_ID, 0},
148 { 0x8086, E1000_DEV_ID_ICH8_IFE_GT, PCI_ANY_ID, PCI_ANY_ID, 0},
149 { 0x8086, E1000_DEV_ID_ICH8_IFE_G, PCI_ANY_ID, PCI_ANY_ID, 0},
150 { 0x8086, E1000_DEV_ID_ICH8_IGP_M, PCI_ANY_ID, PCI_ANY_ID, 0},
151 { 0x8086, E1000_DEV_ID_ICH8_82567V_3, PCI_ANY_ID, PCI_ANY_ID, 0},
152 { 0x8086, E1000_DEV_ID_ICH9_IGP_M_AMT, PCI_ANY_ID, PCI_ANY_ID, 0},
153 { 0x8086, E1000_DEV_ID_ICH9_IGP_AMT, PCI_ANY_ID, PCI_ANY_ID, 0},
154 { 0x8086, E1000_DEV_ID_ICH9_IGP_C, PCI_ANY_ID, PCI_ANY_ID, 0},
155 { 0x8086, E1000_DEV_ID_ICH9_IGP_M, PCI_ANY_ID, PCI_ANY_ID, 0},
156 { 0x8086, E1000_DEV_ID_ICH9_IGP_M_V, PCI_ANY_ID, PCI_ANY_ID, 0},
157 { 0x8086, E1000_DEV_ID_ICH9_IFE, PCI_ANY_ID, PCI_ANY_ID, 0},
158 { 0x8086, E1000_DEV_ID_ICH9_IFE_GT, PCI_ANY_ID, PCI_ANY_ID, 0},
159 { 0x8086, E1000_DEV_ID_ICH9_IFE_G, PCI_ANY_ID, PCI_ANY_ID, 0},
160 { 0x8086, E1000_DEV_ID_ICH9_BM, PCI_ANY_ID, PCI_ANY_ID, 0},
161 { 0x8086, E1000_DEV_ID_82574L, PCI_ANY_ID, PCI_ANY_ID, 0},
162 { 0x8086, E1000_DEV_ID_82574LA, PCI_ANY_ID, PCI_ANY_ID, 0},
163 { 0x8086, E1000_DEV_ID_ICH10_R_BM_LM, PCI_ANY_ID, PCI_ANY_ID, 0},
164 { 0x8086, E1000_DEV_ID_ICH10_R_BM_LF, PCI_ANY_ID, PCI_ANY_ID, 0},
165 { 0x8086, E1000_DEV_ID_ICH10_R_BM_V, PCI_ANY_ID, PCI_ANY_ID, 0},
166 { 0x8086, E1000_DEV_ID_ICH10_D_BM_LM, PCI_ANY_ID, PCI_ANY_ID, 0},
167 { 0x8086, E1000_DEV_ID_ICH10_D_BM_LF, PCI_ANY_ID, PCI_ANY_ID, 0},
168 { 0x8086, E1000_DEV_ID_PCH_M_HV_LM, PCI_ANY_ID, PCI_ANY_ID, 0},
169 { 0x8086, E1000_DEV_ID_PCH_M_HV_LC, PCI_ANY_ID, PCI_ANY_ID, 0},
170 { 0x8086, E1000_DEV_ID_PCH_D_HV_DM, PCI_ANY_ID, PCI_ANY_ID, 0},
171 { 0x8086, E1000_DEV_ID_PCH_D_HV_DC, PCI_ANY_ID, PCI_ANY_ID, 0},
172 /* required last entry */
176 /*********************************************************************
177 * Table of branding strings for all supported NICs.
178 *********************************************************************/
180 static char *em_strings[] = {
181 "Intel(R) PRO/1000 Network Connection"
184 /*********************************************************************
185 * Function prototypes
186 *********************************************************************/
187 static int em_probe(device_t);
188 static int em_attach(device_t);
189 static int em_detach(device_t);
190 static int em_shutdown(device_t);
191 static int em_suspend(device_t);
192 static int em_resume(device_t);
193 static void em_start(struct ifnet *);
194 static void em_start_locked(struct ifnet *, struct tx_ring *);
196 static int em_mq_start(struct ifnet *, struct mbuf *);
197 static int em_mq_start_locked(struct ifnet *,
198 struct tx_ring *, struct mbuf *);
199 static void em_qflush(struct ifnet *);
201 static int em_ioctl(struct ifnet *, u_long, caddr_t);
202 static void em_init(void *);
203 static void em_init_locked(struct adapter *);
204 static void em_stop(void *);
205 static void em_media_status(struct ifnet *, struct ifmediareq *);
206 static int em_media_change(struct ifnet *);
207 static void em_identify_hardware(struct adapter *);
208 static int em_allocate_pci_resources(struct adapter *);
209 static int em_allocate_legacy(struct adapter *);
210 static int em_allocate_msix(struct adapter *);
211 static int em_allocate_queues(struct adapter *);
212 static int em_setup_msix(struct adapter *);
213 static void em_free_pci_resources(struct adapter *);
214 static void em_local_timer(void *);
215 static void em_reset(struct adapter *);
216 static void em_setup_interface(device_t, struct adapter *);
218 static void em_setup_transmit_structures(struct adapter *);
219 static void em_initialize_transmit_unit(struct adapter *);
220 static int em_allocate_transmit_buffers(struct tx_ring *);
221 static void em_free_transmit_structures(struct adapter *);
222 static void em_free_transmit_buffers(struct tx_ring *);
224 static int em_setup_receive_structures(struct adapter *);
225 static int em_allocate_receive_buffers(struct rx_ring *);
226 static void em_initialize_receive_unit(struct adapter *);
227 static void em_free_receive_structures(struct adapter *);
228 static void em_free_receive_buffers(struct rx_ring *);
230 static void em_enable_intr(struct adapter *);
231 static void em_disable_intr(struct adapter *);
232 static void em_update_stats_counters(struct adapter *);
233 static bool em_txeof(struct tx_ring *);
234 static int em_rxeof(struct rx_ring *, int);
235 #ifndef __NO_STRICT_ALIGNMENT
236 static int em_fixup_rx(struct rx_ring *);
238 static void em_receive_checksum(struct e1000_rx_desc *, struct mbuf *);
239 static void em_transmit_checksum_setup(struct tx_ring *, struct mbuf *,
241 static bool em_tso_setup(struct tx_ring *, struct mbuf *, u32 *, u32 *);
242 static void em_set_promisc(struct adapter *);
243 static void em_disable_promisc(struct adapter *);
244 static void em_set_multi(struct adapter *);
245 static void em_print_hw_stats(struct adapter *);
246 static void em_update_link_status(struct adapter *);
247 static void em_refresh_mbufs(struct rx_ring *, int);
248 static void em_register_vlan(void *, struct ifnet *, u16);
249 static void em_unregister_vlan(void *, struct ifnet *, u16);
250 static void em_setup_vlan_hw_support(struct adapter *);
251 static int em_xmit(struct tx_ring *, struct mbuf **);
252 static int em_dma_malloc(struct adapter *, bus_size_t,
253 struct em_dma_alloc *, int);
254 static void em_dma_free(struct adapter *, struct em_dma_alloc *);
255 static void em_print_debug_info(struct adapter *);
256 static void em_print_nvm_info(struct adapter *);
257 static int em_is_valid_ether_addr(u8 *);
258 static int em_sysctl_stats(SYSCTL_HANDLER_ARGS);
259 static int em_sysctl_debug_info(SYSCTL_HANDLER_ARGS);
260 static int em_sysctl_int_delay(SYSCTL_HANDLER_ARGS);
261 static void em_add_int_delay_sysctl(struct adapter *, const char *,
262 const char *, struct em_int_delay_info *, int, int);
263 /* Management and WOL Support */
264 static void em_init_manageability(struct adapter *);
265 static void em_release_manageability(struct adapter *);
266 static void em_get_hw_control(struct adapter *);
267 static void em_release_hw_control(struct adapter *);
268 static void em_get_wakeup(device_t);
269 static void em_enable_wakeup(device_t);
270 static int em_enable_phy_wakeup(struct adapter *);
271 static void em_led_func(void *, int);
273 static int em_irq_fast(void *);
276 static void em_msix_tx(void *);
277 static void em_msix_rx(void *);
278 static void em_msix_link(void *);
279 static void em_handle_tx(void *context, int pending);
280 static void em_handle_rx(void *context, int pending);
281 static void em_handle_link(void *context, int pending);
283 static void em_add_rx_process_limit(struct adapter *, const char *,
284 const char *, int *, int);
286 #ifdef DEVICE_POLLING
287 static poll_handler_t em_poll;
290 /*********************************************************************
291 * FreeBSD Device Interface Entry Points
292 *********************************************************************/
294 static device_method_t em_methods[] = {
295 /* Device interface */
296 DEVMETHOD(device_probe, em_probe),
297 DEVMETHOD(device_attach, em_attach),
298 DEVMETHOD(device_detach, em_detach),
299 DEVMETHOD(device_shutdown, em_shutdown),
300 DEVMETHOD(device_suspend, em_suspend),
301 DEVMETHOD(device_resume, em_resume),
305 static driver_t em_driver = {
306 "em", em_methods, sizeof(struct adapter),
309 devclass_t em_devclass;
310 DRIVER_MODULE(em, pci, em_driver, em_devclass, 0, 0);
311 MODULE_DEPEND(em, pci, 1, 1, 1);
312 MODULE_DEPEND(em, ether, 1, 1, 1);
314 /*********************************************************************
315 * Tunable default values.
316 *********************************************************************/
318 #define EM_TICKS_TO_USECS(ticks) ((1024 * (ticks) + 500) / 1000)
319 #define EM_USECS_TO_TICKS(usecs) ((1000 * (usecs) + 512) / 1024)
322 /* Allow common code without TSO */
327 static int em_tx_int_delay_dflt = EM_TICKS_TO_USECS(EM_TIDV);
328 static int em_rx_int_delay_dflt = EM_TICKS_TO_USECS(EM_RDTR);
329 TUNABLE_INT("hw.em.tx_int_delay", &em_tx_int_delay_dflt);
330 TUNABLE_INT("hw.em.rx_int_delay", &em_rx_int_delay_dflt);
332 static int em_tx_abs_int_delay_dflt = EM_TICKS_TO_USECS(EM_TADV);
333 static int em_rx_abs_int_delay_dflt = EM_TICKS_TO_USECS(EM_RADV);
334 TUNABLE_INT("hw.em.tx_abs_int_delay", &em_tx_abs_int_delay_dflt);
335 TUNABLE_INT("hw.em.rx_abs_int_delay", &em_rx_abs_int_delay_dflt);
337 static int em_rxd = EM_DEFAULT_RXD;
338 static int em_txd = EM_DEFAULT_TXD;
339 TUNABLE_INT("hw.em.rxd", &em_rxd);
340 TUNABLE_INT("hw.em.txd", &em_txd);
342 static int em_smart_pwr_down = FALSE;
343 TUNABLE_INT("hw.em.smart_pwr_down", &em_smart_pwr_down);
345 /* Controls whether promiscuous also shows bad packets */
346 static int em_debug_sbp = FALSE;
347 TUNABLE_INT("hw.em.sbp", &em_debug_sbp);
349 /* Local controls for MSI/MSIX */
351 static int em_enable_msix = TRUE;
352 static int em_msix_queues = 2; /* for 82574, can be 1 or 2 */
354 static int em_enable_msix = FALSE;
355 static int em_msix_queues = 0; /* disable */
357 TUNABLE_INT("hw.em.enable_msix", &em_enable_msix);
358 TUNABLE_INT("hw.em.msix_queues", &em_msix_queues);
360 /* How many packets rxeof tries to clean at a time */
361 static int em_rx_process_limit = 100;
362 TUNABLE_INT("hw.em.rx_process_limit", &em_rx_process_limit);
364 /* Flow control setting - default to FULL */
365 static int em_fc_setting = e1000_fc_full;
366 TUNABLE_INT("hw.em.fc_setting", &em_fc_setting);
369 ** Shadow VFTA table, this is needed because
370 ** the real vlan filter table gets cleared during
371 ** a soft reset and the driver needs to be able
374 static u32 em_shadow_vfta[EM_VFTA_SIZE];
376 /* Global used in WOL setup with multiport cards */
377 static int global_quad_port_a = 0;
379 /*********************************************************************
380 * Device identification routine
382 * em_probe determines if the driver should be loaded on
383 * adapter based on PCI vendor/device id of the adapter.
385 * return BUS_PROBE_DEFAULT on success, positive on failure
386 *********************************************************************/
389 em_probe(device_t dev)
391 char adapter_name[60];
392 u16 pci_vendor_id = 0;
393 u16 pci_device_id = 0;
394 u16 pci_subvendor_id = 0;
395 u16 pci_subdevice_id = 0;
396 em_vendor_info_t *ent;
398 INIT_DEBUGOUT("em_probe: begin");
400 pci_vendor_id = pci_get_vendor(dev);
401 if (pci_vendor_id != EM_VENDOR_ID)
404 pci_device_id = pci_get_device(dev);
405 pci_subvendor_id = pci_get_subvendor(dev);
406 pci_subdevice_id = pci_get_subdevice(dev);
408 ent = em_vendor_info_array;
409 while (ent->vendor_id != 0) {
410 if ((pci_vendor_id == ent->vendor_id) &&
411 (pci_device_id == ent->device_id) &&
413 ((pci_subvendor_id == ent->subvendor_id) ||
414 (ent->subvendor_id == PCI_ANY_ID)) &&
416 ((pci_subdevice_id == ent->subdevice_id) ||
417 (ent->subdevice_id == PCI_ANY_ID))) {
418 sprintf(adapter_name, "%s %s",
419 em_strings[ent->index],
421 device_set_desc_copy(dev, adapter_name);
422 return (BUS_PROBE_DEFAULT);
430 /*********************************************************************
431 * Device initialization routine
433 * The attach entry point is called when the driver is being loaded.
434 * This routine identifies the type of hardware, allocates all resources
435 * and initializes the hardware.
437 * return 0 on success, positive on failure
438 *********************************************************************/
441 em_attach(device_t dev)
443 struct adapter *adapter;
446 INIT_DEBUGOUT("em_attach: begin");
448 adapter = device_get_softc(dev);
449 adapter->dev = adapter->osdep.dev = dev;
450 EM_CORE_LOCK_INIT(adapter, device_get_nameunit(dev));
453 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev),
454 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
455 OID_AUTO, "debug", CTLTYPE_INT|CTLFLAG_RW, adapter, 0,
456 em_sysctl_debug_info, "I", "Debug Information");
458 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev),
459 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
460 OID_AUTO, "stats", CTLTYPE_INT|CTLFLAG_RW, adapter, 0,
461 em_sysctl_stats, "I", "Statistics");
463 callout_init_mtx(&adapter->timer, &adapter->core_mtx, 0);
465 /* Determine hardware and mac info */
466 em_identify_hardware(adapter);
468 /* Setup PCI resources */
469 if (em_allocate_pci_resources(adapter)) {
470 device_printf(dev, "Allocation of PCI resources failed\n");
476 ** For ICH8 and family we need to
477 ** map the flash memory, and this
478 ** must happen after the MAC is
481 if ((adapter->hw.mac.type == e1000_ich8lan) ||
482 (adapter->hw.mac.type == e1000_pchlan) ||
483 (adapter->hw.mac.type == e1000_ich9lan) ||
484 (adapter->hw.mac.type == e1000_ich10lan)) {
485 int rid = EM_BAR_TYPE_FLASH;
486 adapter->flash = bus_alloc_resource_any(dev,
487 SYS_RES_MEMORY, &rid, RF_ACTIVE);
488 if (adapter->flash == NULL) {
489 device_printf(dev, "Mapping of Flash failed\n");
493 /* This is used in the shared code */
494 adapter->hw.flash_address = (u8 *)adapter->flash;
495 adapter->osdep.flash_bus_space_tag =
496 rman_get_bustag(adapter->flash);
497 adapter->osdep.flash_bus_space_handle =
498 rman_get_bushandle(adapter->flash);
501 /* Do Shared Code initialization */
502 if (e1000_setup_init_funcs(&adapter->hw, TRUE)) {
503 device_printf(dev, "Setup of Shared code failed\n");
508 e1000_get_bus_info(&adapter->hw);
510 /* Set up some sysctls for the tunable interrupt delays */
511 em_add_int_delay_sysctl(adapter, "rx_int_delay",
512 "receive interrupt delay in usecs", &adapter->rx_int_delay,
513 E1000_REGISTER(&adapter->hw, E1000_RDTR), em_rx_int_delay_dflt);
514 em_add_int_delay_sysctl(adapter, "tx_int_delay",
515 "transmit interrupt delay in usecs", &adapter->tx_int_delay,
516 E1000_REGISTER(&adapter->hw, E1000_TIDV), em_tx_int_delay_dflt);
517 em_add_int_delay_sysctl(adapter, "rx_abs_int_delay",
518 "receive interrupt delay limit in usecs",
519 &adapter->rx_abs_int_delay,
520 E1000_REGISTER(&adapter->hw, E1000_RADV),
521 em_rx_abs_int_delay_dflt);
522 em_add_int_delay_sysctl(adapter, "tx_abs_int_delay",
523 "transmit interrupt delay limit in usecs",
524 &adapter->tx_abs_int_delay,
525 E1000_REGISTER(&adapter->hw, E1000_TADV),
526 em_tx_abs_int_delay_dflt);
528 /* Sysctls for limiting the amount of work done in the taskqueue */
529 em_add_rx_process_limit(adapter, "rx_processing_limit",
530 "max number of rx packets to process", &adapter->rx_process_limit,
531 em_rx_process_limit);
534 * Validate number of transmit and receive descriptors. It
535 * must not exceed hardware maximum, and must be multiple
536 * of E1000_DBA_ALIGN.
538 if (((em_txd * sizeof(struct e1000_tx_desc)) % EM_DBA_ALIGN) != 0 ||
539 (em_txd > EM_MAX_TXD) || (em_txd < EM_MIN_TXD)) {
540 device_printf(dev, "Using %d TX descriptors instead of %d!\n",
541 EM_DEFAULT_TXD, em_txd);
542 adapter->num_tx_desc = EM_DEFAULT_TXD;
544 adapter->num_tx_desc = em_txd;
546 if (((em_rxd * sizeof(struct e1000_rx_desc)) % EM_DBA_ALIGN) != 0 ||
547 (em_rxd > EM_MAX_RXD) || (em_rxd < EM_MIN_RXD)) {
548 device_printf(dev, "Using %d RX descriptors instead of %d!\n",
549 EM_DEFAULT_RXD, em_rxd);
550 adapter->num_rx_desc = EM_DEFAULT_RXD;
552 adapter->num_rx_desc = em_rxd;
554 adapter->hw.mac.autoneg = DO_AUTO_NEG;
555 adapter->hw.phy.autoneg_wait_to_complete = FALSE;
556 adapter->hw.phy.autoneg_advertised = AUTONEG_ADV_DEFAULT;
559 if (adapter->hw.phy.media_type == e1000_media_type_copper) {
560 adapter->hw.phy.mdix = AUTO_ALL_MODES;
561 adapter->hw.phy.disable_polarity_correction = FALSE;
562 adapter->hw.phy.ms_type = EM_MASTER_SLAVE;
566 * Set the frame limits assuming
567 * standard ethernet sized frames.
569 adapter->max_frame_size = ETHERMTU + ETHER_HDR_LEN + ETHERNET_FCS_SIZE;
570 adapter->min_frame_size = ETH_ZLEN + ETHERNET_FCS_SIZE;
573 * This controls when hardware reports transmit completion
576 adapter->hw.mac.report_tx_early = 1;
579 ** Get queue/ring memory
581 if (em_allocate_queues(adapter)) {
587 ** Start from a known state, this is
588 ** important in reading the nvm and
591 e1000_reset_hw(&adapter->hw);
593 /* Make sure we have a good EEPROM before we read from it */
594 if (e1000_validate_nvm_checksum(&adapter->hw) < 0) {
596 ** Some PCI-E parts fail the first check due to
597 ** the link being in sleep state, call it again,
598 ** if it fails a second time its a real issue.
600 if (e1000_validate_nvm_checksum(&adapter->hw) < 0) {
602 "The EEPROM Checksum Is Not Valid\n");
608 /* Copy the permanent MAC address out of the EEPROM */
609 if (e1000_read_mac_addr(&adapter->hw) < 0) {
610 device_printf(dev, "EEPROM read error while reading MAC"
616 if (!em_is_valid_ether_addr(adapter->hw.mac.addr)) {
617 device_printf(dev, "Invalid MAC address\n");
623 ** Do interrupt configuration
625 if (adapter->msix > 1) /* Do MSIX */
626 error = em_allocate_msix(adapter);
627 else /* MSI or Legacy */
628 error = em_allocate_legacy(adapter);
633 * Get Wake-on-Lan and Management info for later use
637 /* Setup OS specific network interface */
638 em_setup_interface(dev, adapter);
642 /* Initialize statistics */
643 em_update_stats_counters(adapter);
645 adapter->hw.mac.get_link_status = 1;
646 em_update_link_status(adapter);
648 /* Indicate SOL/IDER usage */
649 if (e1000_check_reset_block(&adapter->hw))
651 "PHY reset is blocked due to SOL/IDER session.\n");
653 /* Register for VLAN events */
654 adapter->vlan_attach = EVENTHANDLER_REGISTER(vlan_config,
655 em_register_vlan, adapter, EVENTHANDLER_PRI_FIRST);
656 adapter->vlan_detach = EVENTHANDLER_REGISTER(vlan_unconfig,
657 em_unregister_vlan, adapter, EVENTHANDLER_PRI_FIRST);
659 /* Non-AMT based hardware can now take control from firmware */
660 if (adapter->has_manage && !adapter->has_amt)
661 em_get_hw_control(adapter);
663 /* Tell the stack that the interface is not active */
664 adapter->ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
666 adapter->led_dev = led_create(em_led_func, adapter,
667 device_get_nameunit(dev));
669 INIT_DEBUGOUT("em_attach: end");
674 em_free_transmit_structures(adapter);
675 em_free_receive_structures(adapter);
676 em_release_hw_control(adapter);
678 em_free_pci_resources(adapter);
679 EM_CORE_LOCK_DESTROY(adapter);
684 /*********************************************************************
685 * Device removal routine
687 * The detach entry point is called when the driver is being removed.
688 * This routine stops the adapter and deallocates all the resources
689 * that were allocated for driver operation.
691 * return 0 on success, positive on failure
692 *********************************************************************/
695 em_detach(device_t dev)
697 struct adapter *adapter = device_get_softc(dev);
698 struct ifnet *ifp = adapter->ifp;
700 INIT_DEBUGOUT("em_detach: begin");
702 /* Make sure VLANS are not using driver */
703 if (adapter->ifp->if_vlantrunk != NULL) {
704 device_printf(dev,"Vlan in use, detach first\n");
708 #ifdef DEVICE_POLLING
709 if (ifp->if_capenable & IFCAP_POLLING)
710 ether_poll_deregister(ifp);
713 if (adapter->led_dev != NULL)
714 led_destroy(adapter->led_dev);
716 EM_CORE_LOCK(adapter);
717 adapter->in_detach = 1;
719 EM_CORE_UNLOCK(adapter);
720 EM_CORE_LOCK_DESTROY(adapter);
722 e1000_phy_hw_reset(&adapter->hw);
724 em_release_manageability(adapter);
725 em_release_hw_control(adapter);
727 /* Unregister VLAN events */
728 if (adapter->vlan_attach != NULL)
729 EVENTHANDLER_DEREGISTER(vlan_config, adapter->vlan_attach);
730 if (adapter->vlan_detach != NULL)
731 EVENTHANDLER_DEREGISTER(vlan_unconfig, adapter->vlan_detach);
733 ether_ifdetach(adapter->ifp);
734 callout_drain(&adapter->timer);
736 em_free_pci_resources(adapter);
737 bus_generic_detach(dev);
740 em_free_transmit_structures(adapter);
741 em_free_receive_structures(adapter);
743 em_release_hw_control(adapter);
748 /*********************************************************************
750 * Shutdown entry point
752 **********************************************************************/
755 em_shutdown(device_t dev)
757 return em_suspend(dev);
761 * Suspend/resume device methods.
764 em_suspend(device_t dev)
766 struct adapter *adapter = device_get_softc(dev);
768 EM_CORE_LOCK(adapter);
770 em_release_manageability(adapter);
771 em_release_hw_control(adapter);
772 em_enable_wakeup(dev);
774 EM_CORE_UNLOCK(adapter);
776 return bus_generic_suspend(dev);
780 em_resume(device_t dev)
782 struct adapter *adapter = device_get_softc(dev);
783 struct ifnet *ifp = adapter->ifp;
785 EM_CORE_LOCK(adapter);
786 em_init_locked(adapter);
787 em_init_manageability(adapter);
788 EM_CORE_UNLOCK(adapter);
791 return bus_generic_resume(dev);
795 /*********************************************************************
796 * Transmit entry point
798 * em_start is called by the stack to initiate a transmit.
799 * The driver will remain in this routine as long as there are
800 * packets to transmit and transmit resources are available.
801 * In case resources are not available stack is notified and
802 * the packet is requeued.
803 **********************************************************************/
807 em_mq_start_locked(struct ifnet *ifp, struct tx_ring *txr, struct mbuf *m)
809 struct adapter *adapter = txr->adapter;
811 int err = 0, enq = 0;
813 if ((ifp->if_drv_flags & (IFF_DRV_RUNNING | IFF_DRV_OACTIVE)) !=
814 IFF_DRV_RUNNING || adapter->link_active == 0) {
816 err = drbr_enqueue(ifp, txr->br, m);
820 /* Call cleanup if number of TX descriptors low */
821 if (txr->tx_avail <= EM_TX_CLEANUP_THRESHOLD)
826 next = drbr_dequeue(ifp, txr->br);
827 } else if (drbr_needs_enqueue(ifp, txr->br)) {
828 if ((err = drbr_enqueue(ifp, txr->br, m)) != 0)
830 next = drbr_dequeue(ifp, txr->br);
834 /* Process the queue */
835 while (next != NULL) {
836 if ((err = em_xmit(txr, &next)) != 0) {
838 err = drbr_enqueue(ifp, txr->br, next);
842 drbr_stats_update(ifp, next->m_pkthdr.len, next->m_flags);
843 ETHER_BPF_MTAP(ifp, next);
844 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0)
846 if (txr->tx_avail < EM_MAX_SCATTER) {
847 ifp->if_drv_flags |= IFF_DRV_OACTIVE;
850 next = drbr_dequeue(ifp, txr->br);
854 /* Set the watchdog */
855 txr->watchdog_check = TRUE;
856 txr->watchdog_time = ticks;
862 ** Multiqueue capable stack interface, this is not
863 ** yet truely multiqueue, but that is coming...
866 em_mq_start(struct ifnet *ifp, struct mbuf *m)
868 struct adapter *adapter = ifp->if_softc;
872 /* Which queue to use */
873 if ((m->m_flags & M_FLOWID) != 0)
874 i = m->m_pkthdr.flowid % adapter->num_queues;
876 i = curcpu % adapter->num_queues;
878 txr = &adapter->tx_rings[i];
880 if (EM_TX_TRYLOCK(txr)) {
881 error = em_mq_start_locked(ifp, txr, m);
884 error = drbr_enqueue(ifp, txr->br, m);
890 ** Flush all ring buffers
893 em_qflush(struct ifnet *ifp)
895 struct adapter *adapter = ifp->if_softc;
896 struct tx_ring *txr = adapter->tx_rings;
899 for (int i = 0; i < adapter->num_queues; i++, txr++) {
901 while ((m = buf_ring_dequeue_sc(txr->br)) != NULL)
908 #endif /* EM_MULTIQUEUE */
911 em_start_locked(struct ifnet *ifp, struct tx_ring *txr)
913 struct adapter *adapter = ifp->if_softc;
916 EM_TX_LOCK_ASSERT(txr);
918 if ((ifp->if_drv_flags & (IFF_DRV_RUNNING|IFF_DRV_OACTIVE)) !=
922 if (!adapter->link_active)
925 /* Call cleanup if number of TX descriptors low */
926 if (txr->tx_avail <= EM_TX_CLEANUP_THRESHOLD)
929 while (!IFQ_DRV_IS_EMPTY(&ifp->if_snd)) {
930 if (txr->tx_avail < EM_MAX_SCATTER) {
931 ifp->if_drv_flags |= IFF_DRV_OACTIVE;
934 IFQ_DRV_DEQUEUE(&ifp->if_snd, m_head);
938 * Encapsulation can modify our pointer, and or make it
939 * NULL on failure. In that event, we can't requeue.
941 if (em_xmit(txr, &m_head)) {
944 ifp->if_drv_flags |= IFF_DRV_OACTIVE;
945 IFQ_DRV_PREPEND(&ifp->if_snd, m_head);
949 /* Send a copy of the frame to the BPF listener */
950 ETHER_BPF_MTAP(ifp, m_head);
952 /* Set timeout in case hardware has problems transmitting. */
953 txr->watchdog_time = ticks;
954 txr->watchdog_check = TRUE;
961 em_start(struct ifnet *ifp)
963 struct adapter *adapter = ifp->if_softc;
964 struct tx_ring *txr = adapter->tx_rings;
966 if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
968 em_start_locked(ifp, txr);
974 /*********************************************************************
977 * em_ioctl is called when the user wants to configure the
980 * return 0 on success, positive on failure
981 **********************************************************************/
984 em_ioctl(struct ifnet *ifp, u_long command, caddr_t data)
986 struct adapter *adapter = ifp->if_softc;
987 struct ifreq *ifr = (struct ifreq *)data;
989 struct ifaddr *ifa = (struct ifaddr *)data;
993 if (adapter->in_detach)
999 if (ifa->ifa_addr->sa_family == AF_INET) {
1002 * Since resetting hardware takes a very long time
1003 * and results in link renegotiation we only
1004 * initialize the hardware only when it is absolutely
1007 ifp->if_flags |= IFF_UP;
1008 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) {
1009 EM_CORE_LOCK(adapter);
1010 em_init_locked(adapter);
1011 EM_CORE_UNLOCK(adapter);
1013 arp_ifinit(ifp, ifa);
1016 error = ether_ioctl(ifp, command, data);
1022 IOCTL_DEBUGOUT("ioctl rcv'd: SIOCSIFMTU (Set Interface MTU)");
1024 EM_CORE_LOCK(adapter);
1025 switch (adapter->hw.mac.type) {
1029 case e1000_ich10lan:
1031 case e1000_80003es2lan: /* 9K Jumbo Frame size */
1032 max_frame_size = 9234;
1035 max_frame_size = 4096;
1037 /* Adapters that do not support jumbo frames */
1040 max_frame_size = ETHER_MAX_LEN;
1043 max_frame_size = MAX_JUMBO_FRAME_SIZE;
1045 if (ifr->ifr_mtu > max_frame_size - ETHER_HDR_LEN -
1047 EM_CORE_UNLOCK(adapter);
1052 ifp->if_mtu = ifr->ifr_mtu;
1053 adapter->max_frame_size =
1054 ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN;
1055 em_init_locked(adapter);
1056 EM_CORE_UNLOCK(adapter);
1060 IOCTL_DEBUGOUT("ioctl rcv'd:\
1061 SIOCSIFFLAGS (Set Interface Flags)");
1062 EM_CORE_LOCK(adapter);
1063 if (ifp->if_flags & IFF_UP) {
1064 if ((ifp->if_drv_flags & IFF_DRV_RUNNING)) {
1065 if ((ifp->if_flags ^ adapter->if_flags) &
1066 (IFF_PROMISC | IFF_ALLMULTI)) {
1067 em_disable_promisc(adapter);
1068 em_set_promisc(adapter);
1071 em_init_locked(adapter);
1073 if (ifp->if_drv_flags & IFF_DRV_RUNNING)
1075 adapter->if_flags = ifp->if_flags;
1076 EM_CORE_UNLOCK(adapter);
1080 IOCTL_DEBUGOUT("ioctl rcv'd: SIOC(ADD|DEL)MULTI");
1081 if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
1082 EM_CORE_LOCK(adapter);
1083 em_disable_intr(adapter);
1084 em_set_multi(adapter);
1085 #ifdef DEVICE_POLLING
1086 if (!(ifp->if_capenable & IFCAP_POLLING))
1088 em_enable_intr(adapter);
1089 EM_CORE_UNLOCK(adapter);
1093 /* Check SOL/IDER usage */
1094 EM_CORE_LOCK(adapter);
1095 if (e1000_check_reset_block(&adapter->hw)) {
1096 EM_CORE_UNLOCK(adapter);
1097 device_printf(adapter->dev, "Media change is"
1098 " blocked due to SOL/IDER session.\n");
1101 EM_CORE_UNLOCK(adapter);
1103 IOCTL_DEBUGOUT("ioctl rcv'd: \
1104 SIOCxIFMEDIA (Get/Set Interface Media)");
1105 error = ifmedia_ioctl(ifp, ifr, &adapter->media, command);
1111 IOCTL_DEBUGOUT("ioctl rcv'd: SIOCSIFCAP (Set Capabilities)");
1113 mask = ifr->ifr_reqcap ^ ifp->if_capenable;
1114 #ifdef DEVICE_POLLING
1115 if (mask & IFCAP_POLLING) {
1116 if (ifr->ifr_reqcap & IFCAP_POLLING) {
1117 error = ether_poll_register(em_poll, ifp);
1120 EM_CORE_LOCK(adapter);
1121 em_disable_intr(adapter);
1122 ifp->if_capenable |= IFCAP_POLLING;
1123 EM_CORE_UNLOCK(adapter);
1125 error = ether_poll_deregister(ifp);
1126 /* Enable interrupt even in error case */
1127 EM_CORE_LOCK(adapter);
1128 em_enable_intr(adapter);
1129 ifp->if_capenable &= ~IFCAP_POLLING;
1130 EM_CORE_UNLOCK(adapter);
1134 if (mask & IFCAP_HWCSUM) {
1135 ifp->if_capenable ^= IFCAP_HWCSUM;
1138 if (mask & IFCAP_TSO4) {
1139 ifp->if_capenable ^= IFCAP_TSO4;
1142 if (mask & IFCAP_VLAN_HWTAGGING) {
1143 ifp->if_capenable ^= IFCAP_VLAN_HWTAGGING;
1146 if (mask & IFCAP_VLAN_HWFILTER) {
1147 ifp->if_capenable ^= IFCAP_VLAN_HWFILTER;
1150 if ((mask & IFCAP_WOL) &&
1151 (ifp->if_capabilities & IFCAP_WOL) != 0) {
1152 if (mask & IFCAP_WOL_MCAST)
1153 ifp->if_capenable ^= IFCAP_WOL_MCAST;
1154 if (mask & IFCAP_WOL_MAGIC)
1155 ifp->if_capenable ^= IFCAP_WOL_MAGIC;
1157 if (reinit && (ifp->if_drv_flags & IFF_DRV_RUNNING))
1159 VLAN_CAPABILITIES(ifp);
1164 error = ether_ioctl(ifp, command, data);
1172 /*********************************************************************
1175 * This routine is used in two ways. It is used by the stack as
1176 * init entry point in network interface structure. It is also used
1177 * by the driver as a hw/sw initialization routine to get to a
1180 * return 0 on success, positive on failure
1181 **********************************************************************/
1184 em_init_locked(struct adapter *adapter)
1186 struct ifnet *ifp = adapter->ifp;
1187 device_t dev = adapter->dev;
1190 INIT_DEBUGOUT("em_init: begin");
1192 EM_CORE_LOCK_ASSERT(adapter);
1194 em_disable_intr(adapter);
1195 callout_stop(&adapter->timer);
1198 * Packet Buffer Allocation (PBA)
1199 * Writing PBA sets the receive portion of the buffer
1200 * the remainder is used for the transmit buffer.
1202 switch (adapter->hw.mac.type) {
1203 /* Total Packet Buffer on these is 48K */
1206 case e1000_80003es2lan:
1207 pba = E1000_PBA_32K; /* 32K for Rx, 16K for Tx */
1209 case e1000_82573: /* 82573: Total Packet Buffer is 32K */
1210 pba = E1000_PBA_12K; /* 12K for Rx, 20K for Tx */
1214 pba = E1000_PBA_20K; /* 20K for Rx, 20K for Tx */
1217 case e1000_ich10lan:
1219 pba = E1000_PBA_10K;
1225 if (adapter->max_frame_size > 8192)
1226 pba = E1000_PBA_40K; /* 40K for Rx, 24K for Tx */
1228 pba = E1000_PBA_48K; /* 48K for Rx, 16K for Tx */
1231 INIT_DEBUGOUT1("em_init: pba=%dK",pba);
1232 E1000_WRITE_REG(&adapter->hw, E1000_PBA, pba);
1234 /* Get the latest mac address, User can use a LAA */
1235 bcopy(IF_LLADDR(adapter->ifp), adapter->hw.mac.addr,
1238 /* Put the address into the Receive Address Array */
1239 e1000_rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
1242 * With the 82571 adapter, RAR[0] may be overwritten
1243 * when the other port is reset, we make a duplicate
1244 * in RAR[14] for that eventuality, this assures
1245 * the interface continues to function.
1247 if (adapter->hw.mac.type == e1000_82571) {
1248 e1000_set_laa_state_82571(&adapter->hw, TRUE);
1249 e1000_rar_set(&adapter->hw, adapter->hw.mac.addr,
1250 E1000_RAR_ENTRIES - 1);
1253 /* Initialize the hardware */
1255 em_update_link_status(adapter);
1257 /* Setup VLAN support, basic and offload if available */
1258 E1000_WRITE_REG(&adapter->hw, E1000_VET, ETHERTYPE_VLAN);
1260 /* Use real VLAN Filter support? */
1261 if (ifp->if_capenable & IFCAP_VLAN_HWTAGGING) {
1262 if (ifp->if_capenable & IFCAP_VLAN_HWFILTER)
1263 /* Use real VLAN Filter support */
1264 em_setup_vlan_hw_support(adapter);
1267 ctrl = E1000_READ_REG(&adapter->hw, E1000_CTRL);
1268 ctrl |= E1000_CTRL_VME;
1269 E1000_WRITE_REG(&adapter->hw, E1000_CTRL, ctrl);
1273 /* Set hardware offload abilities */
1274 ifp->if_hwassist = 0;
1275 if (ifp->if_capenable & IFCAP_TXCSUM)
1276 ifp->if_hwassist |= (CSUM_TCP | CSUM_UDP);
1277 if (ifp->if_capenable & IFCAP_TSO4)
1278 ifp->if_hwassist |= CSUM_TSO;
1280 /* Configure for OS presence */
1281 em_init_manageability(adapter);
1283 /* Prepare transmit descriptors and buffers */
1284 em_setup_transmit_structures(adapter);
1285 em_initialize_transmit_unit(adapter);
1287 /* Setup Multicast table */
1288 em_set_multi(adapter);
1290 /* Prepare receive descriptors and buffers */
1291 if (em_setup_receive_structures(adapter)) {
1292 device_printf(dev, "Could not setup receive structures\n");
1296 em_initialize_receive_unit(adapter);
1298 /* Don't lose promiscuous settings */
1299 em_set_promisc(adapter);
1301 ifp->if_drv_flags |= IFF_DRV_RUNNING;
1302 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
1304 callout_reset(&adapter->timer, hz, em_local_timer, adapter);
1305 e1000_clear_hw_cntrs_base_generic(&adapter->hw);
1307 /* MSI/X configuration for 82574 */
1308 if (adapter->hw.mac.type == e1000_82574) {
1310 tmp = E1000_READ_REG(&adapter->hw, E1000_CTRL_EXT);
1311 tmp |= E1000_CTRL_EXT_PBA_CLR;
1312 E1000_WRITE_REG(&adapter->hw, E1000_CTRL_EXT, tmp);
1313 /* Set the IVAR - interrupt vector routing. */
1314 E1000_WRITE_REG(&adapter->hw, E1000_IVAR, adapter->ivars);
1317 #ifdef DEVICE_POLLING
1319 * Only enable interrupts if we are not polling, make sure
1320 * they are off otherwise.
1322 if (ifp->if_capenable & IFCAP_POLLING)
1323 em_disable_intr(adapter);
1325 #endif /* DEVICE_POLLING */
1326 em_enable_intr(adapter);
1328 /* AMT based hardware can now take control from firmware */
1329 if (adapter->has_manage && adapter->has_amt)
1330 em_get_hw_control(adapter);
1332 /* Don't reset the phy next time init gets called */
1333 adapter->hw.phy.reset_disable = TRUE;
1339 struct adapter *adapter = arg;
1341 EM_CORE_LOCK(adapter);
1342 em_init_locked(adapter);
1343 EM_CORE_UNLOCK(adapter);
1347 #ifdef DEVICE_POLLING
1348 /*********************************************************************
1350 * Legacy polling routine: note this only works with single queue
1352 *********************************************************************/
1354 em_poll(struct ifnet *ifp, enum poll_cmd cmd, int count)
1356 struct adapter *adapter = ifp->if_softc;
1357 struct tx_ring *txr = adapter->tx_rings;
1358 struct rx_ring *rxr = adapter->rx_rings;
1359 u32 reg_icr, rx_done = 0;
1361 EM_CORE_LOCK(adapter);
1362 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) {
1363 EM_CORE_UNLOCK(adapter);
1367 if (cmd == POLL_AND_CHECK_STATUS) {
1368 reg_icr = E1000_READ_REG(&adapter->hw, E1000_ICR);
1369 if (reg_icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
1370 callout_stop(&adapter->timer);
1371 adapter->hw.mac.get_link_status = 1;
1372 em_update_link_status(adapter);
1373 callout_reset(&adapter->timer, hz,
1374 em_local_timer, adapter);
1377 EM_CORE_UNLOCK(adapter);
1379 rx_done = em_rxeof(rxr, count);
1383 #ifdef EM_MULTIQUEUE
1384 if (!drbr_empty(ifp, txr->br))
1385 em_mq_start_locked(ifp, txr, NULL);
1387 if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd))
1388 em_start_locked(ifp, txr);
1394 #endif /* DEVICE_POLLING */
1397 /*********************************************************************
1399 * Fast Legacy/MSI Combined Interrupt Service routine
1401 *********************************************************************/
1403 em_irq_fast(void *arg)
1405 struct adapter *adapter = arg;
1411 reg_icr = E1000_READ_REG(&adapter->hw, E1000_ICR);
1414 if (reg_icr == 0xffffffff)
1415 return FILTER_STRAY;
1417 /* Definitely not our interrupt. */
1419 return FILTER_STRAY;
1422 * Starting with the 82571 chip, bit 31 should be used to
1423 * determine whether the interrupt belongs to us.
1425 if (adapter->hw.mac.type >= e1000_82571 &&
1426 (reg_icr & E1000_ICR_INT_ASSERTED) == 0)
1427 return FILTER_STRAY;
1429 em_disable_intr(adapter);
1430 taskqueue_enqueue(adapter->tq, &adapter->que_task);
1432 /* Link status change */
1433 if (reg_icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
1434 adapter->hw.mac.get_link_status = 1;
1435 taskqueue_enqueue(taskqueue_fast, &adapter->link_task);
1438 if (reg_icr & E1000_ICR_RXO)
1439 adapter->rx_overruns++;
1440 return FILTER_HANDLED;
1443 /* Combined RX/TX handler, used by Legacy and MSI */
1445 em_handle_que(void *context, int pending)
1447 struct adapter *adapter = context;
1448 struct ifnet *ifp = adapter->ifp;
1449 struct tx_ring *txr = adapter->tx_rings;
1450 struct rx_ring *rxr = adapter->rx_rings;
1454 if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
1455 more_rx = em_rxeof(rxr, adapter->rx_process_limit);
1459 #ifdef EM_MULTIQUEUE
1460 if (!drbr_empty(ifp, txr->br))
1461 em_mq_start_locked(ifp, txr, NULL);
1463 if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd))
1464 em_start_locked(ifp, txr);
1468 taskqueue_enqueue(adapter->tq, &adapter->que_task);
1473 em_enable_intr(adapter);
1478 /*********************************************************************
1480 * MSIX Interrupt Service Routines
1482 **********************************************************************/
1484 em_msix_tx(void *arg)
1486 struct tx_ring *txr = arg;
1487 struct adapter *adapter = txr->adapter;
1492 more = em_txeof(txr);
1495 taskqueue_enqueue(txr->tq, &txr->tx_task);
1497 /* Reenable this interrupt */
1498 E1000_WRITE_REG(&adapter->hw, E1000_IMS, txr->ims);
1502 /*********************************************************************
1504 * MSIX RX Interrupt Service routine
1506 **********************************************************************/
1509 em_msix_rx(void *arg)
1511 struct rx_ring *rxr = arg;
1512 struct adapter *adapter = rxr->adapter;
1516 more = em_rxeof(rxr, adapter->rx_process_limit);
1518 taskqueue_enqueue(rxr->tq, &rxr->rx_task);
1520 /* Reenable this interrupt */
1521 E1000_WRITE_REG(&adapter->hw, E1000_IMS, rxr->ims);
1525 /*********************************************************************
1527 * MSIX Link Fast Interrupt Service routine
1529 **********************************************************************/
1531 em_msix_link(void *arg)
1533 struct adapter *adapter = arg;
1536 ++adapter->link_irq;
1537 reg_icr = E1000_READ_REG(&adapter->hw, E1000_ICR);
1539 if (reg_icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
1540 adapter->hw.mac.get_link_status = 1;
1541 taskqueue_enqueue(taskqueue_fast, &adapter->link_task);
1543 E1000_WRITE_REG(&adapter->hw, E1000_IMS,
1544 EM_MSIX_LINK | E1000_IMS_LSC);
1549 em_handle_rx(void *context, int pending)
1551 struct rx_ring *rxr = context;
1552 struct adapter *adapter = rxr->adapter;
1555 more = em_rxeof(rxr, adapter->rx_process_limit);
1557 taskqueue_enqueue(rxr->tq, &rxr->rx_task);
1559 /* Reenable this interrupt */
1560 E1000_WRITE_REG(&adapter->hw, E1000_IMS, rxr->ims);
1564 em_handle_tx(void *context, int pending)
1566 struct tx_ring *txr = context;
1567 struct adapter *adapter = txr->adapter;
1568 struct ifnet *ifp = adapter->ifp;
1570 if (!EM_TX_TRYLOCK(txr))
1575 #ifdef EM_MULTIQUEUE
1576 if (!drbr_empty(ifp, txr->br))
1577 em_mq_start_locked(ifp, txr, NULL);
1579 if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd))
1580 em_start_locked(ifp, txr);
1582 E1000_WRITE_REG(&adapter->hw, E1000_IMS, txr->ims);
1587 em_handle_link(void *context, int pending)
1589 struct adapter *adapter = context;
1590 struct ifnet *ifp = adapter->ifp;
1592 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING))
1595 EM_CORE_LOCK(adapter);
1596 callout_stop(&adapter->timer);
1597 em_update_link_status(adapter);
1598 callout_reset(&adapter->timer, hz, em_local_timer, adapter);
1599 E1000_WRITE_REG(&adapter->hw, E1000_IMS,
1600 EM_MSIX_LINK | E1000_IMS_LSC);
1601 EM_CORE_UNLOCK(adapter);
1605 /*********************************************************************
1607 * Media Ioctl callback
1609 * This routine is called whenever the user queries the status of
1610 * the interface using ifconfig.
1612 **********************************************************************/
1614 em_media_status(struct ifnet *ifp, struct ifmediareq *ifmr)
1616 struct adapter *adapter = ifp->if_softc;
1617 u_char fiber_type = IFM_1000_SX;
1619 INIT_DEBUGOUT("em_media_status: begin");
1621 EM_CORE_LOCK(adapter);
1622 em_update_link_status(adapter);
1624 ifmr->ifm_status = IFM_AVALID;
1625 ifmr->ifm_active = IFM_ETHER;
1627 if (!adapter->link_active) {
1628 EM_CORE_UNLOCK(adapter);
1632 ifmr->ifm_status |= IFM_ACTIVE;
1634 if ((adapter->hw.phy.media_type == e1000_media_type_fiber) ||
1635 (adapter->hw.phy.media_type == e1000_media_type_internal_serdes)) {
1636 ifmr->ifm_active |= fiber_type | IFM_FDX;
1638 switch (adapter->link_speed) {
1640 ifmr->ifm_active |= IFM_10_T;
1643 ifmr->ifm_active |= IFM_100_TX;
1646 ifmr->ifm_active |= IFM_1000_T;
1649 if (adapter->link_duplex == FULL_DUPLEX)
1650 ifmr->ifm_active |= IFM_FDX;
1652 ifmr->ifm_active |= IFM_HDX;
1654 EM_CORE_UNLOCK(adapter);
1657 /*********************************************************************
1659 * Media Ioctl callback
1661 * This routine is called when the user changes speed/duplex using
1662 * media/mediopt option with ifconfig.
1664 **********************************************************************/
1666 em_media_change(struct ifnet *ifp)
1668 struct adapter *adapter = ifp->if_softc;
1669 struct ifmedia *ifm = &adapter->media;
1671 INIT_DEBUGOUT("em_media_change: begin");
1673 if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER)
1676 EM_CORE_LOCK(adapter);
1677 switch (IFM_SUBTYPE(ifm->ifm_media)) {
1679 adapter->hw.mac.autoneg = DO_AUTO_NEG;
1680 adapter->hw.phy.autoneg_advertised = AUTONEG_ADV_DEFAULT;
1685 adapter->hw.mac.autoneg = DO_AUTO_NEG;
1686 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
1689 adapter->hw.mac.autoneg = FALSE;
1690 adapter->hw.phy.autoneg_advertised = 0;
1691 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX)
1692 adapter->hw.mac.forced_speed_duplex = ADVERTISE_100_FULL;
1694 adapter->hw.mac.forced_speed_duplex = ADVERTISE_100_HALF;
1697 adapter->hw.mac.autoneg = FALSE;
1698 adapter->hw.phy.autoneg_advertised = 0;
1699 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX)
1700 adapter->hw.mac.forced_speed_duplex = ADVERTISE_10_FULL;
1702 adapter->hw.mac.forced_speed_duplex = ADVERTISE_10_HALF;
1705 device_printf(adapter->dev, "Unsupported media type\n");
1708 /* As the speed/duplex settings my have changed we need to
1711 adapter->hw.phy.reset_disable = FALSE;
1713 em_init_locked(adapter);
1714 EM_CORE_UNLOCK(adapter);
1719 /*********************************************************************
1721 * This routine maps the mbufs to tx descriptors.
1723 * return 0 on success, positive on failure
1724 **********************************************************************/
1727 em_xmit(struct tx_ring *txr, struct mbuf **m_headp)
1729 struct adapter *adapter = txr->adapter;
1730 bus_dma_segment_t segs[EM_MAX_SCATTER];
1732 struct em_buffer *tx_buffer, *tx_buffer_mapped;
1733 struct e1000_tx_desc *ctxd = NULL;
1734 struct mbuf *m_head;
1735 u32 txd_upper, txd_lower, txd_used, txd_saved;
1736 int nsegs, i, j, first, last = 0;
1737 int error, do_tso, tso_desc = 0;
1740 txd_upper = txd_lower = txd_used = txd_saved = 0;
1741 do_tso = ((m_head->m_pkthdr.csum_flags & CSUM_TSO) != 0);
1745 * If an mbuf is only header we need
1746 * to pull 4 bytes of data into it.
1748 if (do_tso && (m_head->m_len <= M_TSO_LEN)) {
1749 m_head = m_pullup(m_head, M_TSO_LEN + 4);
1756 * Map the packet for DMA
1758 * Capture the first descriptor index,
1759 * this descriptor will have the index
1760 * of the EOP which is the only one that
1761 * now gets a DONE bit writeback.
1763 first = txr->next_avail_desc;
1764 tx_buffer = &txr->tx_buffers[first];
1765 tx_buffer_mapped = tx_buffer;
1766 map = tx_buffer->map;
1768 error = bus_dmamap_load_mbuf_sg(txr->txtag, map,
1769 *m_headp, segs, &nsegs, BUS_DMA_NOWAIT);
1772 * There are two types of errors we can (try) to handle:
1773 * - EFBIG means the mbuf chain was too long and bus_dma ran
1774 * out of segments. Defragment the mbuf chain and try again.
1775 * - ENOMEM means bus_dma could not obtain enough bounce buffers
1776 * at this point in time. Defer sending and try again later.
1777 * All other errors, in particular EINVAL, are fatal and prevent the
1778 * mbuf chain from ever going through. Drop it and report error.
1780 if (error == EFBIG) {
1783 m = m_defrag(*m_headp, M_DONTWAIT);
1785 adapter->mbuf_alloc_failed++;
1793 error = bus_dmamap_load_mbuf_sg(txr->txtag, map,
1794 *m_headp, segs, &nsegs, BUS_DMA_NOWAIT);
1797 adapter->no_tx_dma_setup++;
1802 } else if (error != 0) {
1803 adapter->no_tx_dma_setup++;
1808 * TSO Hardware workaround, if this packet is not
1809 * TSO, and is only a single descriptor long, and
1810 * it follows a TSO burst, then we need to add a
1811 * sentinel descriptor to prevent premature writeback.
1813 if ((do_tso == 0) && (txr->tx_tso == TRUE)) {
1816 txr->tx_tso = FALSE;
1819 if (nsegs > (txr->tx_avail - 2)) {
1820 txr->no_desc_avail++;
1821 bus_dmamap_unload(txr->txtag, map);
1826 /* Do hardware assists */
1827 #if __FreeBSD_version >= 700000
1828 if (m_head->m_pkthdr.csum_flags & CSUM_TSO) {
1829 error = em_tso_setup(txr, m_head, &txd_upper, &txd_lower);
1831 return (ENXIO); /* something foobar */
1832 /* we need to make a final sentinel transmit desc */
1836 if (m_head->m_pkthdr.csum_flags & CSUM_OFFLOAD)
1837 em_transmit_checksum_setup(txr, m_head,
1838 &txd_upper, &txd_lower);
1840 i = txr->next_avail_desc;
1842 /* Set up our transmit descriptors */
1843 for (j = 0; j < nsegs; j++) {
1845 bus_addr_t seg_addr;
1847 tx_buffer = &txr->tx_buffers[i];
1848 ctxd = &txr->tx_base[i];
1849 seg_addr = segs[j].ds_addr;
1850 seg_len = segs[j].ds_len;
1853 ** If this is the last descriptor, we want to
1854 ** split it so we have a small final sentinel
1856 if (tso_desc && (j == (nsegs -1)) && (seg_len > 8)) {
1858 ctxd->buffer_addr = htole64(seg_addr);
1859 ctxd->lower.data = htole32(
1860 adapter->txd_cmd | txd_lower | seg_len);
1863 if (++i == adapter->num_tx_desc)
1865 /* Now make the sentinel */
1866 ++txd_used; /* using an extra txd */
1867 ctxd = &txr->tx_base[i];
1868 tx_buffer = &txr->tx_buffers[i];
1870 htole64(seg_addr + seg_len);
1871 ctxd->lower.data = htole32(
1872 adapter->txd_cmd | txd_lower | 4);
1876 if (++i == adapter->num_tx_desc)
1879 ctxd->buffer_addr = htole64(seg_addr);
1880 ctxd->lower.data = htole32(
1881 adapter->txd_cmd | txd_lower | seg_len);
1885 if (++i == adapter->num_tx_desc)
1888 tx_buffer->m_head = NULL;
1889 tx_buffer->next_eop = -1;
1892 txr->next_avail_desc = i;
1893 txr->tx_avail -= nsegs;
1894 if (tso_desc) /* TSO used an extra for sentinel */
1895 txr->tx_avail -= txd_used;
1897 if (m_head->m_flags & M_VLANTAG) {
1898 /* Set the vlan id. */
1899 ctxd->upper.fields.special =
1900 htole16(m_head->m_pkthdr.ether_vtag);
1901 /* Tell hardware to add tag */
1902 ctxd->lower.data |= htole32(E1000_TXD_CMD_VLE);
1905 tx_buffer->m_head = m_head;
1906 tx_buffer_mapped->map = tx_buffer->map;
1907 tx_buffer->map = map;
1908 bus_dmamap_sync(txr->txtag, map, BUS_DMASYNC_PREWRITE);
1911 * Last Descriptor of Packet
1912 * needs End Of Packet (EOP)
1913 * and Report Status (RS)
1916 htole32(E1000_TXD_CMD_EOP | E1000_TXD_CMD_RS);
1918 * Keep track in the first buffer which
1919 * descriptor will be written back
1921 tx_buffer = &txr->tx_buffers[first];
1922 tx_buffer->next_eop = last;
1925 * Advance the Transmit Descriptor Tail (TDT), this tells the E1000
1926 * that this frame is available to transmit.
1928 bus_dmamap_sync(txr->txdma.dma_tag, txr->txdma.dma_map,
1929 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
1930 E1000_WRITE_REG(&adapter->hw, E1000_TDT(txr->me), i);
1936 em_set_promisc(struct adapter *adapter)
1938 struct ifnet *ifp = adapter->ifp;
1941 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
1943 if (ifp->if_flags & IFF_PROMISC) {
1944 reg_rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
1945 /* Turn this on if you want to see bad packets */
1947 reg_rctl |= E1000_RCTL_SBP;
1948 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1949 } else if (ifp->if_flags & IFF_ALLMULTI) {
1950 reg_rctl |= E1000_RCTL_MPE;
1951 reg_rctl &= ~E1000_RCTL_UPE;
1952 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1957 em_disable_promisc(struct adapter *adapter)
1961 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
1963 reg_rctl &= (~E1000_RCTL_UPE);
1964 reg_rctl &= (~E1000_RCTL_MPE);
1965 reg_rctl &= (~E1000_RCTL_SBP);
1966 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1970 /*********************************************************************
1973 * This routine is called whenever multicast address list is updated.
1975 **********************************************************************/
1978 em_set_multi(struct adapter *adapter)
1980 struct ifnet *ifp = adapter->ifp;
1981 struct ifmultiaddr *ifma;
1983 u8 *mta; /* Multicast array memory */
1986 IOCTL_DEBUGOUT("em_set_multi: begin");
1988 if (adapter->hw.mac.type == e1000_82542 &&
1989 adapter->hw.revision_id == E1000_REVISION_2) {
1990 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
1991 if (adapter->hw.bus.pci_cmd_word & CMD_MEM_WRT_INVALIDATE)
1992 e1000_pci_clear_mwi(&adapter->hw);
1993 reg_rctl |= E1000_RCTL_RST;
1994 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1998 /* Allocate temporary memory to setup array */
1999 mta = malloc(sizeof(u8) *
2000 (ETH_ADDR_LEN * MAX_NUM_MULTICAST_ADDRESSES),
2001 M_DEVBUF, M_NOWAIT | M_ZERO);
2003 panic("em_set_multi memory failure\n");
2005 #if __FreeBSD_version < 800000
2008 if_maddr_rlock(ifp);
2010 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
2011 if (ifma->ifma_addr->sa_family != AF_LINK)
2014 if (mcnt == MAX_NUM_MULTICAST_ADDRESSES)
2017 bcopy(LLADDR((struct sockaddr_dl *)ifma->ifma_addr),
2018 &mta[mcnt * ETH_ADDR_LEN], ETH_ADDR_LEN);
2021 #if __FreeBSD_version < 800000
2022 IF_ADDR_UNLOCK(ifp);
2024 if_maddr_runlock(ifp);
2026 if (mcnt >= MAX_NUM_MULTICAST_ADDRESSES) {
2027 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
2028 reg_rctl |= E1000_RCTL_MPE;
2029 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
2031 e1000_update_mc_addr_list(&adapter->hw, mta, mcnt);
2033 if (adapter->hw.mac.type == e1000_82542 &&
2034 adapter->hw.revision_id == E1000_REVISION_2) {
2035 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
2036 reg_rctl &= ~E1000_RCTL_RST;
2037 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
2039 if (adapter->hw.bus.pci_cmd_word & CMD_MEM_WRT_INVALIDATE)
2040 e1000_pci_set_mwi(&adapter->hw);
2042 free(mta, M_DEVBUF);
2046 /*********************************************************************
2049 * This routine checks for link status and updates statistics.
2051 **********************************************************************/
2054 em_local_timer(void *arg)
2056 struct adapter *adapter = arg;
2057 struct ifnet *ifp = adapter->ifp;
2058 struct tx_ring *txr = adapter->tx_rings;
2060 EM_CORE_LOCK_ASSERT(adapter);
2062 em_update_link_status(adapter);
2063 em_update_stats_counters(adapter);
2065 /* Reset LAA into RAR[0] on 82571 */
2066 if (e1000_get_laa_state_82571(&adapter->hw) == TRUE)
2067 e1000_rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
2069 if (em_display_debug_stats && ifp->if_drv_flags & IFF_DRV_RUNNING)
2070 em_print_hw_stats(adapter);
2073 ** Check for time since any descriptor was cleaned
2075 for (int i = 0; i < adapter->num_queues; i++, txr++) {
2077 if (txr->watchdog_check == FALSE) {
2081 if ((ticks - txr->watchdog_time) > EM_WATCHDOG)
2086 callout_reset(&adapter->timer, hz, em_local_timer, adapter);
2089 device_printf(adapter->dev, "Watchdog timeout -- resetting\n");
2090 ifp->if_drv_flags &= ~IFF_DRV_RUNNING;
2091 adapter->watchdog_events++;
2093 em_init_locked(adapter);
2098 em_update_link_status(struct adapter *adapter)
2100 struct e1000_hw *hw = &adapter->hw;
2101 struct ifnet *ifp = adapter->ifp;
2102 device_t dev = adapter->dev;
2105 /* Get the cached link value or read phy for real */
2106 switch (hw->phy.media_type) {
2107 case e1000_media_type_copper:
2108 if (hw->mac.get_link_status) {
2109 /* Do the work to read phy */
2110 e1000_check_for_link(hw);
2111 link_check = !hw->mac.get_link_status;
2112 if (link_check) /* ESB2 fix */
2113 e1000_cfg_on_link_up(hw);
2117 case e1000_media_type_fiber:
2118 e1000_check_for_link(hw);
2119 link_check = (E1000_READ_REG(hw, E1000_STATUS) &
2122 case e1000_media_type_internal_serdes:
2123 e1000_check_for_link(hw);
2124 link_check = adapter->hw.mac.serdes_has_link;
2127 case e1000_media_type_unknown:
2131 /* Now check for a transition */
2132 if (link_check && (adapter->link_active == 0)) {
2133 e1000_get_speed_and_duplex(hw, &adapter->link_speed,
2134 &adapter->link_duplex);
2135 /* Check if we must disable SPEED_MODE bit on PCI-E */
2136 if ((adapter->link_speed != SPEED_1000) &&
2137 ((hw->mac.type == e1000_82571) ||
2138 (hw->mac.type == e1000_82572))) {
2140 tarc0 = E1000_READ_REG(hw, E1000_TARC(0));
2141 tarc0 &= ~SPEED_MODE_BIT;
2142 E1000_WRITE_REG(hw, E1000_TARC(0), tarc0);
2145 device_printf(dev, "Link is up %d Mbps %s\n",
2146 adapter->link_speed,
2147 ((adapter->link_duplex == FULL_DUPLEX) ?
2148 "Full Duplex" : "Half Duplex"));
2149 adapter->link_active = 1;
2150 adapter->smartspeed = 0;
2151 ifp->if_baudrate = adapter->link_speed * 1000000;
2152 if_link_state_change(ifp, LINK_STATE_UP);
2153 } else if (!link_check && (adapter->link_active == 1)) {
2154 ifp->if_baudrate = adapter->link_speed = 0;
2155 adapter->link_duplex = 0;
2157 device_printf(dev, "Link is Down\n");
2158 adapter->link_active = 0;
2159 /* Link down, disable watchdog */
2161 //adapter->watchdog_check = FALSE;
2162 if_link_state_change(ifp, LINK_STATE_DOWN);
2166 /*********************************************************************
2168 * This routine disables all traffic on the adapter by issuing a
2169 * global reset on the MAC and deallocates TX/RX buffers.
2171 * This routine should always be called with BOTH the CORE
2173 **********************************************************************/
2178 struct adapter *adapter = arg;
2179 struct ifnet *ifp = adapter->ifp;
2180 struct tx_ring *txr = adapter->tx_rings;
2182 EM_CORE_LOCK_ASSERT(adapter);
2184 INIT_DEBUGOUT("em_stop: begin");
2186 em_disable_intr(adapter);
2187 callout_stop(&adapter->timer);
2189 /* Tell the stack that the interface is no longer active */
2190 ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
2192 /* Unarm watchdog timer. */
2193 for (int i = 0; i < adapter->num_queues; i++, txr++) {
2195 txr->watchdog_check = FALSE;
2199 e1000_reset_hw(&adapter->hw);
2200 E1000_WRITE_REG(&adapter->hw, E1000_WUC, 0);
2202 e1000_led_off(&adapter->hw);
2203 e1000_cleanup_led(&adapter->hw);
2207 /*********************************************************************
2209 * Determine hardware revision.
2211 **********************************************************************/
2213 em_identify_hardware(struct adapter *adapter)
2215 device_t dev = adapter->dev;
2217 /* Make sure our PCI config space has the necessary stuff set */
2218 adapter->hw.bus.pci_cmd_word = pci_read_config(dev, PCIR_COMMAND, 2);
2219 if (!((adapter->hw.bus.pci_cmd_word & PCIM_CMD_BUSMASTEREN) &&
2220 (adapter->hw.bus.pci_cmd_word & PCIM_CMD_MEMEN))) {
2221 device_printf(dev, "Memory Access and/or Bus Master bits "
2223 adapter->hw.bus.pci_cmd_word |=
2224 (PCIM_CMD_BUSMASTEREN | PCIM_CMD_MEMEN);
2225 pci_write_config(dev, PCIR_COMMAND,
2226 adapter->hw.bus.pci_cmd_word, 2);
2229 /* Save off the information about this board */
2230 adapter->hw.vendor_id = pci_get_vendor(dev);
2231 adapter->hw.device_id = pci_get_device(dev);
2232 adapter->hw.revision_id = pci_read_config(dev, PCIR_REVID, 1);
2233 adapter->hw.subsystem_vendor_id =
2234 pci_read_config(dev, PCIR_SUBVEND_0, 2);
2235 adapter->hw.subsystem_device_id =
2236 pci_read_config(dev, PCIR_SUBDEV_0, 2);
2238 /* Do Shared Code Init and Setup */
2239 if (e1000_set_mac_type(&adapter->hw)) {
2240 device_printf(dev, "Setup init failure\n");
2246 em_allocate_pci_resources(struct adapter *adapter)
2248 device_t dev = adapter->dev;
2252 adapter->memory = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
2254 if (adapter->memory == NULL) {
2255 device_printf(dev, "Unable to allocate bus resource: memory\n");
2258 adapter->osdep.mem_bus_space_tag =
2259 rman_get_bustag(adapter->memory);
2260 adapter->osdep.mem_bus_space_handle =
2261 rman_get_bushandle(adapter->memory);
2262 adapter->hw.hw_addr = (u8 *)&adapter->osdep.mem_bus_space_handle;
2264 /* Default to a single queue */
2265 adapter->num_queues = 1;
2268 * Setup MSI/X or MSI if PCI Express
2270 adapter->msix = em_setup_msix(adapter);
2272 adapter->hw.back = &adapter->osdep;
2277 /*********************************************************************
2279 * Setup the Legacy or MSI Interrupt handler
2281 **********************************************************************/
2283 em_allocate_legacy(struct adapter *adapter)
2285 device_t dev = adapter->dev;
2288 /* Manually turn off all interrupts */
2289 E1000_WRITE_REG(&adapter->hw, E1000_IMC, 0xffffffff);
2291 if (adapter->msix == 1) /* using MSI */
2293 /* We allocate a single interrupt resource */
2294 adapter->res = bus_alloc_resource_any(dev,
2295 SYS_RES_IRQ, &rid, RF_SHAREABLE | RF_ACTIVE);
2296 if (adapter->res == NULL) {
2297 device_printf(dev, "Unable to allocate bus resource: "
2303 * Allocate a fast interrupt and the associated
2304 * deferred processing contexts.
2306 TASK_INIT(&adapter->que_task, 0, em_handle_que, adapter);
2307 TASK_INIT(&adapter->link_task, 0, em_handle_link, adapter);
2308 adapter->tq = taskqueue_create_fast("em_taskq", M_NOWAIT,
2309 taskqueue_thread_enqueue, &adapter->tq);
2310 taskqueue_start_threads(&adapter->tq, 1, PI_NET, "%s taskq",
2311 device_get_nameunit(adapter->dev));
2312 if ((error = bus_setup_intr(dev, adapter->res, INTR_TYPE_NET,
2313 em_irq_fast, NULL, adapter, &adapter->tag)) != 0) {
2314 device_printf(dev, "Failed to register fast interrupt "
2315 "handler: %d\n", error);
2316 taskqueue_free(adapter->tq);
2324 /*********************************************************************
2326 * Setup the MSIX Interrupt handlers
2327 * This is not really Multiqueue, rather
2328 * its just multiple interrupt vectors.
2330 **********************************************************************/
2332 em_allocate_msix(struct adapter *adapter)
2334 device_t dev = adapter->dev;
2335 struct tx_ring *txr = adapter->tx_rings;
2336 struct rx_ring *rxr = adapter->rx_rings;
2337 int error, rid, vector = 0;
2340 /* Make sure all interrupts are disabled */
2341 E1000_WRITE_REG(&adapter->hw, E1000_IMC, 0xffffffff);
2343 /* First set up ring resources */
2344 for (int i = 0; i < adapter->num_queues; i++, txr++, rxr++) {
2349 rxr->res = bus_alloc_resource_any(dev,
2350 SYS_RES_IRQ, &rid, RF_ACTIVE);
2351 if (rxr->res == NULL) {
2353 "Unable to allocate bus resource: "
2354 "RX MSIX Interrupt %d\n", i);
2357 if ((error = bus_setup_intr(dev, rxr->res,
2358 INTR_TYPE_NET | INTR_MPSAFE, NULL, em_msix_rx,
2359 rxr, &rxr->tag)) != 0) {
2360 device_printf(dev, "Failed to register RX handler");
2363 rxr->msix = vector++; /* NOTE increment vector for TX */
2364 TASK_INIT(&rxr->rx_task, 0, em_handle_rx, rxr);
2365 rxr->tq = taskqueue_create_fast("em_rxq", M_NOWAIT,
2366 taskqueue_thread_enqueue, &rxr->tq);
2367 taskqueue_start_threads(&rxr->tq, 1, PI_NET, "%s rxq",
2368 device_get_nameunit(adapter->dev));
2370 ** Set the bit to enable interrupt
2371 ** in E1000_IMS -- bits 20 and 21
2372 ** are for RX0 and RX1, note this has
2373 ** NOTHING to do with the MSIX vector
2375 rxr->ims = 1 << (20 + i);
2376 adapter->ivars |= (8 | rxr->msix) << (i * 4);
2380 txr->res = bus_alloc_resource_any(dev,
2381 SYS_RES_IRQ, &rid, RF_ACTIVE);
2382 if (txr->res == NULL) {
2384 "Unable to allocate bus resource: "
2385 "TX MSIX Interrupt %d\n", i);
2388 if ((error = bus_setup_intr(dev, txr->res,
2389 INTR_TYPE_NET | INTR_MPSAFE, NULL, em_msix_tx,
2390 txr, &txr->tag)) != 0) {
2391 device_printf(dev, "Failed to register TX handler");
2394 txr->msix = vector++; /* Increment vector for next pass */
2395 TASK_INIT(&txr->tx_task, 0, em_handle_tx, txr);
2396 txr->tq = taskqueue_create_fast("em_txq", M_NOWAIT,
2397 taskqueue_thread_enqueue, &txr->tq);
2398 taskqueue_start_threads(&txr->tq, 1, PI_NET, "%s txq",
2399 device_get_nameunit(adapter->dev));
2401 ** Set the bit to enable interrupt
2402 ** in E1000_IMS -- bits 22 and 23
2403 ** are for TX0 and TX1, note this has
2404 ** NOTHING to do with the MSIX vector
2406 txr->ims = 1 << (22 + i);
2407 adapter->ivars |= (8 | txr->msix) << (8 + (i * 4));
2410 /* Link interrupt */
2412 adapter->res = bus_alloc_resource_any(dev,
2413 SYS_RES_IRQ, &rid, RF_ACTIVE);
2414 if (!adapter->res) {
2415 device_printf(dev,"Unable to allocate "
2416 "bus resource: Link interrupt [%d]\n", rid);
2419 /* Set the link handler function */
2420 error = bus_setup_intr(dev, adapter->res,
2421 INTR_TYPE_NET | INTR_MPSAFE, NULL,
2422 em_msix_link, adapter, &adapter->tag);
2424 adapter->res = NULL;
2425 device_printf(dev, "Failed to register LINK handler");
2428 adapter->linkvec = vector;
2429 adapter->ivars |= (8 | vector) << 16;
2430 adapter->ivars |= 0x80000000;
2431 TASK_INIT(&adapter->link_task, 0, em_handle_link, adapter);
2432 adapter->tq = taskqueue_create_fast("em_link", M_NOWAIT,
2433 taskqueue_thread_enqueue, &adapter->tq);
2434 taskqueue_start_threads(&adapter->tq, 1, PI_NET, "%s linkq",
2435 device_get_nameunit(adapter->dev));
2442 em_free_pci_resources(struct adapter *adapter)
2444 device_t dev = adapter->dev;
2445 struct tx_ring *txr;
2446 struct rx_ring *rxr;
2451 ** Release all the queue interrupt resources:
2453 for (int i = 0; i < adapter->num_queues; i++) {
2454 txr = &adapter->tx_rings[i];
2455 rxr = &adapter->rx_rings[i];
2457 if (txr->tag != NULL) {
2458 bus_teardown_intr(dev, txr->res, txr->tag);
2461 if (txr->res != NULL)
2462 bus_release_resource(dev, SYS_RES_IRQ,
2465 if (rxr->tag != NULL) {
2466 bus_teardown_intr(dev, rxr->res, rxr->tag);
2469 if (rxr->res != NULL)
2470 bus_release_resource(dev, SYS_RES_IRQ,
2474 if (adapter->linkvec) /* we are doing MSIX */
2475 rid = adapter->linkvec + 1;
2477 (adapter->msix != 0) ? (rid = 1):(rid = 0);
2479 if (adapter->tag != NULL) {
2480 bus_teardown_intr(dev, adapter->res, adapter->tag);
2481 adapter->tag = NULL;
2484 if (adapter->res != NULL)
2485 bus_release_resource(dev, SYS_RES_IRQ, rid, adapter->res);
2489 pci_release_msi(dev);
2491 if (adapter->msix_mem != NULL)
2492 bus_release_resource(dev, SYS_RES_MEMORY,
2493 PCIR_BAR(EM_MSIX_BAR), adapter->msix_mem);
2495 if (adapter->memory != NULL)
2496 bus_release_resource(dev, SYS_RES_MEMORY,
2497 PCIR_BAR(0), adapter->memory);
2499 if (adapter->flash != NULL)
2500 bus_release_resource(dev, SYS_RES_MEMORY,
2501 EM_FLASH, adapter->flash);
2505 * Setup MSI or MSI/X
2508 em_setup_msix(struct adapter *adapter)
2510 device_t dev = adapter->dev;
2514 /* Setup MSI/X for Hartwell */
2515 if ((adapter->hw.mac.type == e1000_82574) &&
2516 (em_enable_msix == TRUE)) {
2517 /* Map the MSIX BAR */
2518 int rid = PCIR_BAR(EM_MSIX_BAR);
2519 adapter->msix_mem = bus_alloc_resource_any(dev,
2520 SYS_RES_MEMORY, &rid, RF_ACTIVE);
2521 if (!adapter->msix_mem) {
2522 /* May not be enabled */
2523 device_printf(adapter->dev,
2524 "Unable to map MSIX table \n");
2527 val = pci_msix_count(dev);
2529 bus_release_resource(dev, SYS_RES_MEMORY,
2530 PCIR_BAR(EM_MSIX_BAR), adapter->msix_mem);
2531 adapter->msix_mem = NULL;
2532 device_printf(adapter->dev,
2533 "MSIX vectors wrong, using MSI \n");
2536 if (em_msix_queues == 2) {
2538 adapter->num_queues = 2;
2541 adapter->num_queues = 1;
2543 if (pci_alloc_msix(dev, &val) == 0) {
2544 device_printf(adapter->dev,
2545 "Using MSIX interrupts "
2546 "with %d vectors\n", val);
2552 val = pci_msi_count(dev);
2553 if (val == 1 && pci_alloc_msi(dev, &val) == 0) {
2555 device_printf(adapter->dev,"Using MSI interrupt\n");
2558 /* Should only happen due to manual invention */
2559 device_printf(adapter->dev,"Setup MSIX failure\n");
2564 /*********************************************************************
2566 * Initialize the hardware to a configuration
2567 * as specified by the adapter structure.
2569 **********************************************************************/
2571 em_reset(struct adapter *adapter)
2573 device_t dev = adapter->dev;
2574 struct e1000_hw *hw = &adapter->hw;
2577 INIT_DEBUGOUT("em_reset: begin");
2579 /* Set up smart power down as default off on newer adapters. */
2580 if (!em_smart_pwr_down && (hw->mac.type == e1000_82571 ||
2581 hw->mac.type == e1000_82572)) {
2584 /* Speed up time to link by disabling smart power down. */
2585 e1000_read_phy_reg(hw, IGP02E1000_PHY_POWER_MGMT, &phy_tmp);
2586 phy_tmp &= ~IGP02E1000_PM_SPD;
2587 e1000_write_phy_reg(hw, IGP02E1000_PHY_POWER_MGMT, phy_tmp);
2591 * These parameters control the automatic generation (Tx) and
2592 * response (Rx) to Ethernet PAUSE frames.
2593 * - High water mark should allow for at least two frames to be
2594 * received after sending an XOFF.
2595 * - Low water mark works best when it is very near the high water mark.
2596 * This allows the receiver to restart by sending XON when it has
2597 * drained a bit. Here we use an arbitary value of 1500 which will
2598 * restart after one full frame is pulled from the buffer. There
2599 * could be several smaller frames in the buffer and if so they will
2600 * not trigger the XON until their total number reduces the buffer
2602 * - The pause time is fairly large at 1000 x 512ns = 512 usec.
2604 rx_buffer_size = ((E1000_READ_REG(hw, E1000_PBA) & 0xffff) << 10 );
2606 hw->fc.high_water = rx_buffer_size -
2607 roundup2(adapter->max_frame_size, 1024);
2608 hw->fc.low_water = hw->fc.high_water - 1500;
2610 if (hw->mac.type == e1000_80003es2lan)
2611 hw->fc.pause_time = 0xFFFF;
2613 hw->fc.pause_time = EM_FC_PAUSE_TIME;
2615 hw->fc.send_xon = TRUE;
2617 /* Set Flow control, use the tunable location if sane */
2618 if ((em_fc_setting >= 0) || (em_fc_setting < 4))
2619 hw->fc.requested_mode = em_fc_setting;
2621 hw->fc.requested_mode = e1000_fc_none;
2623 /* Override - workaround for PCHLAN issue */
2624 if (hw->mac.type == e1000_pchlan)
2625 hw->fc.requested_mode = e1000_fc_rx_pause;
2627 /* Issue a global reset */
2629 E1000_WRITE_REG(hw, E1000_WUC, 0);
2631 if (e1000_init_hw(hw) < 0) {
2632 device_printf(dev, "Hardware Initialization Failed\n");
2636 E1000_WRITE_REG(hw, E1000_VET, ETHERTYPE_VLAN);
2637 e1000_get_phy_info(hw);
2638 e1000_check_for_link(hw);
2642 /*********************************************************************
2644 * Setup networking device structure and register an interface.
2646 **********************************************************************/
2648 em_setup_interface(device_t dev, struct adapter *adapter)
2652 INIT_DEBUGOUT("em_setup_interface: begin");
2654 ifp = adapter->ifp = if_alloc(IFT_ETHER);
2656 panic("%s: can not if_alloc()", device_get_nameunit(dev));
2657 if_initname(ifp, device_get_name(dev), device_get_unit(dev));
2658 ifp->if_mtu = ETHERMTU;
2659 ifp->if_init = em_init;
2660 ifp->if_softc = adapter;
2661 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
2662 ifp->if_ioctl = em_ioctl;
2663 ifp->if_start = em_start;
2664 IFQ_SET_MAXLEN(&ifp->if_snd, adapter->num_tx_desc - 1);
2665 ifp->if_snd.ifq_drv_maxlen = adapter->num_tx_desc - 1;
2666 IFQ_SET_READY(&ifp->if_snd);
2668 ether_ifattach(ifp, adapter->hw.mac.addr);
2670 ifp->if_capabilities = ifp->if_capenable = 0;
2672 #ifdef EM_MULTIQUEUE
2673 /* Multiqueue tx functions */
2674 ifp->if_transmit = em_mq_start;
2675 ifp->if_qflush = em_qflush;
2678 ifp->if_capabilities |= IFCAP_HWCSUM | IFCAP_VLAN_HWCSUM;
2679 ifp->if_capenable |= IFCAP_HWCSUM | IFCAP_VLAN_HWCSUM;
2681 /* Enable TSO by default, can disable with ifconfig */
2682 ifp->if_capabilities |= IFCAP_TSO4;
2683 ifp->if_capenable |= IFCAP_TSO4;
2686 * Tell the upper layer(s) we
2687 * support full VLAN capability
2689 ifp->if_data.ifi_hdrlen = sizeof(struct ether_vlan_header);
2690 ifp->if_capabilities |= IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_MTU;
2691 ifp->if_capenable |= IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_MTU;
2694 ** Dont turn this on by default, if vlans are
2695 ** created on another pseudo device (eg. lagg)
2696 ** then vlan events are not passed thru, breaking
2697 ** operation, but with HW FILTER off it works. If
2698 ** using vlans directly on the em driver you can
2699 ** enable this and get full hardware tag filtering.
2701 ifp->if_capabilities |= IFCAP_VLAN_HWFILTER;
2703 #ifdef DEVICE_POLLING
2704 ifp->if_capabilities |= IFCAP_POLLING;
2707 /* Enable only WOL MAGIC by default */
2709 ifp->if_capabilities |= IFCAP_WOL;
2710 ifp->if_capenable |= IFCAP_WOL_MAGIC;
2714 * Specify the media types supported by this adapter and register
2715 * callbacks to update media and link information
2717 ifmedia_init(&adapter->media, IFM_IMASK,
2718 em_media_change, em_media_status);
2719 if ((adapter->hw.phy.media_type == e1000_media_type_fiber) ||
2720 (adapter->hw.phy.media_type == e1000_media_type_internal_serdes)) {
2721 u_char fiber_type = IFM_1000_SX; /* default type */
2723 ifmedia_add(&adapter->media, IFM_ETHER | fiber_type | IFM_FDX,
2725 ifmedia_add(&adapter->media, IFM_ETHER | fiber_type, 0, NULL);
2727 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10_T, 0, NULL);
2728 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10_T | IFM_FDX,
2730 ifmedia_add(&adapter->media, IFM_ETHER | IFM_100_TX,
2732 ifmedia_add(&adapter->media, IFM_ETHER | IFM_100_TX | IFM_FDX,
2734 if (adapter->hw.phy.type != e1000_phy_ife) {
2735 ifmedia_add(&adapter->media,
2736 IFM_ETHER | IFM_1000_T | IFM_FDX, 0, NULL);
2737 ifmedia_add(&adapter->media,
2738 IFM_ETHER | IFM_1000_T, 0, NULL);
2741 ifmedia_add(&adapter->media, IFM_ETHER | IFM_AUTO, 0, NULL);
2742 ifmedia_set(&adapter->media, IFM_ETHER | IFM_AUTO);
2747 * Manage DMA'able memory.
2750 em_dmamap_cb(void *arg, bus_dma_segment_t *segs, int nseg, int error)
2754 *(bus_addr_t *) arg = segs[0].ds_addr;
2758 em_dma_malloc(struct adapter *adapter, bus_size_t size,
2759 struct em_dma_alloc *dma, int mapflags)
2763 error = bus_dma_tag_create(bus_get_dma_tag(adapter->dev), /* parent */
2764 EM_DBA_ALIGN, 0, /* alignment, bounds */
2765 BUS_SPACE_MAXADDR, /* lowaddr */
2766 BUS_SPACE_MAXADDR, /* highaddr */
2767 NULL, NULL, /* filter, filterarg */
2770 size, /* maxsegsize */
2772 NULL, /* lockfunc */
2776 device_printf(adapter->dev,
2777 "%s: bus_dma_tag_create failed: %d\n",
2782 error = bus_dmamem_alloc(dma->dma_tag, (void**) &dma->dma_vaddr,
2783 BUS_DMA_NOWAIT | BUS_DMA_COHERENT, &dma->dma_map);
2785 device_printf(adapter->dev,
2786 "%s: bus_dmamem_alloc(%ju) failed: %d\n",
2787 __func__, (uintmax_t)size, error);
2792 error = bus_dmamap_load(dma->dma_tag, dma->dma_map, dma->dma_vaddr,
2793 size, em_dmamap_cb, &dma->dma_paddr, mapflags | BUS_DMA_NOWAIT);
2794 if (error || dma->dma_paddr == 0) {
2795 device_printf(adapter->dev,
2796 "%s: bus_dmamap_load failed: %d\n",
2804 bus_dmamap_unload(dma->dma_tag, dma->dma_map);
2806 bus_dmamem_free(dma->dma_tag, dma->dma_vaddr, dma->dma_map);
2807 bus_dma_tag_destroy(dma->dma_tag);
2809 dma->dma_map = NULL;
2810 dma->dma_tag = NULL;
2816 em_dma_free(struct adapter *adapter, struct em_dma_alloc *dma)
2818 if (dma->dma_tag == NULL)
2820 if (dma->dma_map != NULL) {
2821 bus_dmamap_sync(dma->dma_tag, dma->dma_map,
2822 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
2823 bus_dmamap_unload(dma->dma_tag, dma->dma_map);
2824 bus_dmamem_free(dma->dma_tag, dma->dma_vaddr, dma->dma_map);
2825 dma->dma_map = NULL;
2827 bus_dma_tag_destroy(dma->dma_tag);
2828 dma->dma_tag = NULL;
2832 /*********************************************************************
2834 * Allocate memory for the transmit and receive rings, and then
2835 * the descriptors associated with each, called only once at attach.
2837 **********************************************************************/
2839 em_allocate_queues(struct adapter *adapter)
2841 device_t dev = adapter->dev;
2842 struct tx_ring *txr = NULL;
2843 struct rx_ring *rxr = NULL;
2844 int rsize, tsize, error = E1000_SUCCESS;
2845 int txconf = 0, rxconf = 0;
2848 /* Allocate the TX ring struct memory */
2849 if (!(adapter->tx_rings =
2850 (struct tx_ring *) malloc(sizeof(struct tx_ring) *
2851 adapter->num_queues, M_DEVBUF, M_NOWAIT | M_ZERO))) {
2852 device_printf(dev, "Unable to allocate TX ring memory\n");
2857 /* Now allocate the RX */
2858 if (!(adapter->rx_rings =
2859 (struct rx_ring *) malloc(sizeof(struct rx_ring) *
2860 adapter->num_queues, M_DEVBUF, M_NOWAIT | M_ZERO))) {
2861 device_printf(dev, "Unable to allocate RX ring memory\n");
2866 tsize = roundup2(adapter->num_tx_desc *
2867 sizeof(struct e1000_tx_desc), EM_DBA_ALIGN);
2869 * Now set up the TX queues, txconf is needed to handle the
2870 * possibility that things fail midcourse and we need to
2871 * undo memory gracefully
2873 for (int i = 0; i < adapter->num_queues; i++, txconf++) {
2874 /* Set up some basics */
2875 txr = &adapter->tx_rings[i];
2876 txr->adapter = adapter;
2879 /* Initialize the TX lock */
2880 snprintf(txr->mtx_name, sizeof(txr->mtx_name), "%s:tx(%d)",
2881 device_get_nameunit(dev), txr->me);
2882 mtx_init(&txr->tx_mtx, txr->mtx_name, NULL, MTX_DEF);
2884 if (em_dma_malloc(adapter, tsize,
2885 &txr->txdma, BUS_DMA_NOWAIT)) {
2887 "Unable to allocate TX Descriptor memory\n");
2891 txr->tx_base = (struct e1000_tx_desc *)txr->txdma.dma_vaddr;
2892 bzero((void *)txr->tx_base, tsize);
2894 if (em_allocate_transmit_buffers(txr)) {
2896 "Critical Failure setting up transmit buffers\n");
2900 #if __FreeBSD_version >= 800000
2901 /* Allocate a buf ring */
2902 txr->br = buf_ring_alloc(4096, M_DEVBUF,
2903 M_WAITOK, &txr->tx_mtx);
2908 * Next the RX queues...
2910 rsize = roundup2(adapter->num_rx_desc *
2911 sizeof(struct e1000_rx_desc), EM_DBA_ALIGN);
2912 for (int i = 0; i < adapter->num_queues; i++, rxconf++) {
2913 rxr = &adapter->rx_rings[i];
2914 rxr->adapter = adapter;
2917 /* Initialize the RX lock */
2918 snprintf(rxr->mtx_name, sizeof(rxr->mtx_name), "%s:rx(%d)",
2919 device_get_nameunit(dev), txr->me);
2920 mtx_init(&rxr->rx_mtx, rxr->mtx_name, NULL, MTX_DEF);
2922 if (em_dma_malloc(adapter, rsize,
2923 &rxr->rxdma, BUS_DMA_NOWAIT)) {
2925 "Unable to allocate RxDescriptor memory\n");
2929 rxr->rx_base = (struct e1000_rx_desc *)rxr->rxdma.dma_vaddr;
2930 bzero((void *)rxr->rx_base, rsize);
2932 /* Allocate receive buffers for the ring*/
2933 if (em_allocate_receive_buffers(rxr)) {
2935 "Critical Failure setting up receive buffers\n");
2944 for (rxr = adapter->rx_rings; rxconf > 0; rxr++, rxconf--)
2945 em_dma_free(adapter, &rxr->rxdma);
2947 for (txr = adapter->tx_rings; txconf > 0; txr++, txconf--)
2948 em_dma_free(adapter, &txr->txdma);
2949 free(adapter->rx_rings, M_DEVBUF);
2951 #if __FreeBSD_version >= 800000
2952 buf_ring_free(txr->br, M_DEVBUF);
2954 free(adapter->tx_rings, M_DEVBUF);
2960 /*********************************************************************
2962 * Allocate memory for tx_buffer structures. The tx_buffer stores all
2963 * the information needed to transmit a packet on the wire. This is
2964 * called only once at attach, setup is done every reset.
2966 **********************************************************************/
2968 em_allocate_transmit_buffers(struct tx_ring *txr)
2970 struct adapter *adapter = txr->adapter;
2971 device_t dev = adapter->dev;
2972 struct em_buffer *txbuf;
2976 * Setup DMA descriptor areas.
2978 if ((error = bus_dma_tag_create(bus_get_dma_tag(dev),
2979 1, 0, /* alignment, bounds */
2980 BUS_SPACE_MAXADDR, /* lowaddr */
2981 BUS_SPACE_MAXADDR, /* highaddr */
2982 NULL, NULL, /* filter, filterarg */
2983 EM_TSO_SIZE, /* maxsize */
2984 EM_MAX_SCATTER, /* nsegments */
2985 PAGE_SIZE, /* maxsegsize */
2987 NULL, /* lockfunc */
2988 NULL, /* lockfuncarg */
2990 device_printf(dev,"Unable to allocate TX DMA tag\n");
2994 if (!(txr->tx_buffers =
2995 (struct em_buffer *) malloc(sizeof(struct em_buffer) *
2996 adapter->num_tx_desc, M_DEVBUF, M_NOWAIT | M_ZERO))) {
2997 device_printf(dev, "Unable to allocate tx_buffer memory\n");
3002 /* Create the descriptor buffer dma maps */
3003 txbuf = txr->tx_buffers;
3004 for (i = 0; i < adapter->num_tx_desc; i++, txbuf++) {
3005 error = bus_dmamap_create(txr->txtag, 0, &txbuf->map);
3007 device_printf(dev, "Unable to create TX DMA map\n");
3014 /* We free all, it handles case where we are in the middle */
3015 em_free_transmit_structures(adapter);
3019 /*********************************************************************
3021 * Initialize a transmit ring.
3023 **********************************************************************/
3025 em_setup_transmit_ring(struct tx_ring *txr)
3027 struct adapter *adapter = txr->adapter;
3028 struct em_buffer *txbuf;
3031 /* Clear the old descriptor contents */
3033 bzero((void *)txr->tx_base,
3034 (sizeof(struct e1000_tx_desc)) * adapter->num_tx_desc);
3036 txr->next_avail_desc = 0;
3037 txr->next_to_clean = 0;
3039 /* Free any existing tx buffers. */
3040 txbuf = txr->tx_buffers;
3041 for (i = 0; i < adapter->num_tx_desc; i++, txbuf++) {
3042 if (txbuf->m_head != NULL) {
3043 bus_dmamap_sync(txr->txtag, txbuf->map,
3044 BUS_DMASYNC_POSTWRITE);
3045 bus_dmamap_unload(txr->txtag, txbuf->map);
3046 m_freem(txbuf->m_head);
3047 txbuf->m_head = NULL;
3049 /* clear the watch index */
3050 txbuf->next_eop = -1;
3053 /* Set number of descriptors available */
3054 txr->tx_avail = adapter->num_tx_desc;
3056 bus_dmamap_sync(txr->txdma.dma_tag, txr->txdma.dma_map,
3057 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
3061 /*********************************************************************
3063 * Initialize all transmit rings.
3065 **********************************************************************/
3067 em_setup_transmit_structures(struct adapter *adapter)
3069 struct tx_ring *txr = adapter->tx_rings;
3071 for (int i = 0; i < adapter->num_queues; i++, txr++)
3072 em_setup_transmit_ring(txr);
3077 /*********************************************************************
3079 * Enable transmit unit.
3081 **********************************************************************/
3083 em_initialize_transmit_unit(struct adapter *adapter)
3085 struct tx_ring *txr = adapter->tx_rings;
3086 struct e1000_hw *hw = &adapter->hw;
3087 u32 tctl, tarc, tipg = 0;
3089 INIT_DEBUGOUT("em_initialize_transmit_unit: begin");
3091 for (int i = 0; i < adapter->num_queues; i++, txr++) {
3092 u64 bus_addr = txr->txdma.dma_paddr;
3093 /* Base and Len of TX Ring */
3094 E1000_WRITE_REG(hw, E1000_TDLEN(i),
3095 adapter->num_tx_desc * sizeof(struct e1000_tx_desc));
3096 E1000_WRITE_REG(hw, E1000_TDBAH(i),
3097 (u32)(bus_addr >> 32));
3098 E1000_WRITE_REG(hw, E1000_TDBAL(i),
3100 /* Init the HEAD/TAIL indices */
3101 E1000_WRITE_REG(hw, E1000_TDT(i), 0);
3102 E1000_WRITE_REG(hw, E1000_TDH(i), 0);
3104 HW_DEBUGOUT2("Base = %x, Length = %x\n",
3105 E1000_READ_REG(&adapter->hw, E1000_TDBAL(i)),
3106 E1000_READ_REG(&adapter->hw, E1000_TDLEN(i)));
3108 txr->watchdog_check = FALSE;
3111 /* Set the default values for the Tx Inter Packet Gap timer */
3112 switch (adapter->hw.mac.type) {
3114 tipg = DEFAULT_82542_TIPG_IPGT;
3115 tipg |= DEFAULT_82542_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT;
3116 tipg |= DEFAULT_82542_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT;
3118 case e1000_80003es2lan:
3119 tipg = DEFAULT_82543_TIPG_IPGR1;
3120 tipg |= DEFAULT_80003ES2LAN_TIPG_IPGR2 <<
3121 E1000_TIPG_IPGR2_SHIFT;
3124 if ((adapter->hw.phy.media_type == e1000_media_type_fiber) ||
3125 (adapter->hw.phy.media_type ==
3126 e1000_media_type_internal_serdes))
3127 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
3129 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
3130 tipg |= DEFAULT_82543_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT;
3131 tipg |= DEFAULT_82543_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT;
3134 E1000_WRITE_REG(&adapter->hw, E1000_TIPG, tipg);
3135 E1000_WRITE_REG(&adapter->hw, E1000_TIDV, adapter->tx_int_delay.value);
3137 if(adapter->hw.mac.type >= e1000_82540)
3138 E1000_WRITE_REG(&adapter->hw, E1000_TADV,
3139 adapter->tx_abs_int_delay.value);
3141 if ((adapter->hw.mac.type == e1000_82571) ||
3142 (adapter->hw.mac.type == e1000_82572)) {
3143 tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(0));
3144 tarc |= SPEED_MODE_BIT;
3145 E1000_WRITE_REG(&adapter->hw, E1000_TARC(0), tarc);
3146 } else if (adapter->hw.mac.type == e1000_80003es2lan) {
3147 tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(0));
3149 E1000_WRITE_REG(&adapter->hw, E1000_TARC(0), tarc);
3150 tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(1));
3152 E1000_WRITE_REG(&adapter->hw, E1000_TARC(1), tarc);
3155 adapter->txd_cmd = E1000_TXD_CMD_IFCS;
3156 if (adapter->tx_int_delay.value > 0)
3157 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
3159 /* Program the Transmit Control Register */
3160 tctl = E1000_READ_REG(&adapter->hw, E1000_TCTL);
3161 tctl &= ~E1000_TCTL_CT;
3162 tctl |= (E1000_TCTL_PSP | E1000_TCTL_RTLC | E1000_TCTL_EN |
3163 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT));
3165 if (adapter->hw.mac.type >= e1000_82571)
3166 tctl |= E1000_TCTL_MULR;
3168 /* This write will effectively turn on the transmit unit. */
3169 E1000_WRITE_REG(&adapter->hw, E1000_TCTL, tctl);
3174 /*********************************************************************
3176 * Free all transmit rings.
3178 **********************************************************************/
3180 em_free_transmit_structures(struct adapter *adapter)
3182 struct tx_ring *txr = adapter->tx_rings;
3184 for (int i = 0; i < adapter->num_queues; i++, txr++) {
3186 em_free_transmit_buffers(txr);
3187 em_dma_free(adapter, &txr->txdma);
3189 EM_TX_LOCK_DESTROY(txr);
3192 free(adapter->tx_rings, M_DEVBUF);
3195 /*********************************************************************
3197 * Free transmit ring related data structures.
3199 **********************************************************************/
3201 em_free_transmit_buffers(struct tx_ring *txr)
3203 struct adapter *adapter = txr->adapter;
3204 struct em_buffer *txbuf;
3206 INIT_DEBUGOUT("free_transmit_ring: begin");
3208 if (txr->tx_buffers == NULL)
3211 for (int i = 0; i < adapter->num_tx_desc; i++) {
3212 txbuf = &txr->tx_buffers[i];
3213 if (txbuf->m_head != NULL) {
3214 bus_dmamap_sync(txr->txtag, txbuf->map,
3215 BUS_DMASYNC_POSTWRITE);
3216 bus_dmamap_unload(txr->txtag,
3218 m_freem(txbuf->m_head);
3219 txbuf->m_head = NULL;
3220 if (txbuf->map != NULL) {
3221 bus_dmamap_destroy(txr->txtag,
3225 } else if (txbuf->map != NULL) {
3226 bus_dmamap_unload(txr->txtag,
3228 bus_dmamap_destroy(txr->txtag,
3233 #if __FreeBSD_version >= 800000
3234 if (txr->br != NULL)
3235 buf_ring_free(txr->br, M_DEVBUF);
3237 if (txr->tx_buffers != NULL) {
3238 free(txr->tx_buffers, M_DEVBUF);
3239 txr->tx_buffers = NULL;
3241 if (txr->txtag != NULL) {
3242 bus_dma_tag_destroy(txr->txtag);
3249 /*********************************************************************
3251 * The offload context needs to be set when we transfer the first
3252 * packet of a particular protocol (TCP/UDP). This routine has been
3253 * enhanced to deal with inserted VLAN headers, and IPV6 (not complete)
3255 * Added back the old method of keeping the current context type
3256 * and not setting if unnecessary, as this is reported to be a
3257 * big performance win. -jfv
3258 **********************************************************************/
3260 em_transmit_checksum_setup(struct tx_ring *txr, struct mbuf *mp,
3261 u32 *txd_upper, u32 *txd_lower)
3263 struct adapter *adapter = txr->adapter;
3264 struct e1000_context_desc *TXD = NULL;
3265 struct em_buffer *tx_buffer;
3266 struct ether_vlan_header *eh;
3267 struct ip *ip = NULL;
3268 struct ip6_hdr *ip6;
3270 u32 cmd, hdr_len, ip_hlen;
3275 cmd = hdr_len = ipproto = 0;
3276 cur = txr->next_avail_desc;
3279 * Determine where frame payload starts.
3280 * Jump over vlan headers if already present,
3281 * helpful for QinQ too.
3283 eh = mtod(mp, struct ether_vlan_header *);
3284 if (eh->evl_encap_proto == htons(ETHERTYPE_VLAN)) {
3285 etype = ntohs(eh->evl_proto);
3286 ehdrlen = ETHER_HDR_LEN + ETHER_VLAN_ENCAP_LEN;
3288 etype = ntohs(eh->evl_encap_proto);
3289 ehdrlen = ETHER_HDR_LEN;
3293 * We only support TCP/UDP for IPv4 and IPv6 for the moment.
3294 * TODO: Support SCTP too when it hits the tree.
3298 ip = (struct ip *)(mp->m_data + ehdrlen);
3299 ip_hlen = ip->ip_hl << 2;
3301 /* Setup of IP header checksum. */
3302 if (mp->m_pkthdr.csum_flags & CSUM_IP) {
3304 * Start offset for header checksum calculation.
3305 * End offset for header checksum calculation.
3306 * Offset of place to put the checksum.
3308 TXD = (struct e1000_context_desc *)
3310 TXD->lower_setup.ip_fields.ipcss = ehdrlen;
3311 TXD->lower_setup.ip_fields.ipcse =
3312 htole16(ehdrlen + ip_hlen);
3313 TXD->lower_setup.ip_fields.ipcso =
3314 ehdrlen + offsetof(struct ip, ip_sum);
3315 cmd |= E1000_TXD_CMD_IP;
3316 *txd_upper |= E1000_TXD_POPTS_IXSM << 8;
3319 if (mp->m_len < ehdrlen + ip_hlen)
3320 return; /* failure */
3322 hdr_len = ehdrlen + ip_hlen;
3326 case ETHERTYPE_IPV6:
3327 ip6 = (struct ip6_hdr *)(mp->m_data + ehdrlen);
3328 ip_hlen = sizeof(struct ip6_hdr); /* XXX: No header stacking. */
3330 if (mp->m_len < ehdrlen + ip_hlen)
3331 return; /* failure */
3333 /* IPv6 doesn't have a header checksum. */
3335 hdr_len = ehdrlen + ip_hlen;
3336 ipproto = ip6->ip6_nxt;
3347 if (mp->m_pkthdr.csum_flags & CSUM_TCP) {
3348 *txd_lower = E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
3349 *txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3350 /* no need for context if already set */
3351 if (txr->last_hw_offload == CSUM_TCP)
3353 txr->last_hw_offload = CSUM_TCP;
3355 * Start offset for payload checksum calculation.
3356 * End offset for payload checksum calculation.
3357 * Offset of place to put the checksum.
3359 TXD = (struct e1000_context_desc *)
3361 TXD->upper_setup.tcp_fields.tucss = hdr_len;
3362 TXD->upper_setup.tcp_fields.tucse = htole16(0);
3363 TXD->upper_setup.tcp_fields.tucso =
3364 hdr_len + offsetof(struct tcphdr, th_sum);
3365 cmd |= E1000_TXD_CMD_TCP;
3370 if (mp->m_pkthdr.csum_flags & CSUM_UDP) {
3371 *txd_lower = E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
3372 *txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3373 /* no need for context if already set */
3374 if (txr->last_hw_offload == CSUM_UDP)
3376 txr->last_hw_offload = CSUM_UDP;
3378 * Start offset for header checksum calculation.
3379 * End offset for header checksum calculation.
3380 * Offset of place to put the checksum.
3382 TXD = (struct e1000_context_desc *)
3384 TXD->upper_setup.tcp_fields.tucss = hdr_len;
3385 TXD->upper_setup.tcp_fields.tucse = htole16(0);
3386 TXD->upper_setup.tcp_fields.tucso =
3387 hdr_len + offsetof(struct udphdr, uh_sum);
3395 TXD->tcp_seg_setup.data = htole32(0);
3396 TXD->cmd_and_length =
3397 htole32(adapter->txd_cmd | E1000_TXD_CMD_DEXT | cmd);
3398 tx_buffer = &txr->tx_buffers[cur];
3399 tx_buffer->m_head = NULL;
3400 tx_buffer->next_eop = -1;
3402 if (++cur == adapter->num_tx_desc)
3406 txr->next_avail_desc = cur;
3410 /**********************************************************************
3412 * Setup work for hardware segmentation offload (TSO)
3414 **********************************************************************/
3416 em_tso_setup(struct tx_ring *txr, struct mbuf *mp, u32 *txd_upper,
3419 struct adapter *adapter = txr->adapter;
3420 struct e1000_context_desc *TXD;
3421 struct em_buffer *tx_buffer;
3422 struct ether_vlan_header *eh;
3424 struct ip6_hdr *ip6;
3426 int cur, ehdrlen, hdr_len, ip_hlen, isip6;
3430 * This function could/should be extended to support IP/IPv6
3431 * fragmentation as well. But as they say, one step at a time.
3435 * Determine where frame payload starts.
3436 * Jump over vlan headers if already present,
3437 * helpful for QinQ too.
3439 eh = mtod(mp, struct ether_vlan_header *);
3440 if (eh->evl_encap_proto == htons(ETHERTYPE_VLAN)) {
3441 etype = ntohs(eh->evl_proto);
3442 ehdrlen = ETHER_HDR_LEN + ETHER_VLAN_ENCAP_LEN;
3444 etype = ntohs(eh->evl_encap_proto);
3445 ehdrlen = ETHER_HDR_LEN;
3448 /* Ensure we have at least the IP+TCP header in the first mbuf. */
3449 if (mp->m_len < ehdrlen + sizeof(struct ip) + sizeof(struct tcphdr))
3450 return FALSE; /* -1 */
3453 * We only support TCP for IPv4 and IPv6 (notyet) for the moment.
3454 * TODO: Support SCTP too when it hits the tree.
3459 ip = (struct ip *)(mp->m_data + ehdrlen);
3460 if (ip->ip_p != IPPROTO_TCP)
3461 return FALSE; /* 0 */
3464 ip_hlen = ip->ip_hl << 2;
3465 if (mp->m_len < ehdrlen + ip_hlen + sizeof(struct tcphdr))
3466 return FALSE; /* -1 */
3467 th = (struct tcphdr *)((caddr_t)ip + ip_hlen);
3469 th->th_sum = in_pseudo(ip->ip_src.s_addr,
3470 ip->ip_dst.s_addr, htons(IPPROTO_TCP));
3472 th->th_sum = mp->m_pkthdr.csum_data;
3475 case ETHERTYPE_IPV6:
3477 return FALSE; /* Not supported yet. */
3478 ip6 = (struct ip6_hdr *)(mp->m_data + ehdrlen);
3479 if (ip6->ip6_nxt != IPPROTO_TCP)
3480 return FALSE; /* 0 */
3482 ip_hlen = sizeof(struct ip6_hdr); /* XXX: no header stacking. */
3483 if (mp->m_len < ehdrlen + ip_hlen + sizeof(struct tcphdr))
3484 return FALSE; /* -1 */
3485 th = (struct tcphdr *)((caddr_t)ip6 + ip_hlen);
3487 th->th_sum = in6_pseudo(ip6->ip6_src, ip->ip6_dst,
3488 htons(IPPROTO_TCP)); /* XXX: function notyet. */
3490 th->th_sum = mp->m_pkthdr.csum_data;
3496 hdr_len = ehdrlen + ip_hlen + (th->th_off << 2);
3498 *txd_lower = (E1000_TXD_CMD_DEXT | /* Extended descr type */
3499 E1000_TXD_DTYP_D | /* Data descr type */
3500 E1000_TXD_CMD_TSE); /* Do TSE on this packet */
3502 /* IP and/or TCP header checksum calculation and insertion. */
3503 *txd_upper = ((isip6 ? 0 : E1000_TXD_POPTS_IXSM) |
3504 E1000_TXD_POPTS_TXSM) << 8;
3506 cur = txr->next_avail_desc;
3507 tx_buffer = &txr->tx_buffers[cur];
3508 TXD = (struct e1000_context_desc *) &txr->tx_base[cur];
3510 /* IPv6 doesn't have a header checksum. */
3513 * Start offset for header checksum calculation.
3514 * End offset for header checksum calculation.
3515 * Offset of place put the checksum.
3517 TXD->lower_setup.ip_fields.ipcss = ehdrlen;
3518 TXD->lower_setup.ip_fields.ipcse =
3519 htole16(ehdrlen + ip_hlen - 1);
3520 TXD->lower_setup.ip_fields.ipcso =
3521 ehdrlen + offsetof(struct ip, ip_sum);
3524 * Start offset for payload checksum calculation.
3525 * End offset for payload checksum calculation.
3526 * Offset of place to put the checksum.
3528 TXD->upper_setup.tcp_fields.tucss =
3530 TXD->upper_setup.tcp_fields.tucse = 0;
3531 TXD->upper_setup.tcp_fields.tucso =
3532 ehdrlen + ip_hlen + offsetof(struct tcphdr, th_sum);
3534 * Payload size per packet w/o any headers.
3535 * Length of all headers up to payload.
3537 TXD->tcp_seg_setup.fields.mss = htole16(mp->m_pkthdr.tso_segsz);
3538 TXD->tcp_seg_setup.fields.hdr_len = hdr_len;
3540 TXD->cmd_and_length = htole32(adapter->txd_cmd |
3541 E1000_TXD_CMD_DEXT | /* Extended descr */
3542 E1000_TXD_CMD_TSE | /* TSE context */
3543 (isip6 ? 0 : E1000_TXD_CMD_IP) |
3544 E1000_TXD_CMD_TCP | /* Do TCP checksum */
3545 (mp->m_pkthdr.len - (hdr_len))); /* Total len */
3547 tx_buffer->m_head = NULL;
3548 tx_buffer->next_eop = -1;
3550 if (++cur == adapter->num_tx_desc)
3554 txr->next_avail_desc = cur;
3561 /**********************************************************************
3563 * Examine each tx_buffer in the used queue. If the hardware is done
3564 * processing the packet then free associated resources. The
3565 * tx_buffer is put back on the free queue.
3567 **********************************************************************/
3569 em_txeof(struct tx_ring *txr)
3571 struct adapter *adapter = txr->adapter;
3572 int first, last, done, num_avail;
3573 struct em_buffer *tx_buffer;
3574 struct e1000_tx_desc *tx_desc, *eop_desc;
3575 struct ifnet *ifp = adapter->ifp;
3577 EM_TX_LOCK_ASSERT(txr);
3579 if (txr->tx_avail == adapter->num_tx_desc)
3582 num_avail = txr->tx_avail;
3583 first = txr->next_to_clean;
3584 tx_desc = &txr->tx_base[first];
3585 tx_buffer = &txr->tx_buffers[first];
3586 last = tx_buffer->next_eop;
3587 eop_desc = &txr->tx_base[last];
3590 * What this does is get the index of the
3591 * first descriptor AFTER the EOP of the
3592 * first packet, that way we can do the
3593 * simple comparison on the inner while loop.
3595 if (++last == adapter->num_tx_desc)
3599 bus_dmamap_sync(txr->txdma.dma_tag, txr->txdma.dma_map,
3600 BUS_DMASYNC_POSTREAD);
3602 while (eop_desc->upper.fields.status & E1000_TXD_STAT_DD) {
3603 /* We clean the range of the packet */
3604 while (first != done) {
3605 tx_desc->upper.data = 0;
3606 tx_desc->lower.data = 0;
3607 tx_desc->buffer_addr = 0;
3610 if (tx_buffer->m_head) {
3612 bus_dmamap_sync(txr->txtag,
3614 BUS_DMASYNC_POSTWRITE);
3615 bus_dmamap_unload(txr->txtag,
3618 m_freem(tx_buffer->m_head);
3619 tx_buffer->m_head = NULL;
3621 tx_buffer->next_eop = -1;
3622 txr->watchdog_time = ticks;
3624 if (++first == adapter->num_tx_desc)
3627 tx_buffer = &txr->tx_buffers[first];
3628 tx_desc = &txr->tx_base[first];
3630 /* See if we can continue to the next packet */
3631 last = tx_buffer->next_eop;
3633 eop_desc = &txr->tx_base[last];
3634 /* Get new done point */
3635 if (++last == adapter->num_tx_desc) last = 0;
3640 bus_dmamap_sync(txr->txdma.dma_tag, txr->txdma.dma_map,
3641 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
3643 txr->next_to_clean = first;
3646 * If we have enough room, clear IFF_DRV_OACTIVE to
3647 * tell the stack that it is OK to send packets.
3648 * If there are no pending descriptors, clear the watchdog.
3650 if (num_avail > EM_TX_CLEANUP_THRESHOLD) {
3651 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
3652 if (num_avail == adapter->num_tx_desc) {
3653 txr->watchdog_check = FALSE;
3654 txr->tx_avail = num_avail;
3659 txr->tx_avail = num_avail;
3664 /*********************************************************************
3666 * Refresh RX descriptor mbufs from system mbuf buffer pool.
3668 **********************************************************************/
3670 em_refresh_mbufs(struct rx_ring *rxr, int limit)
3672 struct adapter *adapter = rxr->adapter;
3674 bus_dma_segment_t segs[1];
3676 struct em_buffer *rxbuf;
3677 int i, error, nsegs, cleaned;
3679 i = rxr->next_to_refresh;
3681 while (i != limit) {
3682 m = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR);
3685 m->m_len = m->m_pkthdr.len = MCLBYTES;
3687 if (adapter->max_frame_size <= (MCLBYTES - ETHER_ALIGN))
3688 m_adj(m, ETHER_ALIGN);
3691 * Using memory from the mbuf cluster pool, invoke the
3692 * bus_dma machinery to arrange the memory mapping.
3694 error = bus_dmamap_load_mbuf_sg(rxr->rxtag, rxr->rx_sparemap,
3695 m, segs, &nsegs, BUS_DMA_NOWAIT);
3701 /* If nsegs is wrong then the stack is corrupt. */
3702 KASSERT(nsegs == 1, ("Too many segments returned!"));
3704 rxbuf = &rxr->rx_buffers[i];
3705 if (rxbuf->m_head != NULL)
3706 bus_dmamap_unload(rxr->rxtag, rxbuf->map);
3709 rxbuf->map = rxr->rx_sparemap;
3710 rxr->rx_sparemap = map;
3711 bus_dmamap_sync(rxr->rxtag,
3712 rxbuf->map, BUS_DMASYNC_PREREAD);
3714 rxr->rx_base[i].buffer_addr = htole64(segs[0].ds_addr);
3717 /* Calculate next index */
3718 if (++i == adapter->num_rx_desc)
3720 /* This is the work marker for refresh */
3721 rxr->next_to_refresh = i;
3724 bus_dmamap_sync(rxr->rxdma.dma_tag, rxr->rxdma.dma_map,
3725 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
3726 if (cleaned != -1) /* Update tail index */
3727 E1000_WRITE_REG(&adapter->hw,
3728 E1000_RDT(rxr->me), cleaned);
3734 /*********************************************************************
3736 * Allocate memory for rx_buffer structures. Since we use one
3737 * rx_buffer per received packet, the maximum number of rx_buffer's
3738 * that we'll need is equal to the number of receive descriptors
3739 * that we've allocated.
3741 **********************************************************************/
3743 em_allocate_receive_buffers(struct rx_ring *rxr)
3745 struct adapter *adapter = rxr->adapter;
3746 device_t dev = adapter->dev;
3747 struct em_buffer *rxbuf;
3750 rxr->rx_buffers = malloc(sizeof(struct em_buffer) *
3751 adapter->num_rx_desc, M_DEVBUF, M_NOWAIT | M_ZERO);
3752 if (rxr->rx_buffers == NULL) {
3753 device_printf(dev, "Unable to allocate rx_buffer memory\n");
3757 error = bus_dma_tag_create(bus_get_dma_tag(dev), /* parent */
3758 1, 0, /* alignment, bounds */
3759 BUS_SPACE_MAXADDR, /* lowaddr */
3760 BUS_SPACE_MAXADDR, /* highaddr */
3761 NULL, NULL, /* filter, filterarg */
3762 MCLBYTES, /* maxsize */
3764 MCLBYTES, /* maxsegsize */
3766 NULL, /* lockfunc */
3770 device_printf(dev, "%s: bus_dma_tag_create failed %d\n",
3775 /* Create the spare map (used by getbuf) */
3776 error = bus_dmamap_create(rxr->rxtag, BUS_DMA_NOWAIT,
3779 device_printf(dev, "%s: bus_dmamap_create failed: %d\n",
3784 rxbuf = rxr->rx_buffers;
3785 for (int i = 0; i < adapter->num_rx_desc; i++, rxbuf++) {
3786 rxbuf = &rxr->rx_buffers[i];
3787 error = bus_dmamap_create(rxr->rxtag, BUS_DMA_NOWAIT,
3790 device_printf(dev, "%s: bus_dmamap_create failed: %d\n",
3799 em_free_receive_structures(adapter);
3804 /*********************************************************************
3806 * Initialize a receive ring and its buffers.
3808 **********************************************************************/
3810 em_setup_receive_ring(struct rx_ring *rxr)
3812 struct adapter *adapter = rxr->adapter;
3813 struct em_buffer *rxbuf;
3814 bus_dma_segment_t seg[1];
3815 int rsize, nsegs, error;
3818 /* Clear the ring contents */
3820 rsize = roundup2(adapter->num_rx_desc *
3821 sizeof(struct e1000_rx_desc), EM_DBA_ALIGN);
3822 bzero((void *)rxr->rx_base, rsize);
3825 ** Free current RX buffer structs and their mbufs
3827 for (int i = 0; i < adapter->num_rx_desc; i++) {
3828 rxbuf = &rxr->rx_buffers[i];
3829 if (rxbuf->m_head != NULL) {
3830 bus_dmamap_sync(rxr->rxtag, rxbuf->map,
3831 BUS_DMASYNC_POSTREAD);
3832 bus_dmamap_unload(rxr->rxtag, rxbuf->map);
3833 m_freem(rxbuf->m_head);
3837 /* Now replenish the mbufs */
3838 for (int j = 0; j != adapter->num_rx_desc; ++j) {
3840 rxbuf = &rxr->rx_buffers[j];
3841 rxbuf->m_head = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR);
3842 if (rxbuf->m_head == NULL)
3843 panic("RX ring hdr initialization failed!\n");
3844 rxbuf->m_head->m_len = MCLBYTES;
3845 rxbuf->m_head->m_flags &= ~M_HASFCS; /* we strip it */
3846 rxbuf->m_head->m_pkthdr.len = MCLBYTES;
3848 /* Get the memory mapping */
3849 error = bus_dmamap_load_mbuf_sg(rxr->rxtag,
3850 rxbuf->map, rxbuf->m_head, seg,
3851 &nsegs, BUS_DMA_NOWAIT);
3853 panic("RX ring dma initialization failed!\n");
3854 bus_dmamap_sync(rxr->rxtag,
3855 rxbuf->map, BUS_DMASYNC_PREREAD);
3857 /* Update descriptor */
3858 rxr->rx_base[j].buffer_addr = htole64(seg[0].ds_addr);
3862 /* Setup our descriptor indices */
3863 rxr->next_to_check = 0;
3864 rxr->next_to_refresh = 0;
3866 bus_dmamap_sync(rxr->rxdma.dma_tag, rxr->rxdma.dma_map,
3867 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
3873 /*********************************************************************
3875 * Initialize all receive rings.
3877 **********************************************************************/
3879 em_setup_receive_structures(struct adapter *adapter)
3881 struct rx_ring *rxr = adapter->rx_rings;
3884 for (j = 0; j < adapter->num_queues; j++, rxr++)
3885 if (em_setup_receive_ring(rxr))
3891 * Free RX buffers allocated so far, we will only handle
3892 * the rings that completed, the failing case will have
3893 * cleaned up for itself. 'j' failed, so its the terminus.
3895 for (int i = 0; i < j; ++i) {
3896 rxr = &adapter->rx_rings[i];
3897 for (int n = 0; n < adapter->num_rx_desc; n++) {
3898 struct em_buffer *rxbuf;
3899 rxbuf = &rxr->rx_buffers[n];
3900 if (rxbuf->m_head != NULL) {
3901 bus_dmamap_sync(rxr->rxtag, rxbuf->map,
3902 BUS_DMASYNC_POSTREAD);
3903 bus_dmamap_unload(rxr->rxtag, rxbuf->map);
3904 m_freem(rxbuf->m_head);
3905 rxbuf->m_head = NULL;
3913 /*********************************************************************
3915 * Free all receive rings.
3917 **********************************************************************/
3919 em_free_receive_structures(struct adapter *adapter)
3921 struct rx_ring *rxr = adapter->rx_rings;
3923 for (int i = 0; i < adapter->num_queues; i++, rxr++) {
3924 em_free_receive_buffers(rxr);
3925 /* Free the ring memory as well */
3926 em_dma_free(adapter, &rxr->rxdma);
3927 EM_RX_LOCK_DESTROY(rxr);
3930 free(adapter->rx_rings, M_DEVBUF);
3934 /*********************************************************************
3936 * Free receive ring data structures
3938 **********************************************************************/
3940 em_free_receive_buffers(struct rx_ring *rxr)
3942 struct adapter *adapter = rxr->adapter;
3943 struct em_buffer *rxbuf = NULL;
3945 INIT_DEBUGOUT("free_receive_buffers: begin");
3947 if (rxr->rx_sparemap) {
3948 bus_dmamap_destroy(rxr->rxtag, rxr->rx_sparemap);
3949 rxr->rx_sparemap = NULL;
3952 if (rxr->rx_buffers != NULL) {
3953 for (int i = 0; i < adapter->num_rx_desc; i++) {
3954 rxbuf = &rxr->rx_buffers[i];
3955 if (rxbuf->map != NULL) {
3956 bus_dmamap_sync(rxr->rxtag, rxbuf->map,
3957 BUS_DMASYNC_POSTREAD);
3958 bus_dmamap_unload(rxr->rxtag, rxbuf->map);
3959 bus_dmamap_destroy(rxr->rxtag, rxbuf->map);
3961 if (rxbuf->m_head != NULL) {
3962 m_freem(rxbuf->m_head);
3963 rxbuf->m_head = NULL;
3966 free(rxr->rx_buffers, M_DEVBUF);
3967 rxr->rx_buffers = NULL;
3970 if (rxr->rxtag != NULL) {
3971 bus_dma_tag_destroy(rxr->rxtag);
3979 /*********************************************************************
3981 * Enable receive unit.
3983 **********************************************************************/
3984 #define MAX_INTS_PER_SEC 8000
3985 #define DEFAULT_ITR 1000000000/(MAX_INTS_PER_SEC * 256)
3988 em_initialize_receive_unit(struct adapter *adapter)
3990 struct rx_ring *rxr = adapter->rx_rings;
3991 struct ifnet *ifp = adapter->ifp;
3992 struct e1000_hw *hw = &adapter->hw;
3996 INIT_DEBUGOUT("em_initialize_receive_units: begin");
3999 * Make sure receives are disabled while setting
4000 * up the descriptor ring
4002 rctl = E1000_READ_REG(hw, E1000_RCTL);
4003 E1000_WRITE_REG(hw, E1000_RCTL, rctl & ~E1000_RCTL_EN);
4005 E1000_WRITE_REG(&adapter->hw, E1000_RADV,
4006 adapter->rx_abs_int_delay.value);
4008 * Set the interrupt throttling rate. Value is calculated
4009 * as DEFAULT_ITR = 1/(MAX_INTS_PER_SEC * 256ns)
4011 E1000_WRITE_REG(hw, E1000_ITR, DEFAULT_ITR);
4014 ** When using MSIX interrupts we need to throttle
4015 ** using the EITR register (82574 only)
4017 if (hw->mac.type == e1000_82574)
4018 for (int i = 0; i < 4; i++)
4019 E1000_WRITE_REG(hw, E1000_EITR_82574(i),
4022 /* Disable accelerated ackknowledge */
4023 if (adapter->hw.mac.type == e1000_82574)
4024 E1000_WRITE_REG(hw, E1000_RFCTL, E1000_RFCTL_ACK_DIS);
4026 if (ifp->if_capenable & IFCAP_RXCSUM) {
4027 rxcsum = E1000_READ_REG(hw, E1000_RXCSUM);
4028 rxcsum |= (E1000_RXCSUM_IPOFL | E1000_RXCSUM_TUOFL);
4029 E1000_WRITE_REG(hw, E1000_RXCSUM, rxcsum);
4033 ** XXX TEMPORARY WORKAROUND: on some systems with 82573
4034 ** long latencies are observed, like Lenovo X60. This
4035 ** change eliminates the problem, but since having positive
4036 ** values in RDTR is a known source of problems on other
4037 ** platforms another solution is being sought.
4039 if (hw->mac.type == e1000_82573)
4040 E1000_WRITE_REG(hw, E1000_RDTR, 0x20);
4042 for (int i = 0; i < adapter->num_queues; i++, rxr++) {
4043 /* Setup the Base and Length of the Rx Descriptor Ring */
4044 bus_addr = rxr->rxdma.dma_paddr;
4045 E1000_WRITE_REG(hw, E1000_RDLEN(i),
4046 adapter->num_rx_desc * sizeof(struct e1000_rx_desc));
4047 E1000_WRITE_REG(hw, E1000_RDBAH(i), (u32)(bus_addr >> 32));
4048 E1000_WRITE_REG(hw, E1000_RDBAL(i), (u32)bus_addr);
4049 /* Setup the Head and Tail Descriptor Pointers */
4050 E1000_WRITE_REG(hw, E1000_RDH(i), 0);
4051 E1000_WRITE_REG(hw, E1000_RDT(i), adapter->num_rx_desc - 1);
4054 /* Setup the Receive Control Register */
4055 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
4056 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
4057 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
4058 (hw->mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
4061 rctl |= E1000_RCTL_SECRC;
4063 /* Make sure VLAN Filters are off */
4064 rctl &= ~E1000_RCTL_VFE;
4065 rctl &= ~E1000_RCTL_SBP;
4066 rctl |= E1000_RCTL_SZ_2048;
4067 if (ifp->if_mtu > ETHERMTU)
4068 rctl |= E1000_RCTL_LPE;
4070 rctl &= ~E1000_RCTL_LPE;
4072 /* Write out the settings */
4073 E1000_WRITE_REG(hw, E1000_RCTL, rctl);
4079 /*********************************************************************
4081 * This routine executes in interrupt context. It replenishes
4082 * the mbufs in the descriptor and sends data which has been
4083 * dma'ed into host memory to upper layer.
4085 * We loop at most count times if count is > 0, or until done if
4088 * For polling we also now return the number of cleaned packets
4089 *********************************************************************/
4091 em_rxeof(struct rx_ring *rxr, int count)
4093 struct adapter *adapter = rxr->adapter;
4094 struct ifnet *ifp = adapter->ifp;
4095 struct mbuf *mp, *sendmp;
4098 int i, processed, rxdone = 0;
4100 struct e1000_rx_desc *cur;
4104 for (i = rxr->next_to_check, processed = 0; count != 0;) {
4106 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0)
4109 bus_dmamap_sync(rxr->rxdma.dma_tag, rxr->rxdma.dma_map,
4110 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
4112 cur = &rxr->rx_base[i];
4113 status = cur->status;
4116 if ((status & E1000_RXD_STAT_DD) == 0)
4119 len = le16toh(cur->length);
4120 eop = (status & E1000_RXD_STAT_EOP) != 0;
4123 if ((cur->errors & E1000_RXD_ERR_FRAME_ERR_MASK) == 0) {
4125 /* Assign correct length to the current fragment */
4126 mp = rxr->rx_buffers[i].m_head;
4129 if (rxr->fmp == NULL) {
4130 mp->m_pkthdr.len = len;
4131 rxr->fmp = mp; /* Store the first mbuf */
4134 /* Chain mbuf's together */
4135 mp->m_flags &= ~M_PKTHDR;
4136 rxr->lmp->m_next = mp;
4137 rxr->lmp = rxr->lmp->m_next;
4138 rxr->fmp->m_pkthdr.len += len;
4142 rxr->fmp->m_pkthdr.rcvif = ifp;
4144 em_receive_checksum(cur, rxr->fmp);
4145 #ifndef __NO_STRICT_ALIGNMENT
4146 if (adapter->max_frame_size >
4147 (MCLBYTES - ETHER_ALIGN) &&
4148 em_fixup_rx(rxr) != 0)
4151 if (status & E1000_RXD_STAT_VP) {
4152 rxr->fmp->m_pkthdr.ether_vtag =
4153 (le16toh(cur->special) &
4154 E1000_RXD_SPC_VLAN_MASK);
4155 rxr->fmp->m_flags |= M_VLANTAG;
4157 #ifdef EM_MULTIQUEUE
4158 rxr->fmp->m_pkthdr.flowid = curcpu;
4159 rxr->fmp->m_flags |= M_FLOWID;
4161 #ifndef __NO_STRICT_ALIGNMENT
4170 /* Reuse loaded DMA map and just update mbuf chain */
4171 mp = rxr->rx_buffers[i].m_head;
4172 mp->m_len = mp->m_pkthdr.len = MCLBYTES;
4173 mp->m_data = mp->m_ext.ext_buf;
4175 if (adapter->max_frame_size <=
4176 (MCLBYTES - ETHER_ALIGN))
4177 m_adj(mp, ETHER_ALIGN);
4178 if (rxr->fmp != NULL) {
4186 /* Zero out the receive descriptors status. */
4188 ++rxdone; /* cumulative for POLL */
4191 /* Advance our pointers to the next descriptor. */
4192 if (++i == adapter->num_rx_desc)
4195 /* Send to the stack */
4196 if (sendmp != NULL) {
4197 rxr->next_to_check = i;
4199 (*ifp->if_input)(ifp, sendmp);
4201 i = rxr->next_to_check;
4204 /* Only refresh mbufs every 8 descriptors */
4205 if (processed == 8) {
4206 em_refresh_mbufs(rxr, i);
4211 /* Catch any remaining refresh work */
4212 if (processed != 0) {
4213 em_refresh_mbufs(rxr, i);
4217 rxr->next_to_check = i;
4220 #ifdef DEVICE_POLLING
4223 return ((status & E1000_RXD_STAT_DD) ? TRUE : FALSE);
4227 #ifndef __NO_STRICT_ALIGNMENT
4229 * When jumbo frames are enabled we should realign entire payload on
4230 * architecures with strict alignment. This is serious design mistake of 8254x
4231 * as it nullifies DMA operations. 8254x just allows RX buffer size to be
4232 * 2048/4096/8192/16384. What we really want is 2048 - ETHER_ALIGN to align its
4233 * payload. On architecures without strict alignment restrictions 8254x still
4234 * performs unaligned memory access which would reduce the performance too.
4235 * To avoid copying over an entire frame to align, we allocate a new mbuf and
4236 * copy ethernet header to the new mbuf. The new mbuf is prepended into the
4237 * existing mbuf chain.
4239 * Be aware, best performance of the 8254x is achived only when jumbo frame is
4240 * not used at all on architectures with strict alignment.
4243 em_fixup_rx(struct rx_ring *rxr)
4245 struct adapter *adapter = rxr->adapter;
4251 if (m->m_len <= (MCLBYTES - ETHER_HDR_LEN)) {
4252 bcopy(m->m_data, m->m_data + ETHER_HDR_LEN, m->m_len);
4253 m->m_data += ETHER_HDR_LEN;
4255 MGETHDR(n, M_DONTWAIT, MT_DATA);
4257 bcopy(m->m_data, n->m_data, ETHER_HDR_LEN);
4258 m->m_data += ETHER_HDR_LEN;
4259 m->m_len -= ETHER_HDR_LEN;
4260 n->m_len = ETHER_HDR_LEN;
4261 M_MOVE_PKTHDR(n, m);
4265 adapter->dropped_pkts++;
4276 /*********************************************************************
4278 * Verify that the hardware indicated that the checksum is valid.
4279 * Inform the stack about the status of checksum so that stack
4280 * doesn't spend time verifying the checksum.
4282 *********************************************************************/
4284 em_receive_checksum(struct e1000_rx_desc *rx_desc, struct mbuf *mp)
4286 /* Ignore Checksum bit is set */
4287 if (rx_desc->status & E1000_RXD_STAT_IXSM) {
4288 mp->m_pkthdr.csum_flags = 0;
4292 if (rx_desc->status & E1000_RXD_STAT_IPCS) {
4294 if (!(rx_desc->errors & E1000_RXD_ERR_IPE)) {
4295 /* IP Checksum Good */
4296 mp->m_pkthdr.csum_flags = CSUM_IP_CHECKED;
4297 mp->m_pkthdr.csum_flags |= CSUM_IP_VALID;
4300 mp->m_pkthdr.csum_flags = 0;
4304 if (rx_desc->status & E1000_RXD_STAT_TCPCS) {
4306 if (!(rx_desc->errors & E1000_RXD_ERR_TCPE)) {
4307 mp->m_pkthdr.csum_flags |=
4308 (CSUM_DATA_VALID | CSUM_PSEUDO_HDR);
4309 mp->m_pkthdr.csum_data = htons(0xffff);
4315 * This routine is run via an vlan
4319 em_register_vlan(void *arg, struct ifnet *ifp, u16 vtag)
4321 struct adapter *adapter = ifp->if_softc;
4324 if (ifp->if_softc != arg) /* Not our event */
4327 if ((vtag == 0) || (vtag > 4095)) /* Invalid ID */
4330 index = (vtag >> 5) & 0x7F;
4332 em_shadow_vfta[index] |= (1 << bit);
4333 ++adapter->num_vlans;
4334 /* Re-init to load the changes */
4339 * This routine is run via an vlan
4343 em_unregister_vlan(void *arg, struct ifnet *ifp, u16 vtag)
4345 struct adapter *adapter = ifp->if_softc;
4348 if (ifp->if_softc != arg)
4351 if ((vtag == 0) || (vtag > 4095)) /* Invalid */
4354 index = (vtag >> 5) & 0x7F;
4356 em_shadow_vfta[index] &= ~(1 << bit);
4357 --adapter->num_vlans;
4358 /* Re-init to load the changes */
4363 em_setup_vlan_hw_support(struct adapter *adapter)
4365 struct e1000_hw *hw = &adapter->hw;
4369 ** We get here thru init_locked, meaning
4370 ** a soft reset, this has already cleared
4371 ** the VFTA and other state, so if there
4372 ** have been no vlan's registered do nothing.
4374 if (adapter->num_vlans == 0)
4378 ** A soft reset zero's out the VFTA, so
4379 ** we need to repopulate it now.
4381 for (int i = 0; i < EM_VFTA_SIZE; i++)
4382 if (em_shadow_vfta[i] != 0)
4383 E1000_WRITE_REG_ARRAY(hw, E1000_VFTA,
4384 i, em_shadow_vfta[i]);
4386 reg = E1000_READ_REG(hw, E1000_CTRL);
4387 reg |= E1000_CTRL_VME;
4388 E1000_WRITE_REG(hw, E1000_CTRL, reg);
4390 /* Enable the Filter Table */
4391 reg = E1000_READ_REG(hw, E1000_RCTL);
4392 reg &= ~E1000_RCTL_CFIEN;
4393 reg |= E1000_RCTL_VFE;
4394 E1000_WRITE_REG(hw, E1000_RCTL, reg);
4396 /* Update the frame size */
4397 E1000_WRITE_REG(&adapter->hw, E1000_RLPML,
4398 adapter->max_frame_size + VLAN_TAG_SIZE);
4402 em_enable_intr(struct adapter *adapter)
4404 struct e1000_hw *hw = &adapter->hw;
4405 u32 ims_mask = IMS_ENABLE_MASK;
4407 if (hw->mac.type == e1000_82574) {
4408 E1000_WRITE_REG(hw, EM_EIAC, EM_MSIX_MASK);
4409 ims_mask |= EM_MSIX_MASK;
4411 E1000_WRITE_REG(hw, E1000_IMS, ims_mask);
4415 em_disable_intr(struct adapter *adapter)
4417 struct e1000_hw *hw = &adapter->hw;
4419 if (hw->mac.type == e1000_82574)
4420 E1000_WRITE_REG(hw, EM_EIAC, 0);
4421 E1000_WRITE_REG(&adapter->hw, E1000_IMC, 0xffffffff);
4425 * Bit of a misnomer, what this really means is
4426 * to enable OS management of the system... aka
4427 * to disable special hardware management features
4430 em_init_manageability(struct adapter *adapter)
4432 /* A shared code workaround */
4433 #define E1000_82542_MANC2H E1000_MANC2H
4434 if (adapter->has_manage) {
4435 int manc2h = E1000_READ_REG(&adapter->hw, E1000_MANC2H);
4436 int manc = E1000_READ_REG(&adapter->hw, E1000_MANC);
4438 /* disable hardware interception of ARP */
4439 manc &= ~(E1000_MANC_ARP_EN);
4441 /* enable receiving management packets to the host */
4442 manc |= E1000_MANC_EN_MNG2HOST;
4443 #define E1000_MNG2HOST_PORT_623 (1 << 5)
4444 #define E1000_MNG2HOST_PORT_664 (1 << 6)
4445 manc2h |= E1000_MNG2HOST_PORT_623;
4446 manc2h |= E1000_MNG2HOST_PORT_664;
4447 E1000_WRITE_REG(&adapter->hw, E1000_MANC2H, manc2h);
4448 E1000_WRITE_REG(&adapter->hw, E1000_MANC, manc);
4453 * Give control back to hardware management
4454 * controller if there is one.
4457 em_release_manageability(struct adapter *adapter)
4459 if (adapter->has_manage) {
4460 int manc = E1000_READ_REG(&adapter->hw, E1000_MANC);
4462 /* re-enable hardware interception of ARP */
4463 manc |= E1000_MANC_ARP_EN;
4464 manc &= ~E1000_MANC_EN_MNG2HOST;
4466 E1000_WRITE_REG(&adapter->hw, E1000_MANC, manc);
4471 * em_get_hw_control sets the {CTRL_EXT|FWSM}:DRV_LOAD bit.
4472 * For ASF and Pass Through versions of f/w this means
4473 * that the driver is loaded. For AMT version type f/w
4474 * this means that the network i/f is open.
4477 em_get_hw_control(struct adapter *adapter)
4481 if (adapter->hw.mac.type == e1000_82573) {
4482 swsm = E1000_READ_REG(&adapter->hw, E1000_SWSM);
4483 E1000_WRITE_REG(&adapter->hw, E1000_SWSM,
4484 swsm | E1000_SWSM_DRV_LOAD);
4488 ctrl_ext = E1000_READ_REG(&adapter->hw, E1000_CTRL_EXT);
4489 E1000_WRITE_REG(&adapter->hw, E1000_CTRL_EXT,
4490 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
4495 * em_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
4496 * For ASF and Pass Through versions of f/w this means that
4497 * the driver is no longer loaded. For AMT versions of the
4498 * f/w this means that the network i/f is closed.
4501 em_release_hw_control(struct adapter *adapter)
4505 if (!adapter->has_manage)
4508 if (adapter->hw.mac.type == e1000_82573) {
4509 swsm = E1000_READ_REG(&adapter->hw, E1000_SWSM);
4510 E1000_WRITE_REG(&adapter->hw, E1000_SWSM,
4511 swsm & ~E1000_SWSM_DRV_LOAD);
4515 ctrl_ext = E1000_READ_REG(&adapter->hw, E1000_CTRL_EXT);
4516 E1000_WRITE_REG(&adapter->hw, E1000_CTRL_EXT,
4517 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
4522 em_is_valid_ether_addr(u8 *addr)
4524 char zero_addr[6] = { 0, 0, 0, 0, 0, 0 };
4526 if ((addr[0] & 1) || (!bcmp(addr, zero_addr, ETHER_ADDR_LEN))) {
4534 ** Parse the interface capabilities with regard
4535 ** to both system management and wake-on-lan for
4539 em_get_wakeup(device_t dev)
4541 struct adapter *adapter = device_get_softc(dev);
4542 u16 eeprom_data = 0, device_id, apme_mask;
4544 adapter->has_manage = e1000_enable_mng_pass_thru(&adapter->hw);
4545 apme_mask = EM_EEPROM_APME;
4547 switch (adapter->hw.mac.type) {
4550 adapter->has_amt = TRUE;
4554 case e1000_80003es2lan:
4555 if (adapter->hw.bus.func == 1) {
4556 e1000_read_nvm(&adapter->hw,
4557 NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
4560 e1000_read_nvm(&adapter->hw,
4561 NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
4565 case e1000_ich10lan:
4567 apme_mask = E1000_WUC_APME;
4568 adapter->has_amt = TRUE;
4569 eeprom_data = E1000_READ_REG(&adapter->hw, E1000_WUC);
4572 e1000_read_nvm(&adapter->hw,
4573 NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
4576 if (eeprom_data & apme_mask)
4577 adapter->wol = (E1000_WUFC_MAG | E1000_WUFC_MC);
4579 * We have the eeprom settings, now apply the special cases
4580 * where the eeprom may be wrong or the board won't support
4581 * wake on lan on a particular port
4583 device_id = pci_get_device(dev);
4584 switch (device_id) {
4585 case E1000_DEV_ID_82571EB_FIBER:
4586 /* Wake events only supported on port A for dual fiber
4587 * regardless of eeprom setting */
4588 if (E1000_READ_REG(&adapter->hw, E1000_STATUS) &
4589 E1000_STATUS_FUNC_1)
4592 case E1000_DEV_ID_82571EB_QUAD_COPPER:
4593 case E1000_DEV_ID_82571EB_QUAD_FIBER:
4594 case E1000_DEV_ID_82571EB_QUAD_COPPER_LP:
4595 /* if quad port adapter, disable WoL on all but port A */
4596 if (global_quad_port_a != 0)
4598 /* Reset for multiple quad port adapters */
4599 if (++global_quad_port_a == 4)
4600 global_quad_port_a = 0;
4608 * Enable PCI Wake On Lan capability
4611 em_enable_wakeup(device_t dev)
4613 struct adapter *adapter = device_get_softc(dev);
4614 struct ifnet *ifp = adapter->ifp;
4615 u32 pmc, ctrl, ctrl_ext, rctl;
4618 if ((pci_find_extcap(dev, PCIY_PMG, &pmc) != 0))
4621 /* Advertise the wakeup capability */
4622 ctrl = E1000_READ_REG(&adapter->hw, E1000_CTRL);
4623 ctrl |= (E1000_CTRL_SWDPIN2 | E1000_CTRL_SWDPIN3);
4624 E1000_WRITE_REG(&adapter->hw, E1000_CTRL, ctrl);
4625 E1000_WRITE_REG(&adapter->hw, E1000_WUC, E1000_WUC_PME_EN);
4627 if ((adapter->hw.mac.type == e1000_ich8lan) ||
4628 (adapter->hw.mac.type == e1000_pchlan) ||
4629 (adapter->hw.mac.type == e1000_ich9lan) ||
4630 (adapter->hw.mac.type == e1000_ich10lan)) {
4631 e1000_disable_gig_wol_ich8lan(&adapter->hw);
4632 e1000_hv_phy_powerdown_workaround_ich8lan(&adapter->hw);
4635 /* Keep the laser running on Fiber adapters */
4636 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
4637 adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
4638 ctrl_ext = E1000_READ_REG(&adapter->hw, E1000_CTRL_EXT);
4639 ctrl_ext |= E1000_CTRL_EXT_SDP3_DATA;
4640 E1000_WRITE_REG(&adapter->hw, E1000_CTRL_EXT, ctrl_ext);
4644 ** Determine type of Wakeup: note that wol
4645 ** is set with all bits on by default.
4647 if ((ifp->if_capenable & IFCAP_WOL_MAGIC) == 0)
4648 adapter->wol &= ~E1000_WUFC_MAG;
4650 if ((ifp->if_capenable & IFCAP_WOL_MCAST) == 0)
4651 adapter->wol &= ~E1000_WUFC_MC;
4653 rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
4654 rctl |= E1000_RCTL_MPE;
4655 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, rctl);
4658 if (adapter->hw.mac.type == e1000_pchlan) {
4659 if (em_enable_phy_wakeup(adapter))
4662 E1000_WRITE_REG(&adapter->hw, E1000_WUC, E1000_WUC_PME_EN);
4663 E1000_WRITE_REG(&adapter->hw, E1000_WUFC, adapter->wol);
4666 if (adapter->hw.phy.type == e1000_phy_igp_3)
4667 e1000_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw);
4670 status = pci_read_config(dev, pmc + PCIR_POWER_STATUS, 2);
4671 status &= ~(PCIM_PSTAT_PME | PCIM_PSTAT_PMEENABLE);
4672 if (ifp->if_capenable & IFCAP_WOL)
4673 status |= PCIM_PSTAT_PME | PCIM_PSTAT_PMEENABLE;
4674 pci_write_config(dev, pmc + PCIR_POWER_STATUS, status, 2);
4680 ** WOL in the newer chipset interfaces (pchlan)
4681 ** require thing to be copied into the phy
4684 em_enable_phy_wakeup(struct adapter *adapter)
4686 struct e1000_hw *hw = &adapter->hw;
4690 /* copy MAC RARs to PHY RARs */
4691 for (int i = 0; i < adapter->hw.mac.rar_entry_count; i++) {
4692 mreg = E1000_READ_REG(hw, E1000_RAL(i));
4693 e1000_write_phy_reg(hw, BM_RAR_L(i), (u16)(mreg & 0xFFFF));
4694 e1000_write_phy_reg(hw, BM_RAR_M(i),
4695 (u16)((mreg >> 16) & 0xFFFF));
4696 mreg = E1000_READ_REG(hw, E1000_RAH(i));
4697 e1000_write_phy_reg(hw, BM_RAR_H(i), (u16)(mreg & 0xFFFF));
4698 e1000_write_phy_reg(hw, BM_RAR_CTRL(i),
4699 (u16)((mreg >> 16) & 0xFFFF));
4702 /* copy MAC MTA to PHY MTA */
4703 for (int i = 0; i < adapter->hw.mac.mta_reg_count; i++) {
4704 mreg = E1000_READ_REG_ARRAY(hw, E1000_MTA, i);
4705 e1000_write_phy_reg(hw, BM_MTA(i), (u16)(mreg & 0xFFFF));
4706 e1000_write_phy_reg(hw, BM_MTA(i) + 1,
4707 (u16)((mreg >> 16) & 0xFFFF));
4710 /* configure PHY Rx Control register */
4711 e1000_read_phy_reg(&adapter->hw, BM_RCTL, &preg);
4712 mreg = E1000_READ_REG(hw, E1000_RCTL);
4713 if (mreg & E1000_RCTL_UPE)
4714 preg |= BM_RCTL_UPE;
4715 if (mreg & E1000_RCTL_MPE)
4716 preg |= BM_RCTL_MPE;
4717 preg &= ~(BM_RCTL_MO_MASK);
4718 if (mreg & E1000_RCTL_MO_3)
4719 preg |= (((mreg & E1000_RCTL_MO_3) >> E1000_RCTL_MO_SHIFT)
4720 << BM_RCTL_MO_SHIFT);
4721 if (mreg & E1000_RCTL_BAM)
4722 preg |= BM_RCTL_BAM;
4723 if (mreg & E1000_RCTL_PMCF)
4724 preg |= BM_RCTL_PMCF;
4725 mreg = E1000_READ_REG(hw, E1000_CTRL);
4726 if (mreg & E1000_CTRL_RFCE)
4727 preg |= BM_RCTL_RFCE;
4728 e1000_write_phy_reg(&adapter->hw, BM_RCTL, preg);
4730 /* enable PHY wakeup in MAC register */
4731 E1000_WRITE_REG(hw, E1000_WUC,
4732 E1000_WUC_PHY_WAKE | E1000_WUC_PME_EN);
4733 E1000_WRITE_REG(hw, E1000_WUFC, adapter->wol);
4735 /* configure and enable PHY wakeup in PHY registers */
4736 e1000_write_phy_reg(&adapter->hw, BM_WUFC, adapter->wol);
4737 e1000_write_phy_reg(&adapter->hw, BM_WUC, E1000_WUC_PME_EN);
4739 /* activate PHY wakeup */
4740 ret = hw->phy.ops.acquire(hw);
4742 printf("Could not acquire PHY\n");
4745 e1000_write_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
4746 (BM_WUC_ENABLE_PAGE << IGP_PAGE_SHIFT));
4747 ret = e1000_read_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, &preg);
4749 printf("Could not read PHY page 769\n");
4752 preg |= BM_WUC_ENABLE_BIT | BM_WUC_HOST_WU_BIT;
4753 ret = e1000_write_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, preg);
4755 printf("Could not set PHY Host Wakeup bit\n");
4757 hw->phy.ops.release(hw);
4763 em_led_func(void *arg, int onoff)
4765 struct adapter *adapter = arg;
4767 EM_CORE_LOCK(adapter);
4769 e1000_setup_led(&adapter->hw);
4770 e1000_led_on(&adapter->hw);
4772 e1000_led_off(&adapter->hw);
4773 e1000_cleanup_led(&adapter->hw);
4775 EM_CORE_UNLOCK(adapter);
4778 /**********************************************************************
4780 * Update the board statistics counters.
4782 **********************************************************************/
4784 em_update_stats_counters(struct adapter *adapter)
4788 if(adapter->hw.phy.media_type == e1000_media_type_copper ||
4789 (E1000_READ_REG(&adapter->hw, E1000_STATUS) & E1000_STATUS_LU)) {
4790 adapter->stats.symerrs += E1000_READ_REG(&adapter->hw, E1000_SYMERRS);
4791 adapter->stats.sec += E1000_READ_REG(&adapter->hw, E1000_SEC);
4793 adapter->stats.crcerrs += E1000_READ_REG(&adapter->hw, E1000_CRCERRS);
4794 adapter->stats.mpc += E1000_READ_REG(&adapter->hw, E1000_MPC);
4795 adapter->stats.scc += E1000_READ_REG(&adapter->hw, E1000_SCC);
4796 adapter->stats.ecol += E1000_READ_REG(&adapter->hw, E1000_ECOL);
4798 adapter->stats.mcc += E1000_READ_REG(&adapter->hw, E1000_MCC);
4799 adapter->stats.latecol += E1000_READ_REG(&adapter->hw, E1000_LATECOL);
4800 adapter->stats.colc += E1000_READ_REG(&adapter->hw, E1000_COLC);
4801 adapter->stats.dc += E1000_READ_REG(&adapter->hw, E1000_DC);
4802 adapter->stats.rlec += E1000_READ_REG(&adapter->hw, E1000_RLEC);
4803 adapter->stats.xonrxc += E1000_READ_REG(&adapter->hw, E1000_XONRXC);
4804 adapter->stats.xontxc += E1000_READ_REG(&adapter->hw, E1000_XONTXC);
4805 adapter->stats.xoffrxc += E1000_READ_REG(&adapter->hw, E1000_XOFFRXC);
4806 adapter->stats.xofftxc += E1000_READ_REG(&adapter->hw, E1000_XOFFTXC);
4807 adapter->stats.fcruc += E1000_READ_REG(&adapter->hw, E1000_FCRUC);
4808 adapter->stats.prc64 += E1000_READ_REG(&adapter->hw, E1000_PRC64);
4809 adapter->stats.prc127 += E1000_READ_REG(&adapter->hw, E1000_PRC127);
4810 adapter->stats.prc255 += E1000_READ_REG(&adapter->hw, E1000_PRC255);
4811 adapter->stats.prc511 += E1000_READ_REG(&adapter->hw, E1000_PRC511);
4812 adapter->stats.prc1023 += E1000_READ_REG(&adapter->hw, E1000_PRC1023);
4813 adapter->stats.prc1522 += E1000_READ_REG(&adapter->hw, E1000_PRC1522);
4814 adapter->stats.gprc += E1000_READ_REG(&adapter->hw, E1000_GPRC);
4815 adapter->stats.bprc += E1000_READ_REG(&adapter->hw, E1000_BPRC);
4816 adapter->stats.mprc += E1000_READ_REG(&adapter->hw, E1000_MPRC);
4817 adapter->stats.gptc += E1000_READ_REG(&adapter->hw, E1000_GPTC);
4819 /* For the 64-bit byte counters the low dword must be read first. */
4820 /* Both registers clear on the read of the high dword */
4822 adapter->stats.gorc += E1000_READ_REG(&adapter->hw, E1000_GORCH);
4823 adapter->stats.gotc += E1000_READ_REG(&adapter->hw, E1000_GOTCH);
4825 adapter->stats.rnbc += E1000_READ_REG(&adapter->hw, E1000_RNBC);
4826 adapter->stats.ruc += E1000_READ_REG(&adapter->hw, E1000_RUC);
4827 adapter->stats.rfc += E1000_READ_REG(&adapter->hw, E1000_RFC);
4828 adapter->stats.roc += E1000_READ_REG(&adapter->hw, E1000_ROC);
4829 adapter->stats.rjc += E1000_READ_REG(&adapter->hw, E1000_RJC);
4831 adapter->stats.tor += E1000_READ_REG(&adapter->hw, E1000_TORH);
4832 adapter->stats.tot += E1000_READ_REG(&adapter->hw, E1000_TOTH);
4834 adapter->stats.tpr += E1000_READ_REG(&adapter->hw, E1000_TPR);
4835 adapter->stats.tpt += E1000_READ_REG(&adapter->hw, E1000_TPT);
4836 adapter->stats.ptc64 += E1000_READ_REG(&adapter->hw, E1000_PTC64);
4837 adapter->stats.ptc127 += E1000_READ_REG(&adapter->hw, E1000_PTC127);
4838 adapter->stats.ptc255 += E1000_READ_REG(&adapter->hw, E1000_PTC255);
4839 adapter->stats.ptc511 += E1000_READ_REG(&adapter->hw, E1000_PTC511);
4840 adapter->stats.ptc1023 += E1000_READ_REG(&adapter->hw, E1000_PTC1023);
4841 adapter->stats.ptc1522 += E1000_READ_REG(&adapter->hw, E1000_PTC1522);
4842 adapter->stats.mptc += E1000_READ_REG(&adapter->hw, E1000_MPTC);
4843 adapter->stats.bptc += E1000_READ_REG(&adapter->hw, E1000_BPTC);
4845 if (adapter->hw.mac.type >= e1000_82543) {
4846 adapter->stats.algnerrc +=
4847 E1000_READ_REG(&adapter->hw, E1000_ALGNERRC);
4848 adapter->stats.rxerrc +=
4849 E1000_READ_REG(&adapter->hw, E1000_RXERRC);
4850 adapter->stats.tncrs +=
4851 E1000_READ_REG(&adapter->hw, E1000_TNCRS);
4852 adapter->stats.cexterr +=
4853 E1000_READ_REG(&adapter->hw, E1000_CEXTERR);
4854 adapter->stats.tsctc +=
4855 E1000_READ_REG(&adapter->hw, E1000_TSCTC);
4856 adapter->stats.tsctfc +=
4857 E1000_READ_REG(&adapter->hw, E1000_TSCTFC);
4861 ifp->if_collisions = adapter->stats.colc;
4864 ifp->if_ierrors = adapter->dropped_pkts + adapter->stats.rxerrc +
4865 adapter->stats.crcerrs + adapter->stats.algnerrc +
4866 adapter->stats.ruc + adapter->stats.roc +
4867 adapter->stats.mpc + adapter->stats.cexterr;
4870 ifp->if_oerrors = adapter->stats.ecol +
4871 adapter->stats.latecol + adapter->watchdog_events;
4875 /**********************************************************************
4877 * This routine is called only when em_display_debug_stats is enabled.
4878 * This routine provides a way to take a look at important statistics
4879 * maintained by the driver and hardware.
4881 **********************************************************************/
4883 em_print_debug_info(struct adapter *adapter)
4885 device_t dev = adapter->dev;
4886 u8 *hw_addr = adapter->hw.hw_addr;
4887 struct rx_ring *rxr = adapter->rx_rings;
4888 struct tx_ring *txr = adapter->tx_rings;
4890 device_printf(dev, "Adapter hardware address = %p \n", hw_addr);
4891 device_printf(dev, "CTRL = 0x%x RCTL = 0x%x \n",
4892 E1000_READ_REG(&adapter->hw, E1000_CTRL),
4893 E1000_READ_REG(&adapter->hw, E1000_RCTL));
4894 device_printf(dev, "Packet buffer = Tx=%dk Rx=%dk \n",
4895 ((E1000_READ_REG(&adapter->hw, E1000_PBA) & 0xffff0000) >> 16),\
4896 (E1000_READ_REG(&adapter->hw, E1000_PBA) & 0xffff) );
4897 device_printf(dev, "Flow control watermarks high = %d low = %d\n",
4898 adapter->hw.fc.high_water,
4899 adapter->hw.fc.low_water);
4900 device_printf(dev, "tx_int_delay = %d, tx_abs_int_delay = %d\n",
4901 E1000_READ_REG(&adapter->hw, E1000_TIDV),
4902 E1000_READ_REG(&adapter->hw, E1000_TADV));
4903 device_printf(dev, "rx_int_delay = %d, rx_abs_int_delay = %d\n",
4904 E1000_READ_REG(&adapter->hw, E1000_RDTR),
4905 E1000_READ_REG(&adapter->hw, E1000_RADV));
4907 for (int i = 0; i < adapter->num_queues; i++, txr++) {
4908 device_printf(dev, "Queue(%d) tdh = %d, tdt = %d\n", i,
4909 E1000_READ_REG(&adapter->hw, E1000_TDH(i)),
4910 E1000_READ_REG(&adapter->hw, E1000_TDT(i)));
4911 device_printf(dev, "TX(%d) no descriptors avail event = %ld\n",
4912 txr->me, txr->no_desc_avail);
4913 device_printf(dev, "TX(%d) MSIX IRQ Handled = %ld\n",
4914 txr->me, txr->tx_irq);
4915 device_printf(dev, "Num Tx descriptors avail = %d\n",
4917 device_printf(dev, "Tx Descriptors not avail1 = %ld\n",
4918 txr->no_desc_avail);
4920 for (int i = 0; i < adapter->num_queues; i++, rxr++) {
4921 device_printf(dev, "RX(%d) MSIX IRQ Handled = %ld\n",
4922 rxr->me, rxr->rx_irq);
4923 device_printf(dev, "hw rdh = %d, hw rdt = %d\n",
4924 E1000_READ_REG(&adapter->hw, E1000_RDH(i)),
4925 E1000_READ_REG(&adapter->hw, E1000_RDT(i)));
4927 device_printf(dev, "Std mbuf failed = %ld\n",
4928 adapter->mbuf_alloc_failed);
4929 device_printf(dev, "Std mbuf cluster failed = %ld\n",
4930 adapter->mbuf_cluster_failed);
4931 device_printf(dev, "Driver dropped packets = %ld\n",
4932 adapter->dropped_pkts);
4936 em_print_hw_stats(struct adapter *adapter)
4938 device_t dev = adapter->dev;
4940 device_printf(dev, "Excessive collisions = %lld\n",
4941 (long long)adapter->stats.ecol);
4942 #if (DEBUG_HW > 0) /* Dont output these errors normally */
4943 device_printf(dev, "Symbol errors = %lld\n",
4944 (long long)adapter->stats.symerrs);
4946 device_printf(dev, "Sequence errors = %lld\n",
4947 (long long)adapter->stats.sec);
4948 device_printf(dev, "Defer count = %lld\n",
4949 (long long)adapter->stats.dc);
4950 device_printf(dev, "Missed Packets = %lld\n",
4951 (long long)adapter->stats.mpc);
4952 device_printf(dev, "Receive No Buffers = %lld\n",
4953 (long long)adapter->stats.rnbc);
4954 /* RLEC is inaccurate on some hardware, calculate our own. */
4955 device_printf(dev, "Receive Length Errors = %lld\n",
4956 ((long long)adapter->stats.roc + (long long)adapter->stats.ruc));
4957 device_printf(dev, "Receive errors = %lld\n",
4958 (long long)adapter->stats.rxerrc);
4959 device_printf(dev, "Crc errors = %lld\n",
4960 (long long)adapter->stats.crcerrs);
4961 device_printf(dev, "Alignment errors = %lld\n",
4962 (long long)adapter->stats.algnerrc);
4963 device_printf(dev, "Collision/Carrier extension errors = %lld\n",
4964 (long long)adapter->stats.cexterr);
4965 device_printf(dev, "watchdog timeouts = %ld\n",
4966 adapter->watchdog_events);
4967 device_printf(dev, "XON Rcvd = %lld\n",
4968 (long long)adapter->stats.xonrxc);
4969 device_printf(dev, "XON Xmtd = %lld\n",
4970 (long long)adapter->stats.xontxc);
4971 device_printf(dev, "XOFF Rcvd = %lld\n",
4972 (long long)adapter->stats.xoffrxc);
4973 device_printf(dev, "XOFF Xmtd = %lld\n",
4974 (long long)adapter->stats.xofftxc);
4975 device_printf(dev, "Good Packets Rcvd = %lld\n",
4976 (long long)adapter->stats.gprc);
4977 device_printf(dev, "Good Packets Xmtd = %lld\n",
4978 (long long)adapter->stats.gptc);
4979 device_printf(dev, "TSO Contexts Xmtd = %lld\n",
4980 (long long)adapter->stats.tsctc);
4981 device_printf(dev, "TSO Contexts Failed = %lld\n",
4982 (long long)adapter->stats.tsctfc);
4985 /**********************************************************************
4987 * This routine provides a way to dump out the adapter eeprom,
4988 * often a useful debug/service tool. This only dumps the first
4989 * 32 words, stuff that matters is in that extent.
4991 **********************************************************************/
4993 em_print_nvm_info(struct adapter *adapter)
4998 /* Its a bit crude, but it gets the job done */
4999 printf("\nInterface EEPROM Dump:\n");
5000 printf("Offset\n0x0000 ");
5001 for (i = 0, j = 0; i < 32; i++, j++) {
5002 if (j == 8) { /* Make the offset block */
5004 printf("\n0x00%x0 ",row);
5006 e1000_read_nvm(&adapter->hw, i, 1, &eeprom_data);
5007 printf("%04x ", eeprom_data);
5013 em_sysctl_debug_info(SYSCTL_HANDLER_ARGS)
5015 struct adapter *adapter;
5020 error = sysctl_handle_int(oidp, &result, 0, req);
5022 if (error || !req->newptr)
5026 adapter = (struct adapter *)arg1;
5027 em_print_debug_info(adapter);
5030 * This value will cause a hex dump of the
5031 * first 32 16-bit words of the EEPROM to
5035 adapter = (struct adapter *)arg1;
5036 em_print_nvm_info(adapter);
5044 em_sysctl_stats(SYSCTL_HANDLER_ARGS)
5046 struct adapter *adapter;
5051 error = sysctl_handle_int(oidp, &result, 0, req);
5053 if (error || !req->newptr)
5057 adapter = (struct adapter *)arg1;
5058 em_print_hw_stats(adapter);
5065 em_sysctl_int_delay(SYSCTL_HANDLER_ARGS)
5067 struct em_int_delay_info *info;
5068 struct adapter *adapter;
5070 int error, usecs, ticks;
5072 info = (struct em_int_delay_info *)arg1;
5073 usecs = info->value;
5074 error = sysctl_handle_int(oidp, &usecs, 0, req);
5075 if (error != 0 || req->newptr == NULL)
5077 if (usecs < 0 || usecs > EM_TICKS_TO_USECS(65535))
5079 info->value = usecs;
5080 ticks = EM_USECS_TO_TICKS(usecs);
5082 adapter = info->adapter;
5084 EM_CORE_LOCK(adapter);
5085 regval = E1000_READ_OFFSET(&adapter->hw, info->offset);
5086 regval = (regval & ~0xffff) | (ticks & 0xffff);
5087 /* Handle a few special cases. */
5088 switch (info->offset) {
5093 adapter->txd_cmd &= ~E1000_TXD_CMD_IDE;
5094 /* Don't write 0 into the TIDV register. */
5097 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
5100 E1000_WRITE_OFFSET(&adapter->hw, info->offset, regval);
5101 EM_CORE_UNLOCK(adapter);
5106 em_add_int_delay_sysctl(struct adapter *adapter, const char *name,
5107 const char *description, struct em_int_delay_info *info,
5108 int offset, int value)
5110 info->adapter = adapter;
5111 info->offset = offset;
5112 info->value = value;
5113 SYSCTL_ADD_PROC(device_get_sysctl_ctx(adapter->dev),
5114 SYSCTL_CHILDREN(device_get_sysctl_tree(adapter->dev)),
5115 OID_AUTO, name, CTLTYPE_INT|CTLFLAG_RW,
5116 info, 0, em_sysctl_int_delay, "I", description);
5120 em_add_rx_process_limit(struct adapter *adapter, const char *name,
5121 const char *description, int *limit, int value)
5124 SYSCTL_ADD_INT(device_get_sysctl_ctx(adapter->dev),
5125 SYSCTL_CHILDREN(device_get_sysctl_tree(adapter->dev)),
5126 OID_AUTO, name, CTLTYPE_INT|CTLFLAG_RW, limit, value, description);