2 * Copyright (c) 2016 Matt Macy <mmacy@nextbsd.org>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 #include "opt_inet6.h"
32 #ifdef HAVE_KERNEL_OPTION_HEADERS
33 #include "opt_device_polling.h"
36 #include <sys/param.h>
37 #include <sys/systm.h>
39 #include <sys/types.h>
42 #if __FreeBSD_version >= 800000
43 #include <sys/buf_ring.h>
46 #include <sys/endian.h>
47 #include <sys/kernel.h>
48 #include <sys/kthread.h>
49 #include <sys/malloc.h>
51 #include <sys/module.h>
54 #include <sys/socket.h>
55 #include <sys/sockio.h>
56 #include <sys/sysctl.h>
57 #include <sys/taskqueue.h>
58 #include <sys/eventhandler.h>
59 #include <machine/bus.h>
60 #include <machine/resource.h>
63 #include <net/ethernet.h>
65 #include <net/if_var.h>
66 #include <net/if_arp.h>
67 #include <net/if_dl.h>
68 #include <net/if_media.h>
69 #include <net/iflib.h>
71 #include <net/if_types.h>
72 #include <net/if_vlan_var.h>
74 #include <netinet/in_systm.h>
75 #include <netinet/in.h>
76 #include <netinet/if_ether.h>
77 #include <netinet/ip.h>
78 #include <netinet/ip6.h>
79 #include <netinet/tcp.h>
80 #include <netinet/udp.h>
82 #include <machine/in_cksum.h>
83 #include <dev/led/led.h>
84 #include <dev/pci/pcivar.h>
85 #include <dev/pci/pcireg.h>
87 #include "e1000_api.h"
88 #include "e1000_82571.h"
92 #ifndef _EM_H_DEFINED_
93 #define _EM_H_DEFINED_
99 * EM_MAX_TXD: Maximum number of Transmit Descriptors
100 * Valid Range: 80-256 for 82542 and 82543-based adapters
102 * Default Value: 1024
103 * This value is the number of transmit descriptors allocated by the driver.
104 * Increasing this value allows the driver to queue more transmits. Each
105 * descriptor is 16 bytes.
106 * Since TDLEN should be multiple of 128bytes, the number of transmit
107 * desscriptors should meet the following condition.
108 * (num_tx_desc * sizeof(struct e1000_tx_desc)) % 128 == 0
110 #define EM_MIN_TXD 128
111 #define EM_MAX_TXD 4096
112 #define EM_DEFAULT_TXD 1024
113 #define EM_DEFAULT_MULTI_TXD 4096
114 #define IGB_MAX_TXD 4096
117 * EM_MAX_RXD - Maximum number of receive Descriptors
118 * Valid Range: 80-256 for 82542 and 82543-based adapters
120 * Default Value: 1024
121 * This value is the number of receive descriptors allocated by the driver.
122 * Increasing this value allows the driver to buffer more incoming packets.
123 * Each descriptor is 16 bytes. A receive buffer is also allocated for each
124 * descriptor. The maximum MTU size is 16110.
125 * Since TDLEN should be multiple of 128bytes, the number of transmit
126 * desscriptors should meet the following condition.
127 * (num_tx_desc * sizeof(struct e1000_tx_desc)) % 128 == 0
129 #define EM_MIN_RXD 128
130 #define EM_MAX_RXD 4096
131 #define EM_DEFAULT_RXD 1024
132 #define EM_DEFAULT_MULTI_RXD 4096
133 #define IGB_MAX_RXD 4096
136 * EM_TIDV - Transmit Interrupt Delay Value
137 * Valid Range: 0-65535 (0=off)
139 * This value delays the generation of transmit interrupts in units of
140 * 1.024 microseconds. Transmit interrupt reduction can improve CPU
141 * efficiency if properly tuned for specific network traffic. If the
142 * system is reporting dropped transmits, this value may be set too high
143 * causing the driver to run out of available transmit descriptors.
148 * EM_TADV - Transmit Absolute Interrupt Delay Value
149 * (Not valid for 82542/82543/82544)
150 * Valid Range: 0-65535 (0=off)
152 * This value, in units of 1.024 microseconds, limits the delay in which a
153 * transmit interrupt is generated. Useful only if EM_TIDV is non-zero,
154 * this value ensures that an interrupt is generated after the initial
155 * packet is sent on the wire within the set amount of time. Proper tuning,
156 * along with EM_TIDV, may improve traffic throughput in specific
157 * network conditions.
162 * EM_RDTR - Receive Interrupt Delay Timer (Packet Timer)
163 * Valid Range: 0-65535 (0=off)
165 * This value delays the generation of receive interrupts in units of 1.024
166 * microseconds. Receive interrupt reduction can improve CPU efficiency if
167 * properly tuned for specific network traffic. Increasing this value adds
168 * extra latency to frame reception and can end up decreasing the throughput
169 * of TCP traffic. If the system is reporting dropped receives, this value
170 * may be set too high, causing the driver to run out of available receive
173 * CAUTION: When setting EM_RDTR to a value other than 0, adapters
174 * may hang (stop transmitting) under certain network conditions.
175 * If this occurs a WATCHDOG message is logged in the system
176 * event log. In addition, the controller is automatically reset,
177 * restoring the network connection. To eliminate the potential
178 * for the hang ensure that EM_RDTR is set to 0.
183 * Receive Interrupt Absolute Delay Timer (Not valid for 82542/82543/82544)
184 * Valid Range: 0-65535 (0=off)
186 * This value, in units of 1.024 microseconds, limits the delay in which a
187 * receive interrupt is generated. Useful only if EM_RDTR is non-zero,
188 * this value ensures that an interrupt is generated after the initial
189 * packet is received within the set amount of time. Proper tuning,
190 * along with EM_RDTR, may improve traffic throughput in specific network
196 * This parameter controls whether or not autonegotation is enabled.
197 * 0 - Disable autonegotiation
198 * 1 - Enable autonegotiation
200 #define DO_AUTO_NEG 1
203 * This parameter control whether or not the driver will wait for
204 * autonegotiation to complete.
205 * 1 - Wait for autonegotiation to complete
206 * 0 - Don't wait for autonegotiation to complete
208 #define WAIT_FOR_AUTO_NEG_DEFAULT 0
210 /* Tunables -- End */
212 #define AUTONEG_ADV_DEFAULT (ADVERTISE_10_HALF | ADVERTISE_10_FULL | \
213 ADVERTISE_100_HALF | ADVERTISE_100_FULL | \
216 #define AUTO_ALL_MODES 0
218 /* PHY master/slave setting */
219 #define EM_MASTER_SLAVE e1000_ms_hw_default
222 * Micellaneous constants
224 #define EM_VENDOR_ID 0x8086
225 #define EM_FLASH 0x0014
227 #define EM_JUMBO_PBA 0x00000028
228 #define EM_DEFAULT_PBA 0x00000030
229 #define EM_SMARTSPEED_DOWNSHIFT 3
230 #define EM_SMARTSPEED_MAX 15
231 #define EM_MAX_LOOP 10
233 #define MAX_NUM_MULTICAST_ADDRESSES 128
234 #define PCI_ANY_ID (~0U)
235 #define ETHER_ALIGN 2
236 #define EM_FC_PAUSE_TIME 0x0680
237 #define EM_EEPROM_APME 0x400;
238 #define EM_82544_APME 0x0004;
241 /* Support AutoMediaDetect for Marvell M88 PHY in i354 */
242 #define IGB_MEDIA_RESET (1 << 0)
244 /* Define the starting Interrupt rate per Queue */
245 #define IGB_INTS_PER_SEC 8000
246 #define IGB_DEFAULT_ITR ((1000000/IGB_INTS_PER_SEC) << 2)
248 #define IGB_LINK_ITR 2000
249 #define I210_LINK_DELAY 1000
251 #define IGB_MAX_SCATTER 40
252 #define IGB_VFTA_SIZE 128
253 #define IGB_BR_SIZE 4096 /* ring buf size */
254 #define IGB_TSO_SIZE (65535 + sizeof(struct ether_vlan_header))
255 #define IGB_TSO_SEG_SIZE 4096 /* Max dma segment size */
256 #define IGB_TXPBSIZE 20408
257 #define IGB_HDR_BUF 128
258 #define IGB_PKTTYPE_MASK 0x0000FFF0
259 #define IGB_DMCTLX_DCFLUSH_DIS 0x80000000 /* Disable DMA Coalesce Flush */
262 * Driver state logic for the detection of a hung state
263 * in hardware. Set TX_HUNG whenever a TX packet is used
264 * (data is sent) and clear it when txeof() is invoked if
265 * any descriptors from the ring are cleaned/reclaimed.
266 * Increment internal counter if no descriptors are cleaned
267 * and compare to TX_MAXTRIES. When counter > TX_MAXTRIES,
270 #define EM_TX_IDLE 0x00000000
271 #define EM_TX_BUSY 0x00000001
272 #define EM_TX_HUNG 0x80000000
273 #define EM_TX_MAXTRIES 10
275 #define PCICFG_DESC_RING_STATUS 0xe4
276 #define FLUSH_DESC_REQUIRED 0x100
279 #define IGB_RX_PTHRESH ((hw->mac.type == e1000_i354) ? 12 : \
280 ((hw->mac.type <= e1000_82576) ? 16 : 8))
281 #define IGB_RX_HTHRESH 8
282 #define IGB_RX_WTHRESH ((hw->mac.type == e1000_82576 && \
283 (adapter->intr_type == IFLIB_INTR_MSIX)) ? 1 : 4)
285 #define IGB_TX_PTHRESH ((hw->mac.type == e1000_i354) ? 20 : 8)
286 #define IGB_TX_HTHRESH 1
287 #define IGB_TX_WTHRESH ((hw->mac.type != e1000_82575 && \
288 (adapter->intr_type == IFLIB_INTR_MSIX) ? 1 : 16)
291 * TDBA/RDBA should be aligned on 16 byte boundary. But TDLEN/RDLEN should be
292 * multiple of 128 bytes. So we align TDBA/RDBA on 128 byte boundary. This will
293 * also optimize cache line size effect. H/W supports up to cache line size 128.
295 #define EM_DBA_ALIGN 128
298 * See Intel 82574 Driver Programming Interface Manual, Section 10.2.6.9
300 #define TARC_COMPENSATION_MODE (1 << 7) /* Compensation Mode */
301 #define TARC_SPEED_MODE_BIT (1 << 21) /* On PCI-E MACs only */
302 #define TARC_MQ_FIX (1 << 23) | \
304 (1 << 25) /* Handle errata in MQ mode */
305 #define TARC_ERRATA_BIT (1 << 26) /* Note from errata on 82574 */
307 /* PCI Config defines */
308 #define EM_BAR_TYPE(v) ((v) & EM_BAR_TYPE_MASK)
309 #define EM_BAR_TYPE_MASK 0x00000001
310 #define EM_BAR_TYPE_MMEM 0x00000000
311 #define EM_BAR_TYPE_IO 0x00000001
312 #define EM_BAR_TYPE_FLASH 0x0014
313 #define EM_BAR_MEM_TYPE(v) ((v) & EM_BAR_MEM_TYPE_MASK)
314 #define EM_BAR_MEM_TYPE_MASK 0x00000006
315 #define EM_BAR_MEM_TYPE_32BIT 0x00000000
316 #define EM_BAR_MEM_TYPE_64BIT 0x00000004
317 #define EM_MSIX_BAR 3 /* On 82575 */
319 /* More backward compatibility */
320 #if __FreeBSD_version < 900000
321 #define SYSCTL_ADD_UQUAD SYSCTL_ADD_QUAD
324 /* Defines for printing debug information */
326 #define DEBUG_IOCTL 0
329 #define INIT_DEBUGOUT(S) if (DEBUG_INIT) printf(S "\n")
330 #define INIT_DEBUGOUT1(S, A) if (DEBUG_INIT) printf(S "\n", A)
331 #define INIT_DEBUGOUT2(S, A, B) if (DEBUG_INIT) printf(S "\n", A, B)
332 #define IOCTL_DEBUGOUT(S) if (DEBUG_IOCTL) printf(S "\n")
333 #define IOCTL_DEBUGOUT1(S, A) if (DEBUG_IOCTL) printf(S "\n", A)
334 #define IOCTL_DEBUGOUT2(S, A, B) if (DEBUG_IOCTL) printf(S "\n", A, B)
335 #define HW_DEBUGOUT(S) if (DEBUG_HW) printf(S "\n")
336 #define HW_DEBUGOUT1(S, A) if (DEBUG_HW) printf(S "\n", A)
337 #define HW_DEBUGOUT2(S, A, B) if (DEBUG_HW) printf(S "\n", A, B)
339 #define EM_MAX_SCATTER 40
340 #define EM_VFTA_SIZE 128
341 #define EM_TSO_SIZE (65535 + sizeof(struct ether_vlan_header))
342 #define EM_TSO_SEG_SIZE 4096 /* Max dma segment size */
343 #define EM_MSIX_MASK 0x01F00000 /* For 82574 use */
344 #define EM_MSIX_LINK 0x01000000 /* For 82574 use */
346 #define ETH_ADDR_LEN 6
347 #define EM_CSUM_OFFLOAD 7 /* Offload bits in mbuf flag */
348 #define IGB_CSUM_OFFLOAD 0x0E0F /* Offload bits in mbuf flag */
350 #define IGB_PKTTYPE_MASK 0x0000FFF0
351 #define IGB_DMCTLX_DCFLUSH_DIS 0x80000000 /* Disable DMA Coalesce Flush */
354 * 82574 has a nonstandard address for EIAC
355 * and since its only used in MSIX, and in
356 * the em driver only 82574 uses MSIX we can
357 * solve it just using this define.
359 #define EM_EIAC 0x000DC
361 * 82574 only reports 3 MSI-X vectors by default;
362 * defines assisting with making it report 5 are
365 #define EM_NVM_PCIE_CTRL 0x1B
366 #define EM_NVM_MSIX_N_MASK (0x7 << EM_NVM_MSIX_N_SHIFT)
367 #define EM_NVM_MSIX_N_SHIFT 7
371 struct em_int_delay_info {
372 struct adapter *adapter; /* Back-pointer to the adapter struct */
373 int offset; /* Register offset to read/write */
374 int value; /* Current value in usecs */
378 * The transmit ring, one per tx queue
381 struct adapter *adapter;
382 struct e1000_tx_desc *tx_base;
385 bool tx_tso; /* last tx was tso */
389 qidx_t tx_cidx_processed;
390 /* Interrupt resources */
392 struct resource *res;
393 unsigned long tx_irq;
395 /* Saved csum offloading context information */
404 uint32_t csum_txd_upper;
405 uint32_t csum_txd_lower; /* last field */
409 * The Receive ring, one per rx queue
412 struct adapter *adapter;
413 struct em_rx_queue *que;
416 union e1000_rx_desc_extended *rx_base;
419 /* Interrupt resources */
421 struct resource *res;
425 unsigned long rx_irq;
426 unsigned long rx_discarded;
427 unsigned long rx_packets;
428 unsigned long rx_bytes;
432 struct adapter *adapter;
434 u32 eims; /* This queue's EIMS bit */
440 struct adapter *adapter;
446 struct if_irq que_irq;
449 /* Our adapter structure */
454 if_softc_ctx_t shared;
456 #define tx_num_queues shared->isc_ntxqsets
457 #define rx_num_queues shared->isc_nrxqsets
458 #define intr_type shared->isc_intr
459 /* FreeBSD operating-system-specific structures. */
460 struct e1000_osdep osdep;
462 struct cdev *led_dev;
464 struct em_tx_queue *tx_queues;
465 struct em_rx_queue *rx_queues;
468 struct resource *memory;
469 struct resource *flash;
470 struct resource *ioport;
473 struct resource *res;
478 struct ifmedia *media;
481 int em_insert_vlan_header;
486 /* Task for FAST handling */
487 struct grouptask link_task;
492 u32 tx_process_limit;
493 u32 rx_process_limit;
496 /* Management and WOL features */
501 /* Multicast array memory */
505 ** Shadow VFTA table, this is needed because
506 ** the real vlan filter table gets cleared during
507 ** a soft reset and the driver needs to be able
510 u32 shadow_vfta[EM_VFTA_SIZE];
512 /* Info about the interface */
524 struct em_int_delay_info tx_int_delay;
525 struct em_int_delay_info tx_abs_int_delay;
526 struct em_int_delay_info rx_int_delay;
527 struct em_int_delay_info rx_abs_int_delay;
528 struct em_int_delay_info tx_itr;
530 /* Misc stats maintained by the driver */
531 unsigned long dropped_pkts;
532 unsigned long link_irq;
533 unsigned long mbuf_defrag_failed;
534 unsigned long no_tx_dma_setup;
535 unsigned long no_tx_map_avail;
536 unsigned long rx_overruns;
537 unsigned long watchdog_events;
539 struct e1000_hw_stats stats;
543 /********************************************************************************
546 * This array contains the list of Subvendor/Subdevice IDs on which the driver
549 ********************************************************************************/
550 typedef struct _em_vendor_info_t {
551 unsigned int vendor_id;
552 unsigned int device_id;
553 unsigned int subvendor_id;
554 unsigned int subdevice_id;
558 void em_dump_rs(struct adapter *);
560 #define EM_RSSRK_SIZE 4
561 #define EM_RSSRK_VAL(key, i) (key[(i) * EM_RSSRK_SIZE] | \
562 key[(i) * EM_RSSRK_SIZE + 1] << 8 | \
563 key[(i) * EM_RSSRK_SIZE + 2] << 16 | \
564 key[(i) * EM_RSSRK_SIZE + 3] << 24)
565 #endif /* _EM_H_DEFINED_ */