2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2016 Nicole Graziano <nicole@nextbsd.org>
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 #include "opt_inet6.h"
34 #ifdef HAVE_KERNEL_OPTION_HEADERS
35 #include "opt_device_polling.h"
38 #include <sys/param.h>
39 #include <sys/systm.h>
41 #include <sys/types.h>
44 #if __FreeBSD_version >= 800000
45 #include <sys/buf_ring.h>
48 #include <sys/endian.h>
49 #include <sys/kernel.h>
50 #include <sys/kthread.h>
51 #include <sys/malloc.h>
53 #include <sys/module.h>
56 #include <sys/socket.h>
57 #include <sys/sockio.h>
58 #include <sys/sysctl.h>
59 #include <sys/taskqueue.h>
60 #include <sys/eventhandler.h>
61 #include <machine/bus.h>
62 #include <machine/resource.h>
65 #include <net/ethernet.h>
67 #include <net/if_var.h>
68 #include <net/if_arp.h>
69 #include <net/if_dl.h>
70 #include <net/if_media.h>
71 #include <net/iflib.h>
73 #include <net/if_types.h>
74 #include <net/if_vlan_var.h>
76 #include <netinet/in_systm.h>
77 #include <netinet/in.h>
78 #include <netinet/if_ether.h>
79 #include <netinet/ip.h>
80 #include <netinet/ip6.h>
81 #include <netinet/tcp.h>
82 #include <netinet/udp.h>
84 #include <machine/in_cksum.h>
85 #include <dev/led/led.h>
86 #include <dev/pci/pcivar.h>
87 #include <dev/pci/pcireg.h>
89 #include "e1000_api.h"
90 #include "e1000_82571.h"
94 #ifndef _EM_H_DEFINED_
95 #define _EM_H_DEFINED_
101 * EM_MAX_TXD: Maximum number of Transmit Descriptors
102 * Valid Range: 80-256 for 82542 and 82543-based adapters
104 * Default Value: 1024
105 * This value is the number of transmit descriptors allocated by the driver.
106 * Increasing this value allows the driver to queue more transmits. Each
107 * descriptor is 16 bytes.
108 * Since TDLEN should be multiple of 128bytes, the number of transmit
109 * desscriptors should meet the following condition.
110 * (num_tx_desc * sizeof(struct e1000_tx_desc)) % 128 == 0
112 #define EM_MIN_TXD 128
113 #define EM_MAX_TXD 4096
114 #define EM_DEFAULT_TXD 1024
115 #define EM_DEFAULT_MULTI_TXD 4096
116 #define IGB_MAX_TXD 4096
119 * EM_MAX_RXD - Maximum number of receive Descriptors
120 * Valid Range: 80-256 for 82542 and 82543-based adapters
122 * Default Value: 1024
123 * This value is the number of receive descriptors allocated by the driver.
124 * Increasing this value allows the driver to buffer more incoming packets.
125 * Each descriptor is 16 bytes. A receive buffer is also allocated for each
126 * descriptor. The maximum MTU size is 16110.
127 * Since TDLEN should be multiple of 128bytes, the number of transmit
128 * desscriptors should meet the following condition.
129 * (num_tx_desc * sizeof(struct e1000_tx_desc)) % 128 == 0
131 #define EM_MIN_RXD 128
132 #define EM_MAX_RXD 4096
133 #define EM_DEFAULT_RXD 1024
134 #define EM_DEFAULT_MULTI_RXD 4096
135 #define IGB_MAX_RXD 4096
138 * EM_TIDV - Transmit Interrupt Delay Value
139 * Valid Range: 0-65535 (0=off)
141 * This value delays the generation of transmit interrupts in units of
142 * 1.024 microseconds. Transmit interrupt reduction can improve CPU
143 * efficiency if properly tuned for specific network traffic. If the
144 * system is reporting dropped transmits, this value may be set too high
145 * causing the driver to run out of available transmit descriptors.
150 * EM_TADV - Transmit Absolute Interrupt Delay Value
151 * (Not valid for 82542/82543/82544)
152 * Valid Range: 0-65535 (0=off)
154 * This value, in units of 1.024 microseconds, limits the delay in which a
155 * transmit interrupt is generated. Useful only if EM_TIDV is non-zero,
156 * this value ensures that an interrupt is generated after the initial
157 * packet is sent on the wire within the set amount of time. Proper tuning,
158 * along with EM_TIDV, may improve traffic throughput in specific
159 * network conditions.
164 * EM_RDTR - Receive Interrupt Delay Timer (Packet Timer)
165 * Valid Range: 0-65535 (0=off)
167 * This value delays the generation of receive interrupts in units of 1.024
168 * microseconds. Receive interrupt reduction can improve CPU efficiency if
169 * properly tuned for specific network traffic. Increasing this value adds
170 * extra latency to frame reception and can end up decreasing the throughput
171 * of TCP traffic. If the system is reporting dropped receives, this value
172 * may be set too high, causing the driver to run out of available receive
175 * CAUTION: When setting EM_RDTR to a value other than 0, adapters
176 * may hang (stop transmitting) under certain network conditions.
177 * If this occurs a WATCHDOG message is logged in the system
178 * event log. In addition, the controller is automatically reset,
179 * restoring the network connection. To eliminate the potential
180 * for the hang ensure that EM_RDTR is set to 0.
185 * Receive Interrupt Absolute Delay Timer (Not valid for 82542/82543/82544)
186 * Valid Range: 0-65535 (0=off)
188 * This value, in units of 1.024 microseconds, limits the delay in which a
189 * receive interrupt is generated. Useful only if EM_RDTR is non-zero,
190 * this value ensures that an interrupt is generated after the initial
191 * packet is received within the set amount of time. Proper tuning,
192 * along with EM_RDTR, may improve traffic throughput in specific network
198 * This parameter controls whether or not autonegotation is enabled.
199 * 0 - Disable autonegotiation
200 * 1 - Enable autonegotiation
202 #define DO_AUTO_NEG 1
205 * This parameter control whether or not the driver will wait for
206 * autonegotiation to complete.
207 * 1 - Wait for autonegotiation to complete
208 * 0 - Don't wait for autonegotiation to complete
210 #define WAIT_FOR_AUTO_NEG_DEFAULT 0
212 /* Tunables -- End */
214 #define AUTONEG_ADV_DEFAULT (ADVERTISE_10_HALF | ADVERTISE_10_FULL | \
215 ADVERTISE_100_HALF | ADVERTISE_100_FULL | \
218 #define AUTO_ALL_MODES 0
220 /* PHY master/slave setting */
221 #define EM_MASTER_SLAVE e1000_ms_hw_default
224 * Micellaneous constants
226 #define EM_VENDOR_ID 0x8086
227 #define EM_FLASH 0x0014
229 #define EM_JUMBO_PBA 0x00000028
230 #define EM_DEFAULT_PBA 0x00000030
231 #define EM_SMARTSPEED_DOWNSHIFT 3
232 #define EM_SMARTSPEED_MAX 15
233 #define EM_MAX_LOOP 10
235 #define MAX_NUM_MULTICAST_ADDRESSES 128
236 #define PCI_ANY_ID (~0U)
237 #define ETHER_ALIGN 2
238 #define EM_FC_PAUSE_TIME 0x0680
239 #define EM_EEPROM_APME 0x400;
240 #define EM_82544_APME 0x0004;
243 /* Support AutoMediaDetect for Marvell M88 PHY in i354 */
244 #define IGB_MEDIA_RESET (1 << 0)
246 /* Define the starting Interrupt rate per Queue */
247 #define IGB_INTS_PER_SEC 8000
248 #define IGB_DEFAULT_ITR ((1000000/IGB_INTS_PER_SEC) << 2)
250 #define IGB_LINK_ITR 2000
251 #define I210_LINK_DELAY 1000
253 #define IGB_MAX_SCATTER 40
254 #define IGB_VFTA_SIZE 128
255 #define IGB_BR_SIZE 4096 /* ring buf size */
256 #define IGB_TSO_SIZE (65535 + sizeof(struct ether_vlan_header))
257 #define IGB_TSO_SEG_SIZE 4096 /* Max dma segment size */
258 #define IGB_TXPBSIZE 20408
259 #define IGB_HDR_BUF 128
260 #define IGB_PKTTYPE_MASK 0x0000FFF0
261 #define IGB_DMCTLX_DCFLUSH_DIS 0x80000000 /* Disable DMA Coalesce Flush */
264 * Driver state logic for the detection of a hung state
265 * in hardware. Set TX_HUNG whenever a TX packet is used
266 * (data is sent) and clear it when txeof() is invoked if
267 * any descriptors from the ring are cleaned/reclaimed.
268 * Increment internal counter if no descriptors are cleaned
269 * and compare to TX_MAXTRIES. When counter > TX_MAXTRIES,
272 #define EM_TX_IDLE 0x00000000
273 #define EM_TX_BUSY 0x00000001
274 #define EM_TX_HUNG 0x80000000
275 #define EM_TX_MAXTRIES 10
277 #define PCICFG_DESC_RING_STATUS 0xe4
278 #define FLUSH_DESC_REQUIRED 0x100
281 #define IGB_RX_PTHRESH ((hw->mac.type == e1000_i354) ? 12 : \
282 ((hw->mac.type <= e1000_82576) ? 16 : 8))
283 #define IGB_RX_HTHRESH 8
284 #define IGB_RX_WTHRESH ((hw->mac.type == e1000_82576 && \
285 (adapter->intr_type == IFLIB_INTR_MSIX)) ? 1 : 4)
287 #define IGB_TX_PTHRESH ((hw->mac.type == e1000_i354) ? 20 : 8)
288 #define IGB_TX_HTHRESH 1
289 #define IGB_TX_WTHRESH ((hw->mac.type != e1000_82575 && \
290 (adapter->intr_type == IFLIB_INTR_MSIX) ? 1 : 16)
293 * TDBA/RDBA should be aligned on 16 byte boundary. But TDLEN/RDLEN should be
294 * multiple of 128 bytes. So we align TDBA/RDBA on 128 byte boundary. This will
295 * also optimize cache line size effect. H/W supports up to cache line size 128.
297 #define EM_DBA_ALIGN 128
300 * See Intel 82574 Driver Programming Interface Manual, Section 10.2.6.9
302 #define TARC_COMPENSATION_MODE (1 << 7) /* Compensation Mode */
303 #define TARC_SPEED_MODE_BIT (1 << 21) /* On PCI-E MACs only */
304 #define TARC_MQ_FIX (1 << 23) | \
306 (1 << 25) /* Handle errata in MQ mode */
307 #define TARC_ERRATA_BIT (1 << 26) /* Note from errata on 82574 */
309 /* PCI Config defines */
310 #define EM_BAR_TYPE(v) ((v) & EM_BAR_TYPE_MASK)
311 #define EM_BAR_TYPE_MASK 0x00000001
312 #define EM_BAR_TYPE_MMEM 0x00000000
313 #define EM_BAR_TYPE_IO 0x00000001
314 #define EM_BAR_TYPE_FLASH 0x0014
315 #define EM_BAR_MEM_TYPE(v) ((v) & EM_BAR_MEM_TYPE_MASK)
316 #define EM_BAR_MEM_TYPE_MASK 0x00000006
317 #define EM_BAR_MEM_TYPE_32BIT 0x00000000
318 #define EM_BAR_MEM_TYPE_64BIT 0x00000004
319 #define EM_MSIX_BAR 3 /* On 82575 */
321 /* More backward compatibility */
322 #if __FreeBSD_version < 900000
323 #define SYSCTL_ADD_UQUAD SYSCTL_ADD_QUAD
326 /* Defines for printing debug information */
328 #define DEBUG_IOCTL 0
331 #define INIT_DEBUGOUT(S) if (DEBUG_INIT) printf(S "\n")
332 #define INIT_DEBUGOUT1(S, A) if (DEBUG_INIT) printf(S "\n", A)
333 #define INIT_DEBUGOUT2(S, A, B) if (DEBUG_INIT) printf(S "\n", A, B)
334 #define IOCTL_DEBUGOUT(S) if (DEBUG_IOCTL) printf(S "\n")
335 #define IOCTL_DEBUGOUT1(S, A) if (DEBUG_IOCTL) printf(S "\n", A)
336 #define IOCTL_DEBUGOUT2(S, A, B) if (DEBUG_IOCTL) printf(S "\n", A, B)
337 #define HW_DEBUGOUT(S) if (DEBUG_HW) printf(S "\n")
338 #define HW_DEBUGOUT1(S, A) if (DEBUG_HW) printf(S "\n", A)
339 #define HW_DEBUGOUT2(S, A, B) if (DEBUG_HW) printf(S "\n", A, B)
341 #define EM_MAX_SCATTER 40
342 #define EM_VFTA_SIZE 128
343 #define EM_TSO_SIZE (65535 + sizeof(struct ether_vlan_header))
344 #define EM_TSO_SEG_SIZE 4096 /* Max dma segment size */
345 #define EM_MSIX_MASK 0x01F00000 /* For 82574 use */
346 #define EM_MSIX_LINK 0x01000000 /* For 82574 use */
348 #define ETH_ADDR_LEN 6
349 #define EM_CSUM_OFFLOAD 7 /* Offload bits in mbuf flag */
350 #define IGB_CSUM_OFFLOAD 0x0E0F /* Offload bits in mbuf flag */
352 #define IGB_PKTTYPE_MASK 0x0000FFF0
353 #define IGB_DMCTLX_DCFLUSH_DIS 0x80000000 /* Disable DMA Coalesce Flush */
356 * 82574 has a nonstandard address for EIAC
357 * and since its only used in MSIX, and in
358 * the em driver only 82574 uses MSIX we can
359 * solve it just using this define.
361 #define EM_EIAC 0x000DC
363 * 82574 only reports 3 MSI-X vectors by default;
364 * defines assisting with making it report 5 are
367 #define EM_NVM_PCIE_CTRL 0x1B
368 #define EM_NVM_MSIX_N_MASK (0x7 << EM_NVM_MSIX_N_SHIFT)
369 #define EM_NVM_MSIX_N_SHIFT 7
373 struct em_int_delay_info {
374 struct adapter *adapter; /* Back-pointer to the adapter struct */
375 int offset; /* Register offset to read/write */
376 int value; /* Current value in usecs */
380 * The transmit ring, one per tx queue
383 struct adapter *adapter;
384 struct e1000_tx_desc *tx_base;
387 bool tx_tso; /* last tx was tso */
391 qidx_t tx_cidx_processed;
392 /* Interrupt resources */
394 struct resource *res;
395 unsigned long tx_irq;
397 /* Saved csum offloading context information */
406 uint32_t csum_txd_upper;
407 uint32_t csum_txd_lower; /* last field */
411 * The Receive ring, one per rx queue
414 struct adapter *adapter;
415 struct em_rx_queue *que;
418 union e1000_rx_desc_extended *rx_base;
421 /* Interrupt resources */
423 struct resource *res;
427 unsigned long rx_irq;
428 unsigned long rx_discarded;
429 unsigned long rx_packets;
430 unsigned long rx_bytes;
434 struct adapter *adapter;
436 u32 eims; /* This queue's EIMS bit */
442 struct adapter *adapter;
448 struct if_irq que_irq;
451 /* Our adapter structure */
456 if_softc_ctx_t shared;
458 #define tx_num_queues shared->isc_ntxqsets
459 #define rx_num_queues shared->isc_nrxqsets
460 #define intr_type shared->isc_intr
461 /* FreeBSD operating-system-specific structures. */
462 struct e1000_osdep osdep;
464 struct cdev *led_dev;
466 struct em_tx_queue *tx_queues;
467 struct em_rx_queue *rx_queues;
470 struct resource *memory;
471 struct resource *flash;
472 struct resource *ioport;
475 struct resource *res;
480 struct ifmedia *media;
483 int em_insert_vlan_header;
488 /* Task for FAST handling */
489 struct grouptask link_task;
494 u32 tx_process_limit;
495 u32 rx_process_limit;
498 /* Management and WOL features */
503 /* Multicast array memory */
507 ** Shadow VFTA table, this is needed because
508 ** the real vlan filter table gets cleared during
509 ** a soft reset and the driver needs to be able
512 u32 shadow_vfta[EM_VFTA_SIZE];
514 /* Info about the interface */
526 struct em_int_delay_info tx_int_delay;
527 struct em_int_delay_info tx_abs_int_delay;
528 struct em_int_delay_info rx_int_delay;
529 struct em_int_delay_info rx_abs_int_delay;
530 struct em_int_delay_info tx_itr;
532 /* Misc stats maintained by the driver */
533 unsigned long dropped_pkts;
534 unsigned long link_irq;
535 unsigned long mbuf_defrag_failed;
536 unsigned long no_tx_dma_setup;
537 unsigned long no_tx_map_avail;
538 unsigned long rx_overruns;
539 unsigned long watchdog_events;
541 struct e1000_hw_stats stats;
545 /********************************************************************************
548 * This array contains the list of Subvendor/Subdevice IDs on which the driver
551 ********************************************************************************/
552 typedef struct _em_vendor_info_t {
553 unsigned int vendor_id;
554 unsigned int device_id;
555 unsigned int subvendor_id;
556 unsigned int subdevice_id;
560 void em_dump_rs(struct adapter *);
562 #define EM_RSSRK_SIZE 4
563 #define EM_RSSRK_VAL(key, i) (key[(i) * EM_RSSRK_SIZE] | \
564 key[(i) * EM_RSSRK_SIZE + 1] << 8 | \
565 key[(i) * EM_RSSRK_SIZE + 2] << 16 | \
566 key[(i) * EM_RSSRK_SIZE + 3] << 24)
567 #endif /* _EM_H_DEFINED_ */