2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright (c) 1995, David Greenman
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice unmodified, this list of conditions, and the following
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 #include <sys/cdefs.h>
31 __FBSDID("$FreeBSD$");
34 * Device driver for National Semiconductor DS8390/WD83C690 based ethernet
35 * adapters. By David Greenman, 29-April-1993
37 * Currently supports the Western Digital/SMC 8003 and 8013 series,
38 * the SMC Elite Ultra (8216), the 3Com 3c503, the NE1000 and NE2000,
39 * and a variety of similar clones.
45 #include <sys/param.h>
46 #include <sys/systm.h>
47 #include <sys/sockio.h>
48 #include <sys/kernel.h>
49 #include <sys/malloc.h>
51 #include <sys/socket.h>
52 #include <sys/sysctl.h>
53 #include <sys/syslog.h>
57 #include <machine/bus.h>
59 #include <machine/resource.h>
61 #include <net/ethernet.h>
63 #include <net/if_var.h>
64 #include <net/if_arp.h>
65 #include <net/if_dl.h>
66 #include <net/if_mib.h>
67 #include <net/if_media.h>
68 #include <net/if_types.h>
72 #include <dev/ed/if_edreg.h>
73 #include <dev/ed/if_edvar.h>
76 devclass_t ed_devclass;
78 static void ed_init(void *);
79 static void ed_init_locked(struct ed_softc *);
80 static int ed_ioctl(struct ifnet *, u_long, caddr_t);
81 static void ed_start(struct ifnet *);
82 static void ed_start_locked(struct ifnet *);
83 static void ed_reset(struct ifnet *);
84 static void ed_tick(void *);
85 static void ed_watchdog(struct ed_softc *);
87 static void ed_ds_getmcaf(struct ed_softc *, uint32_t *);
89 static void ed_get_packet(struct ed_softc *, bus_size_t, u_short);
90 static void ed_stop_hw(struct ed_softc *sc);
92 static __inline void ed_rint(struct ed_softc *);
93 static __inline void ed_xmit(struct ed_softc *);
94 static __inline void ed_ring_copy(struct ed_softc *, bus_size_t, char *,
97 static void ed_setrcr(struct ed_softc *);
100 * Generic probe routine for testing for the existance of a DS8390.
101 * Must be called after the NIC has just been reset. This routine
102 * works by looking at certain register values that are guaranteed
103 * to be initialized a certain way after power-up or reset. Seems
104 * not to currently work on the 83C690.
108 * Register reset bits set bits
109 * Command Register (CR) TXP, STA RD2, STP
110 * Interrupt Status (ISR) RST
111 * Interrupt Mask (IMR) All bits
112 * Data Control (DCR) LAS
113 * Transmit Config. (TCR) LB1, LB0
115 * We only look at the CR and ISR registers, however, because looking at
116 * the others would require changing register pages (which would be
117 * intrusive if this isn't an 8390).
119 * Return 1 if 8390 was found, 0 if not.
123 ed_probe_generic8390(struct ed_softc *sc)
125 if ((ed_nic_inb(sc, ED_P0_CR) &
126 (ED_CR_RD2 | ED_CR_TXP | ED_CR_STA | ED_CR_STP)) !=
127 (ED_CR_RD2 | ED_CR_STP))
129 if ((ed_nic_inb(sc, ED_P0_ISR) & ED_ISR_RST) != ED_ISR_RST)
136 ed_disable_16bit_access(struct ed_softc *sc)
139 * Disable 16 bit access to shared memory
141 if (sc->isa16bit && sc->vendor == ED_VENDOR_WD_SMC) {
142 if (sc->chip_type == ED_CHIP_TYPE_WD790)
143 ed_asic_outb(sc, ED_WD_MSR, 0x00);
144 ed_asic_outb(sc, ED_WD_LAAR,
145 sc->wd_laar_proto & ~ED_WD_LAAR_M16EN);
150 ed_enable_16bit_access(struct ed_softc *sc)
152 if (sc->isa16bit && sc->vendor == ED_VENDOR_WD_SMC) {
153 ed_asic_outb(sc, ED_WD_LAAR,
154 sc->wd_laar_proto | ED_WD_LAAR_M16EN);
155 if (sc->chip_type == ED_CHIP_TYPE_WD790)
156 ed_asic_outb(sc, ED_WD_MSR, ED_WD_MSR_MENB);
161 * Allocate a port resource with the given resource id.
164 ed_alloc_port(device_t dev, int rid, int size)
166 struct ed_softc *sc = device_get_softc(dev);
167 struct resource *res;
169 res = bus_alloc_resource_anywhere(dev, SYS_RES_IOPORT, &rid,
173 sc->port_used = size;
174 sc->port_bst = rman_get_bustag(res);
175 sc->port_bsh = rman_get_bushandle(res);
182 * Allocate a memory resource with the given resource id.
185 ed_alloc_memory(device_t dev, int rid, int size)
187 struct ed_softc *sc = device_get_softc(dev);
188 struct resource *res;
190 res = bus_alloc_resource_anywhere(dev, SYS_RES_MEMORY, &rid,
195 sc->mem_bst = rman_get_bustag(res);
196 sc->mem_bsh = rman_get_bushandle(res);
203 * Allocate an irq resource with the given resource id.
206 ed_alloc_irq(device_t dev, int rid, int flags)
208 struct ed_softc *sc = device_get_softc(dev);
209 struct resource *res;
211 res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE | flags);
220 * Release all resources
223 ed_release_resources(device_t dev)
225 struct ed_softc *sc = device_get_softc(dev);
228 bus_free_resource(dev, SYS_RES_IOPORT, sc->port_res);
230 bus_free_resource(dev, SYS_RES_IOPORT, sc->port_res2);
232 bus_free_resource(dev, SYS_RES_MEMORY, sc->mem_res);
234 bus_free_resource(dev, SYS_RES_IRQ, sc->irq_res);
244 * Install interface into kernel networking data structures
247 ed_attach(device_t dev)
249 struct ed_softc *sc = device_get_softc(dev);
254 ifp = sc->ifp = if_alloc(IFT_ETHER);
256 device_printf(dev, "can not if_alloc()\n");
261 if (sc->readmem == NULL) {
262 if (sc->mem_shared) {
264 sc->readmem = ed_shmem_readmem16;
266 sc->readmem = ed_shmem_readmem8;
268 sc->readmem = ed_pio_readmem;
271 if (sc->sc_write_mbufs == NULL) {
272 device_printf(dev, "No write mbufs routine set\n");
276 callout_init_mtx(&sc->tick_ch, ED_MUTEX(sc), 0);
278 * Set interface to stopped condition (reset)
283 * Initialize ifnet structure
286 if_initname(ifp, device_get_name(dev), device_get_unit(dev));
287 ifp->if_start = ed_start;
288 ifp->if_ioctl = ed_ioctl;
289 ifp->if_init = ed_init;
290 IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen);
291 ifp->if_snd.ifq_drv_maxlen = ifqmaxlen;
292 IFQ_SET_READY(&ifp->if_snd);
293 ifp->if_linkmib = &sc->mibdata;
294 ifp->if_linkmiblen = sizeof sc->mibdata;
296 * XXX - should do a better job.
298 if (sc->chip_type == ED_CHIP_TYPE_WD790)
299 sc->mibdata.dot3StatsEtherChipSet =
300 DOT3CHIPSET(dot3VendorWesternDigital,
301 dot3ChipSetWesternDigital83C790);
303 sc->mibdata.dot3StatsEtherChipSet =
304 DOT3CHIPSET(dot3VendorNational,
305 dot3ChipSetNational8390);
306 sc->mibdata.dot3Compliance = DOT3COMPLIANCE_COLLS;
308 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
310 * Set default state for LINK2 flag (used to disable the
311 * tranceiver for AUI operation), based on config option.
312 * We only set this flag before we attach the device, so there's
313 * no race. It is convenient to allow users to turn this off
314 * by default in the kernel config, but given our more advanced
315 * boot time configuration options, this might no longer be needed.
317 if (device_get_flags(dev) & ED_FLAGS_DISABLE_TRANCEIVER)
318 ifp->if_flags |= IFF_LINK2;
321 * Attach the interface
323 ether_ifattach(ifp, sc->enaddr);
324 /* device attach does transition from UNCONFIGURED to IDLE state */
326 sc->tx_mem = sc->txb_cnt * ED_PAGE_SIZE * ED_TXBUF_SIZE;
327 sc->rx_mem = (sc->rec_page_stop - sc->rec_page_start) * ED_PAGE_SIZE;
328 SYSCTL_ADD_STRING(device_get_sysctl_ctx(dev),
329 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
330 0, "type", CTLFLAG_RD, sc->type_str, 0,
331 "Type of chip in card");
332 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev),
333 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
334 1, "TxMem", CTLFLAG_RD, &sc->tx_mem, 0,
335 "Memory set aside for transmitting packets");
336 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev),
337 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
338 2, "RxMem", CTLFLAG_RD, &sc->rx_mem, 0,
339 "Memory set aside for receiving packets");
340 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev),
341 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
342 3, "Mem", CTLFLAG_RD, &sc->mem_size, 0,
343 "Total Card Memory");
345 if (sc->type_str && (*sc->type_str != 0))
346 device_printf(dev, "type %s ", sc->type_str);
348 device_printf(dev, "type unknown (0x%x) ", sc->type);
351 if (sc->vendor == ED_VENDOR_HP)
353 (sc->hpp_id & ED_HPP_ID_16_BIT_ACCESS) ?
355 sc->hpp_mem_start ? "memory mapped" : "regular");
358 printf("%s", sc->isa16bit ? "(16 bit)" : "(8 bit)");
360 #if defined(ED_HPP) || defined(ED_3C503)
361 printf("%s", (((sc->vendor == ED_VENDOR_3COM) ||
362 (sc->vendor == ED_VENDOR_HP)) &&
363 (ifp->if_flags & IFF_LINK2)) ?
364 " tranceiver disabled" : "");
369 gone_by_fcp101_dev(dev);
375 * Detach the driver from the hardware and other systems in the kernel.
378 ed_detach(device_t dev)
380 struct ed_softc *sc = device_get_softc(dev);
381 struct ifnet *ifp = sc->ifp;
383 if (mtx_initialized(ED_MUTEX(sc)))
384 ED_ASSERT_UNLOCKED(sc);
387 if (bus_child_present(dev))
389 ifp->if_drv_flags &= ~IFF_DRV_RUNNING;
392 callout_drain(&sc->tick_ch);
394 if (sc->irq_res != NULL && sc->irq_handle)
395 bus_teardown_intr(dev, sc->irq_res, sc->irq_handle);
396 ed_release_resources(dev);
398 device_delete_child(dev, sc->miibus);
399 if (mtx_initialized(ED_MUTEX(sc)))
401 bus_generic_detach(dev);
409 ed_reset(struct ifnet *ifp)
411 struct ed_softc *sc = ifp->if_softc;
413 ED_ASSERT_LOCKED(sc);
415 * Stop interface and re-initialize.
422 ed_stop_hw(struct ed_softc *sc)
427 * Stop everything on the interface, and select page 0 registers.
429 ed_nic_barrier(sc, ED_P0_CR, 1,
430 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
431 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STP);
432 ed_nic_barrier(sc, ED_P0_CR, 1,
433 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
436 * Wait for interface to enter stopped state, but limit # of checks to
437 * 'n' (about 5ms). It shouldn't even take 5us on modern DS8390's, but
438 * just in case it's an old one.
440 * The AX88x90 chips don't seem to implement this behavor. The
441 * datasheets say it is only turned on when the chip enters a RESET
442 * state and is silent about behavior for the stopped state we just
445 if (sc->chip_type == ED_CHIP_TYPE_AX88190 ||
446 sc->chip_type == ED_CHIP_TYPE_AX88790)
448 while (((ed_nic_inb(sc, ED_P0_ISR) & ED_ISR_RST) == 0) && --n)
451 device_printf(sc->dev, "ed_stop_hw RST never set\n");
455 * Take interface offline.
458 ed_stop(struct ed_softc *sc)
460 ED_ASSERT_LOCKED(sc);
461 callout_stop(&sc->tick_ch);
466 * Periodic timer used to drive the watchdog and attachment-specific
475 ED_ASSERT_LOCKED(sc);
478 if (sc->tx_timer != 0 && --sc->tx_timer == 0)
480 callout_reset(&sc->tick_ch, hz, ed_tick, sc);
484 * Device timeout/watchdog routine. Entered if the device neglects to
485 * generate an interrupt after a transmit has been started on it.
488 ed_watchdog(struct ed_softc *sc)
493 log(LOG_ERR, "%s: device timeout\n", ifp->if_xname);
494 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1);
505 struct ed_softc *sc = xsc;
507 ED_ASSERT_UNLOCKED(sc);
514 ed_init_locked(struct ed_softc *sc)
516 struct ifnet *ifp = sc->ifp;
519 ED_ASSERT_LOCKED(sc);
522 * Initialize the NIC in the exact order outlined in the NS manual.
523 * This init procedure is "mandatory"...don't change what or when
527 /* reset transmitter flags */
535 /* This variable is used below - don't move this assignment */
536 sc->next_packet = sc->rec_page_start + 1;
539 * Set interface for page 0, Remote DMA complete, Stopped
541 ed_nic_barrier(sc, ED_P0_CR, 1,
542 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
543 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STP);
544 ed_nic_barrier(sc, ED_P0_CR, 1,
545 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
549 * Set FIFO threshold to 8, No auto-init Remote DMA, byte
550 * order=80x86, word-wide DMA xfers,
552 ed_nic_outb(sc, ED_P0_DCR, ED_DCR_FT1 | ED_DCR_WTS | ED_DCR_LS);
555 * Same as above, but byte-wide DMA xfers
557 ed_nic_outb(sc, ED_P0_DCR, ED_DCR_FT1 | ED_DCR_LS);
560 * Clear Remote Byte Count Registers
562 ed_nic_outb(sc, ED_P0_RBCR0, 0);
563 ed_nic_outb(sc, ED_P0_RBCR1, 0);
566 * For the moment, don't store incoming packets in memory.
568 ed_nic_outb(sc, ED_P0_RCR, ED_RCR_MON);
571 * Place NIC in internal loopback mode
573 ed_nic_outb(sc, ED_P0_TCR, ED_TCR_LB0);
576 * Initialize transmit/receive (ring-buffer) Page Start
578 ed_nic_outb(sc, ED_P0_TPSR, sc->tx_page_start);
579 ed_nic_outb(sc, ED_P0_PSTART, sc->rec_page_start);
580 /* Set lower bits of byte addressable framing to 0 */
581 if (sc->chip_type == ED_CHIP_TYPE_WD790)
582 ed_nic_outb(sc, 0x09, 0);
585 * Initialize Receiver (ring-buffer) Page Stop and Boundry
587 ed_nic_outb(sc, ED_P0_PSTOP, sc->rec_page_stop);
588 ed_nic_outb(sc, ED_P0_BNRY, sc->rec_page_start);
591 * Clear all interrupts. A '1' in each bit position clears the
592 * corresponding flag.
594 ed_nic_outb(sc, ED_P0_ISR, 0xff);
597 * Enable the following interrupts: receive/transmit complete,
598 * receive/transmit error, and Receiver OverWrite.
600 * Counter overflow and Remote DMA complete are *not* enabled.
602 ed_nic_outb(sc, ED_P0_IMR,
603 ED_IMR_PRXE | ED_IMR_PTXE | ED_IMR_RXEE | ED_IMR_TXEE | ED_IMR_OVWE);
606 * Program Command Register for page 1
608 ed_nic_barrier(sc, ED_P0_CR, 1,
609 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
610 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_PAGE_1 | ED_CR_STP);
611 ed_nic_barrier(sc, ED_P0_CR, 1,
612 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
615 * Copy out our station address
617 for (i = 0; i < ETHER_ADDR_LEN; ++i)
618 ed_nic_outb(sc, ED_P1_PAR(i), IF_LLADDR(sc->ifp)[i]);
621 * Set Current Page pointer to next_packet (initialized above)
623 ed_nic_outb(sc, ED_P1_CURR, sc->next_packet);
626 * Program Receiver Configuration Register and multicast filter. CR is
627 * set to page 0 on return.
632 * Take interface out of loopback
634 ed_nic_outb(sc, ED_P0_TCR, 0);
640 * Set 'running' flag, and clear output active flag.
642 ifp->if_drv_flags |= IFF_DRV_RUNNING;
643 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
646 * ...and attempt to start output
648 ed_start_locked(ifp);
650 callout_reset(&sc->tick_ch, hz, ed_tick, sc);
654 * This routine actually starts the transmission on the interface
657 ed_xmit(struct ed_softc *sc)
661 len = sc->txb_len[sc->txb_next_tx];
664 * Set NIC for page 0 register access
666 ed_nic_barrier(sc, ED_P0_CR, 1,
667 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
668 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STA);
669 ed_nic_barrier(sc, ED_P0_CR, 1,
670 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
673 * Set TX buffer start page
675 ed_nic_outb(sc, ED_P0_TPSR, sc->tx_page_start +
676 sc->txb_next_tx * ED_TXBUF_SIZE);
681 ed_nic_outb(sc, ED_P0_TBCR0, len);
682 ed_nic_outb(sc, ED_P0_TBCR1, len >> 8);
685 * Set page 0, Remote DMA complete, Transmit Packet, and *Start*
687 ed_nic_barrier(sc, ED_P0_CR, 1,
688 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
689 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_TXP | ED_CR_STA);
690 ed_nic_barrier(sc, ED_P0_CR, 1,
691 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
695 * Point to next transmit buffer slot and wrap if necessary.
698 if (sc->txb_next_tx == sc->txb_cnt)
702 * Set a timer just in case we never hear from the board again
708 * Start output on interface.
709 * We make two assumptions here:
710 * 1) that the current priority is set to splimp _before_ this code
711 * is called *and* is returned to the appropriate priority after
713 * 2) that the IFF_DRV_OACTIVE flag is checked before this code is called
714 * (i.e. that the output part of the interface is idle)
717 ed_start(struct ifnet *ifp)
719 struct ed_softc *sc = ifp->if_softc;
721 ED_ASSERT_UNLOCKED(sc);
723 ed_start_locked(ifp);
728 ed_start_locked(struct ifnet *ifp)
730 struct ed_softc *sc = ifp->if_softc;
735 ED_ASSERT_LOCKED(sc);
739 * First, see if there are buffered packets and an idle transmitter -
740 * should never happen at this point.
742 if (sc->txb_inuse && (sc->xmit_busy == 0)) {
743 printf("ed: packets buffered, but transmitter idle\n");
748 * See if there is room to put another packet in the buffer.
750 if (sc->txb_inuse == sc->txb_cnt) {
753 * No room. Indicate this to the outside world and exit.
755 ifp->if_drv_flags |= IFF_DRV_OACTIVE;
758 IFQ_DRV_DEQUEUE(&ifp->if_snd, m);
762 * We are using the !OACTIVE flag to indicate to the outside
763 * world that we can accept an additional packet rather than
764 * that the transmitter is _actually_ active. Indeed, the
765 * transmitter may be active, but if we haven't filled all the
766 * buffers with data then we still want to accept more.
768 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
773 * Copy the mbuf chain into the transmit buffer
777 /* txb_new points to next open buffer slot */
778 buffer = sc->mem_start + (sc->txb_new * ED_TXBUF_SIZE * ED_PAGE_SIZE);
780 len = sc->sc_write_mbufs(sc, m, buffer);
786 sc->txb_len[sc->txb_new] = max(len, (ETHER_MIN_LEN-ETHER_CRC_LEN));
791 * Point to next buffer slot and wrap if necessary.
794 if (sc->txb_new == sc->txb_cnt)
797 if (sc->xmit_busy == 0)
801 * Tap off here if there is a bpf listener.
808 * Loop back to the top to possibly buffer more packets
814 * Ethernet interface receiver interrupt.
817 ed_rint(struct ed_softc *sc)
819 struct ifnet *ifp = sc->ifp;
822 struct ed_ring packet_hdr;
823 bus_size_t packet_ptr;
825 ED_ASSERT_LOCKED(sc);
828 * Set NIC to page 1 registers to get 'current' pointer
830 ed_nic_barrier(sc, ED_P0_CR, 1,
831 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
832 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_PAGE_1 | ED_CR_STA);
833 ed_nic_barrier(sc, ED_P0_CR, 1,
834 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
837 * 'sc->next_packet' is the logical beginning of the ring-buffer -
838 * i.e. it points to where new data has been buffered. The 'CURR'
839 * (current) register points to the logical end of the ring-buffer -
840 * i.e. it points to where additional new data will be added. We loop
841 * here until the logical beginning equals the logical end (or in
842 * other words, until the ring-buffer is empty).
844 while (sc->next_packet != ed_nic_inb(sc, ED_P1_CURR)) {
846 /* get pointer to this buffer's header structure */
847 packet_ptr = sc->mem_ring +
848 (sc->next_packet - sc->rec_page_start) * ED_PAGE_SIZE;
851 * The byte count includes a 4 byte header that was added by
854 sc->readmem(sc, packet_ptr, (char *) &packet_hdr,
856 len = packet_hdr.count;
857 if (len > (ETHER_MAX_LEN - ETHER_CRC_LEN + sizeof(struct ed_ring)) ||
858 len < (ETHER_MIN_LEN - ETHER_CRC_LEN + sizeof(struct ed_ring))) {
860 * Length is a wild value. There's a good chance that
861 * this was caused by the NIC being old and buggy.
862 * The bug is that the length low byte is duplicated
863 * in the high byte. Try to recalculate the length
864 * based on the pointer to the next packet. Also,
865 * need ot preserve offset into page.
867 * NOTE: sc->next_packet is pointing at the current
870 len &= ED_PAGE_SIZE - 1;
871 if (packet_hdr.next_packet >= sc->next_packet)
872 len += (packet_hdr.next_packet -
873 sc->next_packet) * ED_PAGE_SIZE;
876 ((packet_hdr.next_packet - sc->rec_page_start) +
877 (sc->rec_page_stop - sc->next_packet)) * ED_PAGE_SIZE;
879 * because buffers are aligned on 256-byte boundary,
880 * the length computed above is off by 256 in almost
881 * all cases. Fix it...
885 if (len > (ETHER_MAX_LEN - ETHER_CRC_LEN
886 + sizeof(struct ed_ring)))
887 sc->mibdata.dot3StatsFrameTooLongs++;
891 * Be fairly liberal about what we allow as a "reasonable"
892 * length so that a [crufty] packet will make it to BPF (and
893 * can thus be analyzed). Note that all that is really
894 * important is that we have a length that will fit into one
895 * mbuf cluster or less; the upper layer protocols can then
896 * figure out the length from their own length field(s). But
897 * make sure that we have at least a full ethernet header or
898 * we would be unable to call ether_input() later.
900 if ((len >= sizeof(struct ed_ring) + ETHER_HDR_LEN) &&
902 (packet_hdr.next_packet >= sc->rec_page_start) &&
903 (packet_hdr.next_packet < sc->rec_page_stop)) {
907 ed_get_packet(sc, packet_ptr + sizeof(struct ed_ring),
908 len - sizeof(struct ed_ring));
909 if_inc_counter(ifp, IFCOUNTER_IPACKETS, 1);
912 * Really BAD. The ring pointers are corrupted.
915 "%s: NIC memory corrupt - invalid packet length %d\n",
917 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1);
923 * Update next packet pointer
925 sc->next_packet = packet_hdr.next_packet;
928 * Update NIC boundry pointer - being careful to keep it one
929 * buffer behind. (as recommended by NS databook)
931 boundry = sc->next_packet - 1;
932 if (boundry < sc->rec_page_start)
933 boundry = sc->rec_page_stop - 1;
936 * Set NIC to page 0 registers to update boundry register
938 ed_nic_barrier(sc, ED_P0_CR, 1,
939 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
940 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STA);
941 ed_nic_barrier(sc, ED_P0_CR, 1,
942 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
943 ed_nic_outb(sc, ED_P0_BNRY, boundry);
946 * Set NIC to page 1 registers before looping to top (prepare
947 * to get 'CURR' current pointer)
949 ed_nic_barrier(sc, ED_P0_CR, 1,
950 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
951 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_PAGE_1 | ED_CR_STA);
952 ed_nic_barrier(sc, ED_P0_CR, 1,
953 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
958 * Ethernet interface interrupt processor
963 struct ed_softc *sc = (struct ed_softc*) arg;
964 struct ifnet *ifp = sc->ifp;
969 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) {
974 * Set NIC to page 0 registers
976 ed_nic_barrier(sc, ED_P0_CR, 1,
977 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
978 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STA);
979 ed_nic_barrier(sc, ED_P0_CR, 1,
980 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
983 * loop until there are no more new interrupts. When the card goes
984 * away, the hardware will read back 0xff. Looking at the interrupts,
985 * it would appear that 0xff is impossible as ED_ISR_RST is normally
986 * clear. ED_ISR_RDC is also normally clear and only set while
987 * we're transferring memory to the card and we're holding the
988 * ED_LOCK (so we can't get into here).
990 while ((isr = ed_nic_inb(sc, ED_P0_ISR)) != 0 && isr != 0xff) {
993 * reset all the bits that we are 'acknowledging' by writing a
994 * '1' to each bit position that was set (writing a '1'
997 ed_nic_outb(sc, ED_P0_ISR, isr);
1000 * The AX88190 and AX88190A has problems acking an interrupt
1001 * and having them clear. This interferes with top-level loop
1002 * here. Wait for all the bits to clear.
1004 * We limit this to 5000 iterations. At 1us per inb/outb,
1005 * this translates to about 15ms, which should be plenty of
1006 * time, and also gives protection in the card eject case.
1008 if (sc->chip_type == ED_CHIP_TYPE_AX88190) {
1009 count = 5000; /* 15ms */
1010 while (count-- && (ed_nic_inb(sc, ED_P0_ISR) & isr)) {
1011 ed_nic_outb(sc, ED_P0_ISR,0);
1012 ed_nic_outb(sc, ED_P0_ISR,isr);
1019 * Handle transmitter interrupts. Handle these first because
1020 * the receiver will reset the board under some conditions.
1022 if (isr & (ED_ISR_PTX | ED_ISR_TXE)) {
1023 u_char collisions = ed_nic_inb(sc, ED_P0_NCR) & 0x0f;
1026 * Check for transmit error. If a TX completed with an
1027 * error, we end up throwing the packet away. Really
1028 * the only error that is possible is excessive
1029 * collisions, and in this case it is best to allow
1030 * the automatic mechanisms of TCP to backoff the
1031 * flow. Of course, with UDP we're screwed, but this
1032 * is expected when a network is heavily loaded.
1034 (void) ed_nic_inb(sc, ED_P0_TSR);
1035 if (isr & ED_ISR_TXE) {
1039 * Excessive collisions (16)
1041 tsr = ed_nic_inb(sc, ED_P0_TSR);
1042 if ((tsr & ED_TSR_ABT)
1043 && (collisions == 0)) {
1046 * When collisions total 16, the
1047 * P0_NCR will indicate 0, and the
1051 sc->mibdata.dot3StatsExcessiveCollisions++;
1052 sc->mibdata.dot3StatsCollFrequencies[15]++;
1054 if (tsr & ED_TSR_OWC)
1055 sc->mibdata.dot3StatsLateCollisions++;
1056 if (tsr & ED_TSR_CDH)
1057 sc->mibdata.dot3StatsSQETestErrors++;
1058 if (tsr & ED_TSR_CRS)
1059 sc->mibdata.dot3StatsCarrierSenseErrors++;
1060 if (tsr & ED_TSR_FU)
1061 sc->mibdata.dot3StatsInternalMacTransmitErrors++;
1064 * update output errors counter
1066 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1);
1070 * Update total number of successfully
1071 * transmitted packets.
1073 if_inc_counter(ifp, IFCOUNTER_OPACKETS, 1);
1077 * reset tx busy and output active flags
1080 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
1083 * clear watchdog timer
1088 * Add in total number of collisions on last
1091 if_inc_counter(ifp, IFCOUNTER_COLLISIONS, collisions);
1092 switch(collisions) {
1097 sc->mibdata.dot3StatsSingleCollisionFrames++;
1098 sc->mibdata.dot3StatsCollFrequencies[0]++;
1101 sc->mibdata.dot3StatsMultipleCollisionFrames++;
1103 dot3StatsCollFrequencies[collisions-1]
1109 * Decrement buffer in-use count if not zero (can only
1110 * be zero if a transmitter interrupt occured while
1111 * not actually transmitting). If data is ready to
1112 * transmit, start it transmitting, otherwise defer
1113 * until after handling receiver
1115 if (sc->txb_inuse && --sc->txb_inuse)
1120 * Handle receiver interrupts
1122 if (isr & (ED_ISR_PRX | ED_ISR_RXE | ED_ISR_OVW)) {
1125 * Overwrite warning. In order to make sure that a
1126 * lockup of the local DMA hasn't occurred, we reset
1127 * and re-init the NIC. The NSC manual suggests only a
1128 * partial reset/re-init is necessary - but some chips
1129 * seem to want more. The DMA lockup has been seen
1130 * only with early rev chips - Methinks this bug was
1131 * fixed in later revs. -DG
1133 if (isr & ED_ISR_OVW) {
1134 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1);
1137 "%s: warning - receiver ring buffer overrun\n",
1142 * Stop/reset/re-init NIC
1148 * Receiver Error. One or more of: CRC error,
1149 * frame alignment error FIFO overrun, or
1152 if (isr & ED_ISR_RXE) {
1154 rsr = ed_nic_inb(sc, ED_P0_RSR);
1155 if (rsr & ED_RSR_CRC)
1156 sc->mibdata.dot3StatsFCSErrors++;
1157 if (rsr & ED_RSR_FAE)
1158 sc->mibdata.dot3StatsAlignmentErrors++;
1159 if (rsr & ED_RSR_FO)
1160 sc->mibdata.dot3StatsInternalMacReceiveErrors++;
1161 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1);
1163 if_printf(ifp, "receive error %x\n",
1164 ed_nic_inb(sc, ED_P0_RSR));
1169 * Go get the packet(s) XXX - Doing this on an
1170 * error is dubious because there shouldn't be
1171 * any data to get (we've configured the
1172 * interface to not accept packets with
1177 * Enable 16bit access to shared memory first
1180 ed_enable_16bit_access(sc);
1182 ed_disable_16bit_access(sc);
1187 * If it looks like the transmitter can take more data,
1188 * attempt to start output on the interface. This is done
1189 * after handling the receiver to give the receiver priority.
1191 if ((ifp->if_drv_flags & IFF_DRV_OACTIVE) == 0)
1192 ed_start_locked(ifp);
1195 * return NIC CR to standard state: page 0, remote DMA
1196 * complete, start (toggling the TXP bit off, even if was just
1197 * set in the transmit routine, is *okay* - it is 'edge'
1198 * triggered from low to high)
1200 ed_nic_barrier(sc, ED_P0_CR, 1,
1201 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
1202 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STA);
1203 ed_nic_barrier(sc, ED_P0_CR, 1,
1204 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
1207 * If the Network Talley Counters overflow, read them to reset
1208 * them. It appears that old 8390's won't clear the ISR flag
1209 * otherwise - resulting in an infinite loop.
1211 if (isr & ED_ISR_CNT) {
1212 (void) ed_nic_inb(sc, ED_P0_CNTR0);
1213 (void) ed_nic_inb(sc, ED_P0_CNTR1);
1214 (void) ed_nic_inb(sc, ED_P0_CNTR2);
1221 * Process an ioctl request.
1224 ed_ioctl(struct ifnet *ifp, u_long command, caddr_t data)
1226 struct ed_softc *sc = ifp->if_softc;
1227 struct ifreq *ifr = (struct ifreq *)data;
1233 * If the interface is marked up and stopped, then start it.
1234 * If we're up and already running, then it may be a mediachg.
1235 * If it is marked down and running, then stop it.
1238 if (ifp->if_flags & IFF_UP) {
1239 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0)
1241 else if (sc->sc_mediachg)
1242 sc->sc_mediachg(sc);
1244 if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
1246 ifp->if_drv_flags &= ~IFF_DRV_RUNNING;
1251 * Promiscuous flag may have changed, so reprogram the RCR.
1261 * Multicast list has changed; set the hardware filter
1272 if (sc->sc_media_ioctl == NULL) {
1276 sc->sc_media_ioctl(sc, ifr, command);
1280 error = ether_ioctl(ifp, command, data);
1287 * Given a source and destination address, copy 'amount' of a packet from
1288 * the ring buffer into a linear destination buffer. Takes into account
1291 static __inline void
1292 ed_ring_copy(struct ed_softc *sc, bus_size_t src, char *dst, u_short amount)
1296 /* does copy wrap to lower addr in ring buffer? */
1297 if (src + amount > sc->mem_end) {
1298 tmp_amount = sc->mem_end - src;
1299 /* copy amount up to end of NIC memory */
1300 sc->readmem(sc, src, dst, tmp_amount);
1301 amount -= tmp_amount;
1305 sc->readmem(sc, src, dst, amount);
1309 * Retreive packet from shared memory and send to the next level up via
1313 ed_get_packet(struct ed_softc *sc, bus_size_t buf, u_short len)
1315 struct ifnet *ifp = sc->ifp;
1316 struct ether_header *eh;
1319 /* Allocate a header mbuf */
1320 MGETHDR(m, M_NOWAIT, MT_DATA);
1323 m->m_pkthdr.rcvif = ifp;
1324 m->m_pkthdr.len = m->m_len = len;
1327 * We always put the received packet in a single buffer -
1328 * either with just an mbuf header or in a cluster attached
1329 * to the header. The +2 is to compensate for the alignment
1332 if ((len + 2) > MHLEN) {
1333 /* Attach an mbuf cluster */
1334 if (!(MCLGET(m, M_NOWAIT))) {
1341 * The +2 is to longword align the start of the real packet.
1342 * This is important for NFS.
1345 eh = mtod(m, struct ether_header *);
1348 * Get packet, including link layer address, from interface.
1350 ed_ring_copy(sc, buf, (char *)eh, len);
1352 m->m_pkthdr.len = m->m_len = len;
1355 (*ifp->if_input)(ifp, m);
1360 * Supporting routines
1364 * Given a NIC memory source address and a host memory destination
1365 * address, copy 'amount' from NIC to host using shared memory.
1366 * The 'amount' is rounded up to a word - okay as long as mbufs
1367 * are word sized. That's what the +1 is below.
1368 * This routine accesses things as 16 bit quantities.
1371 ed_shmem_readmem16(struct ed_softc *sc, bus_size_t src, uint8_t *dst,
1374 bus_space_read_region_2(sc->mem_bst, sc->mem_bsh, src, (uint16_t *)dst,
1379 * Given a NIC memory source address and a host memory destination
1380 * address, copy 'amount' from NIC to host using shared memory.
1381 * This routine accesses things as 8 bit quantities.
1384 ed_shmem_readmem8(struct ed_softc *sc, bus_size_t src, uint8_t *dst,
1387 bus_space_read_region_1(sc->mem_bst, sc->mem_bsh, src, dst, amount);
1391 * Given a NIC memory source address and a host memory destination
1392 * address, copy 'amount' from NIC to host using Programmed I/O.
1393 * The 'amount' is rounded up to a word - okay as long as mbufs
1395 * This routine is currently Novell-specific.
1398 ed_pio_readmem(struct ed_softc *sc, bus_size_t src, uint8_t *dst,
1401 /* Regular Novell cards */
1402 /* select page 0 registers */
1403 ed_nic_barrier(sc, ED_P0_CR, 1,
1404 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
1405 ed_nic_outb(sc, ED_P0_CR, ED_CR_RD2 | ED_CR_STA);
1406 ed_nic_barrier(sc, ED_P0_CR, 1,
1407 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
1409 /* round up to a word */
1413 /* set up DMA byte count */
1414 ed_nic_outb(sc, ED_P0_RBCR0, amount);
1415 ed_nic_outb(sc, ED_P0_RBCR1, amount >> 8);
1417 /* set up source address in NIC mem */
1418 ed_nic_outb(sc, ED_P0_RSAR0, src);
1419 ed_nic_outb(sc, ED_P0_RSAR1, src >> 8);
1421 ed_nic_outb(sc, ED_P0_CR, ED_CR_RD0 | ED_CR_STA);
1424 ed_asic_insw(sc, ED_NOVELL_DATA, dst, amount / 2);
1426 ed_asic_insb(sc, ED_NOVELL_DATA, dst, amount);
1430 * Stripped down routine for writing a linear buffer to NIC memory.
1431 * Only used in the probe routine to test the memory. 'len' must
1435 ed_pio_writemem(struct ed_softc *sc, uint8_t *src, uint16_t dst, uint16_t len)
1437 int maxwait = 200; /* about 240us */
1439 /* select page 0 registers */
1440 ed_nic_barrier(sc, ED_P0_CR, 1,
1441 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
1442 ed_nic_outb(sc, ED_P0_CR, ED_CR_RD2 | ED_CR_STA);
1443 ed_nic_barrier(sc, ED_P0_CR, 1,
1444 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
1446 /* reset remote DMA complete flag */
1447 ed_nic_outb(sc, ED_P0_ISR, ED_ISR_RDC);
1449 /* set up DMA byte count */
1450 ed_nic_outb(sc, ED_P0_RBCR0, len);
1451 ed_nic_outb(sc, ED_P0_RBCR1, len >> 8);
1453 /* set up destination address in NIC mem */
1454 ed_nic_outb(sc, ED_P0_RSAR0, dst);
1455 ed_nic_outb(sc, ED_P0_RSAR1, dst >> 8);
1457 /* set remote DMA write */
1458 ed_nic_outb(sc, ED_P0_CR, ED_CR_RD1 | ED_CR_STA);
1461 ed_asic_outsw(sc, ED_NOVELL_DATA, src, len / 2);
1463 ed_asic_outsb(sc, ED_NOVELL_DATA, src, len);
1466 * Wait for remote DMA complete. This is necessary because on the
1467 * transmit side, data is handled internally by the NIC in bursts and
1468 * we can't start another remote DMA until this one completes. Not
1469 * waiting causes really bad things to happen - like the NIC
1470 * irrecoverably jamming the ISA bus.
1472 while (((ed_nic_inb(sc, ED_P0_ISR) & ED_ISR_RDC) != ED_ISR_RDC) &&
1478 * Write an mbuf chain to the destination NIC memory address using
1482 ed_pio_write_mbufs(struct ed_softc *sc, struct mbuf *m, bus_size_t dst)
1484 struct ifnet *ifp = sc->ifp;
1485 unsigned short total_len, dma_len;
1487 int maxwait = 200; /* about 240us */
1489 ED_ASSERT_LOCKED(sc);
1491 /* Regular Novell cards */
1492 /* First, count up the total number of bytes to copy */
1493 for (total_len = 0, mp = m; mp; mp = mp->m_next)
1494 total_len += mp->m_len;
1496 dma_len = total_len;
1497 if (sc->isa16bit && (dma_len & 1))
1500 /* select page 0 registers */
1501 ed_nic_barrier(sc, ED_P0_CR, 1,
1502 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
1503 ed_nic_outb(sc, ED_P0_CR, ED_CR_RD2 | ED_CR_STA);
1504 ed_nic_barrier(sc, ED_P0_CR, 1,
1505 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
1507 /* reset remote DMA complete flag */
1508 ed_nic_outb(sc, ED_P0_ISR, ED_ISR_RDC);
1510 /* set up DMA byte count */
1511 ed_nic_outb(sc, ED_P0_RBCR0, dma_len);
1512 ed_nic_outb(sc, ED_P0_RBCR1, dma_len >> 8);
1514 /* set up destination address in NIC mem */
1515 ed_nic_outb(sc, ED_P0_RSAR0, dst);
1516 ed_nic_outb(sc, ED_P0_RSAR1, dst >> 8);
1518 /* set remote DMA write */
1519 ed_nic_outb(sc, ED_P0_CR, ED_CR_RD1 | ED_CR_STA);
1522 * Transfer the mbuf chain to the NIC memory.
1523 * 16-bit cards require that data be transferred as words, and only words.
1524 * So that case requires some extra code to patch over odd-length mbufs.
1527 if (!sc->isa16bit) {
1528 /* NE1000s are easy */
1531 ed_asic_outsb(sc, ED_NOVELL_DATA,
1532 m->m_data, m->m_len);
1536 /* NE2000s are a pain */
1549 data = mtod(m, caddr_t);
1550 /* finish the last word */
1552 saveword.b[1] = *data;
1553 ed_asic_outw(sc, ED_NOVELL_DATA,
1559 /* output contiguous words */
1561 ed_asic_outsw(sc, ED_NOVELL_DATA,
1566 /* save last byte, if necessary */
1568 saveword.b[0] = *data;
1574 /* spit last byte */
1576 ed_asic_outw(sc, ED_NOVELL_DATA, saveword.w);
1580 * Wait for remote DMA complete. This is necessary because on the
1581 * transmit side, data is handled internally by the NIC in bursts and
1582 * we can't start another remote DMA until this one completes. Not
1583 * waiting causes really bad things to happen - like the NIC
1584 * irrecoverably jamming the ISA bus.
1586 while (((ed_nic_inb(sc, ED_P0_ISR) & ED_ISR_RDC) != ED_ISR_RDC) &&
1591 log(LOG_WARNING, "%s: remote transmit DMA failed to complete\n",
1600 ed_setrcr(struct ed_softc *sc)
1602 struct ifnet *ifp = sc->ifp;
1606 ED_ASSERT_LOCKED(sc);
1608 /* Bit 6 in AX88190 RCR register must be set. */
1609 if (sc->chip_type == ED_CHIP_TYPE_AX88190 ||
1610 sc->chip_type == ED_CHIP_TYPE_AX88790)
1615 /* set page 1 registers */
1616 ed_nic_barrier(sc, ED_P0_CR, 1,
1617 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
1618 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_PAGE_1 | ED_CR_STP);
1619 ed_nic_barrier(sc, ED_P0_CR, 1,
1620 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
1622 if (ifp->if_flags & IFF_PROMISC) {
1625 * Reconfigure the multicast filter.
1627 for (i = 0; i < 8; i++)
1628 ed_nic_outb(sc, ED_P1_MAR(i), 0xff);
1631 * And turn on promiscuous mode. Also enable reception of
1632 * runts and packets with CRC & alignment errors.
1634 /* Set page 0 registers */
1635 ed_nic_barrier(sc, ED_P0_CR, 1,
1636 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
1637 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STP);
1638 ed_nic_barrier(sc, ED_P0_CR, 1,
1639 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
1641 ed_nic_outb(sc, ED_P0_RCR, ED_RCR_PRO | ED_RCR_AM |
1642 ED_RCR_AB | ED_RCR_AR | ED_RCR_SEP | reg1);
1644 /* set up multicast addresses and filter modes */
1645 if (ifp->if_flags & IFF_MULTICAST) {
1648 if (ifp->if_flags & IFF_ALLMULTI) {
1649 mcaf[0] = 0xffffffff;
1650 mcaf[1] = 0xffffffff;
1652 ed_ds_getmcaf(sc, mcaf);
1655 * Set multicast filter on chip.
1657 for (i = 0; i < 8; i++)
1658 ed_nic_outb(sc, ED_P1_MAR(i), ((u_char *) mcaf)[i]);
1660 /* Set page 0 registers */
1661 ed_nic_barrier(sc, ED_P0_CR, 1,
1662 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
1663 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STP);
1664 ed_nic_barrier(sc, ED_P0_CR, 1,
1665 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
1667 ed_nic_outb(sc, ED_P0_RCR, ED_RCR_AM | ED_RCR_AB | reg1);
1671 * Initialize multicast address hashing registers to
1672 * not accept multicasts.
1674 for (i = 0; i < 8; ++i)
1675 ed_nic_outb(sc, ED_P1_MAR(i), 0x00);
1677 /* Set page 0 registers */
1678 ed_nic_barrier(sc, ED_P0_CR, 1,
1679 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
1680 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STP);
1682 ed_nic_outb(sc, ED_P0_RCR, ED_RCR_AB | reg1);
1689 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STA);
1693 * Compute the multicast address filter from the
1694 * list of multicast addresses we need to listen to.
1697 ed_ds_getmcaf(struct ed_softc *sc, uint32_t *mcaf)
1700 u_char *af = (u_char *) mcaf;
1701 struct ifmultiaddr *ifma;
1706 if_maddr_rlock(sc->ifp);
1707 CK_STAILQ_FOREACH(ifma, &sc->ifp->if_multiaddrs, ifma_link) {
1708 if (ifma->ifma_addr->sa_family != AF_LINK)
1710 index = ether_crc32_be(LLADDR((struct sockaddr_dl *)
1711 ifma->ifma_addr), ETHER_ADDR_LEN) >> 26;
1712 af[index >> 3] |= 1 << (index & 7);
1714 if_maddr_runlock(sc->ifp);
1718 ed_isa_mem_ok(device_t dev, u_long pmem, u_int memsize)
1720 if (pmem < 0xa0000 || pmem + memsize > 0x1000000) {
1721 device_printf(dev, "Invalid ISA memory address range "
1722 "configured: 0x%lx - 0x%lx\n", pmem, pmem + memsize);
1729 ed_clear_memory(device_t dev)
1731 struct ed_softc *sc = device_get_softc(dev);
1734 bus_space_set_region_1(sc->mem_bst, sc->mem_bsh, sc->mem_start,
1737 for (i = 0; i < sc->mem_size; i++) {
1738 if (bus_space_read_1(sc->mem_bst, sc->mem_bsh,
1739 sc->mem_start + i)) {
1740 device_printf(dev, "failed to clear shared memory at "
1741 "0x%jx - check configuration\n",
1742 (uintmax_t)rman_get_start(sc->mem_res) + i);
1750 ed_shmem_write_mbufs(struct ed_softc *sc, struct mbuf *m, bus_size_t dst)
1755 * Special case setup for 16 bit boards...
1758 switch (sc->vendor) {
1761 * For 16bit 3Com boards (which have 16k of
1762 * memory), we have the xmit buffers in a
1763 * different page of memory ('page 0') - so
1766 case ED_VENDOR_3COM:
1767 ed_asic_outb(sc, ED_3COM_GACFR, ED_3COM_GACFR_RSEL);
1771 * Enable 16bit access to shared memory on
1774 * XXX - same as ed_enable_16bit_access()
1776 case ED_VENDOR_WD_SMC:
1777 ed_asic_outb(sc, ED_WD_LAAR,
1778 sc->wd_laar_proto | ED_WD_LAAR_M16EN);
1779 if (sc->chip_type == ED_CHIP_TYPE_WD790)
1780 ed_asic_outb(sc, ED_WD_MSR, ED_WD_MSR_MENB);
1784 for (len = 0; m != NULL; m = m->m_next) {
1789 bus_space_write_region_2(sc->mem_bst,
1791 mtod(m, uint16_t *), m->m_len / 2);
1792 if ((m->m_len & 1) != 0)
1793 bus_space_write_1(sc->mem_bst, sc->mem_bsh,
1795 *(mtod(m, uint8_t *) + m->m_len - 1));
1797 bus_space_write_region_1(sc->mem_bst,
1799 mtod(m, uint8_t *), m->m_len);
1805 * Restore previous shared memory access
1808 switch (sc->vendor) {
1810 case ED_VENDOR_3COM:
1811 ed_asic_outb(sc, ED_3COM_GACFR,
1812 ED_3COM_GACFR_RSEL | ED_3COM_GACFR_MBS0);
1815 case ED_VENDOR_WD_SMC:
1816 /* XXX - same as ed_disable_16bit_access() */
1817 if (sc->chip_type == ED_CHIP_TYPE_WD790)
1818 ed_asic_outb(sc, ED_WD_MSR, 0x00);
1819 ed_asic_outb(sc, ED_WD_LAAR,
1820 sc->wd_laar_proto & ~ED_WD_LAAR_M16EN);
1828 * Generic ifmedia support. By default, the DP8390-based cards don't know
1829 * what their network attachment really is, or even if it is valid (except
1830 * upon successful transmission of a packet). To play nicer with dhclient, as
1831 * well as to fit in with a framework where some cards can provde more
1832 * detailed information, make sure that we use this as a fallback.
1835 ed_gen_ifmedia_ioctl(struct ed_softc *sc, struct ifreq *ifr, u_long command)
1837 return (ifmedia_ioctl(sc->ifp, ifr, &sc->ifmedia, command));
1841 ed_gen_ifmedia_upd(struct ifnet *ifp)
1847 ed_gen_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
1849 ifmr->ifm_active = IFM_ETHER | IFM_AUTO;
1850 ifmr->ifm_status = IFM_AVALID | IFM_ACTIVE;
1854 ed_gen_ifmedia_init(struct ed_softc *sc)
1856 sc->sc_media_ioctl = &ed_gen_ifmedia_ioctl;
1857 ifmedia_init(&sc->ifmedia, 0, ed_gen_ifmedia_upd, ed_gen_ifmedia_sts);
1858 ifmedia_add(&sc->ifmedia, IFM_ETHER | IFM_AUTO, 0, 0);
1859 ifmedia_set(&sc->ifmedia, IFM_ETHER | IFM_AUTO);