2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright (c) 1995, David Greenman
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice unmodified, this list of conditions, and the following
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 #include <sys/cdefs.h>
31 __FBSDID("$FreeBSD$");
34 * Device driver for National Semiconductor DS8390/WD83C690 based ethernet
35 * adapters. By David Greenman, 29-April-1993
37 * Currently supports the Western Digital/SMC 8003 and 8013 series,
38 * the SMC Elite Ultra (8216), the 3Com 3c503, the NE1000 and NE2000,
39 * and a variety of similar clones.
45 #include <sys/param.h>
46 #include <sys/systm.h>
47 #include <sys/sockio.h>
48 #include <sys/kernel.h>
49 #include <sys/malloc.h>
51 #include <sys/socket.h>
52 #include <sys/sysctl.h>
53 #include <sys/syslog.h>
57 #include <machine/bus.h>
59 #include <machine/resource.h>
61 #include <net/ethernet.h>
63 #include <net/if_var.h>
64 #include <net/if_arp.h>
65 #include <net/if_dl.h>
66 #include <net/if_mib.h>
67 #include <net/if_media.h>
68 #include <net/if_types.h>
72 #include <dev/ed/if_edreg.h>
73 #include <dev/ed/if_edvar.h>
76 devclass_t ed_devclass;
78 static void ed_init(void *);
79 static void ed_init_locked(struct ed_softc *);
80 static int ed_ioctl(struct ifnet *, u_long, caddr_t);
81 static void ed_start(struct ifnet *);
82 static void ed_start_locked(struct ifnet *);
83 static void ed_reset(struct ifnet *);
84 static void ed_tick(void *);
85 static void ed_watchdog(struct ed_softc *);
87 static void ed_ds_getmcaf(struct ed_softc *, uint32_t *);
89 static void ed_get_packet(struct ed_softc *, bus_size_t, u_short);
90 static void ed_stop_hw(struct ed_softc *sc);
92 static __inline void ed_rint(struct ed_softc *);
93 static __inline void ed_xmit(struct ed_softc *);
94 static __inline void ed_ring_copy(struct ed_softc *, bus_size_t, char *,
97 static void ed_setrcr(struct ed_softc *);
100 * Generic probe routine for testing for the existance of a DS8390.
101 * Must be called after the NIC has just been reset. This routine
102 * works by looking at certain register values that are guaranteed
103 * to be initialized a certain way after power-up or reset. Seems
104 * not to currently work on the 83C690.
108 * Register reset bits set bits
109 * Command Register (CR) TXP, STA RD2, STP
110 * Interrupt Status (ISR) RST
111 * Interrupt Mask (IMR) All bits
112 * Data Control (DCR) LAS
113 * Transmit Config. (TCR) LB1, LB0
115 * We only look at the CR and ISR registers, however, because looking at
116 * the others would require changing register pages (which would be
117 * intrusive if this isn't an 8390).
119 * Return 1 if 8390 was found, 0 if not.
123 ed_probe_generic8390(struct ed_softc *sc)
125 if ((ed_nic_inb(sc, ED_P0_CR) &
126 (ED_CR_RD2 | ED_CR_TXP | ED_CR_STA | ED_CR_STP)) !=
127 (ED_CR_RD2 | ED_CR_STP))
129 if ((ed_nic_inb(sc, ED_P0_ISR) & ED_ISR_RST) != ED_ISR_RST)
136 ed_disable_16bit_access(struct ed_softc *sc)
139 * Disable 16 bit access to shared memory
141 if (sc->isa16bit && sc->vendor == ED_VENDOR_WD_SMC) {
142 if (sc->chip_type == ED_CHIP_TYPE_WD790)
143 ed_asic_outb(sc, ED_WD_MSR, 0x00);
144 ed_asic_outb(sc, ED_WD_LAAR,
145 sc->wd_laar_proto & ~ED_WD_LAAR_M16EN);
150 ed_enable_16bit_access(struct ed_softc *sc)
152 if (sc->isa16bit && sc->vendor == ED_VENDOR_WD_SMC) {
153 ed_asic_outb(sc, ED_WD_LAAR,
154 sc->wd_laar_proto | ED_WD_LAAR_M16EN);
155 if (sc->chip_type == ED_CHIP_TYPE_WD790)
156 ed_asic_outb(sc, ED_WD_MSR, ED_WD_MSR_MENB);
161 * Allocate a port resource with the given resource id.
164 ed_alloc_port(device_t dev, int rid, int size)
166 struct ed_softc *sc = device_get_softc(dev);
167 struct resource *res;
169 res = bus_alloc_resource_anywhere(dev, SYS_RES_IOPORT, &rid,
173 sc->port_used = size;
174 sc->port_bst = rman_get_bustag(res);
175 sc->port_bsh = rman_get_bushandle(res);
182 * Allocate a memory resource with the given resource id.
185 ed_alloc_memory(device_t dev, int rid, int size)
187 struct ed_softc *sc = device_get_softc(dev);
188 struct resource *res;
190 res = bus_alloc_resource_anywhere(dev, SYS_RES_MEMORY, &rid,
195 sc->mem_bst = rman_get_bustag(res);
196 sc->mem_bsh = rman_get_bushandle(res);
203 * Allocate an irq resource with the given resource id.
206 ed_alloc_irq(device_t dev, int rid, int flags)
208 struct ed_softc *sc = device_get_softc(dev);
209 struct resource *res;
211 res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE | flags);
220 * Release all resources
223 ed_release_resources(device_t dev)
225 struct ed_softc *sc = device_get_softc(dev);
228 bus_free_resource(dev, SYS_RES_IOPORT, sc->port_res);
230 bus_free_resource(dev, SYS_RES_IOPORT, sc->port_res2);
232 bus_free_resource(dev, SYS_RES_MEMORY, sc->mem_res);
234 bus_free_resource(dev, SYS_RES_IRQ, sc->irq_res);
244 * Install interface into kernel networking data structures
247 ed_attach(device_t dev)
249 struct ed_softc *sc = device_get_softc(dev);
254 ifp = sc->ifp = if_alloc(IFT_ETHER);
256 device_printf(dev, "can not if_alloc()\n");
261 if (sc->readmem == NULL) {
262 if (sc->mem_shared) {
264 sc->readmem = ed_shmem_readmem16;
266 sc->readmem = ed_shmem_readmem8;
268 sc->readmem = ed_pio_readmem;
271 if (sc->sc_write_mbufs == NULL) {
272 device_printf(dev, "No write mbufs routine set\n");
276 callout_init_mtx(&sc->tick_ch, ED_MUTEX(sc), 0);
278 * Set interface to stopped condition (reset)
283 * Initialize ifnet structure
286 if_initname(ifp, device_get_name(dev), device_get_unit(dev));
287 ifp->if_start = ed_start;
288 ifp->if_ioctl = ed_ioctl;
289 ifp->if_init = ed_init;
290 IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen);
291 ifp->if_snd.ifq_drv_maxlen = ifqmaxlen;
292 IFQ_SET_READY(&ifp->if_snd);
293 ifp->if_linkmib = &sc->mibdata;
294 ifp->if_linkmiblen = sizeof sc->mibdata;
296 * XXX - should do a better job.
298 if (sc->chip_type == ED_CHIP_TYPE_WD790)
299 sc->mibdata.dot3StatsEtherChipSet =
300 DOT3CHIPSET(dot3VendorWesternDigital,
301 dot3ChipSetWesternDigital83C790);
303 sc->mibdata.dot3StatsEtherChipSet =
304 DOT3CHIPSET(dot3VendorNational,
305 dot3ChipSetNational8390);
306 sc->mibdata.dot3Compliance = DOT3COMPLIANCE_COLLS;
308 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
310 * Set default state for LINK2 flag (used to disable the
311 * tranceiver for AUI operation), based on config option.
312 * We only set this flag before we attach the device, so there's
313 * no race. It is convenient to allow users to turn this off
314 * by default in the kernel config, but given our more advanced
315 * boot time configuration options, this might no longer be needed.
317 if (device_get_flags(dev) & ED_FLAGS_DISABLE_TRANCEIVER)
318 ifp->if_flags |= IFF_LINK2;
321 * Attach the interface
323 ether_ifattach(ifp, sc->enaddr);
324 /* device attach does transition from UNCONFIGURED to IDLE state */
326 sc->tx_mem = sc->txb_cnt * ED_PAGE_SIZE * ED_TXBUF_SIZE;
327 sc->rx_mem = (sc->rec_page_stop - sc->rec_page_start) * ED_PAGE_SIZE;
328 SYSCTL_ADD_STRING(device_get_sysctl_ctx(dev),
329 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
330 0, "type", CTLFLAG_RD, sc->type_str, 0,
331 "Type of chip in card");
332 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev),
333 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
334 1, "TxMem", CTLFLAG_RD, &sc->tx_mem, 0,
335 "Memory set aside for transmitting packets");
336 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev),
337 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
338 2, "RxMem", CTLFLAG_RD, &sc->rx_mem, 0,
339 "Memory set aside for receiving packets");
340 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev),
341 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
342 3, "Mem", CTLFLAG_RD, &sc->mem_size, 0,
343 "Total Card Memory");
345 if (sc->type_str && (*sc->type_str != 0))
346 device_printf(dev, "type %s ", sc->type_str);
348 device_printf(dev, "type unknown (0x%x) ", sc->type);
351 if (sc->vendor == ED_VENDOR_HP)
353 (sc->hpp_id & ED_HPP_ID_16_BIT_ACCESS) ?
355 sc->hpp_mem_start ? "memory mapped" : "regular");
358 printf("%s", sc->isa16bit ? "(16 bit)" : "(8 bit)");
360 #if defined(ED_HPP) || defined(ED_3C503)
361 printf("%s", (((sc->vendor == ED_VENDOR_3COM) ||
362 (sc->vendor == ED_VENDOR_HP)) &&
363 (ifp->if_flags & IFF_LINK2)) ?
364 " tranceiver disabled" : "");
372 * Detach the driver from the hardware and other systems in the kernel.
375 ed_detach(device_t dev)
377 struct ed_softc *sc = device_get_softc(dev);
378 struct ifnet *ifp = sc->ifp;
380 if (mtx_initialized(ED_MUTEX(sc)))
381 ED_ASSERT_UNLOCKED(sc);
384 if (bus_child_present(dev))
386 ifp->if_drv_flags &= ~IFF_DRV_RUNNING;
389 callout_drain(&sc->tick_ch);
391 if (sc->irq_res != NULL && sc->irq_handle)
392 bus_teardown_intr(dev, sc->irq_res, sc->irq_handle);
393 ed_release_resources(dev);
395 device_delete_child(dev, sc->miibus);
396 if (mtx_initialized(ED_MUTEX(sc)))
398 bus_generic_detach(dev);
406 ed_reset(struct ifnet *ifp)
408 struct ed_softc *sc = ifp->if_softc;
410 ED_ASSERT_LOCKED(sc);
412 * Stop interface and re-initialize.
419 ed_stop_hw(struct ed_softc *sc)
424 * Stop everything on the interface, and select page 0 registers.
426 ed_nic_barrier(sc, ED_P0_CR, 1,
427 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
428 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STP);
429 ed_nic_barrier(sc, ED_P0_CR, 1,
430 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
433 * Wait for interface to enter stopped state, but limit # of checks to
434 * 'n' (about 5ms). It shouldn't even take 5us on modern DS8390's, but
435 * just in case it's an old one.
437 * The AX88x90 chips don't seem to implement this behavor. The
438 * datasheets say it is only turned on when the chip enters a RESET
439 * state and is silent about behavior for the stopped state we just
442 if (sc->chip_type == ED_CHIP_TYPE_AX88190 ||
443 sc->chip_type == ED_CHIP_TYPE_AX88790)
445 while (((ed_nic_inb(sc, ED_P0_ISR) & ED_ISR_RST) == 0) && --n)
448 device_printf(sc->dev, "ed_stop_hw RST never set\n");
452 * Take interface offline.
455 ed_stop(struct ed_softc *sc)
457 ED_ASSERT_LOCKED(sc);
458 callout_stop(&sc->tick_ch);
463 * Periodic timer used to drive the watchdog and attachment-specific
472 ED_ASSERT_LOCKED(sc);
475 if (sc->tx_timer != 0 && --sc->tx_timer == 0)
477 callout_reset(&sc->tick_ch, hz, ed_tick, sc);
481 * Device timeout/watchdog routine. Entered if the device neglects to
482 * generate an interrupt after a transmit has been started on it.
485 ed_watchdog(struct ed_softc *sc)
490 log(LOG_ERR, "%s: device timeout\n", ifp->if_xname);
491 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1);
502 struct ed_softc *sc = xsc;
504 ED_ASSERT_UNLOCKED(sc);
511 ed_init_locked(struct ed_softc *sc)
513 struct ifnet *ifp = sc->ifp;
516 ED_ASSERT_LOCKED(sc);
519 * Initialize the NIC in the exact order outlined in the NS manual.
520 * This init procedure is "mandatory"...don't change what or when
524 /* reset transmitter flags */
532 /* This variable is used below - don't move this assignment */
533 sc->next_packet = sc->rec_page_start + 1;
536 * Set interface for page 0, Remote DMA complete, Stopped
538 ed_nic_barrier(sc, ED_P0_CR, 1,
539 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
540 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STP);
541 ed_nic_barrier(sc, ED_P0_CR, 1,
542 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
546 * Set FIFO threshold to 8, No auto-init Remote DMA, byte
547 * order=80x86, word-wide DMA xfers,
549 ed_nic_outb(sc, ED_P0_DCR, ED_DCR_FT1 | ED_DCR_WTS | ED_DCR_LS);
552 * Same as above, but byte-wide DMA xfers
554 ed_nic_outb(sc, ED_P0_DCR, ED_DCR_FT1 | ED_DCR_LS);
557 * Clear Remote Byte Count Registers
559 ed_nic_outb(sc, ED_P0_RBCR0, 0);
560 ed_nic_outb(sc, ED_P0_RBCR1, 0);
563 * For the moment, don't store incoming packets in memory.
565 ed_nic_outb(sc, ED_P0_RCR, ED_RCR_MON);
568 * Place NIC in internal loopback mode
570 ed_nic_outb(sc, ED_P0_TCR, ED_TCR_LB0);
573 * Initialize transmit/receive (ring-buffer) Page Start
575 ed_nic_outb(sc, ED_P0_TPSR, sc->tx_page_start);
576 ed_nic_outb(sc, ED_P0_PSTART, sc->rec_page_start);
577 /* Set lower bits of byte addressable framing to 0 */
578 if (sc->chip_type == ED_CHIP_TYPE_WD790)
579 ed_nic_outb(sc, 0x09, 0);
582 * Initialize Receiver (ring-buffer) Page Stop and Boundry
584 ed_nic_outb(sc, ED_P0_PSTOP, sc->rec_page_stop);
585 ed_nic_outb(sc, ED_P0_BNRY, sc->rec_page_start);
588 * Clear all interrupts. A '1' in each bit position clears the
589 * corresponding flag.
591 ed_nic_outb(sc, ED_P0_ISR, 0xff);
594 * Enable the following interrupts: receive/transmit complete,
595 * receive/transmit error, and Receiver OverWrite.
597 * Counter overflow and Remote DMA complete are *not* enabled.
599 ed_nic_outb(sc, ED_P0_IMR,
600 ED_IMR_PRXE | ED_IMR_PTXE | ED_IMR_RXEE | ED_IMR_TXEE | ED_IMR_OVWE);
603 * Program Command Register for page 1
605 ed_nic_barrier(sc, ED_P0_CR, 1,
606 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
607 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_PAGE_1 | ED_CR_STP);
608 ed_nic_barrier(sc, ED_P0_CR, 1,
609 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
612 * Copy out our station address
614 for (i = 0; i < ETHER_ADDR_LEN; ++i)
615 ed_nic_outb(sc, ED_P1_PAR(i), IF_LLADDR(sc->ifp)[i]);
618 * Set Current Page pointer to next_packet (initialized above)
620 ed_nic_outb(sc, ED_P1_CURR, sc->next_packet);
623 * Program Receiver Configuration Register and multicast filter. CR is
624 * set to page 0 on return.
629 * Take interface out of loopback
631 ed_nic_outb(sc, ED_P0_TCR, 0);
637 * Set 'running' flag, and clear output active flag.
639 ifp->if_drv_flags |= IFF_DRV_RUNNING;
640 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
643 * ...and attempt to start output
645 ed_start_locked(ifp);
647 callout_reset(&sc->tick_ch, hz, ed_tick, sc);
651 * This routine actually starts the transmission on the interface
654 ed_xmit(struct ed_softc *sc)
658 len = sc->txb_len[sc->txb_next_tx];
661 * Set NIC for page 0 register access
663 ed_nic_barrier(sc, ED_P0_CR, 1,
664 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
665 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STA);
666 ed_nic_barrier(sc, ED_P0_CR, 1,
667 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
670 * Set TX buffer start page
672 ed_nic_outb(sc, ED_P0_TPSR, sc->tx_page_start +
673 sc->txb_next_tx * ED_TXBUF_SIZE);
678 ed_nic_outb(sc, ED_P0_TBCR0, len);
679 ed_nic_outb(sc, ED_P0_TBCR1, len >> 8);
682 * Set page 0, Remote DMA complete, Transmit Packet, and *Start*
684 ed_nic_barrier(sc, ED_P0_CR, 1,
685 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
686 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_TXP | ED_CR_STA);
687 ed_nic_barrier(sc, ED_P0_CR, 1,
688 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
692 * Point to next transmit buffer slot and wrap if necessary.
695 if (sc->txb_next_tx == sc->txb_cnt)
699 * Set a timer just in case we never hear from the board again
705 * Start output on interface.
706 * We make two assumptions here:
707 * 1) that the current priority is set to splimp _before_ this code
708 * is called *and* is returned to the appropriate priority after
710 * 2) that the IFF_DRV_OACTIVE flag is checked before this code is called
711 * (i.e. that the output part of the interface is idle)
714 ed_start(struct ifnet *ifp)
716 struct ed_softc *sc = ifp->if_softc;
718 ED_ASSERT_UNLOCKED(sc);
720 ed_start_locked(ifp);
725 ed_start_locked(struct ifnet *ifp)
727 struct ed_softc *sc = ifp->if_softc;
732 ED_ASSERT_LOCKED(sc);
736 * First, see if there are buffered packets and an idle transmitter -
737 * should never happen at this point.
739 if (sc->txb_inuse && (sc->xmit_busy == 0)) {
740 printf("ed: packets buffered, but transmitter idle\n");
745 * See if there is room to put another packet in the buffer.
747 if (sc->txb_inuse == sc->txb_cnt) {
750 * No room. Indicate this to the outside world and exit.
752 ifp->if_drv_flags |= IFF_DRV_OACTIVE;
755 IFQ_DRV_DEQUEUE(&ifp->if_snd, m);
759 * We are using the !OACTIVE flag to indicate to the outside
760 * world that we can accept an additional packet rather than
761 * that the transmitter is _actually_ active. Indeed, the
762 * transmitter may be active, but if we haven't filled all the
763 * buffers with data then we still want to accept more.
765 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
770 * Copy the mbuf chain into the transmit buffer
774 /* txb_new points to next open buffer slot */
775 buffer = sc->mem_start + (sc->txb_new * ED_TXBUF_SIZE * ED_PAGE_SIZE);
777 len = sc->sc_write_mbufs(sc, m, buffer);
783 sc->txb_len[sc->txb_new] = max(len, (ETHER_MIN_LEN-ETHER_CRC_LEN));
788 * Point to next buffer slot and wrap if necessary.
791 if (sc->txb_new == sc->txb_cnt)
794 if (sc->xmit_busy == 0)
798 * Tap off here if there is a bpf listener.
805 * Loop back to the top to possibly buffer more packets
811 * Ethernet interface receiver interrupt.
814 ed_rint(struct ed_softc *sc)
816 struct ifnet *ifp = sc->ifp;
819 struct ed_ring packet_hdr;
820 bus_size_t packet_ptr;
822 ED_ASSERT_LOCKED(sc);
825 * Set NIC to page 1 registers to get 'current' pointer
827 ed_nic_barrier(sc, ED_P0_CR, 1,
828 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
829 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_PAGE_1 | ED_CR_STA);
830 ed_nic_barrier(sc, ED_P0_CR, 1,
831 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
834 * 'sc->next_packet' is the logical beginning of the ring-buffer -
835 * i.e. it points to where new data has been buffered. The 'CURR'
836 * (current) register points to the logical end of the ring-buffer -
837 * i.e. it points to where additional new data will be added. We loop
838 * here until the logical beginning equals the logical end (or in
839 * other words, until the ring-buffer is empty).
841 while (sc->next_packet != ed_nic_inb(sc, ED_P1_CURR)) {
843 /* get pointer to this buffer's header structure */
844 packet_ptr = sc->mem_ring +
845 (sc->next_packet - sc->rec_page_start) * ED_PAGE_SIZE;
848 * The byte count includes a 4 byte header that was added by
851 sc->readmem(sc, packet_ptr, (char *) &packet_hdr,
853 len = packet_hdr.count;
854 if (len > (ETHER_MAX_LEN - ETHER_CRC_LEN + sizeof(struct ed_ring)) ||
855 len < (ETHER_MIN_LEN - ETHER_CRC_LEN + sizeof(struct ed_ring))) {
857 * Length is a wild value. There's a good chance that
858 * this was caused by the NIC being old and buggy.
859 * The bug is that the length low byte is duplicated
860 * in the high byte. Try to recalculate the length
861 * based on the pointer to the next packet. Also,
862 * need ot preserve offset into page.
864 * NOTE: sc->next_packet is pointing at the current
867 len &= ED_PAGE_SIZE - 1;
868 if (packet_hdr.next_packet >= sc->next_packet)
869 len += (packet_hdr.next_packet -
870 sc->next_packet) * ED_PAGE_SIZE;
873 ((packet_hdr.next_packet - sc->rec_page_start) +
874 (sc->rec_page_stop - sc->next_packet)) * ED_PAGE_SIZE;
876 * because buffers are aligned on 256-byte boundary,
877 * the length computed above is off by 256 in almost
878 * all cases. Fix it...
882 if (len > (ETHER_MAX_LEN - ETHER_CRC_LEN
883 + sizeof(struct ed_ring)))
884 sc->mibdata.dot3StatsFrameTooLongs++;
888 * Be fairly liberal about what we allow as a "reasonable"
889 * length so that a [crufty] packet will make it to BPF (and
890 * can thus be analyzed). Note that all that is really
891 * important is that we have a length that will fit into one
892 * mbuf cluster or less; the upper layer protocols can then
893 * figure out the length from their own length field(s). But
894 * make sure that we have at least a full ethernet header or
895 * we would be unable to call ether_input() later.
897 if ((len >= sizeof(struct ed_ring) + ETHER_HDR_LEN) &&
899 (packet_hdr.next_packet >= sc->rec_page_start) &&
900 (packet_hdr.next_packet < sc->rec_page_stop)) {
904 ed_get_packet(sc, packet_ptr + sizeof(struct ed_ring),
905 len - sizeof(struct ed_ring));
906 if_inc_counter(ifp, IFCOUNTER_IPACKETS, 1);
909 * Really BAD. The ring pointers are corrupted.
912 "%s: NIC memory corrupt - invalid packet length %d\n",
914 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1);
920 * Update next packet pointer
922 sc->next_packet = packet_hdr.next_packet;
925 * Update NIC boundry pointer - being careful to keep it one
926 * buffer behind. (as recommended by NS databook)
928 boundry = sc->next_packet - 1;
929 if (boundry < sc->rec_page_start)
930 boundry = sc->rec_page_stop - 1;
933 * Set NIC to page 0 registers to update boundry register
935 ed_nic_barrier(sc, ED_P0_CR, 1,
936 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
937 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STA);
938 ed_nic_barrier(sc, ED_P0_CR, 1,
939 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
940 ed_nic_outb(sc, ED_P0_BNRY, boundry);
943 * Set NIC to page 1 registers before looping to top (prepare
944 * to get 'CURR' current pointer)
946 ed_nic_barrier(sc, ED_P0_CR, 1,
947 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
948 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_PAGE_1 | ED_CR_STA);
949 ed_nic_barrier(sc, ED_P0_CR, 1,
950 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
955 * Ethernet interface interrupt processor
960 struct ed_softc *sc = (struct ed_softc*) arg;
961 struct ifnet *ifp = sc->ifp;
966 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) {
971 * Set NIC to page 0 registers
973 ed_nic_barrier(sc, ED_P0_CR, 1,
974 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
975 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STA);
976 ed_nic_barrier(sc, ED_P0_CR, 1,
977 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
980 * loop until there are no more new interrupts. When the card goes
981 * away, the hardware will read back 0xff. Looking at the interrupts,
982 * it would appear that 0xff is impossible as ED_ISR_RST is normally
983 * clear. ED_ISR_RDC is also normally clear and only set while
984 * we're transferring memory to the card and we're holding the
985 * ED_LOCK (so we can't get into here).
987 while ((isr = ed_nic_inb(sc, ED_P0_ISR)) != 0 && isr != 0xff) {
990 * reset all the bits that we are 'acknowledging' by writing a
991 * '1' to each bit position that was set (writing a '1'
994 ed_nic_outb(sc, ED_P0_ISR, isr);
997 * The AX88190 and AX88190A has problems acking an interrupt
998 * and having them clear. This interferes with top-level loop
999 * here. Wait for all the bits to clear.
1001 * We limit this to 5000 iterations. At 1us per inb/outb,
1002 * this translates to about 15ms, which should be plenty of
1003 * time, and also gives protection in the card eject case.
1005 if (sc->chip_type == ED_CHIP_TYPE_AX88190) {
1006 count = 5000; /* 15ms */
1007 while (count-- && (ed_nic_inb(sc, ED_P0_ISR) & isr)) {
1008 ed_nic_outb(sc, ED_P0_ISR,0);
1009 ed_nic_outb(sc, ED_P0_ISR,isr);
1016 * Handle transmitter interrupts. Handle these first because
1017 * the receiver will reset the board under some conditions.
1019 if (isr & (ED_ISR_PTX | ED_ISR_TXE)) {
1020 u_char collisions = ed_nic_inb(sc, ED_P0_NCR) & 0x0f;
1023 * Check for transmit error. If a TX completed with an
1024 * error, we end up throwing the packet away. Really
1025 * the only error that is possible is excessive
1026 * collisions, and in this case it is best to allow
1027 * the automatic mechanisms of TCP to backoff the
1028 * flow. Of course, with UDP we're screwed, but this
1029 * is expected when a network is heavily loaded.
1031 (void) ed_nic_inb(sc, ED_P0_TSR);
1032 if (isr & ED_ISR_TXE) {
1036 * Excessive collisions (16)
1038 tsr = ed_nic_inb(sc, ED_P0_TSR);
1039 if ((tsr & ED_TSR_ABT)
1040 && (collisions == 0)) {
1043 * When collisions total 16, the
1044 * P0_NCR will indicate 0, and the
1048 sc->mibdata.dot3StatsExcessiveCollisions++;
1049 sc->mibdata.dot3StatsCollFrequencies[15]++;
1051 if (tsr & ED_TSR_OWC)
1052 sc->mibdata.dot3StatsLateCollisions++;
1053 if (tsr & ED_TSR_CDH)
1054 sc->mibdata.dot3StatsSQETestErrors++;
1055 if (tsr & ED_TSR_CRS)
1056 sc->mibdata.dot3StatsCarrierSenseErrors++;
1057 if (tsr & ED_TSR_FU)
1058 sc->mibdata.dot3StatsInternalMacTransmitErrors++;
1061 * update output errors counter
1063 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1);
1067 * Update total number of successfully
1068 * transmitted packets.
1070 if_inc_counter(ifp, IFCOUNTER_OPACKETS, 1);
1074 * reset tx busy and output active flags
1077 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
1080 * clear watchdog timer
1085 * Add in total number of collisions on last
1088 if_inc_counter(ifp, IFCOUNTER_COLLISIONS, collisions);
1089 switch(collisions) {
1094 sc->mibdata.dot3StatsSingleCollisionFrames++;
1095 sc->mibdata.dot3StatsCollFrequencies[0]++;
1098 sc->mibdata.dot3StatsMultipleCollisionFrames++;
1100 dot3StatsCollFrequencies[collisions-1]
1106 * Decrement buffer in-use count if not zero (can only
1107 * be zero if a transmitter interrupt occured while
1108 * not actually transmitting). If data is ready to
1109 * transmit, start it transmitting, otherwise defer
1110 * until after handling receiver
1112 if (sc->txb_inuse && --sc->txb_inuse)
1117 * Handle receiver interrupts
1119 if (isr & (ED_ISR_PRX | ED_ISR_RXE | ED_ISR_OVW)) {
1122 * Overwrite warning. In order to make sure that a
1123 * lockup of the local DMA hasn't occurred, we reset
1124 * and re-init the NIC. The NSC manual suggests only a
1125 * partial reset/re-init is necessary - but some chips
1126 * seem to want more. The DMA lockup has been seen
1127 * only with early rev chips - Methinks this bug was
1128 * fixed in later revs. -DG
1130 if (isr & ED_ISR_OVW) {
1131 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1);
1134 "%s: warning - receiver ring buffer overrun\n",
1139 * Stop/reset/re-init NIC
1145 * Receiver Error. One or more of: CRC error,
1146 * frame alignment error FIFO overrun, or
1149 if (isr & ED_ISR_RXE) {
1151 rsr = ed_nic_inb(sc, ED_P0_RSR);
1152 if (rsr & ED_RSR_CRC)
1153 sc->mibdata.dot3StatsFCSErrors++;
1154 if (rsr & ED_RSR_FAE)
1155 sc->mibdata.dot3StatsAlignmentErrors++;
1156 if (rsr & ED_RSR_FO)
1157 sc->mibdata.dot3StatsInternalMacReceiveErrors++;
1158 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1);
1160 if_printf(ifp, "receive error %x\n",
1161 ed_nic_inb(sc, ED_P0_RSR));
1166 * Go get the packet(s) XXX - Doing this on an
1167 * error is dubious because there shouldn't be
1168 * any data to get (we've configured the
1169 * interface to not accept packets with
1174 * Enable 16bit access to shared memory first
1177 ed_enable_16bit_access(sc);
1179 ed_disable_16bit_access(sc);
1184 * If it looks like the transmitter can take more data,
1185 * attempt to start output on the interface. This is done
1186 * after handling the receiver to give the receiver priority.
1188 if ((ifp->if_drv_flags & IFF_DRV_OACTIVE) == 0)
1189 ed_start_locked(ifp);
1192 * return NIC CR to standard state: page 0, remote DMA
1193 * complete, start (toggling the TXP bit off, even if was just
1194 * set in the transmit routine, is *okay* - it is 'edge'
1195 * triggered from low to high)
1197 ed_nic_barrier(sc, ED_P0_CR, 1,
1198 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
1199 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STA);
1200 ed_nic_barrier(sc, ED_P0_CR, 1,
1201 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
1204 * If the Network Talley Counters overflow, read them to reset
1205 * them. It appears that old 8390's won't clear the ISR flag
1206 * otherwise - resulting in an infinite loop.
1208 if (isr & ED_ISR_CNT) {
1209 (void) ed_nic_inb(sc, ED_P0_CNTR0);
1210 (void) ed_nic_inb(sc, ED_P0_CNTR1);
1211 (void) ed_nic_inb(sc, ED_P0_CNTR2);
1218 * Process an ioctl request.
1221 ed_ioctl(struct ifnet *ifp, u_long command, caddr_t data)
1223 struct ed_softc *sc = ifp->if_softc;
1224 struct ifreq *ifr = (struct ifreq *)data;
1230 * If the interface is marked up and stopped, then start it.
1231 * If we're up and already running, then it may be a mediachg.
1232 * If it is marked down and running, then stop it.
1235 if (ifp->if_flags & IFF_UP) {
1236 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0)
1238 else if (sc->sc_mediachg)
1239 sc->sc_mediachg(sc);
1241 if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
1243 ifp->if_drv_flags &= ~IFF_DRV_RUNNING;
1248 * Promiscuous flag may have changed, so reprogram the RCR.
1258 * Multicast list has changed; set the hardware filter
1269 if (sc->sc_media_ioctl == NULL) {
1273 sc->sc_media_ioctl(sc, ifr, command);
1277 error = ether_ioctl(ifp, command, data);
1284 * Given a source and destination address, copy 'amount' of a packet from
1285 * the ring buffer into a linear destination buffer. Takes into account
1288 static __inline void
1289 ed_ring_copy(struct ed_softc *sc, bus_size_t src, char *dst, u_short amount)
1293 /* does copy wrap to lower addr in ring buffer? */
1294 if (src + amount > sc->mem_end) {
1295 tmp_amount = sc->mem_end - src;
1296 /* copy amount up to end of NIC memory */
1297 sc->readmem(sc, src, dst, tmp_amount);
1298 amount -= tmp_amount;
1302 sc->readmem(sc, src, dst, amount);
1306 * Retreive packet from shared memory and send to the next level up via
1310 ed_get_packet(struct ed_softc *sc, bus_size_t buf, u_short len)
1312 struct ifnet *ifp = sc->ifp;
1313 struct ether_header *eh;
1316 /* Allocate a header mbuf */
1317 MGETHDR(m, M_NOWAIT, MT_DATA);
1320 m->m_pkthdr.rcvif = ifp;
1321 m->m_pkthdr.len = m->m_len = len;
1324 * We always put the received packet in a single buffer -
1325 * either with just an mbuf header or in a cluster attached
1326 * to the header. The +2 is to compensate for the alignment
1329 if ((len + 2) > MHLEN) {
1330 /* Attach an mbuf cluster */
1331 if (!(MCLGET(m, M_NOWAIT))) {
1338 * The +2 is to longword align the start of the real packet.
1339 * This is important for NFS.
1342 eh = mtod(m, struct ether_header *);
1345 * Get packet, including link layer address, from interface.
1347 ed_ring_copy(sc, buf, (char *)eh, len);
1349 m->m_pkthdr.len = m->m_len = len;
1352 (*ifp->if_input)(ifp, m);
1357 * Supporting routines
1361 * Given a NIC memory source address and a host memory destination
1362 * address, copy 'amount' from NIC to host using shared memory.
1363 * The 'amount' is rounded up to a word - okay as long as mbufs
1364 * are word sized. That's what the +1 is below.
1365 * This routine accesses things as 16 bit quantities.
1368 ed_shmem_readmem16(struct ed_softc *sc, bus_size_t src, uint8_t *dst,
1371 bus_space_read_region_2(sc->mem_bst, sc->mem_bsh, src, (uint16_t *)dst,
1376 * Given a NIC memory source address and a host memory destination
1377 * address, copy 'amount' from NIC to host using shared memory.
1378 * This routine accesses things as 8 bit quantities.
1381 ed_shmem_readmem8(struct ed_softc *sc, bus_size_t src, uint8_t *dst,
1384 bus_space_read_region_1(sc->mem_bst, sc->mem_bsh, src, dst, amount);
1388 * Given a NIC memory source address and a host memory destination
1389 * address, copy 'amount' from NIC to host using Programmed I/O.
1390 * The 'amount' is rounded up to a word - okay as long as mbufs
1392 * This routine is currently Novell-specific.
1395 ed_pio_readmem(struct ed_softc *sc, bus_size_t src, uint8_t *dst,
1398 /* Regular Novell cards */
1399 /* select page 0 registers */
1400 ed_nic_barrier(sc, ED_P0_CR, 1,
1401 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
1402 ed_nic_outb(sc, ED_P0_CR, ED_CR_RD2 | ED_CR_STA);
1403 ed_nic_barrier(sc, ED_P0_CR, 1,
1404 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
1406 /* round up to a word */
1410 /* set up DMA byte count */
1411 ed_nic_outb(sc, ED_P0_RBCR0, amount);
1412 ed_nic_outb(sc, ED_P0_RBCR1, amount >> 8);
1414 /* set up source address in NIC mem */
1415 ed_nic_outb(sc, ED_P0_RSAR0, src);
1416 ed_nic_outb(sc, ED_P0_RSAR1, src >> 8);
1418 ed_nic_outb(sc, ED_P0_CR, ED_CR_RD0 | ED_CR_STA);
1421 ed_asic_insw(sc, ED_NOVELL_DATA, dst, amount / 2);
1423 ed_asic_insb(sc, ED_NOVELL_DATA, dst, amount);
1427 * Stripped down routine for writing a linear buffer to NIC memory.
1428 * Only used in the probe routine to test the memory. 'len' must
1432 ed_pio_writemem(struct ed_softc *sc, uint8_t *src, uint16_t dst, uint16_t len)
1434 int maxwait = 200; /* about 240us */
1436 /* select page 0 registers */
1437 ed_nic_barrier(sc, ED_P0_CR, 1,
1438 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
1439 ed_nic_outb(sc, ED_P0_CR, ED_CR_RD2 | ED_CR_STA);
1440 ed_nic_barrier(sc, ED_P0_CR, 1,
1441 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
1443 /* reset remote DMA complete flag */
1444 ed_nic_outb(sc, ED_P0_ISR, ED_ISR_RDC);
1446 /* set up DMA byte count */
1447 ed_nic_outb(sc, ED_P0_RBCR0, len);
1448 ed_nic_outb(sc, ED_P0_RBCR1, len >> 8);
1450 /* set up destination address in NIC mem */
1451 ed_nic_outb(sc, ED_P0_RSAR0, dst);
1452 ed_nic_outb(sc, ED_P0_RSAR1, dst >> 8);
1454 /* set remote DMA write */
1455 ed_nic_outb(sc, ED_P0_CR, ED_CR_RD1 | ED_CR_STA);
1458 ed_asic_outsw(sc, ED_NOVELL_DATA, src, len / 2);
1460 ed_asic_outsb(sc, ED_NOVELL_DATA, src, len);
1463 * Wait for remote DMA complete. This is necessary because on the
1464 * transmit side, data is handled internally by the NIC in bursts and
1465 * we can't start another remote DMA until this one completes. Not
1466 * waiting causes really bad things to happen - like the NIC
1467 * irrecoverably jamming the ISA bus.
1469 while (((ed_nic_inb(sc, ED_P0_ISR) & ED_ISR_RDC) != ED_ISR_RDC) &&
1475 * Write an mbuf chain to the destination NIC memory address using
1479 ed_pio_write_mbufs(struct ed_softc *sc, struct mbuf *m, bus_size_t dst)
1481 struct ifnet *ifp = sc->ifp;
1482 unsigned short total_len, dma_len;
1484 int maxwait = 200; /* about 240us */
1486 ED_ASSERT_LOCKED(sc);
1488 /* Regular Novell cards */
1489 /* First, count up the total number of bytes to copy */
1490 for (total_len = 0, mp = m; mp; mp = mp->m_next)
1491 total_len += mp->m_len;
1493 dma_len = total_len;
1494 if (sc->isa16bit && (dma_len & 1))
1497 /* select page 0 registers */
1498 ed_nic_barrier(sc, ED_P0_CR, 1,
1499 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
1500 ed_nic_outb(sc, ED_P0_CR, ED_CR_RD2 | ED_CR_STA);
1501 ed_nic_barrier(sc, ED_P0_CR, 1,
1502 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
1504 /* reset remote DMA complete flag */
1505 ed_nic_outb(sc, ED_P0_ISR, ED_ISR_RDC);
1507 /* set up DMA byte count */
1508 ed_nic_outb(sc, ED_P0_RBCR0, dma_len);
1509 ed_nic_outb(sc, ED_P0_RBCR1, dma_len >> 8);
1511 /* set up destination address in NIC mem */
1512 ed_nic_outb(sc, ED_P0_RSAR0, dst);
1513 ed_nic_outb(sc, ED_P0_RSAR1, dst >> 8);
1515 /* set remote DMA write */
1516 ed_nic_outb(sc, ED_P0_CR, ED_CR_RD1 | ED_CR_STA);
1519 * Transfer the mbuf chain to the NIC memory.
1520 * 16-bit cards require that data be transferred as words, and only words.
1521 * So that case requires some extra code to patch over odd-length mbufs.
1524 if (!sc->isa16bit) {
1525 /* NE1000s are easy */
1528 ed_asic_outsb(sc, ED_NOVELL_DATA,
1529 m->m_data, m->m_len);
1533 /* NE2000s are a pain */
1546 data = mtod(m, caddr_t);
1547 /* finish the last word */
1549 saveword.b[1] = *data;
1550 ed_asic_outw(sc, ED_NOVELL_DATA,
1556 /* output contiguous words */
1558 ed_asic_outsw(sc, ED_NOVELL_DATA,
1563 /* save last byte, if necessary */
1565 saveword.b[0] = *data;
1571 /* spit last byte */
1573 ed_asic_outw(sc, ED_NOVELL_DATA, saveword.w);
1577 * Wait for remote DMA complete. This is necessary because on the
1578 * transmit side, data is handled internally by the NIC in bursts and
1579 * we can't start another remote DMA until this one completes. Not
1580 * waiting causes really bad things to happen - like the NIC
1581 * irrecoverably jamming the ISA bus.
1583 while (((ed_nic_inb(sc, ED_P0_ISR) & ED_ISR_RDC) != ED_ISR_RDC) &&
1588 log(LOG_WARNING, "%s: remote transmit DMA failed to complete\n",
1597 ed_setrcr(struct ed_softc *sc)
1599 struct ifnet *ifp = sc->ifp;
1603 ED_ASSERT_LOCKED(sc);
1605 /* Bit 6 in AX88190 RCR register must be set. */
1606 if (sc->chip_type == ED_CHIP_TYPE_AX88190 ||
1607 sc->chip_type == ED_CHIP_TYPE_AX88790)
1612 /* set page 1 registers */
1613 ed_nic_barrier(sc, ED_P0_CR, 1,
1614 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
1615 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_PAGE_1 | ED_CR_STP);
1616 ed_nic_barrier(sc, ED_P0_CR, 1,
1617 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
1619 if (ifp->if_flags & IFF_PROMISC) {
1622 * Reconfigure the multicast filter.
1624 for (i = 0; i < 8; i++)
1625 ed_nic_outb(sc, ED_P1_MAR(i), 0xff);
1628 * And turn on promiscuous mode. Also enable reception of
1629 * runts and packets with CRC & alignment errors.
1631 /* Set page 0 registers */
1632 ed_nic_barrier(sc, ED_P0_CR, 1,
1633 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
1634 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STP);
1635 ed_nic_barrier(sc, ED_P0_CR, 1,
1636 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
1638 ed_nic_outb(sc, ED_P0_RCR, ED_RCR_PRO | ED_RCR_AM |
1639 ED_RCR_AB | ED_RCR_AR | ED_RCR_SEP | reg1);
1641 /* set up multicast addresses and filter modes */
1642 if (ifp->if_flags & IFF_MULTICAST) {
1645 if (ifp->if_flags & IFF_ALLMULTI) {
1646 mcaf[0] = 0xffffffff;
1647 mcaf[1] = 0xffffffff;
1649 ed_ds_getmcaf(sc, mcaf);
1652 * Set multicast filter on chip.
1654 for (i = 0; i < 8; i++)
1655 ed_nic_outb(sc, ED_P1_MAR(i), ((u_char *) mcaf)[i]);
1657 /* Set page 0 registers */
1658 ed_nic_barrier(sc, ED_P0_CR, 1,
1659 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
1660 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STP);
1661 ed_nic_barrier(sc, ED_P0_CR, 1,
1662 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
1664 ed_nic_outb(sc, ED_P0_RCR, ED_RCR_AM | ED_RCR_AB | reg1);
1668 * Initialize multicast address hashing registers to
1669 * not accept multicasts.
1671 for (i = 0; i < 8; ++i)
1672 ed_nic_outb(sc, ED_P1_MAR(i), 0x00);
1674 /* Set page 0 registers */
1675 ed_nic_barrier(sc, ED_P0_CR, 1,
1676 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
1677 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STP);
1679 ed_nic_outb(sc, ED_P0_RCR, ED_RCR_AB | reg1);
1686 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STA);
1690 * Compute the multicast address filter from the
1691 * list of multicast addresses we need to listen to.
1694 ed_ds_getmcaf(struct ed_softc *sc, uint32_t *mcaf)
1697 u_char *af = (u_char *) mcaf;
1698 struct ifmultiaddr *ifma;
1703 if_maddr_rlock(sc->ifp);
1704 CK_STAILQ_FOREACH(ifma, &sc->ifp->if_multiaddrs, ifma_link) {
1705 if (ifma->ifma_addr->sa_family != AF_LINK)
1707 index = ether_crc32_be(LLADDR((struct sockaddr_dl *)
1708 ifma->ifma_addr), ETHER_ADDR_LEN) >> 26;
1709 af[index >> 3] |= 1 << (index & 7);
1711 if_maddr_runlock(sc->ifp);
1715 ed_isa_mem_ok(device_t dev, u_long pmem, u_int memsize)
1717 if (pmem < 0xa0000 || pmem + memsize > 0x1000000) {
1718 device_printf(dev, "Invalid ISA memory address range "
1719 "configured: 0x%lx - 0x%lx\n", pmem, pmem + memsize);
1726 ed_clear_memory(device_t dev)
1728 struct ed_softc *sc = device_get_softc(dev);
1731 bus_space_set_region_1(sc->mem_bst, sc->mem_bsh, sc->mem_start,
1734 for (i = 0; i < sc->mem_size; i++) {
1735 if (bus_space_read_1(sc->mem_bst, sc->mem_bsh,
1736 sc->mem_start + i)) {
1737 device_printf(dev, "failed to clear shared memory at "
1738 "0x%jx - check configuration\n",
1739 (uintmax_t)rman_get_start(sc->mem_res) + i);
1747 ed_shmem_write_mbufs(struct ed_softc *sc, struct mbuf *m, bus_size_t dst)
1752 * Special case setup for 16 bit boards...
1755 switch (sc->vendor) {
1758 * For 16bit 3Com boards (which have 16k of
1759 * memory), we have the xmit buffers in a
1760 * different page of memory ('page 0') - so
1763 case ED_VENDOR_3COM:
1764 ed_asic_outb(sc, ED_3COM_GACFR, ED_3COM_GACFR_RSEL);
1768 * Enable 16bit access to shared memory on
1771 * XXX - same as ed_enable_16bit_access()
1773 case ED_VENDOR_WD_SMC:
1774 ed_asic_outb(sc, ED_WD_LAAR,
1775 sc->wd_laar_proto | ED_WD_LAAR_M16EN);
1776 if (sc->chip_type == ED_CHIP_TYPE_WD790)
1777 ed_asic_outb(sc, ED_WD_MSR, ED_WD_MSR_MENB);
1781 for (len = 0; m != NULL; m = m->m_next) {
1786 bus_space_write_region_2(sc->mem_bst,
1788 mtod(m, uint16_t *), m->m_len / 2);
1789 if ((m->m_len & 1) != 0)
1790 bus_space_write_1(sc->mem_bst, sc->mem_bsh,
1792 *(mtod(m, uint8_t *) + m->m_len - 1));
1794 bus_space_write_region_1(sc->mem_bst,
1796 mtod(m, uint8_t *), m->m_len);
1802 * Restore previous shared memory access
1805 switch (sc->vendor) {
1807 case ED_VENDOR_3COM:
1808 ed_asic_outb(sc, ED_3COM_GACFR,
1809 ED_3COM_GACFR_RSEL | ED_3COM_GACFR_MBS0);
1812 case ED_VENDOR_WD_SMC:
1813 /* XXX - same as ed_disable_16bit_access() */
1814 if (sc->chip_type == ED_CHIP_TYPE_WD790)
1815 ed_asic_outb(sc, ED_WD_MSR, 0x00);
1816 ed_asic_outb(sc, ED_WD_LAAR,
1817 sc->wd_laar_proto & ~ED_WD_LAAR_M16EN);
1825 * Generic ifmedia support. By default, the DP8390-based cards don't know
1826 * what their network attachment really is, or even if it is valid (except
1827 * upon successful transmission of a packet). To play nicer with dhclient, as
1828 * well as to fit in with a framework where some cards can provde more
1829 * detailed information, make sure that we use this as a fallback.
1832 ed_gen_ifmedia_ioctl(struct ed_softc *sc, struct ifreq *ifr, u_long command)
1834 return (ifmedia_ioctl(sc->ifp, ifr, &sc->ifmedia, command));
1838 ed_gen_ifmedia_upd(struct ifnet *ifp)
1844 ed_gen_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
1846 ifmr->ifm_active = IFM_ETHER | IFM_AUTO;
1847 ifmr->ifm_status = IFM_AVALID | IFM_ACTIVE;
1851 ed_gen_ifmedia_init(struct ed_softc *sc)
1853 sc->sc_media_ioctl = &ed_gen_ifmedia_ioctl;
1854 ifmedia_init(&sc->ifmedia, 0, ed_gen_ifmedia_upd, ed_gen_ifmedia_sts);
1855 ifmedia_add(&sc->ifmedia, IFM_ETHER | IFM_AUTO, 0, 0);
1856 ifmedia_set(&sc->ifmedia, IFM_ETHER | IFM_AUTO);