2 * Copyright (c) 1995, David Greenman
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice unmodified, this list of conditions, and the following
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
32 * Device driver for National Semiconductor DS8390/WD83C690 based ethernet
33 * adapters. By David Greenman, 29-April-1993
35 * Currently supports the Western Digital/SMC 8003 and 8013 series,
36 * the SMC Elite Ultra (8216), the 3Com 3c503, the NE1000 and NE2000,
37 * and a variety of similar clones.
43 #include <sys/param.h>
44 #include <sys/systm.h>
45 #include <sys/sockio.h>
46 #include <sys/kernel.h>
47 #include <sys/malloc.h>
49 #include <sys/socket.h>
50 #include <sys/sysctl.h>
51 #include <sys/syslog.h>
55 #include <machine/bus.h>
57 #include <machine/resource.h>
59 #include <net/ethernet.h>
61 #include <net/if_var.h>
62 #include <net/if_arp.h>
63 #include <net/if_dl.h>
64 #include <net/if_mib.h>
65 #include <net/if_media.h>
66 #include <net/if_types.h>
70 #include <dev/ed/if_edreg.h>
71 #include <dev/ed/if_edvar.h>
74 devclass_t ed_devclass;
76 static void ed_init(void *);
77 static void ed_init_locked(struct ed_softc *);
78 static int ed_ioctl(struct ifnet *, u_long, caddr_t);
79 static void ed_start(struct ifnet *);
80 static void ed_start_locked(struct ifnet *);
81 static void ed_reset(struct ifnet *);
82 static void ed_tick(void *);
83 static void ed_watchdog(struct ed_softc *);
85 static void ed_ds_getmcaf(struct ed_softc *, uint32_t *);
87 static void ed_get_packet(struct ed_softc *, bus_size_t, u_short);
88 static void ed_stop_hw(struct ed_softc *sc);
90 static __inline void ed_rint(struct ed_softc *);
91 static __inline void ed_xmit(struct ed_softc *);
92 static __inline void ed_ring_copy(struct ed_softc *, bus_size_t, char *,
95 static void ed_setrcr(struct ed_softc *);
98 * Generic probe routine for testing for the existance of a DS8390.
99 * Must be called after the NIC has just been reset. This routine
100 * works by looking at certain register values that are guaranteed
101 * to be initialized a certain way after power-up or reset. Seems
102 * not to currently work on the 83C690.
106 * Register reset bits set bits
107 * Command Register (CR) TXP, STA RD2, STP
108 * Interrupt Status (ISR) RST
109 * Interrupt Mask (IMR) All bits
110 * Data Control (DCR) LAS
111 * Transmit Config. (TCR) LB1, LB0
113 * We only look at the CR and ISR registers, however, because looking at
114 * the others would require changing register pages (which would be
115 * intrusive if this isn't an 8390).
117 * Return 1 if 8390 was found, 0 if not.
121 ed_probe_generic8390(struct ed_softc *sc)
123 if ((ed_nic_inb(sc, ED_P0_CR) &
124 (ED_CR_RD2 | ED_CR_TXP | ED_CR_STA | ED_CR_STP)) !=
125 (ED_CR_RD2 | ED_CR_STP))
127 if ((ed_nic_inb(sc, ED_P0_ISR) & ED_ISR_RST) != ED_ISR_RST)
134 ed_disable_16bit_access(struct ed_softc *sc)
137 * Disable 16 bit access to shared memory
139 if (sc->isa16bit && sc->vendor == ED_VENDOR_WD_SMC) {
140 if (sc->chip_type == ED_CHIP_TYPE_WD790)
141 ed_asic_outb(sc, ED_WD_MSR, 0x00);
142 ed_asic_outb(sc, ED_WD_LAAR,
143 sc->wd_laar_proto & ~ED_WD_LAAR_M16EN);
148 ed_enable_16bit_access(struct ed_softc *sc)
150 if (sc->isa16bit && sc->vendor == ED_VENDOR_WD_SMC) {
151 ed_asic_outb(sc, ED_WD_LAAR,
152 sc->wd_laar_proto | ED_WD_LAAR_M16EN);
153 if (sc->chip_type == ED_CHIP_TYPE_WD790)
154 ed_asic_outb(sc, ED_WD_MSR, ED_WD_MSR_MENB);
159 * Allocate a port resource with the given resource id.
162 ed_alloc_port(device_t dev, int rid, int size)
164 struct ed_softc *sc = device_get_softc(dev);
165 struct resource *res;
167 res = bus_alloc_resource_anywhere(dev, SYS_RES_IOPORT, &rid,
171 sc->port_used = size;
172 sc->port_bst = rman_get_bustag(res);
173 sc->port_bsh = rman_get_bushandle(res);
180 * Allocate a memory resource with the given resource id.
183 ed_alloc_memory(device_t dev, int rid, int size)
185 struct ed_softc *sc = device_get_softc(dev);
186 struct resource *res;
188 res = bus_alloc_resource_anywhere(dev, SYS_RES_MEMORY, &rid,
193 sc->mem_bst = rman_get_bustag(res);
194 sc->mem_bsh = rman_get_bushandle(res);
201 * Allocate an irq resource with the given resource id.
204 ed_alloc_irq(device_t dev, int rid, int flags)
206 struct ed_softc *sc = device_get_softc(dev);
207 struct resource *res;
209 res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE | flags);
218 * Release all resources
221 ed_release_resources(device_t dev)
223 struct ed_softc *sc = device_get_softc(dev);
226 bus_free_resource(dev, SYS_RES_IOPORT, sc->port_res);
228 bus_free_resource(dev, SYS_RES_IOPORT, sc->port_res2);
230 bus_free_resource(dev, SYS_RES_MEMORY, sc->mem_res);
232 bus_free_resource(dev, SYS_RES_IRQ, sc->irq_res);
242 * Install interface into kernel networking data structures
245 ed_attach(device_t dev)
247 struct ed_softc *sc = device_get_softc(dev);
252 ifp = sc->ifp = if_alloc(IFT_ETHER);
254 device_printf(dev, "can not if_alloc()\n");
259 if (sc->readmem == NULL) {
260 if (sc->mem_shared) {
262 sc->readmem = ed_shmem_readmem16;
264 sc->readmem = ed_shmem_readmem8;
266 sc->readmem = ed_pio_readmem;
269 if (sc->sc_write_mbufs == NULL) {
270 device_printf(dev, "No write mbufs routine set\n");
274 callout_init_mtx(&sc->tick_ch, ED_MUTEX(sc), 0);
276 * Set interface to stopped condition (reset)
281 * Initialize ifnet structure
284 if_initname(ifp, device_get_name(dev), device_get_unit(dev));
285 ifp->if_start = ed_start;
286 ifp->if_ioctl = ed_ioctl;
287 ifp->if_init = ed_init;
288 IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen);
289 ifp->if_snd.ifq_drv_maxlen = ifqmaxlen;
290 IFQ_SET_READY(&ifp->if_snd);
291 ifp->if_linkmib = &sc->mibdata;
292 ifp->if_linkmiblen = sizeof sc->mibdata;
294 * XXX - should do a better job.
296 if (sc->chip_type == ED_CHIP_TYPE_WD790)
297 sc->mibdata.dot3StatsEtherChipSet =
298 DOT3CHIPSET(dot3VendorWesternDigital,
299 dot3ChipSetWesternDigital83C790);
301 sc->mibdata.dot3StatsEtherChipSet =
302 DOT3CHIPSET(dot3VendorNational,
303 dot3ChipSetNational8390);
304 sc->mibdata.dot3Compliance = DOT3COMPLIANCE_COLLS;
306 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
308 * Set default state for LINK2 flag (used to disable the
309 * tranceiver for AUI operation), based on config option.
310 * We only set this flag before we attach the device, so there's
311 * no race. It is convenient to allow users to turn this off
312 * by default in the kernel config, but given our more advanced
313 * boot time configuration options, this might no longer be needed.
315 if (device_get_flags(dev) & ED_FLAGS_DISABLE_TRANCEIVER)
316 ifp->if_flags |= IFF_LINK2;
319 * Attach the interface
321 ether_ifattach(ifp, sc->enaddr);
322 /* device attach does transition from UNCONFIGURED to IDLE state */
324 sc->tx_mem = sc->txb_cnt * ED_PAGE_SIZE * ED_TXBUF_SIZE;
325 sc->rx_mem = (sc->rec_page_stop - sc->rec_page_start) * ED_PAGE_SIZE;
326 SYSCTL_ADD_STRING(device_get_sysctl_ctx(dev),
327 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
328 0, "type", CTLFLAG_RD, sc->type_str, 0,
329 "Type of chip in card");
330 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev),
331 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
332 1, "TxMem", CTLFLAG_RD, &sc->tx_mem, 0,
333 "Memory set aside for transmitting packets");
334 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev),
335 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
336 2, "RxMem", CTLFLAG_RD, &sc->rx_mem, 0,
337 "Memory set aside for receiving packets");
338 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev),
339 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
340 3, "Mem", CTLFLAG_RD, &sc->mem_size, 0,
341 "Total Card Memory");
343 if (sc->type_str && (*sc->type_str != 0))
344 device_printf(dev, "type %s ", sc->type_str);
346 device_printf(dev, "type unknown (0x%x) ", sc->type);
349 if (sc->vendor == ED_VENDOR_HP)
351 (sc->hpp_id & ED_HPP_ID_16_BIT_ACCESS) ?
353 sc->hpp_mem_start ? "memory mapped" : "regular");
356 printf("%s", sc->isa16bit ? "(16 bit)" : "(8 bit)");
358 #if defined(ED_HPP) || defined(ED_3C503)
359 printf("%s", (((sc->vendor == ED_VENDOR_3COM) ||
360 (sc->vendor == ED_VENDOR_HP)) &&
361 (ifp->if_flags & IFF_LINK2)) ?
362 " tranceiver disabled" : "");
370 * Detach the driver from the hardware and other systems in the kernel.
373 ed_detach(device_t dev)
375 struct ed_softc *sc = device_get_softc(dev);
376 struct ifnet *ifp = sc->ifp;
378 if (mtx_initialized(ED_MUTEX(sc)))
379 ED_ASSERT_UNLOCKED(sc);
382 if (bus_child_present(dev))
384 ifp->if_drv_flags &= ~IFF_DRV_RUNNING;
387 callout_drain(&sc->tick_ch);
389 if (sc->irq_res != NULL && sc->irq_handle)
390 bus_teardown_intr(dev, sc->irq_res, sc->irq_handle);
391 ed_release_resources(dev);
393 device_delete_child(dev, sc->miibus);
394 if (mtx_initialized(ED_MUTEX(sc)))
396 bus_generic_detach(dev);
404 ed_reset(struct ifnet *ifp)
406 struct ed_softc *sc = ifp->if_softc;
408 ED_ASSERT_LOCKED(sc);
410 * Stop interface and re-initialize.
417 ed_stop_hw(struct ed_softc *sc)
422 * Stop everything on the interface, and select page 0 registers.
424 ed_nic_barrier(sc, ED_P0_CR, 1,
425 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
426 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STP);
427 ed_nic_barrier(sc, ED_P0_CR, 1,
428 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
431 * Wait for interface to enter stopped state, but limit # of checks to
432 * 'n' (about 5ms). It shouldn't even take 5us on modern DS8390's, but
433 * just in case it's an old one.
435 * The AX88x90 chips don't seem to implement this behavor. The
436 * datasheets say it is only turned on when the chip enters a RESET
437 * state and is silent about behavior for the stopped state we just
440 if (sc->chip_type == ED_CHIP_TYPE_AX88190 ||
441 sc->chip_type == ED_CHIP_TYPE_AX88790)
443 while (((ed_nic_inb(sc, ED_P0_ISR) & ED_ISR_RST) == 0) && --n)
446 device_printf(sc->dev, "ed_stop_hw RST never set\n");
450 * Take interface offline.
453 ed_stop(struct ed_softc *sc)
455 ED_ASSERT_LOCKED(sc);
456 callout_stop(&sc->tick_ch);
461 * Periodic timer used to drive the watchdog and attachment-specific
470 ED_ASSERT_LOCKED(sc);
473 if (sc->tx_timer != 0 && --sc->tx_timer == 0)
475 callout_reset(&sc->tick_ch, hz, ed_tick, sc);
479 * Device timeout/watchdog routine. Entered if the device neglects to
480 * generate an interrupt after a transmit has been started on it.
483 ed_watchdog(struct ed_softc *sc)
488 log(LOG_ERR, "%s: device timeout\n", ifp->if_xname);
489 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1);
500 struct ed_softc *sc = xsc;
502 ED_ASSERT_UNLOCKED(sc);
509 ed_init_locked(struct ed_softc *sc)
511 struct ifnet *ifp = sc->ifp;
514 ED_ASSERT_LOCKED(sc);
517 * Initialize the NIC in the exact order outlined in the NS manual.
518 * This init procedure is "mandatory"...don't change what or when
522 /* reset transmitter flags */
530 /* This variable is used below - don't move this assignment */
531 sc->next_packet = sc->rec_page_start + 1;
534 * Set interface for page 0, Remote DMA complete, Stopped
536 ed_nic_barrier(sc, ED_P0_CR, 1,
537 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
538 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STP);
539 ed_nic_barrier(sc, ED_P0_CR, 1,
540 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
544 * Set FIFO threshold to 8, No auto-init Remote DMA, byte
545 * order=80x86, word-wide DMA xfers,
547 ed_nic_outb(sc, ED_P0_DCR, ED_DCR_FT1 | ED_DCR_WTS | ED_DCR_LS);
550 * Same as above, but byte-wide DMA xfers
552 ed_nic_outb(sc, ED_P0_DCR, ED_DCR_FT1 | ED_DCR_LS);
555 * Clear Remote Byte Count Registers
557 ed_nic_outb(sc, ED_P0_RBCR0, 0);
558 ed_nic_outb(sc, ED_P0_RBCR1, 0);
561 * For the moment, don't store incoming packets in memory.
563 ed_nic_outb(sc, ED_P0_RCR, ED_RCR_MON);
566 * Place NIC in internal loopback mode
568 ed_nic_outb(sc, ED_P0_TCR, ED_TCR_LB0);
571 * Initialize transmit/receive (ring-buffer) Page Start
573 ed_nic_outb(sc, ED_P0_TPSR, sc->tx_page_start);
574 ed_nic_outb(sc, ED_P0_PSTART, sc->rec_page_start);
575 /* Set lower bits of byte addressable framing to 0 */
576 if (sc->chip_type == ED_CHIP_TYPE_WD790)
577 ed_nic_outb(sc, 0x09, 0);
580 * Initialize Receiver (ring-buffer) Page Stop and Boundry
582 ed_nic_outb(sc, ED_P0_PSTOP, sc->rec_page_stop);
583 ed_nic_outb(sc, ED_P0_BNRY, sc->rec_page_start);
586 * Clear all interrupts. A '1' in each bit position clears the
587 * corresponding flag.
589 ed_nic_outb(sc, ED_P0_ISR, 0xff);
592 * Enable the following interrupts: receive/transmit complete,
593 * receive/transmit error, and Receiver OverWrite.
595 * Counter overflow and Remote DMA complete are *not* enabled.
597 ed_nic_outb(sc, ED_P0_IMR,
598 ED_IMR_PRXE | ED_IMR_PTXE | ED_IMR_RXEE | ED_IMR_TXEE | ED_IMR_OVWE);
601 * Program Command Register for page 1
603 ed_nic_barrier(sc, ED_P0_CR, 1,
604 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
605 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_PAGE_1 | ED_CR_STP);
606 ed_nic_barrier(sc, ED_P0_CR, 1,
607 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
610 * Copy out our station address
612 for (i = 0; i < ETHER_ADDR_LEN; ++i)
613 ed_nic_outb(sc, ED_P1_PAR(i), IF_LLADDR(sc->ifp)[i]);
616 * Set Current Page pointer to next_packet (initialized above)
618 ed_nic_outb(sc, ED_P1_CURR, sc->next_packet);
621 * Program Receiver Configuration Register and multicast filter. CR is
622 * set to page 0 on return.
627 * Take interface out of loopback
629 ed_nic_outb(sc, ED_P0_TCR, 0);
635 * Set 'running' flag, and clear output active flag.
637 ifp->if_drv_flags |= IFF_DRV_RUNNING;
638 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
641 * ...and attempt to start output
643 ed_start_locked(ifp);
645 callout_reset(&sc->tick_ch, hz, ed_tick, sc);
649 * This routine actually starts the transmission on the interface
652 ed_xmit(struct ed_softc *sc)
656 len = sc->txb_len[sc->txb_next_tx];
659 * Set NIC for page 0 register access
661 ed_nic_barrier(sc, ED_P0_CR, 1,
662 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
663 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STA);
664 ed_nic_barrier(sc, ED_P0_CR, 1,
665 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
668 * Set TX buffer start page
670 ed_nic_outb(sc, ED_P0_TPSR, sc->tx_page_start +
671 sc->txb_next_tx * ED_TXBUF_SIZE);
676 ed_nic_outb(sc, ED_P0_TBCR0, len);
677 ed_nic_outb(sc, ED_P0_TBCR1, len >> 8);
680 * Set page 0, Remote DMA complete, Transmit Packet, and *Start*
682 ed_nic_barrier(sc, ED_P0_CR, 1,
683 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
684 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_TXP | ED_CR_STA);
685 ed_nic_barrier(sc, ED_P0_CR, 1,
686 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
690 * Point to next transmit buffer slot and wrap if necessary.
693 if (sc->txb_next_tx == sc->txb_cnt)
697 * Set a timer just in case we never hear from the board again
703 * Start output on interface.
704 * We make two assumptions here:
705 * 1) that the current priority is set to splimp _before_ this code
706 * is called *and* is returned to the appropriate priority after
708 * 2) that the IFF_DRV_OACTIVE flag is checked before this code is called
709 * (i.e. that the output part of the interface is idle)
712 ed_start(struct ifnet *ifp)
714 struct ed_softc *sc = ifp->if_softc;
716 ED_ASSERT_UNLOCKED(sc);
718 ed_start_locked(ifp);
723 ed_start_locked(struct ifnet *ifp)
725 struct ed_softc *sc = ifp->if_softc;
730 ED_ASSERT_LOCKED(sc);
734 * First, see if there are buffered packets and an idle transmitter -
735 * should never happen at this point.
737 if (sc->txb_inuse && (sc->xmit_busy == 0)) {
738 printf("ed: packets buffered, but transmitter idle\n");
743 * See if there is room to put another packet in the buffer.
745 if (sc->txb_inuse == sc->txb_cnt) {
748 * No room. Indicate this to the outside world and exit.
750 ifp->if_drv_flags |= IFF_DRV_OACTIVE;
753 IFQ_DRV_DEQUEUE(&ifp->if_snd, m);
757 * We are using the !OACTIVE flag to indicate to the outside
758 * world that we can accept an additional packet rather than
759 * that the transmitter is _actually_ active. Indeed, the
760 * transmitter may be active, but if we haven't filled all the
761 * buffers with data then we still want to accept more.
763 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
768 * Copy the mbuf chain into the transmit buffer
772 /* txb_new points to next open buffer slot */
773 buffer = sc->mem_start + (sc->txb_new * ED_TXBUF_SIZE * ED_PAGE_SIZE);
775 len = sc->sc_write_mbufs(sc, m, buffer);
781 sc->txb_len[sc->txb_new] = max(len, (ETHER_MIN_LEN-ETHER_CRC_LEN));
786 * Point to next buffer slot and wrap if necessary.
789 if (sc->txb_new == sc->txb_cnt)
792 if (sc->xmit_busy == 0)
796 * Tap off here if there is a bpf listener.
803 * Loop back to the top to possibly buffer more packets
809 * Ethernet interface receiver interrupt.
812 ed_rint(struct ed_softc *sc)
814 struct ifnet *ifp = sc->ifp;
817 struct ed_ring packet_hdr;
818 bus_size_t packet_ptr;
820 ED_ASSERT_LOCKED(sc);
823 * Set NIC to page 1 registers to get 'current' pointer
825 ed_nic_barrier(sc, ED_P0_CR, 1,
826 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
827 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_PAGE_1 | ED_CR_STA);
828 ed_nic_barrier(sc, ED_P0_CR, 1,
829 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
832 * 'sc->next_packet' is the logical beginning of the ring-buffer -
833 * i.e. it points to where new data has been buffered. The 'CURR'
834 * (current) register points to the logical end of the ring-buffer -
835 * i.e. it points to where additional new data will be added. We loop
836 * here until the logical beginning equals the logical end (or in
837 * other words, until the ring-buffer is empty).
839 while (sc->next_packet != ed_nic_inb(sc, ED_P1_CURR)) {
841 /* get pointer to this buffer's header structure */
842 packet_ptr = sc->mem_ring +
843 (sc->next_packet - sc->rec_page_start) * ED_PAGE_SIZE;
846 * The byte count includes a 4 byte header that was added by
849 sc->readmem(sc, packet_ptr, (char *) &packet_hdr,
851 len = packet_hdr.count;
852 if (len > (ETHER_MAX_LEN - ETHER_CRC_LEN + sizeof(struct ed_ring)) ||
853 len < (ETHER_MIN_LEN - ETHER_CRC_LEN + sizeof(struct ed_ring))) {
855 * Length is a wild value. There's a good chance that
856 * this was caused by the NIC being old and buggy.
857 * The bug is that the length low byte is duplicated
858 * in the high byte. Try to recalculate the length
859 * based on the pointer to the next packet. Also,
860 * need ot preserve offset into page.
862 * NOTE: sc->next_packet is pointing at the current
865 len &= ED_PAGE_SIZE - 1;
866 if (packet_hdr.next_packet >= sc->next_packet)
867 len += (packet_hdr.next_packet -
868 sc->next_packet) * ED_PAGE_SIZE;
871 ((packet_hdr.next_packet - sc->rec_page_start) +
872 (sc->rec_page_stop - sc->next_packet)) * ED_PAGE_SIZE;
874 * because buffers are aligned on 256-byte boundary,
875 * the length computed above is off by 256 in almost
876 * all cases. Fix it...
880 if (len > (ETHER_MAX_LEN - ETHER_CRC_LEN
881 + sizeof(struct ed_ring)))
882 sc->mibdata.dot3StatsFrameTooLongs++;
886 * Be fairly liberal about what we allow as a "reasonable"
887 * length so that a [crufty] packet will make it to BPF (and
888 * can thus be analyzed). Note that all that is really
889 * important is that we have a length that will fit into one
890 * mbuf cluster or less; the upper layer protocols can then
891 * figure out the length from their own length field(s). But
892 * make sure that we have at least a full ethernet header or
893 * we would be unable to call ether_input() later.
895 if ((len >= sizeof(struct ed_ring) + ETHER_HDR_LEN) &&
897 (packet_hdr.next_packet >= sc->rec_page_start) &&
898 (packet_hdr.next_packet < sc->rec_page_stop)) {
902 ed_get_packet(sc, packet_ptr + sizeof(struct ed_ring),
903 len - sizeof(struct ed_ring));
904 if_inc_counter(ifp, IFCOUNTER_IPACKETS, 1);
907 * Really BAD. The ring pointers are corrupted.
910 "%s: NIC memory corrupt - invalid packet length %d\n",
912 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1);
918 * Update next packet pointer
920 sc->next_packet = packet_hdr.next_packet;
923 * Update NIC boundry pointer - being careful to keep it one
924 * buffer behind. (as recommended by NS databook)
926 boundry = sc->next_packet - 1;
927 if (boundry < sc->rec_page_start)
928 boundry = sc->rec_page_stop - 1;
931 * Set NIC to page 0 registers to update boundry register
933 ed_nic_barrier(sc, ED_P0_CR, 1,
934 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
935 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STA);
936 ed_nic_barrier(sc, ED_P0_CR, 1,
937 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
938 ed_nic_outb(sc, ED_P0_BNRY, boundry);
941 * Set NIC to page 1 registers before looping to top (prepare
942 * to get 'CURR' current pointer)
944 ed_nic_barrier(sc, ED_P0_CR, 1,
945 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
946 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_PAGE_1 | ED_CR_STA);
947 ed_nic_barrier(sc, ED_P0_CR, 1,
948 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
953 * Ethernet interface interrupt processor
958 struct ed_softc *sc = (struct ed_softc*) arg;
959 struct ifnet *ifp = sc->ifp;
964 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) {
969 * Set NIC to page 0 registers
971 ed_nic_barrier(sc, ED_P0_CR, 1,
972 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
973 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STA);
974 ed_nic_barrier(sc, ED_P0_CR, 1,
975 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
978 * loop until there are no more new interrupts. When the card goes
979 * away, the hardware will read back 0xff. Looking at the interrupts,
980 * it would appear that 0xff is impossible as ED_ISR_RST is normally
981 * clear. ED_ISR_RDC is also normally clear and only set while
982 * we're transferring memory to the card and we're holding the
983 * ED_LOCK (so we can't get into here).
985 while ((isr = ed_nic_inb(sc, ED_P0_ISR)) != 0 && isr != 0xff) {
988 * reset all the bits that we are 'acknowledging' by writing a
989 * '1' to each bit position that was set (writing a '1'
992 ed_nic_outb(sc, ED_P0_ISR, isr);
995 * The AX88190 and AX88190A has problems acking an interrupt
996 * and having them clear. This interferes with top-level loop
997 * here. Wait for all the bits to clear.
999 * We limit this to 5000 iterations. At 1us per inb/outb,
1000 * this translates to about 15ms, which should be plenty of
1001 * time, and also gives protection in the card eject case.
1003 if (sc->chip_type == ED_CHIP_TYPE_AX88190) {
1004 count = 5000; /* 15ms */
1005 while (count-- && (ed_nic_inb(sc, ED_P0_ISR) & isr)) {
1006 ed_nic_outb(sc, ED_P0_ISR,0);
1007 ed_nic_outb(sc, ED_P0_ISR,isr);
1014 * Handle transmitter interrupts. Handle these first because
1015 * the receiver will reset the board under some conditions.
1017 if (isr & (ED_ISR_PTX | ED_ISR_TXE)) {
1018 u_char collisions = ed_nic_inb(sc, ED_P0_NCR) & 0x0f;
1021 * Check for transmit error. If a TX completed with an
1022 * error, we end up throwing the packet away. Really
1023 * the only error that is possible is excessive
1024 * collisions, and in this case it is best to allow
1025 * the automatic mechanisms of TCP to backoff the
1026 * flow. Of course, with UDP we're screwed, but this
1027 * is expected when a network is heavily loaded.
1029 (void) ed_nic_inb(sc, ED_P0_TSR);
1030 if (isr & ED_ISR_TXE) {
1034 * Excessive collisions (16)
1036 tsr = ed_nic_inb(sc, ED_P0_TSR);
1037 if ((tsr & ED_TSR_ABT)
1038 && (collisions == 0)) {
1041 * When collisions total 16, the
1042 * P0_NCR will indicate 0, and the
1046 sc->mibdata.dot3StatsExcessiveCollisions++;
1047 sc->mibdata.dot3StatsCollFrequencies[15]++;
1049 if (tsr & ED_TSR_OWC)
1050 sc->mibdata.dot3StatsLateCollisions++;
1051 if (tsr & ED_TSR_CDH)
1052 sc->mibdata.dot3StatsSQETestErrors++;
1053 if (tsr & ED_TSR_CRS)
1054 sc->mibdata.dot3StatsCarrierSenseErrors++;
1055 if (tsr & ED_TSR_FU)
1056 sc->mibdata.dot3StatsInternalMacTransmitErrors++;
1059 * update output errors counter
1061 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1);
1065 * Update total number of successfully
1066 * transmitted packets.
1068 if_inc_counter(ifp, IFCOUNTER_OPACKETS, 1);
1072 * reset tx busy and output active flags
1075 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
1078 * clear watchdog timer
1083 * Add in total number of collisions on last
1086 if_inc_counter(ifp, IFCOUNTER_COLLISIONS, collisions);
1087 switch(collisions) {
1092 sc->mibdata.dot3StatsSingleCollisionFrames++;
1093 sc->mibdata.dot3StatsCollFrequencies[0]++;
1096 sc->mibdata.dot3StatsMultipleCollisionFrames++;
1098 dot3StatsCollFrequencies[collisions-1]
1104 * Decrement buffer in-use count if not zero (can only
1105 * be zero if a transmitter interrupt occured while
1106 * not actually transmitting). If data is ready to
1107 * transmit, start it transmitting, otherwise defer
1108 * until after handling receiver
1110 if (sc->txb_inuse && --sc->txb_inuse)
1115 * Handle receiver interrupts
1117 if (isr & (ED_ISR_PRX | ED_ISR_RXE | ED_ISR_OVW)) {
1120 * Overwrite warning. In order to make sure that a
1121 * lockup of the local DMA hasn't occurred, we reset
1122 * and re-init the NIC. The NSC manual suggests only a
1123 * partial reset/re-init is necessary - but some chips
1124 * seem to want more. The DMA lockup has been seen
1125 * only with early rev chips - Methinks this bug was
1126 * fixed in later revs. -DG
1128 if (isr & ED_ISR_OVW) {
1129 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1);
1132 "%s: warning - receiver ring buffer overrun\n",
1137 * Stop/reset/re-init NIC
1143 * Receiver Error. One or more of: CRC error,
1144 * frame alignment error FIFO overrun, or
1147 if (isr & ED_ISR_RXE) {
1149 rsr = ed_nic_inb(sc, ED_P0_RSR);
1150 if (rsr & ED_RSR_CRC)
1151 sc->mibdata.dot3StatsFCSErrors++;
1152 if (rsr & ED_RSR_FAE)
1153 sc->mibdata.dot3StatsAlignmentErrors++;
1154 if (rsr & ED_RSR_FO)
1155 sc->mibdata.dot3StatsInternalMacReceiveErrors++;
1156 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1);
1158 if_printf(ifp, "receive error %x\n",
1159 ed_nic_inb(sc, ED_P0_RSR));
1164 * Go get the packet(s) XXX - Doing this on an
1165 * error is dubious because there shouldn't be
1166 * any data to get (we've configured the
1167 * interface to not accept packets with
1172 * Enable 16bit access to shared memory first
1175 ed_enable_16bit_access(sc);
1177 ed_disable_16bit_access(sc);
1182 * If it looks like the transmitter can take more data,
1183 * attempt to start output on the interface. This is done
1184 * after handling the receiver to give the receiver priority.
1186 if ((ifp->if_drv_flags & IFF_DRV_OACTIVE) == 0)
1187 ed_start_locked(ifp);
1190 * return NIC CR to standard state: page 0, remote DMA
1191 * complete, start (toggling the TXP bit off, even if was just
1192 * set in the transmit routine, is *okay* - it is 'edge'
1193 * triggered from low to high)
1195 ed_nic_barrier(sc, ED_P0_CR, 1,
1196 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
1197 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STA);
1198 ed_nic_barrier(sc, ED_P0_CR, 1,
1199 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
1202 * If the Network Talley Counters overflow, read them to reset
1203 * them. It appears that old 8390's won't clear the ISR flag
1204 * otherwise - resulting in an infinite loop.
1206 if (isr & ED_ISR_CNT) {
1207 (void) ed_nic_inb(sc, ED_P0_CNTR0);
1208 (void) ed_nic_inb(sc, ED_P0_CNTR1);
1209 (void) ed_nic_inb(sc, ED_P0_CNTR2);
1216 * Process an ioctl request.
1219 ed_ioctl(struct ifnet *ifp, u_long command, caddr_t data)
1221 struct ed_softc *sc = ifp->if_softc;
1222 struct ifreq *ifr = (struct ifreq *)data;
1228 * If the interface is marked up and stopped, then start it.
1229 * If we're up and already running, then it may be a mediachg.
1230 * If it is marked down and running, then stop it.
1233 if (ifp->if_flags & IFF_UP) {
1234 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0)
1236 else if (sc->sc_mediachg)
1237 sc->sc_mediachg(sc);
1239 if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
1241 ifp->if_drv_flags &= ~IFF_DRV_RUNNING;
1246 * Promiscuous flag may have changed, so reprogram the RCR.
1256 * Multicast list has changed; set the hardware filter
1267 if (sc->sc_media_ioctl == NULL) {
1271 sc->sc_media_ioctl(sc, ifr, command);
1275 error = ether_ioctl(ifp, command, data);
1282 * Given a source and destination address, copy 'amount' of a packet from
1283 * the ring buffer into a linear destination buffer. Takes into account
1286 static __inline void
1287 ed_ring_copy(struct ed_softc *sc, bus_size_t src, char *dst, u_short amount)
1291 /* does copy wrap to lower addr in ring buffer? */
1292 if (src + amount > sc->mem_end) {
1293 tmp_amount = sc->mem_end - src;
1294 /* copy amount up to end of NIC memory */
1295 sc->readmem(sc, src, dst, tmp_amount);
1296 amount -= tmp_amount;
1300 sc->readmem(sc, src, dst, amount);
1304 * Retreive packet from shared memory and send to the next level up via
1308 ed_get_packet(struct ed_softc *sc, bus_size_t buf, u_short len)
1310 struct ifnet *ifp = sc->ifp;
1311 struct ether_header *eh;
1314 /* Allocate a header mbuf */
1315 MGETHDR(m, M_NOWAIT, MT_DATA);
1318 m->m_pkthdr.rcvif = ifp;
1319 m->m_pkthdr.len = m->m_len = len;
1322 * We always put the received packet in a single buffer -
1323 * either with just an mbuf header or in a cluster attached
1324 * to the header. The +2 is to compensate for the alignment
1327 if ((len + 2) > MHLEN) {
1328 /* Attach an mbuf cluster */
1329 if (!(MCLGET(m, M_NOWAIT))) {
1336 * The +2 is to longword align the start of the real packet.
1337 * This is important for NFS.
1340 eh = mtod(m, struct ether_header *);
1343 * Get packet, including link layer address, from interface.
1345 ed_ring_copy(sc, buf, (char *)eh, len);
1347 m->m_pkthdr.len = m->m_len = len;
1350 (*ifp->if_input)(ifp, m);
1355 * Supporting routines
1359 * Given a NIC memory source address and a host memory destination
1360 * address, copy 'amount' from NIC to host using shared memory.
1361 * The 'amount' is rounded up to a word - okay as long as mbufs
1362 * are word sized. That's what the +1 is below.
1363 * This routine accesses things as 16 bit quantities.
1366 ed_shmem_readmem16(struct ed_softc *sc, bus_size_t src, uint8_t *dst,
1369 bus_space_read_region_2(sc->mem_bst, sc->mem_bsh, src, (uint16_t *)dst,
1374 * Given a NIC memory source address and a host memory destination
1375 * address, copy 'amount' from NIC to host using shared memory.
1376 * This routine accesses things as 8 bit quantities.
1379 ed_shmem_readmem8(struct ed_softc *sc, bus_size_t src, uint8_t *dst,
1382 bus_space_read_region_1(sc->mem_bst, sc->mem_bsh, src, dst, amount);
1386 * Given a NIC memory source address and a host memory destination
1387 * address, copy 'amount' from NIC to host using Programmed I/O.
1388 * The 'amount' is rounded up to a word - okay as long as mbufs
1390 * This routine is currently Novell-specific.
1393 ed_pio_readmem(struct ed_softc *sc, bus_size_t src, uint8_t *dst,
1396 /* Regular Novell cards */
1397 /* select page 0 registers */
1398 ed_nic_barrier(sc, ED_P0_CR, 1,
1399 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
1400 ed_nic_outb(sc, ED_P0_CR, ED_CR_RD2 | ED_CR_STA);
1401 ed_nic_barrier(sc, ED_P0_CR, 1,
1402 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
1404 /* round up to a word */
1408 /* set up DMA byte count */
1409 ed_nic_outb(sc, ED_P0_RBCR0, amount);
1410 ed_nic_outb(sc, ED_P0_RBCR1, amount >> 8);
1412 /* set up source address in NIC mem */
1413 ed_nic_outb(sc, ED_P0_RSAR0, src);
1414 ed_nic_outb(sc, ED_P0_RSAR1, src >> 8);
1416 ed_nic_outb(sc, ED_P0_CR, ED_CR_RD0 | ED_CR_STA);
1419 ed_asic_insw(sc, ED_NOVELL_DATA, dst, amount / 2);
1421 ed_asic_insb(sc, ED_NOVELL_DATA, dst, amount);
1425 * Stripped down routine for writing a linear buffer to NIC memory.
1426 * Only used in the probe routine to test the memory. 'len' must
1430 ed_pio_writemem(struct ed_softc *sc, uint8_t *src, uint16_t dst, uint16_t len)
1432 int maxwait = 200; /* about 240us */
1434 /* select page 0 registers */
1435 ed_nic_barrier(sc, ED_P0_CR, 1,
1436 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
1437 ed_nic_outb(sc, ED_P0_CR, ED_CR_RD2 | ED_CR_STA);
1438 ed_nic_barrier(sc, ED_P0_CR, 1,
1439 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
1441 /* reset remote DMA complete flag */
1442 ed_nic_outb(sc, ED_P0_ISR, ED_ISR_RDC);
1444 /* set up DMA byte count */
1445 ed_nic_outb(sc, ED_P0_RBCR0, len);
1446 ed_nic_outb(sc, ED_P0_RBCR1, len >> 8);
1448 /* set up destination address in NIC mem */
1449 ed_nic_outb(sc, ED_P0_RSAR0, dst);
1450 ed_nic_outb(sc, ED_P0_RSAR1, dst >> 8);
1452 /* set remote DMA write */
1453 ed_nic_outb(sc, ED_P0_CR, ED_CR_RD1 | ED_CR_STA);
1456 ed_asic_outsw(sc, ED_NOVELL_DATA, src, len / 2);
1458 ed_asic_outsb(sc, ED_NOVELL_DATA, src, len);
1461 * Wait for remote DMA complete. This is necessary because on the
1462 * transmit side, data is handled internally by the NIC in bursts and
1463 * we can't start another remote DMA until this one completes. Not
1464 * waiting causes really bad things to happen - like the NIC
1465 * irrecoverably jamming the ISA bus.
1467 while (((ed_nic_inb(sc, ED_P0_ISR) & ED_ISR_RDC) != ED_ISR_RDC) &&
1473 * Write an mbuf chain to the destination NIC memory address using
1477 ed_pio_write_mbufs(struct ed_softc *sc, struct mbuf *m, bus_size_t dst)
1479 struct ifnet *ifp = sc->ifp;
1480 unsigned short total_len, dma_len;
1482 int maxwait = 200; /* about 240us */
1484 ED_ASSERT_LOCKED(sc);
1486 /* Regular Novell cards */
1487 /* First, count up the total number of bytes to copy */
1488 for (total_len = 0, mp = m; mp; mp = mp->m_next)
1489 total_len += mp->m_len;
1491 dma_len = total_len;
1492 if (sc->isa16bit && (dma_len & 1))
1495 /* select page 0 registers */
1496 ed_nic_barrier(sc, ED_P0_CR, 1,
1497 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
1498 ed_nic_outb(sc, ED_P0_CR, ED_CR_RD2 | ED_CR_STA);
1499 ed_nic_barrier(sc, ED_P0_CR, 1,
1500 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
1502 /* reset remote DMA complete flag */
1503 ed_nic_outb(sc, ED_P0_ISR, ED_ISR_RDC);
1505 /* set up DMA byte count */
1506 ed_nic_outb(sc, ED_P0_RBCR0, dma_len);
1507 ed_nic_outb(sc, ED_P0_RBCR1, dma_len >> 8);
1509 /* set up destination address in NIC mem */
1510 ed_nic_outb(sc, ED_P0_RSAR0, dst);
1511 ed_nic_outb(sc, ED_P0_RSAR1, dst >> 8);
1513 /* set remote DMA write */
1514 ed_nic_outb(sc, ED_P0_CR, ED_CR_RD1 | ED_CR_STA);
1517 * Transfer the mbuf chain to the NIC memory.
1518 * 16-bit cards require that data be transferred as words, and only words.
1519 * So that case requires some extra code to patch over odd-length mbufs.
1522 if (!sc->isa16bit) {
1523 /* NE1000s are easy */
1526 ed_asic_outsb(sc, ED_NOVELL_DATA,
1527 m->m_data, m->m_len);
1531 /* NE2000s are a pain */
1544 data = mtod(m, caddr_t);
1545 /* finish the last word */
1547 saveword.b[1] = *data;
1548 ed_asic_outw(sc, ED_NOVELL_DATA,
1554 /* output contiguous words */
1556 ed_asic_outsw(sc, ED_NOVELL_DATA,
1561 /* save last byte, if necessary */
1563 saveword.b[0] = *data;
1569 /* spit last byte */
1571 ed_asic_outw(sc, ED_NOVELL_DATA, saveword.w);
1575 * Wait for remote DMA complete. This is necessary because on the
1576 * transmit side, data is handled internally by the NIC in bursts and
1577 * we can't start another remote DMA until this one completes. Not
1578 * waiting causes really bad things to happen - like the NIC
1579 * irrecoverably jamming the ISA bus.
1581 while (((ed_nic_inb(sc, ED_P0_ISR) & ED_ISR_RDC) != ED_ISR_RDC) &&
1586 log(LOG_WARNING, "%s: remote transmit DMA failed to complete\n",
1595 ed_setrcr(struct ed_softc *sc)
1597 struct ifnet *ifp = sc->ifp;
1601 ED_ASSERT_LOCKED(sc);
1603 /* Bit 6 in AX88190 RCR register must be set. */
1604 if (sc->chip_type == ED_CHIP_TYPE_AX88190 ||
1605 sc->chip_type == ED_CHIP_TYPE_AX88790)
1610 /* set page 1 registers */
1611 ed_nic_barrier(sc, ED_P0_CR, 1,
1612 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
1613 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_PAGE_1 | ED_CR_STP);
1614 ed_nic_barrier(sc, ED_P0_CR, 1,
1615 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
1617 if (ifp->if_flags & IFF_PROMISC) {
1620 * Reconfigure the multicast filter.
1622 for (i = 0; i < 8; i++)
1623 ed_nic_outb(sc, ED_P1_MAR(i), 0xff);
1626 * And turn on promiscuous mode. Also enable reception of
1627 * runts and packets with CRC & alignment errors.
1629 /* Set page 0 registers */
1630 ed_nic_barrier(sc, ED_P0_CR, 1,
1631 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
1632 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STP);
1633 ed_nic_barrier(sc, ED_P0_CR, 1,
1634 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
1636 ed_nic_outb(sc, ED_P0_RCR, ED_RCR_PRO | ED_RCR_AM |
1637 ED_RCR_AB | ED_RCR_AR | ED_RCR_SEP | reg1);
1639 /* set up multicast addresses and filter modes */
1640 if (ifp->if_flags & IFF_MULTICAST) {
1643 if (ifp->if_flags & IFF_ALLMULTI) {
1644 mcaf[0] = 0xffffffff;
1645 mcaf[1] = 0xffffffff;
1647 ed_ds_getmcaf(sc, mcaf);
1650 * Set multicast filter on chip.
1652 for (i = 0; i < 8; i++)
1653 ed_nic_outb(sc, ED_P1_MAR(i), ((u_char *) mcaf)[i]);
1655 /* Set page 0 registers */
1656 ed_nic_barrier(sc, ED_P0_CR, 1,
1657 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
1658 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STP);
1659 ed_nic_barrier(sc, ED_P0_CR, 1,
1660 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
1662 ed_nic_outb(sc, ED_P0_RCR, ED_RCR_AM | ED_RCR_AB | reg1);
1666 * Initialize multicast address hashing registers to
1667 * not accept multicasts.
1669 for (i = 0; i < 8; ++i)
1670 ed_nic_outb(sc, ED_P1_MAR(i), 0x00);
1672 /* Set page 0 registers */
1673 ed_nic_barrier(sc, ED_P0_CR, 1,
1674 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
1675 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STP);
1677 ed_nic_outb(sc, ED_P0_RCR, ED_RCR_AB | reg1);
1684 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STA);
1688 * Compute the multicast address filter from the
1689 * list of multicast addresses we need to listen to.
1692 ed_ds_getmcaf(struct ed_softc *sc, uint32_t *mcaf)
1695 u_char *af = (u_char *) mcaf;
1696 struct ifmultiaddr *ifma;
1701 if_maddr_rlock(sc->ifp);
1702 TAILQ_FOREACH(ifma, &sc->ifp->if_multiaddrs, ifma_link) {
1703 if (ifma->ifma_addr->sa_family != AF_LINK)
1705 index = ether_crc32_be(LLADDR((struct sockaddr_dl *)
1706 ifma->ifma_addr), ETHER_ADDR_LEN) >> 26;
1707 af[index >> 3] |= 1 << (index & 7);
1709 if_maddr_runlock(sc->ifp);
1713 ed_isa_mem_ok(device_t dev, u_long pmem, u_int memsize)
1715 if (pmem < 0xa0000 || pmem + memsize > 0x1000000) {
1716 device_printf(dev, "Invalid ISA memory address range "
1717 "configured: 0x%lx - 0x%lx\n", pmem, pmem + memsize);
1724 ed_clear_memory(device_t dev)
1726 struct ed_softc *sc = device_get_softc(dev);
1729 bus_space_set_region_1(sc->mem_bst, sc->mem_bsh, sc->mem_start,
1732 for (i = 0; i < sc->mem_size; i++) {
1733 if (bus_space_read_1(sc->mem_bst, sc->mem_bsh,
1734 sc->mem_start + i)) {
1735 device_printf(dev, "failed to clear shared memory at "
1736 "0x%jx - check configuration\n",
1737 (uintmax_t)rman_get_start(sc->mem_res) + i);
1745 ed_shmem_write_mbufs(struct ed_softc *sc, struct mbuf *m, bus_size_t dst)
1750 * Special case setup for 16 bit boards...
1753 switch (sc->vendor) {
1756 * For 16bit 3Com boards (which have 16k of
1757 * memory), we have the xmit buffers in a
1758 * different page of memory ('page 0') - so
1761 case ED_VENDOR_3COM:
1762 ed_asic_outb(sc, ED_3COM_GACFR, ED_3COM_GACFR_RSEL);
1766 * Enable 16bit access to shared memory on
1769 * XXX - same as ed_enable_16bit_access()
1771 case ED_VENDOR_WD_SMC:
1772 ed_asic_outb(sc, ED_WD_LAAR,
1773 sc->wd_laar_proto | ED_WD_LAAR_M16EN);
1774 if (sc->chip_type == ED_CHIP_TYPE_WD790)
1775 ed_asic_outb(sc, ED_WD_MSR, ED_WD_MSR_MENB);
1779 for (len = 0; m != NULL; m = m->m_next) {
1784 bus_space_write_region_2(sc->mem_bst,
1786 mtod(m, uint16_t *), m->m_len / 2);
1787 if ((m->m_len & 1) != 0)
1788 bus_space_write_1(sc->mem_bst, sc->mem_bsh,
1790 *(mtod(m, uint8_t *) + m->m_len - 1));
1792 bus_space_write_region_1(sc->mem_bst,
1794 mtod(m, uint8_t *), m->m_len);
1800 * Restore previous shared memory access
1803 switch (sc->vendor) {
1805 case ED_VENDOR_3COM:
1806 ed_asic_outb(sc, ED_3COM_GACFR,
1807 ED_3COM_GACFR_RSEL | ED_3COM_GACFR_MBS0);
1810 case ED_VENDOR_WD_SMC:
1811 /* XXX - same as ed_disable_16bit_access() */
1812 if (sc->chip_type == ED_CHIP_TYPE_WD790)
1813 ed_asic_outb(sc, ED_WD_MSR, 0x00);
1814 ed_asic_outb(sc, ED_WD_LAAR,
1815 sc->wd_laar_proto & ~ED_WD_LAAR_M16EN);
1823 * Generic ifmedia support. By default, the DP8390-based cards don't know
1824 * what their network attachment really is, or even if it is valid (except
1825 * upon successful transmission of a packet). To play nicer with dhclient, as
1826 * well as to fit in with a framework where some cards can provde more
1827 * detailed information, make sure that we use this as a fallback.
1830 ed_gen_ifmedia_ioctl(struct ed_softc *sc, struct ifreq *ifr, u_long command)
1832 return (ifmedia_ioctl(sc->ifp, ifr, &sc->ifmedia, command));
1836 ed_gen_ifmedia_upd(struct ifnet *ifp)
1842 ed_gen_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
1844 ifmr->ifm_active = IFM_ETHER | IFM_AUTO;
1845 ifmr->ifm_status = IFM_AVALID | IFM_ACTIVE;
1849 ed_gen_ifmedia_init(struct ed_softc *sc)
1851 sc->sc_media_ioctl = &ed_gen_ifmedia_ioctl;
1852 ifmedia_init(&sc->ifmedia, 0, ed_gen_ifmedia_upd, ed_gen_ifmedia_sts);
1853 ifmedia_add(&sc->ifmedia, IFM_ETHER | IFM_AUTO, 0, 0);
1854 ifmedia_set(&sc->ifmedia, IFM_ETHER | IFM_AUTO);