2 * Copyright (c) 1995, David Greenman
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice unmodified, this list of conditions, and the following
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
32 * Device driver for National Semiconductor DS8390/WD83C690 based ethernet
33 * adapters. By David Greenman, 29-April-1993
35 * Currently supports the Western Digital/SMC 8003 and 8013 series,
36 * the SMC Elite Ultra (8216), the 3Com 3c503, the NE1000 and NE2000,
37 * and a variety of similar clones.
43 #include <sys/param.h>
44 #include <sys/systm.h>
45 #include <sys/sockio.h>
47 #include <sys/kernel.h>
48 #include <sys/socket.h>
49 #include <sys/sysctl.h>
50 #include <sys/syslog.h>
54 #include <machine/bus.h>
56 #include <machine/resource.h>
58 #include <net/ethernet.h>
60 #include <net/if_arp.h>
61 #include <net/if_dl.h>
62 #include <net/if_mib.h>
63 #include <net/if_media.h>
64 #include <net/if_types.h>
68 #include <dev/ed/if_edreg.h>
69 #include <dev/ed/if_edvar.h>
72 devclass_t ed_devclass;
74 static void ed_init(void *);
75 static void ed_init_locked(struct ed_softc *);
76 static int ed_ioctl(struct ifnet *, u_long, caddr_t);
77 static void ed_start(struct ifnet *);
78 static void ed_start_locked(struct ifnet *);
79 static void ed_reset(struct ifnet *);
80 static void ed_watchdog(struct ifnet *);
82 static void ed_ds_getmcaf(struct ed_softc *, uint32_t *);
84 static void ed_get_packet(struct ed_softc *, bus_size_t, u_short);
85 static void ed_stop_hw(struct ed_softc *sc);
87 static __inline void ed_rint(struct ed_softc *);
88 static __inline void ed_xmit(struct ed_softc *);
89 static __inline void ed_ring_copy(struct ed_softc *, bus_size_t, char *,
92 static void ed_setrcr(struct ed_softc *);
95 * Generic probe routine for testing for the existance of a DS8390.
96 * Must be called after the NIC has just been reset. This routine
97 * works by looking at certain register values that are guaranteed
98 * to be initialized a certain way after power-up or reset. Seems
99 * not to currently work on the 83C690.
103 * Register reset bits set bits
104 * Command Register (CR) TXP, STA RD2, STP
105 * Interrupt Status (ISR) RST
106 * Interrupt Mask (IMR) All bits
107 * Data Control (DCR) LAS
108 * Transmit Config. (TCR) LB1, LB0
110 * We only look at the CR and ISR registers, however, because looking at
111 * the others would require changing register pages (which would be
112 * intrusive if this isn't an 8390).
114 * Return 1 if 8390 was found, 0 if not.
118 ed_probe_generic8390(struct ed_softc *sc)
120 if ((ed_nic_inb(sc, ED_P0_CR) &
121 (ED_CR_RD2 | ED_CR_TXP | ED_CR_STA | ED_CR_STP)) !=
122 (ED_CR_RD2 | ED_CR_STP))
124 if ((ed_nic_inb(sc, ED_P0_ISR) & ED_ISR_RST) != ED_ISR_RST)
131 ed_disable_16bit_access(struct ed_softc *sc)
134 * Disable 16 bit access to shared memory
136 if (sc->isa16bit && sc->vendor == ED_VENDOR_WD_SMC) {
137 if (sc->chip_type == ED_CHIP_TYPE_WD790)
138 ed_asic_outb(sc, ED_WD_MSR, 0x00);
139 ed_asic_outb(sc, ED_WD_LAAR,
140 sc->wd_laar_proto & ~ED_WD_LAAR_M16EN);
145 ed_enable_16bit_access(struct ed_softc *sc)
147 if (sc->isa16bit && sc->vendor == ED_VENDOR_WD_SMC) {
148 ed_asic_outb(sc, ED_WD_LAAR,
149 sc->wd_laar_proto | ED_WD_LAAR_M16EN);
150 if (sc->chip_type == ED_CHIP_TYPE_WD790)
151 ed_asic_outb(sc, ED_WD_MSR, ED_WD_MSR_MENB);
156 * Allocate a port resource with the given resource id.
159 ed_alloc_port(device_t dev, int rid, int size)
161 struct ed_softc *sc = device_get_softc(dev);
162 struct resource *res;
164 res = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid,
165 0ul, ~0ul, size, RF_ACTIVE);
169 sc->port_used = size;
170 sc->port_bst = rman_get_bustag(res);
171 sc->port_bsh = rman_get_bushandle(res);
178 * Allocate a memory resource with the given resource id.
181 ed_alloc_memory(device_t dev, int rid, int size)
183 struct ed_softc *sc = device_get_softc(dev);
184 struct resource *res;
186 res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid,
187 0ul, ~0ul, size, RF_ACTIVE);
192 sc->mem_bst = rman_get_bustag(res);
193 sc->mem_bsh = rman_get_bushandle(res);
200 * Allocate an irq resource with the given resource id.
203 ed_alloc_irq(device_t dev, int rid, int flags)
205 struct ed_softc *sc = device_get_softc(dev);
206 struct resource *res;
208 res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE | flags);
218 * Release all resources
221 ed_release_resources(device_t dev)
223 struct ed_softc *sc = device_get_softc(dev);
226 bus_release_resource(dev, SYS_RES_IOPORT,
227 sc->port_rid, sc->port_res);
231 bus_release_resource(dev, SYS_RES_MEMORY,
232 sc->mem_rid, sc->mem_res);
236 bus_release_resource(dev, SYS_RES_IRQ,
237 sc->irq_rid, sc->irq_res);
245 * Install interface into kernel networking data structures
248 ed_attach(device_t dev)
250 struct ed_softc *sc = device_get_softc(dev);
255 ifp = sc->ifp = if_alloc(IFT_ETHER);
257 device_printf(dev, "can not if_alloc()\n");
262 if (sc->readmem == NULL) {
263 if (sc->mem_shared) {
265 sc->readmem = ed_shmem_readmem16;
267 sc->readmem = ed_shmem_readmem8;
269 sc->readmem = ed_pio_readmem;
272 if (sc->sc_write_mbufs == NULL) {
273 device_printf(dev, "No write mbufs routine set\n");
277 callout_init_mtx(&sc->tick_ch, ED_MUTEX(sc), 0);
279 * Set interface to stopped condition (reset)
284 * Initialize ifnet structure
287 if_initname(ifp, device_get_name(dev), device_get_unit(dev));
288 ifp->if_start = ed_start;
289 ifp->if_ioctl = ed_ioctl;
290 ifp->if_watchdog = ed_watchdog;
291 ifp->if_init = ed_init;
292 IFQ_SET_MAXLEN(&ifp->if_snd, IFQ_MAXLEN);
293 ifp->if_snd.ifq_drv_maxlen = IFQ_MAXLEN;
294 IFQ_SET_READY(&ifp->if_snd);
295 ifp->if_linkmib = &sc->mibdata;
296 ifp->if_linkmiblen = sizeof sc->mibdata;
298 * XXX - should do a better job.
300 if (sc->chip_type == ED_CHIP_TYPE_WD790)
301 sc->mibdata.dot3StatsEtherChipSet =
302 DOT3CHIPSET(dot3VendorWesternDigital,
303 dot3ChipSetWesternDigital83C790);
305 sc->mibdata.dot3StatsEtherChipSet =
306 DOT3CHIPSET(dot3VendorNational,
307 dot3ChipSetNational8390);
308 sc->mibdata.dot3Compliance = DOT3COMPLIANCE_COLLS;
310 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
312 * Set default state for LINK2 flag (used to disable the
313 * tranceiver for AUI operation), based on config option.
314 * We only set this flag before we attach the device, so there's
315 * no race. It is convenient to allow users to turn this off
316 * by default in the kernel config, but given our more advanced
317 * boot time configuration options, this might no longer be needed.
319 if (device_get_flags(dev) & ED_FLAGS_DISABLE_TRANCEIVER)
320 ifp->if_flags |= IFF_LINK2;
323 * Attach the interface
325 ether_ifattach(ifp, sc->enaddr);
326 /* device attach does transition from UNCONFIGURED to IDLE state */
328 sc->tx_mem = sc->txb_cnt * ED_PAGE_SIZE * ED_TXBUF_SIZE;
329 sc->rx_mem = (sc->rec_page_stop - sc->rec_page_start) * ED_PAGE_SIZE;
330 SYSCTL_ADD_STRING(device_get_sysctl_ctx(dev),
331 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
332 0, "type", CTLTYPE_STRING | CTLFLAG_RD, sc->type_str, 0,
333 "Type of chip in card");
334 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev),
335 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
336 1, "TxMem", CTLTYPE_STRING | CTLFLAG_RD, &sc->tx_mem, 0,
337 "Memory set aside for transmitting packets");
338 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev),
339 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
340 2, "RxMem", CTLTYPE_STRING | CTLFLAG_RD, &sc->rx_mem, 0,
341 "Memory set aside for receiving packets");
342 SYSCTL_ADD_INT(device_get_sysctl_ctx(dev),
343 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
344 3, "Mem", CTLTYPE_STRING | CTLFLAG_RD, &sc->mem_size, 0,
345 "Total Card Memory");
347 if (sc->type_str && (*sc->type_str != 0))
348 device_printf(dev, "type %s ", sc->type_str);
350 device_printf(dev, "type unknown (0x%x) ", sc->type);
353 if (sc->vendor == ED_VENDOR_HP)
355 (sc->hpp_id & ED_HPP_ID_16_BIT_ACCESS) ?
357 sc->hpp_mem_start ? "memory mapped" : "regular");
360 printf("%s", sc->isa16bit ? "(16 bit)" : "(8 bit)");
362 #if defined(ED_HPP) || defined(ED_3C503)
363 printf("%s", (((sc->vendor == ED_VENDOR_3COM) ||
364 (sc->vendor == ED_VENDOR_HP)) &&
365 (ifp->if_flags & IFF_LINK2)) ?
366 " tranceiver disabled" : "");
374 * Detach the driver from the hardware and other systems in the kernel.
377 ed_detach(device_t dev)
379 struct ed_softc *sc = device_get_softc(dev);
380 struct ifnet *ifp = sc->ifp;
382 ED_ASSERT_UNLOCKED(sc);
384 if (bus_child_present(dev))
386 ifp->if_drv_flags &= ~IFF_DRV_RUNNING;
388 callout_drain(&sc->tick_ch);
390 bus_teardown_intr(dev, sc->irq_res, sc->irq_handle);
391 ed_release_resources(dev);
393 bus_generic_detach(dev);
401 ed_reset(struct ifnet *ifp)
403 struct ed_softc *sc = ifp->if_softc;
405 ED_ASSERT_LOCKED(sc);
407 * Stop interface and re-initialize.
414 ed_stop_hw(struct ed_softc *sc)
419 * Stop everything on the interface, and select page 0 registers.
421 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STP);
424 * Wait for interface to enter stopped state, but limit # of checks to
425 * 'n' (about 5ms). It shouldn't even take 5us on modern DS8390's, but
426 * just in case it's an old one.
428 if (sc->chip_type != ED_CHIP_TYPE_AX88190)
429 while (((ed_nic_inb(sc, ED_P0_ISR) & ED_ISR_RST) == 0) && --n)
434 * Take interface offline.
437 ed_stop(struct ed_softc *sc)
439 ED_ASSERT_LOCKED(sc);
441 callout_stop(&sc->tick_ch);
446 * Device timeout/watchdog routine. Entered if the device neglects to
447 * generate an interrupt after a transmit has been started on it.
450 ed_watchdog(struct ifnet *ifp)
452 struct ed_softc *sc = ifp->if_softc;
454 log(LOG_ERR, "%s: device timeout\n", ifp->if_xname);
468 struct ed_softc *sc = xsc;
470 ED_ASSERT_UNLOCKED(sc);
477 ed_init_locked(struct ed_softc *sc)
479 struct ifnet *ifp = sc->ifp;
482 ED_ASSERT_LOCKED(sc);
485 * Initialize the NIC in the exact order outlined in the NS manual.
486 * This init procedure is "mandatory"...don't change what or when
490 /* reset transmitter flags */
498 /* This variable is used below - don't move this assignment */
499 sc->next_packet = sc->rec_page_start + 1;
502 * Set interface for page 0, Remote DMA complete, Stopped
504 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STP);
508 * Set FIFO threshold to 8, No auto-init Remote DMA, byte
509 * order=80x86, word-wide DMA xfers,
511 ed_nic_outb(sc, ED_P0_DCR, ED_DCR_FT1 | ED_DCR_WTS | ED_DCR_LS);
514 * Same as above, but byte-wide DMA xfers
516 ed_nic_outb(sc, ED_P0_DCR, ED_DCR_FT1 | ED_DCR_LS);
519 * Clear Remote Byte Count Registers
521 ed_nic_outb(sc, ED_P0_RBCR0, 0);
522 ed_nic_outb(sc, ED_P0_RBCR1, 0);
525 * For the moment, don't store incoming packets in memory.
527 ed_nic_outb(sc, ED_P0_RCR, ED_RCR_MON);
530 * Place NIC in internal loopback mode
532 ed_nic_outb(sc, ED_P0_TCR, ED_TCR_LB0);
535 * Initialize transmit/receive (ring-buffer) Page Start
537 ed_nic_outb(sc, ED_P0_TPSR, sc->tx_page_start);
538 ed_nic_outb(sc, ED_P0_PSTART, sc->rec_page_start);
539 /* Set lower bits of byte addressable framing to 0 */
540 if (sc->chip_type == ED_CHIP_TYPE_WD790)
541 ed_nic_outb(sc, 0x09, 0);
544 * Initialize Receiver (ring-buffer) Page Stop and Boundry
546 ed_nic_outb(sc, ED_P0_PSTOP, sc->rec_page_stop);
547 ed_nic_outb(sc, ED_P0_BNRY, sc->rec_page_start);
550 * Clear all interrupts. A '1' in each bit position clears the
551 * corresponding flag.
553 ed_nic_outb(sc, ED_P0_ISR, 0xff);
556 * Enable the following interrupts: receive/transmit complete,
557 * receive/transmit error, and Receiver OverWrite.
559 * Counter overflow and Remote DMA complete are *not* enabled.
561 ed_nic_outb(sc, ED_P0_IMR,
562 ED_IMR_PRXE | ED_IMR_PTXE | ED_IMR_RXEE | ED_IMR_TXEE | ED_IMR_OVWE);
565 * Program Command Register for page 1
567 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_PAGE_1 | ED_CR_STP);
570 * Copy out our station address
572 for (i = 0; i < ETHER_ADDR_LEN; ++i)
573 ed_nic_outb(sc, ED_P1_PAR(i), IF_LLADDR(sc->ifp)[i]);
576 * Set Current Page pointer to next_packet (initialized above)
578 ed_nic_outb(sc, ED_P1_CURR, sc->next_packet);
581 * Program Receiver Configuration Register and multicast filter. CR is
582 * set to page 0 on return.
587 * Take interface out of loopback
589 ed_nic_outb(sc, ED_P0_TCR, 0);
595 * Set 'running' flag, and clear output active flag.
597 ifp->if_drv_flags |= IFF_DRV_RUNNING;
598 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
601 * ...and attempt to start output
603 ed_start_locked(ifp);
606 callout_reset(&sc->tick_ch, hz, sc->sc_tick, sc);
610 * This routine actually starts the transmission on the interface
613 ed_xmit(struct ed_softc *sc)
615 struct ifnet *ifp = sc->ifp;
618 len = sc->txb_len[sc->txb_next_tx];
621 * Set NIC for page 0 register access
623 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STA);
626 * Set TX buffer start page
628 ed_nic_outb(sc, ED_P0_TPSR, sc->tx_page_start +
629 sc->txb_next_tx * ED_TXBUF_SIZE);
634 ed_nic_outb(sc, ED_P0_TBCR0, len);
635 ed_nic_outb(sc, ED_P0_TBCR1, len >> 8);
638 * Set page 0, Remote DMA complete, Transmit Packet, and *Start*
640 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_TXP | ED_CR_STA);
644 * Point to next transmit buffer slot and wrap if necessary.
647 if (sc->txb_next_tx == sc->txb_cnt)
651 * Set a timer just in case we never hear from the board again
657 * Start output on interface.
658 * We make two assumptions here:
659 * 1) that the current priority is set to splimp _before_ this code
660 * is called *and* is returned to the appropriate priority after
662 * 2) that the IFF_DRV_OACTIVE flag is checked before this code is called
663 * (i.e. that the output part of the interface is idle)
666 ed_start(struct ifnet *ifp)
668 struct ed_softc *sc = ifp->if_softc;
670 ED_ASSERT_UNLOCKED(sc);
672 ed_start_locked(ifp);
677 ed_start_locked(struct ifnet *ifp)
679 struct ed_softc *sc = ifp->if_softc;
684 ED_ASSERT_LOCKED(sc);
688 * First, see if there are buffered packets and an idle transmitter -
689 * should never happen at this point.
691 if (sc->txb_inuse && (sc->xmit_busy == 0)) {
692 printf("ed: packets buffered, but transmitter idle\n");
697 * See if there is room to put another packet in the buffer.
699 if (sc->txb_inuse == sc->txb_cnt) {
702 * No room. Indicate this to the outside world and exit.
704 ifp->if_drv_flags |= IFF_DRV_OACTIVE;
707 IFQ_DRV_DEQUEUE(&ifp->if_snd, m);
711 * We are using the !OACTIVE flag to indicate to the outside
712 * world that we can accept an additional packet rather than
713 * that the transmitter is _actually_ active. Indeed, the
714 * transmitter may be active, but if we haven't filled all the
715 * buffers with data then we still want to accept more.
717 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
722 * Copy the mbuf chain into the transmit buffer
726 /* txb_new points to next open buffer slot */
727 buffer = sc->mem_start + (sc->txb_new * ED_TXBUF_SIZE * ED_PAGE_SIZE);
729 len = sc->sc_write_mbufs(sc, m, buffer);
735 sc->txb_len[sc->txb_new] = max(len, (ETHER_MIN_LEN-ETHER_CRC_LEN));
740 * Point to next buffer slot and wrap if necessary.
743 if (sc->txb_new == sc->txb_cnt)
746 if (sc->xmit_busy == 0)
750 * Tap off here if there is a bpf listener.
757 * Loop back to the top to possibly buffer more packets
763 * Ethernet interface receiver interrupt.
766 ed_rint(struct ed_softc *sc)
768 struct ifnet *ifp = sc->ifp;
771 struct ed_ring packet_hdr;
772 bus_size_t packet_ptr;
774 ED_ASSERT_LOCKED(sc);
777 * Set NIC to page 1 registers to get 'current' pointer
779 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_PAGE_1 | ED_CR_STA);
782 * 'sc->next_packet' is the logical beginning of the ring-buffer -
783 * i.e. it points to where new data has been buffered. The 'CURR'
784 * (current) register points to the logical end of the ring-buffer -
785 * i.e. it points to where additional new data will be added. We loop
786 * here until the logical beginning equals the logical end (or in
787 * other words, until the ring-buffer is empty).
789 while (sc->next_packet != ed_nic_inb(sc, ED_P1_CURR)) {
791 /* get pointer to this buffer's header structure */
792 packet_ptr = sc->mem_ring +
793 (sc->next_packet - sc->rec_page_start) * ED_PAGE_SIZE;
796 * The byte count includes a 4 byte header that was added by
799 sc->readmem(sc, packet_ptr, (char *) &packet_hdr,
801 len = packet_hdr.count;
802 if (len > (ETHER_MAX_LEN - ETHER_CRC_LEN + sizeof(struct ed_ring)) ||
803 len < (ETHER_MIN_LEN - ETHER_CRC_LEN + sizeof(struct ed_ring))) {
805 * Length is a wild value. There's a good chance that
806 * this was caused by the NIC being old and buggy.
807 * The bug is that the length low byte is duplicated in
808 * the high byte. Try to recalculate the length based on
809 * the pointer to the next packet.
812 * NOTE: sc->next_packet is pointing at the current packet.
814 len &= ED_PAGE_SIZE - 1; /* preserve offset into page */
815 if (packet_hdr.next_packet >= sc->next_packet)
816 len += (packet_hdr.next_packet -
817 sc->next_packet) * ED_PAGE_SIZE;
820 ((packet_hdr.next_packet - sc->rec_page_start) +
821 (sc->rec_page_stop - sc->next_packet)) * ED_PAGE_SIZE;
823 * because buffers are aligned on 256-byte boundary,
824 * the length computed above is off by 256 in almost
825 * all cases. Fix it...
829 if (len > (ETHER_MAX_LEN - ETHER_CRC_LEN
830 + sizeof(struct ed_ring)))
831 sc->mibdata.dot3StatsFrameTooLongs++;
835 * Be fairly liberal about what we allow as a "reasonable" length
836 * so that a [crufty] packet will make it to BPF (and can thus
837 * be analyzed). Note that all that is really important is that
838 * we have a length that will fit into one mbuf cluster or less;
839 * the upper layer protocols can then figure out the length from
840 * their own length field(s).
841 * But make sure that we have at least a full ethernet header
842 * or we would be unable to call ether_input() later.
844 if ((len >= sizeof(struct ed_ring) + ETHER_HDR_LEN) &&
846 (packet_hdr.next_packet >= sc->rec_page_start) &&
847 (packet_hdr.next_packet < sc->rec_page_stop)) {
851 ed_get_packet(sc, packet_ptr + sizeof(struct ed_ring),
852 len - sizeof(struct ed_ring));
856 * Really BAD. The ring pointers are corrupted.
859 "%s: NIC memory corrupt - invalid packet length %d\n",
867 * Update next packet pointer
869 sc->next_packet = packet_hdr.next_packet;
872 * Update NIC boundry pointer - being careful to keep it one
873 * buffer behind. (as recommended by NS databook)
875 boundry = sc->next_packet - 1;
876 if (boundry < sc->rec_page_start)
877 boundry = sc->rec_page_stop - 1;
880 * Set NIC to page 0 registers to update boundry register
882 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STA);
883 ed_nic_outb(sc, ED_P0_BNRY, boundry);
886 * Set NIC to page 1 registers before looping to top (prepare
887 * to get 'CURR' current pointer)
889 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_PAGE_1 | ED_CR_STA);
894 * Ethernet interface interrupt processor
899 struct ed_softc *sc = (struct ed_softc*) arg;
900 struct ifnet *ifp = sc->ifp;
905 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) {
910 * Set NIC to page 0 registers
912 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STA);
915 * loop until there are no more new interrupts. When the card
916 * goes away, the hardware will read back 0xff. Looking at
917 * the interrupts, it would appear that 0xff is impossible,
918 * or at least extremely unlikely.
920 while ((isr = ed_nic_inb(sc, ED_P0_ISR)) != 0 && isr != 0xff) {
923 * reset all the bits that we are 'acknowledging' by writing a
924 * '1' to each bit position that was set (writing a '1'
927 ed_nic_outb(sc, ED_P0_ISR, isr);
930 * XXX workaround for AX88190
931 * We limit this to 5000 iterations. At 1us per inb/outb,
932 * this translates to about 15ms, which should be plenty
933 * of time, and also gives protection in the card eject
936 if (sc->chip_type == ED_CHIP_TYPE_AX88190) {
937 count = 5000; /* 15ms */
938 while (count-- && (ed_nic_inb(sc, ED_P0_ISR) & isr)) {
939 ed_nic_outb(sc, ED_P0_ISR,0);
940 ed_nic_outb(sc, ED_P0_ISR,isr);
947 * Handle transmitter interrupts. Handle these first because
948 * the receiver will reset the board under some conditions.
950 if (isr & (ED_ISR_PTX | ED_ISR_TXE)) {
951 u_char collisions = ed_nic_inb(sc, ED_P0_NCR) & 0x0f;
954 * Check for transmit error. If a TX completed with an
955 * error, we end up throwing the packet away. Really
956 * the only error that is possible is excessive
957 * collisions, and in this case it is best to allow
958 * the automatic mechanisms of TCP to backoff the
959 * flow. Of course, with UDP we're screwed, but this
960 * is expected when a network is heavily loaded.
962 (void) ed_nic_inb(sc, ED_P0_TSR);
963 if (isr & ED_ISR_TXE) {
967 * Excessive collisions (16)
969 tsr = ed_nic_inb(sc, ED_P0_TSR);
970 if ((tsr & ED_TSR_ABT)
971 && (collisions == 0)) {
974 * When collisions total 16, the
975 * P0_NCR will indicate 0, and the
979 sc->mibdata.dot3StatsExcessiveCollisions++;
980 sc->mibdata.dot3StatsCollFrequencies[15]++;
982 if (tsr & ED_TSR_OWC)
983 sc->mibdata.dot3StatsLateCollisions++;
984 if (tsr & ED_TSR_CDH)
985 sc->mibdata.dot3StatsSQETestErrors++;
986 if (tsr & ED_TSR_CRS)
987 sc->mibdata.dot3StatsCarrierSenseErrors++;
989 sc->mibdata.dot3StatsInternalMacTransmitErrors++;
992 * update output errors counter
998 * Update total number of successfully
999 * transmitted packets.
1005 * reset tx busy and output active flags
1008 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
1011 * clear watchdog timer
1016 * Add in total number of collisions on last
1019 ifp->if_collisions += collisions;
1020 switch(collisions) {
1025 sc->mibdata.dot3StatsSingleCollisionFrames++;
1026 sc->mibdata.dot3StatsCollFrequencies[0]++;
1029 sc->mibdata.dot3StatsMultipleCollisionFrames++;
1031 dot3StatsCollFrequencies[collisions-1]
1037 * Decrement buffer in-use count if not zero (can only
1038 * be zero if a transmitter interrupt occured while
1039 * not actually transmitting). If data is ready to
1040 * transmit, start it transmitting, otherwise defer
1041 * until after handling receiver
1043 if (sc->txb_inuse && --sc->txb_inuse)
1048 * Handle receiver interrupts
1050 if (isr & (ED_ISR_PRX | ED_ISR_RXE | ED_ISR_OVW)) {
1053 * Overwrite warning. In order to make sure that a
1054 * lockup of the local DMA hasn't occurred, we reset
1055 * and re-init the NIC. The NSC manual suggests only a
1056 * partial reset/re-init is necessary - but some chips
1057 * seem to want more. The DMA lockup has been seen
1058 * only with early rev chips - Methinks this bug was
1059 * fixed in later revs. -DG
1061 if (isr & ED_ISR_OVW) {
1065 "%s: warning - receiver ring buffer overrun\n",
1070 * Stop/reset/re-init NIC
1076 * Receiver Error. One or more of: CRC error,
1077 * frame alignment error FIFO overrun, or
1080 if (isr & ED_ISR_RXE) {
1082 rsr = ed_nic_inb(sc, ED_P0_RSR);
1083 if (rsr & ED_RSR_CRC)
1084 sc->mibdata.dot3StatsFCSErrors++;
1085 if (rsr & ED_RSR_FAE)
1086 sc->mibdata.dot3StatsAlignmentErrors++;
1087 if (rsr & ED_RSR_FO)
1088 sc->mibdata.dot3StatsInternalMacReceiveErrors++;
1091 if_printf(ifp, "receive error %x\n",
1092 ed_nic_inb(sc, ED_P0_RSR));
1097 * Go get the packet(s) XXX - Doing this on an
1098 * error is dubious because there shouldn't be
1099 * any data to get (we've configured the
1100 * interface to not accept packets with
1105 * Enable 16bit access to shared memory first
1108 ed_enable_16bit_access(sc);
1110 ed_disable_16bit_access(sc);
1115 * If it looks like the transmitter can take more data,
1116 * attempt to start output on the interface. This is done
1117 * after handling the receiver to give the receiver priority.
1119 if ((ifp->if_drv_flags & IFF_DRV_OACTIVE) == 0)
1120 ed_start_locked(ifp);
1123 * return NIC CR to standard state: page 0, remote DMA
1124 * complete, start (toggling the TXP bit off, even if was just
1125 * set in the transmit routine, is *okay* - it is 'edge'
1126 * triggered from low to high)
1128 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STA);
1131 * If the Network Talley Counters overflow, read them to reset
1132 * them. It appears that old 8390's won't clear the ISR flag
1133 * otherwise - resulting in an infinite loop.
1135 if (isr & ED_ISR_CNT) {
1136 (void) ed_nic_inb(sc, ED_P0_CNTR0);
1137 (void) ed_nic_inb(sc, ED_P0_CNTR1);
1138 (void) ed_nic_inb(sc, ED_P0_CNTR2);
1145 * Process an ioctl request.
1148 ed_ioctl(struct ifnet *ifp, u_long command, caddr_t data)
1150 struct ed_softc *sc = ifp->if_softc;
1151 struct ifreq *ifr = (struct ifreq *)data;
1155 * XXX really needed?
1158 ifp->if_drv_flags &= ~IFF_DRV_RUNNING;
1165 * If the interface is marked up and stopped, then start it.
1166 * If we're up and already running, then it may be a mediachg.
1167 * If it is marked down and running, then stop it.
1170 if (ifp->if_flags & IFF_UP) {
1171 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0)
1173 else if (sc->sc_mediachg)
1174 sc->sc_mediachg(sc);
1176 if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
1178 ifp->if_drv_flags &= ~IFF_DRV_RUNNING;
1183 * Promiscuous flag may have changed, so reprogram the RCR.
1193 * Multicast list has changed; set the hardware filter
1204 if (sc->sc_media_ioctl == NULL) {
1208 sc->sc_media_ioctl(sc, ifr, command);
1212 error = ether_ioctl(ifp, command, data);
1219 * Given a source and destination address, copy 'amount' of a packet from
1220 * the ring buffer into a linear destination buffer. Takes into account
1223 static __inline void
1224 ed_ring_copy(struct ed_softc *sc, bus_size_t src, char *dst, u_short amount)
1228 /* does copy wrap to lower addr in ring buffer? */
1229 if (src + amount > sc->mem_end) {
1230 tmp_amount = sc->mem_end - src;
1231 /* copy amount up to end of NIC memory */
1232 sc->readmem(sc, src, dst, tmp_amount);
1233 amount -= tmp_amount;
1237 sc->readmem(sc, src, dst, amount);
1241 * Retreive packet from shared memory and send to the next level up via
1245 ed_get_packet(struct ed_softc *sc, bus_size_t buf, u_short len)
1247 struct ifnet *ifp = sc->ifp;
1248 struct ether_header *eh;
1251 /* Allocate a header mbuf */
1252 MGETHDR(m, M_DONTWAIT, MT_DATA);
1255 m->m_pkthdr.rcvif = ifp;
1256 m->m_pkthdr.len = m->m_len = len;
1259 * We always put the received packet in a single buffer -
1260 * either with just an mbuf header or in a cluster attached
1261 * to the header. The +2 is to compensate for the alignment
1264 if ((len + 2) > MHLEN) {
1265 /* Attach an mbuf cluster */
1266 MCLGET(m, M_DONTWAIT);
1268 /* Insist on getting a cluster */
1269 if ((m->m_flags & M_EXT) == 0) {
1276 * The +2 is to longword align the start of the real packet.
1277 * This is important for NFS.
1280 eh = mtod(m, struct ether_header *);
1283 * Get packet, including link layer address, from interface.
1285 ed_ring_copy(sc, buf, (char *)eh, len);
1287 m->m_pkthdr.len = m->m_len = len;
1290 (*ifp->if_input)(ifp, m);
1295 * Supporting routines
1299 * Given a NIC memory source address and a host memory destination
1300 * address, copy 'amount' from NIC to host using shared memory.
1301 * The 'amount' is rounded up to a word - okay as long as mbufs
1302 * are word sized. That's what the +1 is below.
1303 * This routine accesses things as 16 bit quantities.
1306 ed_shmem_readmem16(struct ed_softc *sc, bus_size_t src, uint8_t *dst,
1309 bus_space_read_region_2(sc->mem_bst, sc->mem_bsh, src, (uint16_t *)dst,
1314 * Given a NIC memory source address and a host memory destination
1315 * address, copy 'amount' from NIC to host using shared memory.
1316 * This routine accesses things as 8 bit quantities.
1319 ed_shmem_readmem8(struct ed_softc *sc, bus_size_t src, uint8_t *dst,
1322 bus_space_read_region_1(sc->mem_bst, sc->mem_bsh, src, dst, amount);
1326 * Given a NIC memory source address and a host memory destination
1327 * address, copy 'amount' from NIC to host using Programmed I/O.
1328 * The 'amount' is rounded up to a word - okay as long as mbufs
1330 * This routine is currently Novell-specific.
1333 ed_pio_readmem(struct ed_softc *sc, bus_size_t src, uint8_t *dst,
1336 /* Regular Novell cards */
1337 /* select page 0 registers */
1338 ed_nic_outb(sc, ED_P0_CR, ED_CR_RD2 | ED_CR_STA);
1340 /* round up to a word */
1344 /* set up DMA byte count */
1345 ed_nic_outb(sc, ED_P0_RBCR0, amount);
1346 ed_nic_outb(sc, ED_P0_RBCR1, amount >> 8);
1348 /* set up source address in NIC mem */
1349 ed_nic_outb(sc, ED_P0_RSAR0, src);
1350 ed_nic_outb(sc, ED_P0_RSAR1, src >> 8);
1352 ed_nic_outb(sc, ED_P0_CR, ED_CR_RD0 | ED_CR_STA);
1355 ed_asic_insw(sc, ED_NOVELL_DATA, dst, amount / 2);
1357 ed_asic_insb(sc, ED_NOVELL_DATA, dst, amount);
1361 * Stripped down routine for writing a linear buffer to NIC memory.
1362 * Only used in the probe routine to test the memory. 'len' must
1366 ed_pio_writemem(struct ed_softc *sc, uint8_t *src, uint16_t dst, uint16_t len)
1368 int maxwait = 200; /* about 240us */
1370 /* select page 0 registers */
1371 ed_nic_outb(sc, ED_P0_CR, ED_CR_RD2 | ED_CR_STA);
1373 /* reset remote DMA complete flag */
1374 ed_nic_outb(sc, ED_P0_ISR, ED_ISR_RDC);
1376 /* set up DMA byte count */
1377 ed_nic_outb(sc, ED_P0_RBCR0, len);
1378 ed_nic_outb(sc, ED_P0_RBCR1, len >> 8);
1380 /* set up destination address in NIC mem */
1381 ed_nic_outb(sc, ED_P0_RSAR0, dst);
1382 ed_nic_outb(sc, ED_P0_RSAR1, dst >> 8);
1384 /* set remote DMA write */
1385 ed_nic_outb(sc, ED_P0_CR, ED_CR_RD1 | ED_CR_STA);
1388 ed_asic_outsw(sc, ED_NOVELL_DATA, src, len / 2);
1390 ed_asic_outsb(sc, ED_NOVELL_DATA, src, len);
1393 * Wait for remote DMA complete. This is necessary because on the
1394 * transmit side, data is handled internally by the NIC in bursts and
1395 * we can't start another remote DMA until this one completes. Not
1396 * waiting causes really bad things to happen - like the NIC
1397 * irrecoverably jamming the ISA bus.
1399 while (((ed_nic_inb(sc, ED_P0_ISR) & ED_ISR_RDC) != ED_ISR_RDC) &&
1405 * Write an mbuf chain to the destination NIC memory address using
1409 ed_pio_write_mbufs(struct ed_softc *sc, struct mbuf *m, bus_size_t dst)
1411 struct ifnet *ifp = sc->ifp;
1412 unsigned short total_len, dma_len;
1414 int maxwait = 200; /* about 240us */
1416 ED_ASSERT_LOCKED(sc);
1418 /* Regular Novell cards */
1419 /* First, count up the total number of bytes to copy */
1420 for (total_len = 0, mp = m; mp; mp = mp->m_next)
1421 total_len += mp->m_len;
1423 dma_len = total_len;
1424 if (sc->isa16bit && (dma_len & 1))
1427 /* select page 0 registers */
1428 ed_nic_outb(sc, ED_P0_CR, ED_CR_RD2 | ED_CR_STA);
1430 /* reset remote DMA complete flag */
1431 ed_nic_outb(sc, ED_P0_ISR, ED_ISR_RDC);
1433 /* set up DMA byte count */
1434 ed_nic_outb(sc, ED_P0_RBCR0, dma_len);
1435 ed_nic_outb(sc, ED_P0_RBCR1, dma_len >> 8);
1437 /* set up destination address in NIC mem */
1438 ed_nic_outb(sc, ED_P0_RSAR0, dst);
1439 ed_nic_outb(sc, ED_P0_RSAR1, dst >> 8);
1441 /* set remote DMA write */
1442 ed_nic_outb(sc, ED_P0_CR, ED_CR_RD1 | ED_CR_STA);
1445 * Transfer the mbuf chain to the NIC memory.
1446 * 16-bit cards require that data be transferred as words, and only words.
1447 * So that case requires some extra code to patch over odd-length mbufs.
1450 if (!sc->isa16bit) {
1451 /* NE1000s are easy */
1454 ed_asic_outsb(sc, ED_NOVELL_DATA,
1455 m->m_data, m->m_len);
1459 /* NE2000s are a pain */
1460 unsigned char *data;
1462 unsigned char savebyte[2];
1469 data = mtod(m, caddr_t);
1470 /* finish the last word */
1472 savebyte[1] = *data;
1473 ed_asic_outw(sc, ED_NOVELL_DATA,
1474 *(u_short *)savebyte);
1479 /* output contiguous words */
1481 ed_asic_outsw(sc, ED_NOVELL_DATA,
1486 /* save last byte, if necessary */
1488 savebyte[0] = *data;
1494 /* spit last byte */
1496 ed_asic_outw(sc, ED_NOVELL_DATA, *(u_short *)savebyte);
1500 * Wait for remote DMA complete. This is necessary because on the
1501 * transmit side, data is handled internally by the NIC in bursts and
1502 * we can't start another remote DMA until this one completes. Not
1503 * waiting causes really bad things to happen - like the NIC
1504 * irrecoverably jamming the ISA bus.
1506 while (((ed_nic_inb(sc, ED_P0_ISR) & ED_ISR_RDC) != ED_ISR_RDC) &&
1511 log(LOG_WARNING, "%s: remote transmit DMA failed to complete\n",
1520 ed_setrcr(struct ed_softc *sc)
1522 struct ifnet *ifp = sc->ifp;
1526 ED_ASSERT_LOCKED(sc);
1528 /* Bit 6 in AX88190 RCR register must be set. */
1529 if (sc->chip_type == ED_CHIP_TYPE_AX88190)
1534 /* set page 1 registers */
1535 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_PAGE_1 | ED_CR_STP);
1537 if (ifp->if_flags & IFF_PROMISC) {
1540 * Reconfigure the multicast filter.
1542 for (i = 0; i < 8; i++)
1543 ed_nic_outb(sc, ED_P1_MAR(i), 0xff);
1546 * And turn on promiscuous mode. Also enable reception of
1547 * runts and packets with CRC & alignment errors.
1549 /* Set page 0 registers */
1550 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STP);
1552 ed_nic_outb(sc, ED_P0_RCR, ED_RCR_PRO | ED_RCR_AM |
1553 ED_RCR_AB | ED_RCR_AR | ED_RCR_SEP | reg1);
1555 /* set up multicast addresses and filter modes */
1556 if (ifp->if_flags & IFF_MULTICAST) {
1559 if (ifp->if_flags & IFF_ALLMULTI) {
1560 mcaf[0] = 0xffffffff;
1561 mcaf[1] = 0xffffffff;
1563 ed_ds_getmcaf(sc, mcaf);
1566 * Set multicast filter on chip.
1568 for (i = 0; i < 8; i++)
1569 ed_nic_outb(sc, ED_P1_MAR(i), ((u_char *) mcaf)[i]);
1571 /* Set page 0 registers */
1572 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STP);
1574 ed_nic_outb(sc, ED_P0_RCR, ED_RCR_AM | ED_RCR_AB | reg1);
1578 * Initialize multicast address hashing registers to
1579 * not accept multicasts.
1581 for (i = 0; i < 8; ++i)
1582 ed_nic_outb(sc, ED_P1_MAR(i), 0x00);
1584 /* Set page 0 registers */
1585 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STP);
1587 ed_nic_outb(sc, ED_P0_RCR, ED_RCR_AB | reg1);
1594 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STA);
1598 * Compute the multicast address filter from the
1599 * list of multicast addresses we need to listen to.
1602 ed_ds_getmcaf(struct ed_softc *sc, uint32_t *mcaf)
1605 u_char *af = (u_char *) mcaf;
1606 struct ifmultiaddr *ifma;
1611 IF_ADDR_LOCK(sc->ifp);
1612 TAILQ_FOREACH(ifma, &sc->ifp->if_multiaddrs, ifma_link) {
1613 if (ifma->ifma_addr->sa_family != AF_LINK)
1615 index = ether_crc32_be(LLADDR((struct sockaddr_dl *)
1616 ifma->ifma_addr), ETHER_ADDR_LEN) >> 26;
1617 af[index >> 3] |= 1 << (index & 7);
1619 IF_ADDR_UNLOCK(sc->ifp);
1623 ed_isa_mem_ok(device_t dev, u_long pmem, u_int memsize)
1625 if (pmem < 0xa0000 || pmem + memsize > 0x1000000) {
1626 device_printf(dev, "Invalid ISA memory address range "
1627 "configured: 0x%lx - 0x%lx\n", pmem, pmem + memsize);
1634 ed_clear_memory(device_t dev)
1636 struct ed_softc *sc = device_get_softc(dev);
1639 bus_space_set_region_1(sc->mem_bst, sc->mem_bsh, sc->mem_start,
1642 for (i = 0; i < sc->mem_size; i++) {
1643 if (bus_space_read_1(sc->mem_bst, sc->mem_bsh,
1644 sc->mem_start + i)) {
1645 device_printf(dev, "failed to clear shared memory at "
1646 "0x%jx - check configuration\n",
1647 (uintmax_t)rman_get_start(sc->mem_res) + i);
1655 ed_shmem_write_mbufs(struct ed_softc *sc, struct mbuf *m, bus_size_t dst)
1660 * Special case setup for 16 bit boards...
1663 switch (sc->vendor) {
1666 * For 16bit 3Com boards (which have 16k of
1667 * memory), we have the xmit buffers in a
1668 * different page of memory ('page 0') - so
1671 case ED_VENDOR_3COM:
1672 ed_asic_outb(sc, ED_3COM_GACFR, ED_3COM_GACFR_RSEL);
1676 * Enable 16bit access to shared memory on
1679 * XXX - same as ed_enable_16bit_access()
1681 case ED_VENDOR_WD_SMC:
1682 ed_asic_outb(sc, ED_WD_LAAR,
1683 sc->wd_laar_proto | ED_WD_LAAR_M16EN);
1684 if (sc->chip_type == ED_CHIP_TYPE_WD790)
1685 ed_asic_outb(sc, ED_WD_MSR, ED_WD_MSR_MENB);
1689 for (len = 0; m != 0; m = m->m_next) {
1691 bus_space_write_region_2(sc->mem_bst,
1693 mtod(m, uint16_t *), (m->m_len + 1)/ 2);
1695 bus_space_write_region_1(sc->mem_bst,
1697 mtod(m, uint8_t *), m->m_len);
1703 * Restore previous shared memory access
1706 switch (sc->vendor) {
1708 case ED_VENDOR_3COM:
1709 ed_asic_outb(sc, ED_3COM_GACFR,
1710 ED_3COM_GACFR_RSEL | ED_3COM_GACFR_MBS0);
1713 case ED_VENDOR_WD_SMC:
1714 /* XXX - same as ed_disable_16bit_access() */
1715 if (sc->chip_type == ED_CHIP_TYPE_WD790)
1716 ed_asic_outb(sc, ED_WD_MSR, 0x00);
1717 ed_asic_outb(sc, ED_WD_LAAR,
1718 sc->wd_laar_proto & ~ED_WD_LAAR_M16EN);