2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright (c) 1995, David Greenman
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice unmodified, this list of conditions, and the following
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 #ifndef SYS_DEV_ED_IF_EDVAR_H
33 #define SYS_DEV_ED_IF_EDVAR_H
35 #include <dev/mii/mii_bitbang.h>
38 * ed_softc: per line info and status
42 struct ifmedia ifmedia; /* Media info */
46 char *type_str; /* pointer to type string */
47 u_char vendor; /* interface vendor */
48 u_char type; /* interface type code */
49 u_char chip_type; /* the type of chip (one of ED_CHIP_TYPE_*) */
50 u_char isa16bit; /* width of access to card 0=8 or 1=16 */
51 u_char mem_shared; /* NIC memory is shared with host */
52 u_char xmit_busy; /* transmitter is busy */
55 int port_used; /* nonzero if ports used */
56 struct resource* port_res; /* resource for port range */
57 struct resource* port_res2; /* resource for port range */
58 bus_space_tag_t port_bst;
59 bus_space_handle_t port_bsh;
60 int mem_used; /* nonzero if memory used */
61 struct resource* mem_res; /* resource for memory range */
62 bus_space_tag_t mem_bst;
63 bus_space_handle_t mem_bsh;
64 struct resource* irq_res; /* resource for irq */
65 void* irq_handle; /* handle for irq handler */
66 int (*sc_media_ioctl)(struct ed_softc *sc, struct ifreq *ifr,
68 void (*sc_mediachg)(struct ed_softc *);
69 device_t miibus; /* MII bus for cards with MII. */
70 mii_bitbang_ops_t mii_bitbang_ops;
71 struct callout tick_ch;
72 void (*sc_tick)(struct ed_softc *);
73 void (*readmem)(struct ed_softc *sc, bus_size_t src, uint8_t *dst,
75 u_short (*sc_write_mbufs)(struct ed_softc *, struct mbuf *, bus_size_t);
78 int nic_offset; /* NIC (DS8390) I/O bus address offset */
79 int asic_offset; /* ASIC I/O bus address offset */
82 * The following 'proto' variable is part of a work-around for 8013EBT asics
83 * being write-only. It's sort of a prototype/shadow of the real thing.
89 * HP PC LAN PLUS card support.
92 u_short hpp_options; /* flags controlling behaviour of the HP card */
93 u_short hpp_id; /* software revision and other fields */
94 caddr_t hpp_mem_start; /* Memory-mapped IO register address */
96 bus_size_t mem_start; /* NIC memory start address */
97 bus_size_t mem_end; /* NIC memory end address */
98 uint32_t mem_size; /* total NIC memory size */
99 bus_size_t mem_ring; /* start of RX ring-buffer (in NIC mem) */
101 u_char txb_cnt; /* number of transmit buffers */
102 u_char txb_inuse; /* number of TX buffers currently in-use */
104 u_char txb_new; /* pointer to where new buffer will be added */
105 u_char txb_next_tx; /* pointer to next buffer ready to xmit */
106 u_short txb_len[8]; /* buffered xmit buffer lengths */
107 u_char tx_page_start; /* first page of TX buffer area */
108 u_char rec_page_start; /* first page of RX ring-buffer */
109 u_char rec_page_stop; /* last page of RX ring-buffer */
110 u_char next_packet; /* pointer to next unread RX packet */
111 u_int tx_mem; /* Total amount of RAM for tx */
112 u_int rx_mem; /* Total amount of RAM for rx */
113 struct ifmib_iso_8802_3 mibdata; /* stuff for network mgmt */
116 #define ed_nic_barrier(sc, port, length, flags) \
117 bus_space_barrier(sc->port_bst, sc->port_bsh, \
118 (sc)->nic_offset + (port), (length), (flags))
120 #define ed_nic_inb(sc, port) \
121 bus_space_read_1(sc->port_bst, sc->port_bsh, (sc)->nic_offset + (port))
123 #define ed_nic_outb(sc, port, value) \
124 bus_space_write_1(sc->port_bst, sc->port_bsh, \
125 (sc)->nic_offset + (port), (value))
127 #define ed_nic_inw(sc, port) \
128 bus_space_read_2(sc->port_bst, sc->port_bsh, (sc)->nic_offset + (port))
130 #define ed_nic_outw(sc, port, value) \
131 bus_space_write_2(sc->port_bst, sc->port_bsh, \
132 (sc)->nic_offset + (port), (value))
134 #define ed_nic_insb(sc, port, addr, count) \
135 bus_space_read_multi_1(sc->port_bst, sc->port_bsh, \
136 (sc)->nic_offset + (port), (addr), (count))
138 #define ed_nic_outsb(sc, port, addr, count) \
139 bus_space_write_multi_1(sc->port_bst, sc->port_bsh, \
140 (sc)->nic_offset + (port), (addr), (count))
142 #define ed_nic_insw(sc, port, addr, count) \
143 bus_space_read_multi_2(sc->port_bst, sc->port_bsh, \
144 (sc)->nic_offset + (port), (uint16_t *)(addr), (count))
146 #define ed_nic_outsw(sc, port, addr, count) \
147 bus_space_write_multi_2(sc->port_bst, sc->port_bsh, \
148 (sc)->nic_offset + (port), (uint16_t *)(addr), (count))
150 #define ed_nic_insl(sc, port, addr, count) \
151 bus_space_read_multi_4(sc->port_bst, sc->port_bsh, \
152 (sc)->nic_offset + (port), (uint32_t *)(addr), (count))
154 #define ed_nic_outsl(sc, port, addr, count) \
155 bus_space_write_multi_4(sc->port_bst, sc->port_bsh, \
156 (sc)->nic_offset + (port), (uint32_t *)(addr), (count))
158 #define ed_asic_barrier(sc, port, length, flags) \
159 bus_space_barrier(sc->port_bst, sc->port_bsh, \
160 (sc)->asic_offset + (port), (length), (flags))
162 #define ed_asic_inb(sc, port) \
163 bus_space_read_1(sc->port_bst, sc->port_bsh, \
164 (sc)->asic_offset + (port))
166 #define ed_asic_outb(sc, port, value) \
167 bus_space_write_1(sc->port_bst, sc->port_bsh, \
168 (sc)->asic_offset + (port), (value))
170 #define ed_asic_inw(sc, port) \
171 bus_space_read_2(sc->port_bst, sc->port_bsh, \
172 (sc)->asic_offset + (port))
174 #define ed_asic_outw(sc, port, value) \
175 bus_space_write_2(sc->port_bst, sc->port_bsh, \
176 (sc)->asic_offset + (port), (value))
178 #define ed_asic_insb(sc, port, addr, count) \
179 bus_space_read_multi_1(sc->port_bst, sc->port_bsh, \
180 (sc)->asic_offset + (port), (addr), (count))
182 #define ed_asic_outsb(sc, port, addr, count) \
183 bus_space_write_multi_1(sc->port_bst, sc->port_bsh, \
184 (sc)->asic_offset + (port), (addr), (count))
186 #define ed_asic_insw(sc, port, addr, count) \
187 bus_space_read_multi_2(sc->port_bst, sc->port_bsh, \
188 (sc)->asic_offset + (port), (uint16_t *)(addr), (count))
190 #define ed_asic_outsw(sc, port, addr, count) \
191 bus_space_write_multi_2(sc->port_bst, sc->port_bsh, \
192 (sc)->asic_offset + (port), (uint16_t *)(addr), (count))
194 #define ed_asic_insl(sc, port, addr, count) \
195 bus_space_read_multi_4(sc->port_bst, sc->port_bsh, \
196 (sc)->asic_offset + (port), (uint32_t *)(addr), (count))
198 #define ed_asic_outsl(sc, port, addr, count) \
199 bus_space_write_multi_4(sc->port_bst, sc->port_bsh, \
200 (sc)->asic_offset + (port), (uint32_t *)(addr), (count))
202 void ed_release_resources(device_t);
203 int ed_alloc_port(device_t, int, int);
204 int ed_alloc_memory(device_t, int, int);
205 int ed_alloc_irq(device_t, int, int);
207 int ed_probe_generic8390(struct ed_softc *);
208 int ed_probe_WD80x3(device_t, int, int);
209 int ed_probe_WD80x3_generic(device_t, int, uint16_t *[]);
210 int ed_probe_RTL80x9(device_t, int, int);
212 int ed_probe_3Com(device_t, int, int);
215 int ed_probe_SIC(device_t, int, int);
217 int ed_probe_Novell_generic(device_t, int);
218 int ed_probe_Novell(device_t, int, int);
219 void ed_Novell_read_mac(struct ed_softc *);
221 int ed_probe_HP_pclanp(device_t, int, int);
224 int ed_attach(device_t);
225 int ed_detach(device_t);
226 int ed_clear_memory(device_t);
227 int ed_isa_mem_ok(device_t, u_long, u_int); /* XXX isa specific */
228 void ed_stop(struct ed_softc *);
229 void ed_shmem_readmem16(struct ed_softc *, bus_size_t, uint8_t *, uint16_t);
230 void ed_shmem_readmem8(struct ed_softc *, bus_size_t, uint8_t *, uint16_t);
231 u_short ed_shmem_write_mbufs(struct ed_softc *, struct mbuf *, bus_size_t);
232 void ed_pio_readmem(struct ed_softc *, bus_size_t, uint8_t *, uint16_t);
233 void ed_pio_writemem(struct ed_softc *, uint8_t *, uint16_t, uint16_t);
234 u_short ed_pio_write_mbufs(struct ed_softc *, struct mbuf *, bus_size_t);
236 void ed_disable_16bit_access(struct ed_softc *);
237 void ed_enable_16bit_access(struct ed_softc *);
239 void ed_gen_ifmedia_init(struct ed_softc *);
241 driver_intr_t edintr;
243 extern devclass_t ed_devclass;
249 #define ED_VENDOR_WD_SMC 0x00 /* Western Digital/SMC */
250 #define ED_VENDOR_3COM 0x01 /* 3Com */
251 #define ED_VENDOR_NOVELL 0x02 /* Novell */
252 #define ED_VENDOR_HP 0x03 /* Hewlett Packard */
253 #define ED_VENDOR_SIC 0x04 /* Allied-Telesis SIC */
256 * Configure time flags
259 * this sets the default for enabling/disabling the transceiver
261 #define ED_FLAGS_DISABLE_TRANCEIVER 0x0001
264 * This forces the board to be used in 8/16bit mode even if it
265 * autoconfigs differently
267 #define ED_FLAGS_FORCE_8BIT_MODE 0x0002
268 #define ED_FLAGS_FORCE_16BIT_MODE 0x0004
271 * This disables the use of double transmit buffers.
273 #define ED_FLAGS_NO_MULTI_BUFFERING 0x0008
276 * This forces all operations with the NIC memory to use Programmed
277 * I/O (i.e. not via shared memory)
279 #define ED_FLAGS_FORCE_PIO 0x0010
282 * This forces a PC Card, and disables ISA memory range checks
284 #define ED_FLAGS_PCCARD 0x0020
287 * These are flags describing the chip type.
289 #define ED_FLAGS_TOSH_ETHER 0x10000
290 #define ED_FLAGS_GWETHER 0x20000
292 #define ED_FLAGS_GETTYPE(flg) ((flg) & 0xff0000)
294 #define ED_MUTEX(_sc) (&(_sc)->sc_mtx)
295 #define ED_LOCK(_sc) mtx_lock(ED_MUTEX(_sc))
296 #define ED_UNLOCK(_sc) mtx_unlock(ED_MUTEX(_sc))
297 #define ED_LOCK_INIT(_sc) \
298 mtx_init(ED_MUTEX(_sc), device_get_nameunit(_sc->dev), \
299 MTX_NETWORK_LOCK, MTX_DEF)
300 #define ED_LOCK_DESTROY(_sc) mtx_destroy(ED_MUTEX(_sc));
301 #define ED_ASSERT_LOCKED(_sc) mtx_assert(ED_MUTEX(_sc), MA_OWNED);
302 #define ED_ASSERT_UNLOCKED(_sc) mtx_assert(ED_MUTEX(_sc), MA_NOTOWNED);
304 #endif /* SYS_DEV_ED_IF_EDVAR_H */