1 /**************************************************************************
3 Copyright (c) 2001-2005, Intel Corporation
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
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10 this list of conditions and the following disclaimer.
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13 notice, this list of conditions and the following disclaimer in the
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16 3. Neither the name of the Intel Corporation nor the names of its
17 contributors may be used to endorse or promote products derived from
18 this software without specific prior written permission.
20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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32 ***************************************************************************/
36 #ifndef _EM_H_DEFINED_
37 #define _EM_H_DEFINED_
40 #include <sys/param.h>
41 #include <sys/systm.h>
43 #include <sys/endian.h>
44 #include <sys/kernel.h>
46 #include <sys/malloc.h>
47 #include <sys/module.h>
48 #include <sys/socket.h>
49 #include <sys/sockio.h>
50 #include <sys/sysctl.h>
52 #include <machine/bus.h>
54 #include <machine/resource.h>
57 #include <net/ethernet.h>
59 #include <net/if_arp.h>
60 #include <net/if_dl.h>
61 #include <net/if_media.h>
63 #include <net/if_types.h>
64 #include <net/if_vlan_var.h>
66 #include <netinet/in_systm.h>
67 #include <netinet/in.h>
68 #include <netinet/ip.h>
69 #include <netinet/tcp.h>
70 #include <netinet/udp.h>
72 #include <dev/pci/pcivar.h>
73 #include <dev/pci/pcireg.h>
75 #include <dev/em/if_em_hw.h>
80 * EM_TXD: Maximum number of Transmit Descriptors
81 * Valid Range: 80-256 for 82542 and 82543-based adapters
84 * This value is the number of transmit descriptors allocated by the driver.
85 * Increasing this value allows the driver to queue more transmits. Each
86 * descriptor is 16 bytes.
87 * Since TDLEN should be multiple of 128bytes, the number of transmit
88 * desscriptors should meet the following condition.
89 * (num_tx_desc * sizeof(struct em_tx_desc)) % 128 == 0
92 #define EM_MAX_TXD_82543 256
93 #define EM_MAX_TXD 4096
94 #define EM_DEFAULT_TXD EM_MAX_TXD_82543
97 * EM_RXD - Maximum number of receive Descriptors
98 * Valid Range: 80-256 for 82542 and 82543-based adapters
101 * This value is the number of receive descriptors allocated by the driver.
102 * Increasing this value allows the driver to buffer more incoming packets.
103 * Each descriptor is 16 bytes. A receive buffer is also allocated for each
104 * descriptor. The maximum MTU size is 16110.
105 * Since TDLEN should be multiple of 128bytes, the number of transmit
106 * desscriptors should meet the following condition.
107 * (num_tx_desc * sizeof(struct em_tx_desc)) % 128 == 0
109 #define EM_MIN_RXD 80
110 #define EM_MAX_RXD_82543 256
111 #define EM_MAX_RXD 4096
112 #define EM_DEFAULT_RXD EM_MAX_RXD_82543
115 * EM_TIDV - Transmit Interrupt Delay Value
116 * Valid Range: 0-65535 (0=off)
118 * This value delays the generation of transmit interrupts in units of
119 * 1.024 microseconds. Transmit interrupt reduction can improve CPU
120 * efficiency if properly tuned for specific network traffic. If the
121 * system is reporting dropped transmits, this value may be set too high
122 * causing the driver to run out of available transmit descriptors.
127 * EM_TADV - Transmit Absolute Interrupt Delay Value (Not valid for 82542/82543/82544)
128 * Valid Range: 0-65535 (0=off)
130 * This value, in units of 1.024 microseconds, limits the delay in which a
131 * transmit interrupt is generated. Useful only if EM_TIDV is non-zero,
132 * this value ensures that an interrupt is generated after the initial
133 * packet is sent on the wire within the set amount of time. Proper tuning,
134 * along with EM_TIDV, may improve traffic throughput in specific
135 * network conditions.
140 * EM_RDTR - Receive Interrupt Delay Timer (Packet Timer)
141 * Valid Range: 0-65535 (0=off)
143 * This value delays the generation of receive interrupts in units of 1.024
144 * microseconds. Receive interrupt reduction can improve CPU efficiency if
145 * properly tuned for specific network traffic. Increasing this value adds
146 * extra latency to frame reception and can end up decreasing the throughput
147 * of TCP traffic. If the system is reporting dropped receives, this value
148 * may be set too high, causing the driver to run out of available receive
151 * CAUTION: When setting EM_RDTR to a value other than 0, adapters
152 * may hang (stop transmitting) under certain network conditions.
153 * If this occurs a WATCHDOG message is logged in the system event log.
154 * In addition, the controller is automatically reset, restoring the
155 * network connection. To eliminate the potential for the hang
156 * ensure that EM_RDTR is set to 0.
161 * Receive Interrupt Absolute Delay Timer (Not valid for 82542/82543/82544)
162 * Valid Range: 0-65535 (0=off)
164 * This value, in units of 1.024 microseconds, limits the delay in which a
165 * receive interrupt is generated. Useful only if EM_RDTR is non-zero,
166 * this value ensures that an interrupt is generated after the initial
167 * packet is received within the set amount of time. Proper tuning,
168 * along with EM_RDTR, may improve traffic throughput in specific network
174 * Inform the stack about transmit checksum offload capabilities.
176 #define EM_CHECKSUM_FEATURES (CSUM_TCP | CSUM_UDP)
179 * This parameter controls the duration of transmit watchdog timer.
181 #define EM_TX_TIMEOUT 5 /* set to 5 seconds */
184 * This parameter controls when the driver calls the routine to reclaim
185 * transmit descriptors.
187 #define EM_TX_CLEANUP_THRESHOLD (adapter->num_tx_desc / 8)
190 * This parameter controls whether or not autonegotation is enabled.
191 * 0 - Disable autonegotiation
192 * 1 - Enable autonegotiation
194 #define DO_AUTO_NEG 1
197 * This parameter control whether or not the driver will wait for
198 * autonegotiation to complete.
199 * 1 - Wait for autonegotiation to complete
200 * 0 - Don't wait for autonegotiation to complete
202 #define WAIT_FOR_AUTO_NEG_DEFAULT 0
205 * EM_MASTER_SLAVE is only defined to enable a workaround for a known compatibility issue
206 * with 82541/82547 devices and some switches. See the "Known Limitations" section of
207 * the README file for a complete description and a list of affected switches.
209 * 0 = Hardware default
212 * 3 = Auto master/slave
214 /* #define EM_MASTER_SLAVE 2 */
216 /* Tunables -- End */
218 #define AUTONEG_ADV_DEFAULT (ADVERTISE_10_HALF | ADVERTISE_10_FULL | \
219 ADVERTISE_100_HALF | ADVERTISE_100_FULL | \
222 #define EM_VENDOR_ID 0x8086
224 #define EM_JUMBO_PBA 0x00000028
225 #define EM_DEFAULT_PBA 0x00000030
226 #define EM_SMARTSPEED_DOWNSHIFT 3
227 #define EM_SMARTSPEED_MAX 15
230 #define MAX_NUM_MULTICAST_ADDRESSES 128
231 #define PCI_ANY_ID (~0U)
232 #define ETHER_ALIGN 2
234 /* Defines for printing debug information */
236 #define DEBUG_IOCTL 0
239 #define INIT_DEBUGOUT(S) if (DEBUG_INIT) printf(S "\n")
240 #define INIT_DEBUGOUT1(S, A) if (DEBUG_INIT) printf(S "\n", A)
241 #define INIT_DEBUGOUT2(S, A, B) if (DEBUG_INIT) printf(S "\n", A, B)
242 #define IOCTL_DEBUGOUT(S) if (DEBUG_IOCTL) printf(S "\n")
243 #define IOCTL_DEBUGOUT1(S, A) if (DEBUG_IOCTL) printf(S "\n", A)
244 #define IOCTL_DEBUGOUT2(S, A, B) if (DEBUG_IOCTL) printf(S "\n", A, B)
245 #define HW_DEBUGOUT(S) if (DEBUG_HW) printf(S "\n")
246 #define HW_DEBUGOUT1(S, A) if (DEBUG_HW) printf(S "\n", A)
247 #define HW_DEBUGOUT2(S, A, B) if (DEBUG_HW) printf(S "\n", A, B)
250 /* Supported RX Buffer Sizes */
251 #define EM_RXBUFFER_2048 2048
252 #define EM_RXBUFFER_4096 4096
253 #define EM_RXBUFFER_8192 8192
254 #define EM_RXBUFFER_16384 16384
256 #define EM_MAX_SCATTER 64
258 /* ******************************************************************************
261 * This array contains the list of Subvendor/Subdevice IDs on which the driver
264 * ******************************************************************************/
265 typedef struct _em_vendor_info_t {
266 unsigned int vendor_id;
267 unsigned int device_id;
268 unsigned int subvendor_id;
269 unsigned int subdevice_id;
276 bus_dmamap_t map; /* bus_dma map for packet */
280 * Bus dma allocation structure used by
281 * em_dma_malloc and em_dma_free.
283 struct em_dma_alloc {
284 bus_addr_t dma_paddr;
286 bus_dma_tag_t dma_tag;
287 bus_dmamap_t dma_map;
288 bus_dma_segment_t dma_seg;
292 typedef enum _XSUM_CONTEXT_T {
299 struct em_int_delay_info {
300 struct adapter *adapter; /* Back-pointer to the adapter struct */
301 int offset; /* Register offset to read/write */
302 int value; /* Current value in usecs */
305 /* For 82544 PCIX Workaround */
306 typedef struct _ADDRESS_LENGTH_PAIR
310 } ADDRESS_LENGTH_PAIR, *PADDRESS_LENGTH_PAIR;
312 typedef struct _DESCRIPTOR_PAIR
314 ADDRESS_LENGTH_PAIR descriptor[4];
316 } DESC_ARRAY, *PDESC_ARRAY;
318 /* Our adapter structure */
323 /* FreeBSD operating-system-specific structures */
324 struct em_osdep osdep;
326 struct resource *res_memory;
327 struct resource *res_ioport;
328 struct resource *res_interrupt;
329 void *int_handler_tag;
330 struct ifmedia media;
331 struct callout timer;
332 struct callout tx_fifo_timer;
336 int em_insert_vlan_header;
338 /* Info about the board itself */
340 u_int8_t link_active;
341 u_int16_t link_speed;
342 u_int16_t link_duplex;
343 u_int32_t smartspeed;
344 struct em_int_delay_info tx_int_delay;
345 struct em_int_delay_info tx_abs_int_delay;
346 struct em_int_delay_info rx_int_delay;
347 struct em_int_delay_info rx_abs_int_delay;
349 XSUM_CONTEXT_T active_checksum_context;
352 * Transmit definitions
354 * We have an array of num_tx_desc descriptors (handled
355 * by the controller) paired with an array of tx_buffers
356 * (at tx_buffer_area).
357 * The index of the next available descriptor is next_avail_tx_desc.
358 * The number of remaining tx_desc is num_tx_desc_avail.
360 struct em_dma_alloc txdma; /* bus_dma glue for tx desc */
361 struct em_tx_desc *tx_desc_base;
362 u_int32_t next_avail_tx_desc;
363 u_int32_t oldest_used_tx_desc;
364 volatile u_int16_t num_tx_desc_avail;
365 u_int16_t num_tx_desc;
367 struct em_buffer *tx_buffer_area;
368 bus_dma_tag_t txtag; /* dma tag for tx */
371 * Receive definitions
373 * we have an array of num_rx_desc rx_desc (handled by the
374 * controller), and paired with an array of rx_buffers
375 * (at rx_buffer_area).
376 * The next pair to check on receive is at offset next_rx_desc_to_check
378 struct em_dma_alloc rxdma; /* bus_dma glue for rx desc */
379 struct em_rx_desc *rx_desc_base;
380 u_int32_t next_rx_desc_to_check;
381 u_int16_t num_rx_desc;
382 u_int32_t rx_buffer_len;
383 struct em_buffer *rx_buffer_area;
390 /* Misc stats maintained by the driver */
391 unsigned long dropped_pkts;
392 unsigned long mbuf_alloc_failed;
393 unsigned long mbuf_cluster_failed;
394 unsigned long no_tx_desc_avail1;
395 unsigned long no_tx_desc_avail2;
396 unsigned long no_tx_map_avail;
397 unsigned long no_tx_dma_setup;
398 unsigned long watchdog_events;
399 unsigned long rx_overruns;
401 /* Used in for 82547 10Mb Half workaround */
402 #define EM_PBA_BYTES_SHIFT 0xA
403 #define EM_TX_HEAD_ADDR_SHIFT 7
404 #define EM_PBA_TX_MASK 0xFFFF0000
405 #define EM_FIFO_HDR 0x10
407 #define EM_82547_PKT_THRESH 0x3e0
409 u_int32_t tx_fifo_size;
410 u_int32_t tx_fifo_head;
411 u_int32_t tx_fifo_head_addr;
412 u_int64_t tx_fifo_reset_cnt;
413 u_int64_t tx_fifo_wrk_cnt;
414 u_int32_t tx_head_addr;
416 /* For 82544 PCIX Workaround */
417 boolean_t pcix_82544;
420 struct em_hw_stats stats;
423 #define EM_LOCK_INIT(_sc, _name) \
424 mtx_init(&(_sc)->mtx, _name, MTX_NETWORK_LOCK, MTX_DEF)
425 #define EM_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->mtx)
426 #define EM_LOCK(_sc) mtx_lock(&(_sc)->mtx)
427 #define EM_UNLOCK(_sc) mtx_unlock(&(_sc)->mtx)
428 #define EM_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->mtx, MA_OWNED)
430 #endif /* _EM_H_DEFINED_ */