sys/dev/ena/ena.c

   1 /*-
   2  * BSD LICENSE
   3  *
   4  * Copyright (c) 2015-2017 Amazon.com, Inc. or its affiliates.
   5  * All rights reserved.
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions
   9  * are met:
  10  *
  11  * 1. Redistributions of source code must retain the above copyright
  12  *    notice, this list of conditions and the following disclaimer.
  13  *
  14  * 2. Redistributions in binary form must reproduce the above copyright
  15  *    notice, this list of conditions and the following disclaimer in the
  16  *    documentation and/or other materials provided with the distribution.
  17  *
  18  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  19  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  20  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  21  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  22  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  23  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  24  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  25  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  26  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  27  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  28  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  29  */
  30 #include <sys/cdefs.h>
  31 __FBSDID("$FreeBSD$");
  32
  33 #include <sys/param.h>
  34 #include <sys/systm.h>
  35 #include <sys/bus.h>
  36 #include <sys/endian.h>
  37 #include <sys/kernel.h>
  38 #include <sys/kthread.h>
  39 #include <sys/malloc.h>
  40 #include <sys/mbuf.h>
  41 #include <sys/module.h>
  42 #include <sys/rman.h>
  43 #include <sys/smp.h>
  44 #include <sys/socket.h>
  45 #include <sys/sockio.h>
  46 #include <sys/sysctl.h>
  47 #include <sys/taskqueue.h>
  48 #include <sys/time.h>
  49 #include <sys/eventhandler.h>
  50
  51 #include <machine/bus.h>
  52 #include <machine/resource.h>
  53 #include <machine/in_cksum.h>
  54
  55 #include <net/bpf.h>
  56 #include <net/ethernet.h>
  57 #include <net/if.h>
  58 #include <net/if_var.h>
  59 #include <net/if_arp.h>
  60 #include <net/if_dl.h>
  61 #include <net/if_media.h>
  62 #include <net/if_types.h>
  63 #include <net/if_vlan_var.h>
  64
  65 #include <netinet/in_systm.h>
  66 #include <netinet/in.h>
  67 #include <netinet/if_ether.h>
  68 #include <netinet/ip.h>
  69 #include <netinet/ip6.h>
  70 #include <netinet/tcp.h>
  71 #include <netinet/udp.h>
  72
  73 #include <dev/pci/pcivar.h>
  74 #include <dev/pci/pcireg.h>
  75
  76 #include "ena.h"
  77 #include "ena_sysctl.h"
  78
  79 /*********************************************************
  80  *  Function prototypes
  81  *********************************************************/
  82 static int      ena_probe(device_t);
  83 static void     ena_intr_msix_mgmnt(void *);
  84 static int      ena_allocate_pci_resources(struct ena_adapter*);
  85 static void     ena_free_pci_resources(struct ena_adapter *);
  86 static int      ena_change_mtu(if_t, int);
  87 static inline void ena_alloc_counters(counter_u64_t *, int);
  88 static inline void ena_free_counters(counter_u64_t *, int);
  89 static inline void ena_reset_counters(counter_u64_t *, int);
  90 static void     ena_init_io_rings_common(struct ena_adapter *,
  91     struct ena_ring *, uint16_t);
  92 static void     ena_init_io_rings(struct ena_adapter *);
  93 static void     ena_free_io_ring_resources(struct ena_adapter *, unsigned int);
  94 static void     ena_free_all_io_rings_resources(struct ena_adapter *);
  95 static int      ena_setup_tx_dma_tag(struct ena_adapter *);
  96 static int      ena_free_tx_dma_tag(struct ena_adapter *);
  97 static int      ena_setup_rx_dma_tag(struct ena_adapter *);
  98 static int      ena_free_rx_dma_tag(struct ena_adapter *);
  99 static int      ena_setup_tx_resources(struct ena_adapter *, int);
 100 static void     ena_free_tx_resources(struct ena_adapter *, int);
 101 static int      ena_setup_all_tx_resources(struct ena_adapter *);
 102 static void     ena_free_all_tx_resources(struct ena_adapter *);
 103 static inline int validate_rx_req_id(struct ena_ring *, uint16_t);
 104 static int      ena_setup_rx_resources(struct ena_adapter *, unsigned int);
 105 static void     ena_free_rx_resources(struct ena_adapter *, unsigned int);
 106 static int      ena_setup_all_rx_resources(struct ena_adapter *);
 107 static void     ena_free_all_rx_resources(struct ena_adapter *);
 108 static inline int ena_alloc_rx_mbuf(struct ena_adapter *, struct ena_ring *,
 109     struct ena_rx_buffer *);
 110 static void     ena_free_rx_mbuf(struct ena_adapter *, struct ena_ring *,
 111     struct ena_rx_buffer *);
 112 static int      ena_refill_rx_bufs(struct ena_ring *, uint32_t);
 113 static void     ena_free_rx_bufs(struct ena_adapter *, unsigned int);
 114 static void     ena_refill_all_rx_bufs(struct ena_adapter *);
 115 static void     ena_free_all_rx_bufs(struct ena_adapter *);
 116 static void     ena_free_tx_bufs(struct ena_adapter *, unsigned int);
 117 static void     ena_free_all_tx_bufs(struct ena_adapter *);
 118 static void     ena_destroy_all_tx_queues(struct ena_adapter *);
 119 static void     ena_destroy_all_rx_queues(struct ena_adapter *);
 120 static void     ena_destroy_all_io_queues(struct ena_adapter *);
 121 static int      ena_create_io_queues(struct ena_adapter *);
 122 static int      ena_tx_cleanup(struct ena_ring *);
 123 static int      ena_rx_cleanup(struct ena_ring *);
 124 static inline int validate_tx_req_id(struct ena_ring *, uint16_t);
 125 static void     ena_rx_hash_mbuf(struct ena_ring *, struct ena_com_rx_ctx *,
 126     struct mbuf *);
 127 static struct mbuf* ena_rx_mbuf(struct ena_ring *, struct ena_com_rx_buf_info *,
 128     struct ena_com_rx_ctx *, uint16_t *);
 129 static inline void ena_rx_checksum(struct ena_ring *, struct ena_com_rx_ctx *,
 130     struct mbuf *);
 131 static void     ena_cleanup(void *arg, int pending);
 132 static int      ena_handle_msix(void *);
 133 static int      ena_enable_msix(struct ena_adapter *);
 134 static void     ena_setup_mgmnt_intr(struct ena_adapter *);
 135 static void     ena_setup_io_intr(struct ena_adapter *);
 136 static int      ena_request_mgmnt_irq(struct ena_adapter *);
 137 static int      ena_request_io_irq(struct ena_adapter *);
 138 static void     ena_free_mgmnt_irq(struct ena_adapter *);
 139 static void     ena_free_io_irq(struct ena_adapter *);
 140 static void     ena_free_irqs(struct ena_adapter*);
 141 static void     ena_disable_msix(struct ena_adapter *);
 142 static void     ena_unmask_all_io_irqs(struct ena_adapter *);
 143 static int      ena_rss_configure(struct ena_adapter *);
 144 static int      ena_up_complete(struct ena_adapter *);
 145 static int      ena_up(struct ena_adapter *);
 146 static void     ena_down(struct ena_adapter *);
 147 static uint64_t ena_get_counter(if_t, ift_counter);
 148 static int      ena_media_change(if_t);
 149 static void     ena_media_status(if_t, struct ifmediareq *);
 150 static void     ena_init(void *);
 151 static int      ena_ioctl(if_t, u_long, caddr_t);
 152 static int      ena_get_dev_offloads(struct ena_com_dev_get_features_ctx *);
 153 static void     ena_update_host_info(struct ena_admin_host_info *, if_t);
 154 static void     ena_update_hwassist(struct ena_adapter *);
 155 static int      ena_setup_ifnet(device_t, struct ena_adapter *,
 156     struct ena_com_dev_get_features_ctx *);
 157 static void     ena_tx_csum(struct ena_com_tx_ctx *, struct mbuf *);
 158 static int      ena_check_and_collapse_mbuf(struct ena_ring *tx_ring,
 159     struct mbuf **mbuf);
 160 static int      ena_xmit_mbuf(struct ena_ring *, struct mbuf **);
 161 static void     ena_start_xmit(struct ena_ring *);
 162 static int      ena_mq_start(if_t, struct mbuf *);
 163 static void     ena_deferred_mq_start(void *, int);
 164 static void     ena_qflush(if_t);
 165 static int      ena_calc_io_queue_num(struct ena_adapter *,
 166     struct ena_com_dev_get_features_ctx *);
 167 static int      ena_calc_queue_size(struct ena_adapter *,
 168     struct ena_calc_queue_size_ctx *);
 169 static int      ena_handle_updated_queues(struct ena_adapter *,
 170     struct ena_com_dev_get_features_ctx *);
 171 static int      ena_rss_init_default(struct ena_adapter *);
 172 static void     ena_rss_init_default_deferred(void *);
 173 static void     ena_config_host_info(struct ena_com_dev *);
 174 static int      ena_attach(device_t);
 175 static int      ena_detach(device_t);
 176 static int      ena_device_init(struct ena_adapter *, device_t,
 177     struct ena_com_dev_get_features_ctx *, int *);
 178 static int      ena_enable_msix_and_set_admin_interrupts(struct ena_adapter *,
 179     int);
 180 static void ena_update_on_link_change(void *, struct ena_admin_aenq_entry *);
 181 static void     unimplemented_aenq_handler(void *,
 182     struct ena_admin_aenq_entry *);
 183 static void     ena_timer_service(void *);
 184
 185 static char ena_version[] = DEVICE_NAME DRV_MODULE_NAME " v" DRV_MODULE_VERSION;
 186
 187 static ena_vendor_info_t ena_vendor_info_array[] = {
 188     { PCI_VENDOR_ID_AMAZON, PCI_DEV_ID_ENA_PF, 0},
 189     { PCI_VENDOR_ID_AMAZON, PCI_DEV_ID_ENA_LLQ_PF, 0},
 190     { PCI_VENDOR_ID_AMAZON, PCI_DEV_ID_ENA_VF, 0},
 191     { PCI_VENDOR_ID_AMAZON, PCI_DEV_ID_ENA_LLQ_VF, 0},
 192     /* Last entry */
 193     { 0, 0, 0 }
 194 };
 195
 196 /*
 197  * Contains pointers to event handlers, e.g. link state chage.
 198  */
 199 static struct ena_aenq_handlers aenq_handlers;
 200
 201 void
 202 ena_dmamap_callback(void *arg, bus_dma_segment_t *segs, int nseg, int error)
 203 {
 204         if (error != 0)
 205                 return;
 206         *(bus_addr_t *) arg = segs[0].ds_addr;
 207 }
 208
 209 int
 210 ena_dma_alloc(device_t dmadev, bus_size_t size,
 211     ena_mem_handle_t *dma , int mapflags)
 212 {
 213         struct ena_adapter* adapter = device_get_softc(dmadev);
 214         uint32_t maxsize;
 215         uint64_t dma_space_addr;
 216         int error;
 217
 218         maxsize = ((size - 1) / PAGE_SIZE + 1) * PAGE_SIZE;
 219
 220         dma_space_addr = ENA_DMA_BIT_MASK(adapter->dma_width);
 221         if (unlikely(dma_space_addr == 0))
 222                 dma_space_addr = BUS_SPACE_MAXADDR;
 223
 224         error = bus_dma_tag_create(bus_get_dma_tag(dmadev), /* parent */
 225             8, 0,             /* alignment, bounds              */
 226             dma_space_addr,   /* lowaddr of exclusion window    */
 227             BUS_SPACE_MAXADDR,/* highaddr of exclusion window   */
 228             NULL, NULL,       /* filter, filterarg              */
 229             maxsize,          /* maxsize                        */
 230             1,                /* nsegments                      */
 231             maxsize,          /* maxsegsize                     */
 232             BUS_DMA_ALLOCNOW, /* flags                          */
 233             NULL,             /* lockfunc                       */
 234             NULL,             /* lockarg                        */
 235             &dma->tag);
 236         if (unlikely(error != 0)) {
 237                 ena_trace(ENA_ALERT, "bus_dma_tag_create failed: %d\n", error);
 238                 goto fail_tag;
 239         }
 240
 241         error = bus_dmamem_alloc(dma->tag, (void**) &dma->vaddr,
 242             BUS_DMA_COHERENT | BUS_DMA_ZERO, &dma->map);
 243         if (unlikely(error != 0)) {
 244                 ena_trace(ENA_ALERT, "bus_dmamem_alloc(%ju) failed: %d\n",
 245                     (uintmax_t)size, error);
 246                 goto fail_map_create;
 247         }
 248
 249         dma->paddr = 0;
 250         error = bus_dmamap_load(dma->tag, dma->map, dma->vaddr,
 251             size, ena_dmamap_callback, &dma->paddr, mapflags);
 252         if (unlikely((error != 0) || (dma->paddr == 0))) {
 253                 ena_trace(ENA_ALERT, ": bus_dmamap_load failed: %d\n", error);
 254                 goto fail_map_load;
 255         }
 256
 257         bus_dmamap_sync(dma->tag, dma->map,
 258             BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
 259
 260         return (0);
 261
 262 fail_map_load:
 263         bus_dmamem_free(dma->tag, dma->vaddr, dma->map);
 264 fail_map_create:
 265         bus_dma_tag_destroy(dma->tag);
 266 fail_tag:
 267         dma->tag = NULL;
 268         dma->vaddr = NULL;
 269         dma->paddr = 0;
 270
 271         return (error);
 272 }
 273
 274 static int
 275 ena_allocate_pci_resources(struct ena_adapter* adapter)
 276 {
 277         device_t pdev = adapter->pdev;
 278         int rid;
 279
 280         rid = PCIR_BAR(ENA_REG_BAR);
 281         adapter->memory = NULL;
 282         adapter->registers = bus_alloc_resource_any(pdev, SYS_RES_MEMORY,
 283             &rid, RF_ACTIVE);
 284         if (unlikely(adapter->registers == NULL)) {
 285                 device_printf(pdev, "Unable to allocate bus resource: "
 286                     "registers\n");
 287                 return (ENXIO);
 288         }
 289
 290         return (0);
 291 }
 292
 293 static void
 294 ena_free_pci_resources(struct ena_adapter *adapter)
 295 {
 296         device_t pdev = adapter->pdev;
 297
 298         if (adapter->memory != NULL) {
 299                 bus_release_resource(pdev, SYS_RES_MEMORY,
 300                     PCIR_BAR(ENA_MEM_BAR), adapter->memory);
 301         }
 302
 303         if (adapter->registers != NULL) {
 304                 bus_release_resource(pdev, SYS_RES_MEMORY,
 305                     PCIR_BAR(ENA_REG_BAR), adapter->registers);
 306         }
 307 }
 308
 309 static int
 310 ena_probe(device_t dev)
 311 {
 312         ena_vendor_info_t *ent;
 313         char            adapter_name[60];
 314         uint16_t        pci_vendor_id = 0;
 315         uint16_t        pci_device_id = 0;
 316
 317         pci_vendor_id = pci_get_vendor(dev);
 318         pci_device_id = pci_get_device(dev);
 319
 320         ent = ena_vendor_info_array;
 321         while (ent->vendor_id != 0) {
 322                 if ((pci_vendor_id == ent->vendor_id) &&
 323                     (pci_device_id == ent->device_id)) {
 324                         ena_trace(ENA_DBG, "vendor=%x device=%x ",
 325                             pci_vendor_id, pci_device_id);
 326
 327                         sprintf(adapter_name, DEVICE_DESC);
 328                         device_set_desc_copy(dev, adapter_name);
 329                         return (BUS_PROBE_DEFAULT);
 330                 }
 331
 332                 ent++;
 333
 334         }
 335
 336         return (ENXIO);
 337 }
 338
 339 static int
 340 ena_change_mtu(if_t ifp, int new_mtu)
 341 {
 342         struct ena_adapter *adapter = if_getsoftc(ifp);
 343         int rc;
 344
 345         if ((new_mtu > adapter->max_mtu) || (new_mtu < ENA_MIN_MTU)) {
 346                 device_printf(adapter->pdev, "Invalid MTU setting. "
 347                     "new_mtu: %d max mtu: %d min mtu: %d\n",
 348                     new_mtu, adapter->max_mtu, ENA_MIN_MTU);
 349                 return (EINVAL);
 350         }
 351
 352         rc = ena_com_set_dev_mtu(adapter->ena_dev, new_mtu);
 353         if (likely(rc == 0)) {
 354                 ena_trace(ENA_DBG, "set MTU to %d\n", new_mtu);
 355                 if_setmtu(ifp, new_mtu);
 356         } else {
 357                 device_printf(adapter->pdev, "Failed to set MTU to %d\n",
 358                     new_mtu);
 359         }
 360
 361         return (rc);
 362 }
 363
 364 static inline void
 365 ena_alloc_counters(counter_u64_t *begin, int size)
 366 {
 367         counter_u64_t *end = (counter_u64_t *)((char *)begin + size);
 368
 369         for (; begin < end; ++begin)
 370                 *begin = counter_u64_alloc(M_WAITOK);
 371 }
 372
 373 static inline void
 374 ena_free_counters(counter_u64_t *begin, int size)
 375 {
 376         counter_u64_t *end = (counter_u64_t *)((char *)begin + size);
 377
 378         for (; begin < end; ++begin)
 379                 counter_u64_free(*begin);
 380 }
 381
 382 static inline void
 383 ena_reset_counters(counter_u64_t *begin, int size)
 384 {
 385         counter_u64_t *end = (counter_u64_t *)((char *)begin + size);
 386
 387         for (; begin < end; ++begin)
 388                 counter_u64_zero(*begin);
 389 }
 390
 391 static void
 392 ena_init_io_rings_common(struct ena_adapter *adapter, struct ena_ring *ring,
 393     uint16_t qid)
 394 {
 395
 396         ring->qid = qid;
 397         ring->adapter = adapter;
 398         ring->ena_dev = adapter->ena_dev;
 399         ring->first_interrupt = false;
 400         ring->no_interrupt_event_cnt = 0;
 401 }
 402
 403 static void
 404 ena_init_io_rings(struct ena_adapter *adapter)
 405 {
 406         struct ena_com_dev *ena_dev;
 407         struct ena_ring *txr, *rxr;
 408         struct ena_que *que;
 409         int i;
 410
 411         ena_dev = adapter->ena_dev;
 412
 413         for (i = 0; i < adapter->num_queues; i++) {
 414                 txr = &adapter->tx_ring[i];
 415                 rxr = &adapter->rx_ring[i];
 416
 417                 /* TX/RX common ring state */
 418                 ena_init_io_rings_common(adapter, txr, i);
 419                 ena_init_io_rings_common(adapter, rxr, i);
 420
 421                 /* TX specific ring state */
 422                 txr->ring_size = adapter->tx_ring_size;
 423                 txr->tx_max_header_size = ena_dev->tx_max_header_size;
 424                 txr->tx_mem_queue_type = ena_dev->tx_mem_queue_type;
 425                 txr->smoothed_interval =
 426                     ena_com_get_nonadaptive_moderation_interval_tx(ena_dev);
 427
 428                 /* Allocate a buf ring */
 429                 txr->buf_ring_size = adapter->buf_ring_size;
 430                 txr->br = buf_ring_alloc(txr->buf_ring_size, M_DEVBUF,
 431                     M_WAITOK, &txr->ring_mtx);
 432
 433                 /* Alloc TX statistics. */
 434                 ena_alloc_counters((counter_u64_t *)&txr->tx_stats,
 435                     sizeof(txr->tx_stats));
 436
 437                 /* RX specific ring state */
 438                 rxr->ring_size = adapter->rx_ring_size;
 439                 rxr->smoothed_interval =
 440                     ena_com_get_nonadaptive_moderation_interval_rx(ena_dev);
 441
 442                 /* Alloc RX statistics. */
 443                 ena_alloc_counters((counter_u64_t *)&rxr->rx_stats,
 444                     sizeof(rxr->rx_stats));
 445
 446                 /* Initialize locks */
 447                 snprintf(txr->mtx_name, nitems(txr->mtx_name), "%s:tx(%d)",
 448                     device_get_nameunit(adapter->pdev), i);
 449                 snprintf(rxr->mtx_name, nitems(rxr->mtx_name), "%s:rx(%d)",
 450                     device_get_nameunit(adapter->pdev), i);
 451
 452                 mtx_init(&txr->ring_mtx, txr->mtx_name, NULL, MTX_DEF);
 453
 454                 que = &adapter->que[i];
 455                 que->adapter = adapter;
 456                 que->id = i;
 457                 que->tx_ring = txr;
 458                 que->rx_ring = rxr;
 459
 460                 txr->que = que;
 461                 rxr->que = que;
 462
 463                 rxr->empty_rx_queue = 0;
 464         }
 465 }
 466
 467 static void
 468 ena_free_io_ring_resources(struct ena_adapter *adapter, unsigned int qid)
 469 {
 470         struct ena_ring *txr = &adapter->tx_ring[qid];
 471         struct ena_ring *rxr = &adapter->rx_ring[qid];
 472
 473         ena_free_counters((counter_u64_t *)&txr->tx_stats,
 474             sizeof(txr->tx_stats));
 475         ena_free_counters((counter_u64_t *)&rxr->rx_stats,
 476             sizeof(rxr->rx_stats));
 477
 478         ENA_RING_MTX_LOCK(txr);
 479         drbr_free(txr->br, M_DEVBUF);
 480         ENA_RING_MTX_UNLOCK(txr);
 481
 482         mtx_destroy(&txr->ring_mtx);
 483 }
 484
 485 static void
 486 ena_free_all_io_rings_resources(struct ena_adapter *adapter)
 487 {
 488         int i;
 489
 490         for (i = 0; i < adapter->num_queues; i++)
 491                 ena_free_io_ring_resources(adapter, i);
 492
 493 }
 494
 495 static int
 496 ena_setup_tx_dma_tag(struct ena_adapter *adapter)
 497 {
 498         int ret;
 499
 500         /* Create DMA tag for Tx buffers */
 501         ret = bus_dma_tag_create(bus_get_dma_tag(adapter->pdev),
 502             1, 0,                                 /* alignment, bounds       */
 503             ENA_DMA_BIT_MASK(adapter->dma_width), /* lowaddr of excl window  */
 504             BUS_SPACE_MAXADDR,                    /* highaddr of excl window */
 505             NULL, NULL,                           /* filter, filterarg       */
 506             ENA_TSO_MAXSIZE,                      /* maxsize                 */
 507             adapter->max_tx_sgl_size - 1,         /* nsegments               */
 508             ENA_TSO_MAXSIZE,                      /* maxsegsize              */
 509             0,                                    /* flags                   */
 510             NULL,                                 /* lockfunc                */
 511             NULL,                                 /* lockfuncarg             */
 512             &adapter->tx_buf_tag);
 513
 514         return (ret);
 515 }
 516
 517 static int
 518 ena_free_tx_dma_tag(struct ena_adapter *adapter)
 519 {
 520         int ret;
 521
 522         ret = bus_dma_tag_destroy(adapter->tx_buf_tag);
 523
 524         if (likely(ret == 0))
 525                 adapter->tx_buf_tag = NULL;
 526
 527         return (ret);
 528 }
 529
 530 static int
 531 ena_setup_rx_dma_tag(struct ena_adapter *adapter)
 532 {
 533         int ret;
 534
 535         /* Create DMA tag for Rx buffers*/
 536         ret = bus_dma_tag_create(bus_get_dma_tag(adapter->pdev), /* parent   */
 537             1, 0,                                 /* alignment, bounds       */
 538             ENA_DMA_BIT_MASK(adapter->dma_width), /* lowaddr of excl window  */
 539             BUS_SPACE_MAXADDR,                    /* highaddr of excl window */
 540             NULL, NULL,                           /* filter, filterarg       */
 541             MJUM16BYTES,                          /* maxsize                 */
 542             adapter->max_rx_sgl_size,             /* nsegments               */
 543             MJUM16BYTES,                          /* maxsegsize              */
 544             0,                                    /* flags                   */
 545             NULL,                                 /* lockfunc                */
 546             NULL,                                 /* lockarg                 */
 547             &adapter->rx_buf_tag);
 548
 549         return (ret);
 550 }
 551
 552 static int
 553 ena_free_rx_dma_tag(struct ena_adapter *adapter)
 554 {
 555         int ret;
 556
 557         ret = bus_dma_tag_destroy(adapter->rx_buf_tag);
 558
 559         if (likely(ret == 0))
 560                 adapter->rx_buf_tag = NULL;
 561
 562         return (ret);
 563 }
 564
 565 /**
 566  * ena_setup_tx_resources - allocate Tx resources (Descriptors)
 567  * @adapter: network interface device structure
 568  * @qid: queue index
 569  *
 570  * Returns 0 on success, otherwise on failure.
 571  **/
 572 static int
 573 ena_setup_tx_resources(struct ena_adapter *adapter, int qid)
 574 {
 575         struct ena_que *que = &adapter->que[qid];
 576         struct ena_ring *tx_ring = que->tx_ring;
 577         int size, i, err;
 578
 579         size = sizeof(struct ena_tx_buffer) * tx_ring->ring_size;
 580
 581         tx_ring->tx_buffer_info = malloc(size, M_DEVBUF, M_NOWAIT | M_ZERO);
 582         if (unlikely(tx_ring->tx_buffer_info == NULL))
 583                 return (ENOMEM);
 584
 585         size = sizeof(uint16_t) * tx_ring->ring_size;
 586         tx_ring->free_tx_ids = malloc(size, M_DEVBUF, M_NOWAIT | M_ZERO);
 587         if (unlikely(tx_ring->free_tx_ids == NULL))
 588                 goto err_buf_info_free;
 589
 590         /* Req id stack for TX OOO completions */
 591         for (i = 0; i < tx_ring->ring_size; i++)
 592                 tx_ring->free_tx_ids[i] = i;
 593
 594         /* Reset TX statistics. */
 595         ena_reset_counters((counter_u64_t *)&tx_ring->tx_stats,
 596             sizeof(tx_ring->tx_stats));
 597
 598         tx_ring->next_to_use = 0;
 599         tx_ring->next_to_clean = 0;
 600
 601         /* Make sure that drbr is empty */
 602         ENA_RING_MTX_LOCK(tx_ring);
 603         drbr_flush(adapter->ifp, tx_ring->br);
 604         ENA_RING_MTX_UNLOCK(tx_ring);
 605
 606         /* ... and create the buffer DMA maps */
 607         for (i = 0; i < tx_ring->ring_size; i++) {
 608                 err = bus_dmamap_create(adapter->tx_buf_tag, 0,
 609                     &tx_ring->tx_buffer_info[i].map);
 610                 if (unlikely(err != 0)) {
 611                         ena_trace(ENA_ALERT,
 612                              "Unable to create Tx DMA map for buffer %d\n", i);
 613                         goto err_buf_info_unmap;
 614                 }
 615         }
 616
 617         /* Allocate taskqueues */
 618         TASK_INIT(&tx_ring->enqueue_task, 0, ena_deferred_mq_start, tx_ring);
 619         tx_ring->enqueue_tq = taskqueue_create_fast("ena_tx_enque", M_NOWAIT,
 620             taskqueue_thread_enqueue, &tx_ring->enqueue_tq);
 621         if (unlikely(tx_ring->enqueue_tq == NULL)) {
 622                 ena_trace(ENA_ALERT,
 623                     "Unable to create taskqueue for enqueue task\n");
 624                 i = tx_ring->ring_size;
 625                 goto err_buf_info_unmap;
 626         }
 627
 628         tx_ring->running = true;
 629
 630         taskqueue_start_threads(&tx_ring->enqueue_tq, 1, PI_NET,
 631             "%s txeq %d", device_get_nameunit(adapter->pdev), que->cpu);
 632
 633         return (0);
 634
 635 err_buf_info_unmap:
 636         while (i--) {
 637                 bus_dmamap_destroy(adapter->tx_buf_tag,
 638                     tx_ring->tx_buffer_info[i].map);
 639         }
 640         free(tx_ring->free_tx_ids, M_DEVBUF);
 641         tx_ring->free_tx_ids = NULL;
 642 err_buf_info_free:
 643         free(tx_ring->tx_buffer_info, M_DEVBUF);
 644         tx_ring->tx_buffer_info = NULL;
 645
 646         return (ENOMEM);
 647 }
 648
 649 /**
 650  * ena_free_tx_resources - Free Tx Resources per Queue
 651  * @adapter: network interface device structure
 652  * @qid: queue index
 653  *
 654  * Free all transmit software resources
 655  **/
 656 static void
 657 ena_free_tx_resources(struct ena_adapter *adapter, int qid)
 658 {
 659         struct ena_ring *tx_ring = &adapter->tx_ring[qid];
 660
 661         while (taskqueue_cancel(tx_ring->enqueue_tq, &tx_ring->enqueue_task,
 662             NULL))
 663                 taskqueue_drain(tx_ring->enqueue_tq, &tx_ring->enqueue_task);
 664
 665         taskqueue_free(tx_ring->enqueue_tq);
 666
 667         ENA_RING_MTX_LOCK(tx_ring);
 668         /* Flush buffer ring, */
 669         drbr_flush(adapter->ifp, tx_ring->br);
 670
 671         /* Free buffer DMA maps, */
 672         for (int i = 0; i < tx_ring->ring_size; i++) {
 673                 bus_dmamap_sync(adapter->tx_buf_tag,
 674                     tx_ring->tx_buffer_info[i].map, BUS_DMASYNC_POSTWRITE);
 675                 bus_dmamap_unload(adapter->tx_buf_tag,
 676                     tx_ring->tx_buffer_info[i].map);
 677                 bus_dmamap_destroy(adapter->tx_buf_tag,
 678                     tx_ring->tx_buffer_info[i].map);
 679                 m_freem(tx_ring->tx_buffer_info[i].mbuf);
 680                 tx_ring->tx_buffer_info[i].mbuf = NULL;
 681         }
 682         ENA_RING_MTX_UNLOCK(tx_ring);
 683
 684         /* And free allocated memory. */
 685         free(tx_ring->tx_buffer_info, M_DEVBUF);
 686         tx_ring->tx_buffer_info = NULL;
 687
 688         free(tx_ring->free_tx_ids, M_DEVBUF);
 689         tx_ring->free_tx_ids = NULL;
 690 }
 691
 692 /**
 693  * ena_setup_all_tx_resources - allocate all queues Tx resources
 694  * @adapter: network interface device structure
 695  *
 696  * Returns 0 on success, otherwise on failure.
 697  **/
 698 static int
 699 ena_setup_all_tx_resources(struct ena_adapter *adapter)
 700 {
 701         int i, rc;
 702
 703         for (i = 0; i < adapter->num_queues; i++) {
 704                 rc = ena_setup_tx_resources(adapter, i);
 705                 if (rc != 0) {
 706                         device_printf(adapter->pdev,
 707                             "Allocation for Tx Queue %u failed\n", i);
 708                         goto err_setup_tx;
 709                 }
 710         }
 711
 712         return (0);
 713
 714 err_setup_tx:
 715         /* Rewind the index freeing the rings as we go */
 716         while (i--)
 717                 ena_free_tx_resources(adapter, i);
 718         return (rc);
 719 }
 720
 721 /**
 722  * ena_free_all_tx_resources - Free Tx Resources for All Queues
 723  * @adapter: network interface device structure
 724  *
 725  * Free all transmit software resources
 726  **/
 727 static void
 728 ena_free_all_tx_resources(struct ena_adapter *adapter)
 729 {
 730         int i;
 731
 732         for (i = 0; i < adapter->num_queues; i++)
 733                 ena_free_tx_resources(adapter, i);
 734 }
 735
 736 static inline int
 737 validate_rx_req_id(struct ena_ring *rx_ring, uint16_t req_id)
 738 {
 739         if (likely(req_id < rx_ring->ring_size))
 740                 return (0);
 741
 742         device_printf(rx_ring->adapter->pdev, "Invalid rx req_id: %hu\n",
 743             req_id);
 744         counter_u64_add(rx_ring->rx_stats.bad_req_id, 1);
 745
 746         /* Trigger device reset */
 747         rx_ring->adapter->reset_reason = ENA_REGS_RESET_INV_RX_REQ_ID;
 748         rx_ring->adapter->trigger_reset = true;
 749
 750         return (EFAULT);
 751 }
 752
 753 /**
 754  * ena_setup_rx_resources - allocate Rx resources (Descriptors)
 755  * @adapter: network interface device structure
 756  * @qid: queue index
 757  *
 758  * Returns 0 on success, otherwise on failure.
 759  **/
 760 static int
 761 ena_setup_rx_resources(struct ena_adapter *adapter, unsigned int qid)
 762 {
 763         struct ena_que *que = &adapter->que[qid];
 764         struct ena_ring *rx_ring = que->rx_ring;
 765         int size, err, i;
 766
 767         size = sizeof(struct ena_rx_buffer) * rx_ring->ring_size;
 768
 769         /*
 770          * Alloc extra element so in rx path
 771          * we can always prefetch rx_info + 1
 772          */
 773         size += sizeof(struct ena_rx_buffer);
 774
 775         rx_ring->rx_buffer_info = malloc(size, M_DEVBUF, M_WAITOK | M_ZERO);
 776
 777         size = sizeof(uint16_t) * rx_ring->ring_size;
 778         rx_ring->free_rx_ids = malloc(size, M_DEVBUF, M_WAITOK);
 779
 780         for (i = 0; i < rx_ring->ring_size; i++)
 781                 rx_ring->free_rx_ids[i] = i;
 782
 783         /* Reset RX statistics. */
 784         ena_reset_counters((counter_u64_t *)&rx_ring->rx_stats,
 785             sizeof(rx_ring->rx_stats));
 786
 787         rx_ring->next_to_clean = 0;
 788         rx_ring->next_to_use = 0;
 789
 790         /* ... and create the buffer DMA maps */
 791         for (i = 0; i < rx_ring->ring_size; i++) {
 792                 err = bus_dmamap_create(adapter->rx_buf_tag, 0,
 793                     &(rx_ring->rx_buffer_info[i].map));
 794                 if (err != 0) {
 795                         ena_trace(ENA_ALERT,
 796                             "Unable to create Rx DMA map for buffer %d\n", i);
 797                         goto err_buf_info_unmap;
 798                 }
 799         }
 800
 801         /* Create LRO for the ring */
 802         if ((adapter->ifp->if_capenable & IFCAP_LRO) != 0) {
 803                 int err = tcp_lro_init(&rx_ring->lro);
 804                 if (err != 0) {
 805                         device_printf(adapter->pdev,
 806                             "LRO[%d] Initialization failed!\n", qid);
 807                 } else {
 808                         ena_trace(ENA_INFO,
 809                             "RX Soft LRO[%d] Initialized\n", qid);
 810                         rx_ring->lro.ifp = adapter->ifp;
 811                 }
 812         }
 813
 814         return (0);
 815
 816 err_buf_info_unmap:
 817         while (i--) {
 818                 bus_dmamap_destroy(adapter->rx_buf_tag,
 819                     rx_ring->rx_buffer_info[i].map);
 820         }
 821
 822         free(rx_ring->free_rx_ids, M_DEVBUF);
 823         rx_ring->free_rx_ids = NULL;
 824         free(rx_ring->rx_buffer_info, M_DEVBUF);
 825         rx_ring->rx_buffer_info = NULL;
 826         return (ENOMEM);
 827 }
 828
 829 /**
 830  * ena_free_rx_resources - Free Rx Resources
 831  * @adapter: network interface device structure
 832  * @qid: queue index
 833  *
 834  * Free all receive software resources
 835  **/
 836 static void
 837 ena_free_rx_resources(struct ena_adapter *adapter, unsigned int qid)
 838 {
 839         struct ena_ring *rx_ring = &adapter->rx_ring[qid];
 840
 841         /* Free buffer DMA maps, */
 842         for (int i = 0; i < rx_ring->ring_size; i++) {
 843                 bus_dmamap_sync(adapter->rx_buf_tag,
 844                     rx_ring->rx_buffer_info[i].map, BUS_DMASYNC_POSTREAD);
 845                 m_freem(rx_ring->rx_buffer_info[i].mbuf);
 846                 rx_ring->rx_buffer_info[i].mbuf = NULL;
 847                 bus_dmamap_unload(adapter->rx_buf_tag,
 848                     rx_ring->rx_buffer_info[i].map);
 849                 bus_dmamap_destroy(adapter->rx_buf_tag,
 850                     rx_ring->rx_buffer_info[i].map);
 851         }
 852
 853         /* free LRO resources, */
 854         tcp_lro_free(&rx_ring->lro);
 855
 856         /* free allocated memory */
 857         free(rx_ring->rx_buffer_info, M_DEVBUF);
 858         rx_ring->rx_buffer_info = NULL;
 859
 860         free(rx_ring->free_rx_ids, M_DEVBUF);
 861         rx_ring->free_rx_ids = NULL;
 862 }
 863
 864 /**
 865  * ena_setup_all_rx_resources - allocate all queues Rx resources
 866  * @adapter: network interface device structure
 867  *
 868  * Returns 0 on success, otherwise on failure.
 869  **/
 870 static int
 871 ena_setup_all_rx_resources(struct ena_adapter *adapter)
 872 {
 873         int i, rc = 0;
 874
 875         for (i = 0; i < adapter->num_queues; i++) {
 876                 rc = ena_setup_rx_resources(adapter, i);
 877                 if (rc != 0) {
 878                         device_printf(adapter->pdev,
 879                             "Allocation for Rx Queue %u failed\n", i);
 880                         goto err_setup_rx;
 881                 }
 882         }
 883         return (0);
 884
 885 err_setup_rx:
 886         /* rewind the index freeing the rings as we go */
 887         while (i--)
 888                 ena_free_rx_resources(adapter, i);
 889         return (rc);
 890 }
 891
 892 /**
 893  * ena_free_all_rx_resources - Free Rx resources for all queues
 894  * @adapter: network interface device structure
 895  *
 896  * Free all receive software resources
 897  **/
 898 static void
 899 ena_free_all_rx_resources(struct ena_adapter *adapter)
 900 {
 901         int i;
 902
 903         for (i = 0; i < adapter->num_queues; i++)
 904                 ena_free_rx_resources(adapter, i);
 905 }
 906
 907 static inline int
 908 ena_alloc_rx_mbuf(struct ena_adapter *adapter,
 909     struct ena_ring *rx_ring, struct ena_rx_buffer *rx_info)
 910 {
 911         struct ena_com_buf *ena_buf;
 912         bus_dma_segment_t segs[1];
 913         int nsegs, error;
 914         int mlen;
 915
 916         /* if previous allocated frag is not used */
 917         if (unlikely(rx_info->mbuf != NULL))
 918                 return (0);
 919
 920         /* Get mbuf using UMA allocator */
 921         rx_info->mbuf = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR, MJUM16BYTES);
 922
 923         if (unlikely(rx_info->mbuf == NULL)) {
 924                 counter_u64_add(rx_ring->rx_stats.mjum_alloc_fail, 1);
 925                 rx_info->mbuf = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR);
 926                 if (unlikely(rx_info->mbuf == NULL)) {
 927                         counter_u64_add(rx_ring->rx_stats.mbuf_alloc_fail, 1);
 928                         return (ENOMEM);
 929                 }
 930                 mlen = MCLBYTES;
 931         } else {
 932                 mlen = MJUM16BYTES;
 933         }
 934         /* Set mbuf length*/
 935         rx_info->mbuf->m_pkthdr.len = rx_info->mbuf->m_len = mlen;
 936
 937         /* Map packets for DMA */
 938         ena_trace(ENA_DBG | ENA_RSC | ENA_RXPTH,
 939             "Using tag %p for buffers' DMA mapping, mbuf %p len: %d",
 940             adapter->rx_buf_tag,rx_info->mbuf, rx_info->mbuf->m_len);
 941         error = bus_dmamap_load_mbuf_sg(adapter->rx_buf_tag, rx_info->map,
 942             rx_info->mbuf, segs, &nsegs, BUS_DMA_NOWAIT);
 943         if (unlikely((error != 0) || (nsegs != 1))) {
 944                 ena_trace(ENA_WARNING, "failed to map mbuf, error: %d, "
 945                     "nsegs: %d\n", error, nsegs);
 946                 counter_u64_add(rx_ring->rx_stats.dma_mapping_err, 1);
 947                 goto exit;
 948
 949         }
 950
 951         bus_dmamap_sync(adapter->rx_buf_tag, rx_info->map, BUS_DMASYNC_PREREAD);
 952
 953         ena_buf = &rx_info->ena_buf;
 954         ena_buf->paddr = segs[0].ds_addr;
 955         ena_buf->len = mlen;
 956
 957         ena_trace(ENA_DBG | ENA_RSC | ENA_RXPTH,
 958             "ALLOC RX BUF: mbuf %p, rx_info %p, len %d, paddr %#jx\n",
 959             rx_info->mbuf, rx_info,ena_buf->len, (uintmax_t)ena_buf->paddr);
 960
 961         return (0);
 962
 963 exit:
 964         m_freem(rx_info->mbuf);
 965         rx_info->mbuf = NULL;
 966         return (EFAULT);
 967 }
 968
 969 static void
 970 ena_free_rx_mbuf(struct ena_adapter *adapter, struct ena_ring *rx_ring,
 971     struct ena_rx_buffer *rx_info)
 972 {
 973
 974         if (rx_info->mbuf == NULL) {
 975                 ena_trace(ENA_WARNING, "Trying to free unallocated buffer\n");
 976                 return;
 977         }
 978
 979         bus_dmamap_sync(adapter->rx_buf_tag, rx_info->map,
 980             BUS_DMASYNC_POSTREAD);
 981         bus_dmamap_unload(adapter->rx_buf_tag, rx_info->map);
 982         m_freem(rx_info->mbuf);
 983         rx_info->mbuf = NULL;
 984 }
 985
 986 /**
 987  * ena_refill_rx_bufs - Refills ring with descriptors
 988  * @rx_ring: the ring which we want to feed with free descriptors
 989  * @num: number of descriptors to refill
 990  * Refills the ring with newly allocated DMA-mapped mbufs for receiving
 991  **/
 992 static int
 993 ena_refill_rx_bufs(struct ena_ring *rx_ring, uint32_t num)
 994 {
 995         struct ena_adapter *adapter = rx_ring->adapter;
 996         uint16_t next_to_use, req_id;
 997         uint32_t i;
 998         int rc;
 999
1000         ena_trace(ENA_DBG | ENA_RXPTH | ENA_RSC, "refill qid: %d",
1001             rx_ring->qid);
1002
1003         next_to_use = rx_ring->next_to_use;
1004
1005         for (i = 0; i < num; i++) {
1006                 struct ena_rx_buffer *rx_info;
1007
1008                 ena_trace(ENA_DBG | ENA_RXPTH | ENA_RSC,
1009                     "RX buffer - next to use: %d", next_to_use);
1010
1011                 req_id = rx_ring->free_rx_ids[next_to_use];
1012                 rx_info = &rx_ring->rx_buffer_info[req_id];
1013
1014                 rc = ena_alloc_rx_mbuf(adapter, rx_ring, rx_info);
1015                 if (unlikely(rc != 0)) {
1016                         ena_trace(ENA_WARNING,
1017                             "failed to alloc buffer for rx queue %d\n",
1018                             rx_ring->qid);
1019                         break;
1020                 }
1021                 rc = ena_com_add_single_rx_desc(rx_ring->ena_com_io_sq,
1022                     &rx_info->ena_buf, req_id);
1023                 if (unlikely(rc != 0)) {
1024                         ena_trace(ENA_WARNING,
1025                             "failed to add buffer for rx queue %d\n",
1026                             rx_ring->qid);
1027                         break;
1028                 }
1029                 next_to_use = ENA_RX_RING_IDX_NEXT(next_to_use,
1030                     rx_ring->ring_size);
1031         }
1032
1033         if (unlikely(i < num)) {
1034                 counter_u64_add(rx_ring->rx_stats.refil_partial, 1);
1035                 ena_trace(ENA_WARNING,
1036                      "refilled rx qid %d with only %d mbufs (from %d)\n",
1037                      rx_ring->qid, i, num);
1038         }
1039
1040         if (likely(i != 0)) {
1041                 wmb();
1042                 ena_com_write_sq_doorbell(rx_ring->ena_com_io_sq);
1043         }
1044         rx_ring->next_to_use = next_to_use;
1045         return (i);
1046 }
1047
1048 static void
1049 ena_free_rx_bufs(struct ena_adapter *adapter, unsigned int qid)
1050 {
1051         struct ena_ring *rx_ring = &adapter->rx_ring[qid];
1052         unsigned int i;
1053
1054         for (i = 0; i < rx_ring->ring_size; i++) {
1055                 struct ena_rx_buffer *rx_info = &rx_ring->rx_buffer_info[i];
1056
1057                 if (rx_info->mbuf != NULL)
1058                         ena_free_rx_mbuf(adapter, rx_ring, rx_info);
1059         }
1060 }
1061
1062 /**
1063  * ena_refill_all_rx_bufs - allocate all queues Rx buffers
1064  * @adapter: network interface device structure
1065  *
1066  */
1067 static void
1068 ena_refill_all_rx_bufs(struct ena_adapter *adapter)
1069 {
1070         struct ena_ring *rx_ring;
1071         int i, rc, bufs_num;
1072
1073         for (i = 0; i < adapter->num_queues; i++) {
1074                 rx_ring = &adapter->rx_ring[i];
1075                 bufs_num = rx_ring->ring_size - 1;
1076                 rc = ena_refill_rx_bufs(rx_ring, bufs_num);
1077
1078                 if (unlikely(rc != bufs_num))
1079                         ena_trace(ENA_WARNING, "refilling Queue %d failed. "
1080                             "Allocated %d buffers from: %d\n", i, rc, bufs_num);
1081         }
1082 }
1083
1084 static void
1085 ena_free_all_rx_bufs(struct ena_adapter *adapter)
1086 {
1087         int i;
1088
1089         for (i = 0; i < adapter->num_queues; i++)
1090                 ena_free_rx_bufs(adapter, i);
1091 }
1092
1093 /**
1094  * ena_free_tx_bufs - Free Tx Buffers per Queue
1095  * @adapter: network interface device structure
1096  * @qid: queue index
1097  **/
1098 static void
1099 ena_free_tx_bufs(struct ena_adapter *adapter, unsigned int qid)
1100 {
1101         bool print_once = true;
1102         struct ena_ring *tx_ring = &adapter->tx_ring[qid];
1103
1104         ENA_RING_MTX_LOCK(tx_ring);
1105         for (int i = 0; i < tx_ring->ring_size; i++) {
1106                 struct ena_tx_buffer *tx_info = &tx_ring->tx_buffer_info[i];
1107
1108                 if (tx_info->mbuf == NULL)
1109                         continue;
1110
1111                 if (print_once) {
1112                         device_printf(adapter->pdev,
1113                             "free uncompleted tx mbuf qid %d idx 0x%x",
1114                             qid, i);
1115                         print_once = false;
1116                 } else {
1117                         ena_trace(ENA_DBG,
1118                             "free uncompleted tx mbuf qid %d idx 0x%x",
1119                              qid, i);
1120                 }
1121
1122                 bus_dmamap_sync(adapter->tx_buf_tag, tx_info->map,
1123                     BUS_DMASYNC_POSTWRITE);
1124                 bus_dmamap_unload(adapter->tx_buf_tag, tx_info->map);
1125                 m_free(tx_info->mbuf);
1126                 tx_info->mbuf = NULL;
1127         }
1128         ENA_RING_MTX_UNLOCK(tx_ring);
1129 }
1130
1131 static void
1132 ena_free_all_tx_bufs(struct ena_adapter *adapter)
1133 {
1134
1135         for (int i = 0; i < adapter->num_queues; i++)
1136                 ena_free_tx_bufs(adapter, i);
1137 }
1138
1139 static void
1140 ena_destroy_all_tx_queues(struct ena_adapter *adapter)
1141 {
1142         uint16_t ena_qid;
1143         int i;
1144
1145         for (i = 0; i < adapter->num_queues; i++) {
1146                 ena_qid = ENA_IO_TXQ_IDX(i);
1147                 ena_com_destroy_io_queue(adapter->ena_dev, ena_qid);
1148         }
1149 }
1150
1151 static void
1152 ena_destroy_all_rx_queues(struct ena_adapter *adapter)
1153 {
1154         uint16_t ena_qid;
1155         int i;
1156
1157         for (i = 0; i < adapter->num_queues; i++) {
1158                 ena_qid = ENA_IO_RXQ_IDX(i);
1159                 ena_com_destroy_io_queue(adapter->ena_dev, ena_qid);
1160         }
1161 }
1162
1163 static void
1164 ena_destroy_all_io_queues(struct ena_adapter *adapter)
1165 {
1166         struct ena_que *queue;
1167         int i;
1168
1169         for (i = 0; i < adapter->num_queues; i++) {
1170                 queue = &adapter->que[i];
1171                 while (taskqueue_cancel(queue->cleanup_tq,
1172                     &queue->cleanup_task, NULL))
1173                         taskqueue_drain(queue->cleanup_tq,
1174                             &queue->cleanup_task);
1175                 taskqueue_free(queue->cleanup_tq);
1176         }
1177
1178         ena_destroy_all_tx_queues(adapter);
1179         ena_destroy_all_rx_queues(adapter);
1180 }
1181
1182 static inline int
1183 validate_tx_req_id(struct ena_ring *tx_ring, uint16_t req_id)
1184 {
1185         struct ena_adapter *adapter = tx_ring->adapter;
1186         struct ena_tx_buffer *tx_info = NULL;
1187
1188         if (likely(req_id < tx_ring->ring_size)) {
1189                 tx_info = &tx_ring->tx_buffer_info[req_id];
1190                 if (tx_info->mbuf != NULL)
1191                         return (0);
1192                 device_printf(adapter->pdev,
1193                     "tx_info doesn't have valid mbuf\n");
1194         }
1195
1196         device_printf(adapter->pdev, "Invalid req_id: %hu\n", req_id);
1197         counter_u64_add(tx_ring->tx_stats.bad_req_id, 1);
1198
1199         return (EFAULT);
1200 }
1201
1202 static int
1203 ena_create_io_queues(struct ena_adapter *adapter)
1204 {
1205         struct ena_com_dev *ena_dev = adapter->ena_dev;
1206         struct ena_com_create_io_ctx ctx;
1207         struct ena_ring *ring;
1208         struct ena_que *queue;
1209         uint16_t ena_qid;
1210         uint32_t msix_vector;
1211         int rc, i;
1212
1213         /* Create TX queues */
1214         for (i = 0; i < adapter->num_queues; i++) {
1215                 msix_vector = ENA_IO_IRQ_IDX(i);
1216                 ena_qid = ENA_IO_TXQ_IDX(i);
1217                 ctx.mem_queue_type = ena_dev->tx_mem_queue_type;
1218                 ctx.direction = ENA_COM_IO_QUEUE_DIRECTION_TX;
1219                 ctx.queue_size = adapter->tx_ring_size;
1220                 ctx.msix_vector = msix_vector;
1221                 ctx.qid = ena_qid;
1222                 rc = ena_com_create_io_queue(ena_dev, &ctx);
1223                 if (rc != 0) {
1224                         device_printf(adapter->pdev,
1225                             "Failed to create io TX queue #%d rc: %d\n", i, rc);
1226                         goto err_tx;
1227                 }
1228                 ring = &adapter->tx_ring[i];
1229                 rc = ena_com_get_io_handlers(ena_dev, ena_qid,
1230                     &ring->ena_com_io_sq,
1231                     &ring->ena_com_io_cq);
1232                 if (rc != 0) {
1233                         device_printf(adapter->pdev,
1234                             "Failed to get TX queue handlers. TX queue num"
1235                             " %d rc: %d\n", i, rc);
1236                         ena_com_destroy_io_queue(ena_dev, ena_qid);
1237                         goto err_tx;
1238                 }
1239         }
1240
1241         /* Create RX queues */
1242         for (i = 0; i < adapter->num_queues; i++) {
1243                 msix_vector = ENA_IO_IRQ_IDX(i);
1244                 ena_qid = ENA_IO_RXQ_IDX(i);
1245                 ctx.mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST;
1246                 ctx.direction = ENA_COM_IO_QUEUE_DIRECTION_RX;
1247                 ctx.queue_size = adapter->rx_ring_size;
1248                 ctx.msix_vector = msix_vector;
1249                 ctx.qid = ena_qid;
1250                 rc = ena_com_create_io_queue(ena_dev, &ctx);
1251                 if (unlikely(rc != 0)) {
1252                         device_printf(adapter->pdev,
1253                             "Failed to create io RX queue[%d] rc: %d\n", i, rc);
1254                         goto err_rx;
1255                 }
1256
1257                 ring = &adapter->rx_ring[i];
1258                 rc = ena_com_get_io_handlers(ena_dev, ena_qid,
1259                     &ring->ena_com_io_sq,
1260                     &ring->ena_com_io_cq);
1261                 if (unlikely(rc != 0)) {
1262                         device_printf(adapter->pdev,
1263                             "Failed to get RX queue handlers. RX queue num"
1264                             " %d rc: %d\n", i, rc);
1265                         ena_com_destroy_io_queue(ena_dev, ena_qid);
1266                         goto err_rx;
1267                 }
1268         }
1269
1270         for (i = 0; i < adapter->num_queues; i++) {
1271                 queue = &adapter->que[i];
1272
1273                 TASK_INIT(&queue->cleanup_task, 0, ena_cleanup, queue);
1274                 queue->cleanup_tq = taskqueue_create_fast("ena cleanup",
1275                     M_WAITOK, taskqueue_thread_enqueue, &queue->cleanup_tq);
1276
1277                 taskqueue_start_threads(&queue->cleanup_tq, 1, PI_NET,
1278                     "%s queue %d cleanup",
1279                     device_get_nameunit(adapter->pdev), i);
1280         }
1281
1282         return (0);
1283
1284 err_rx:
1285         while (i--)
1286                 ena_com_destroy_io_queue(ena_dev, ENA_IO_RXQ_IDX(i));
1287         i = adapter->num_queues;
1288 err_tx:
1289         while (i--)
1290                 ena_com_destroy_io_queue(ena_dev, ENA_IO_TXQ_IDX(i));
1291
1292         return (ENXIO);
1293 }
1294
1295 /**
1296  * ena_tx_cleanup - clear sent packets and corresponding descriptors
1297  * @tx_ring: ring for which we want to clean packets
1298  *
1299  * Once packets are sent, we ask the device in a loop for no longer used
1300  * descriptors. We find the related mbuf chain in a map (index in an array)
1301  * and free it, then update ring state.
1302  * This is performed in "endless" loop, updating ring pointers every
1303  * TX_COMMIT. The first check of free descriptor is performed before the actual
1304  * loop, then repeated at the loop end.
1305  **/
1306 static int
1307 ena_tx_cleanup(struct ena_ring *tx_ring)
1308 {
1309         struct ena_adapter *adapter;
1310         struct ena_com_io_cq* io_cq;
1311         uint16_t next_to_clean;
1312         uint16_t req_id;
1313         uint16_t ena_qid;
1314         unsigned int total_done = 0;
1315         int rc;
1316         int commit = TX_COMMIT;
1317         int budget = TX_BUDGET;
1318         int work_done;
1319         bool above_thresh;
1320
1321         adapter = tx_ring->que->adapter;
1322         ena_qid = ENA_IO_TXQ_IDX(tx_ring->que->id);
1323         io_cq = &adapter->ena_dev->io_cq_queues[ena_qid];
1324         next_to_clean = tx_ring->next_to_clean;
1325
1326         do {
1327                 struct ena_tx_buffer *tx_info;
1328                 struct mbuf *mbuf;
1329
1330                 rc = ena_com_tx_comp_req_id_get(io_cq, &req_id);
1331                 if (unlikely(rc != 0))
1332                         break;
1333
1334                 rc = validate_tx_req_id(tx_ring, req_id);
1335                 if (unlikely(rc != 0))
1336                         break;
1337
1338                 tx_info = &tx_ring->tx_buffer_info[req_id];
1339
1340                 mbuf = tx_info->mbuf;
1341
1342                 tx_info->mbuf = NULL;
1343                 bintime_clear(&tx_info->timestamp);
1344
1345                 if (likely(tx_info->num_of_bufs != 0)) {
1346                         /* Map is no longer required */
1347                         bus_dmamap_sync(adapter->tx_buf_tag, tx_info->map,
1348                             BUS_DMASYNC_POSTWRITE);
1349                         bus_dmamap_unload(adapter->tx_buf_tag, tx_info->map);
1350                 }
1351
1352                 ena_trace(ENA_DBG | ENA_TXPTH, "tx: q %d mbuf %p completed",
1353                     tx_ring->qid, mbuf);
1354
1355                 m_freem(mbuf);
1356
1357                 total_done += tx_info->tx_descs;
1358
1359                 tx_ring->free_tx_ids[next_to_clean] = req_id;
1360                 next_to_clean = ENA_TX_RING_IDX_NEXT(next_to_clean,
1361                     tx_ring->ring_size);
1362
1363                 if (unlikely(--commit == 0)) {
1364                         commit = TX_COMMIT;
1365                         /* update ring state every TX_COMMIT descriptor */
1366                         tx_ring->next_to_clean = next_to_clean;
1367                         ena_com_comp_ack(
1368                             &adapter->ena_dev->io_sq_queues[ena_qid],
1369                             total_done);
1370                         ena_com_update_dev_comp_head(io_cq);
1371                         total_done = 0;
1372                 }
1373         } while (likely(--budget));
1374
1375         work_done = TX_BUDGET - budget;
1376
1377         ena_trace(ENA_DBG | ENA_TXPTH, "tx: q %d done. total pkts: %d",
1378         tx_ring->qid, work_done);
1379
1380         /* If there is still something to commit update ring state */
1381         if (likely(commit != TX_COMMIT)) {
1382                 tx_ring->next_to_clean = next_to_clean;
1383                 ena_com_comp_ack(&adapter->ena_dev->io_sq_queues[ena_qid],
1384                     total_done);
1385                 ena_com_update_dev_comp_head(io_cq);
1386         }
1387
1388         /*
1389          * Need to make the rings circular update visible to
1390          * ena_xmit_mbuf() before checking for tx_ring->running.
1391          */
1392         mb();
1393
1394         above_thresh = ena_com_sq_have_enough_space(tx_ring->ena_com_io_sq,
1395             ENA_TX_RESUME_THRESH);
1396         if (unlikely(!tx_ring->running && above_thresh)) {
1397                 ENA_RING_MTX_LOCK(tx_ring);
1398                 above_thresh =
1399                     ena_com_sq_have_enough_space(tx_ring->ena_com_io_sq,
1400                     ENA_TX_RESUME_THRESH);
1401                 if (!tx_ring->running && above_thresh) {
1402                         tx_ring->running = true;
1403                         counter_u64_add(tx_ring->tx_stats.queue_wakeup, 1);
1404                         taskqueue_enqueue(tx_ring->enqueue_tq,
1405                             &tx_ring->enqueue_task);
1406                 }
1407                 ENA_RING_MTX_UNLOCK(tx_ring);
1408         }
1409
1410         return (work_done);
1411 }
1412
1413 static void
1414 ena_rx_hash_mbuf(struct ena_ring *rx_ring, struct ena_com_rx_ctx *ena_rx_ctx,
1415     struct mbuf *mbuf)
1416 {
1417         struct ena_adapter *adapter = rx_ring->adapter;
1418
1419         if (likely(adapter->rss_support)) {
1420                 mbuf->m_pkthdr.flowid = ena_rx_ctx->hash;
1421
1422                 if (ena_rx_ctx->frag &&
1423                     (ena_rx_ctx->l3_proto != ENA_ETH_IO_L3_PROTO_UNKNOWN)) {
1424                         M_HASHTYPE_SET(mbuf, M_HASHTYPE_OPAQUE_HASH);
1425                         return;
1426                 }
1427
1428                 switch (ena_rx_ctx->l3_proto) {
1429                 case ENA_ETH_IO_L3_PROTO_IPV4:
1430                         switch (ena_rx_ctx->l4_proto) {
1431                         case ENA_ETH_IO_L4_PROTO_TCP:
1432                                 M_HASHTYPE_SET(mbuf, M_HASHTYPE_RSS_TCP_IPV4);
1433                                 break;
1434                         case ENA_ETH_IO_L4_PROTO_UDP:
1435                                 M_HASHTYPE_SET(mbuf, M_HASHTYPE_RSS_UDP_IPV4);
1436                                 break;
1437                         default:
1438                                 M_HASHTYPE_SET(mbuf, M_HASHTYPE_RSS_IPV4);
1439                         }
1440                         break;
1441                 case ENA_ETH_IO_L3_PROTO_IPV6:
1442                         switch (ena_rx_ctx->l4_proto) {
1443                         case ENA_ETH_IO_L4_PROTO_TCP:
1444                                 M_HASHTYPE_SET(mbuf, M_HASHTYPE_RSS_TCP_IPV6);
1445                                 break;
1446                         case ENA_ETH_IO_L4_PROTO_UDP:
1447                                 M_HASHTYPE_SET(mbuf, M_HASHTYPE_RSS_UDP_IPV6);
1448                                 break;
1449                         default:
1450                                 M_HASHTYPE_SET(mbuf, M_HASHTYPE_RSS_IPV6);
1451                         }
1452                         break;
1453                 case ENA_ETH_IO_L3_PROTO_UNKNOWN:
1454                         M_HASHTYPE_SET(mbuf, M_HASHTYPE_NONE);
1455                         break;
1456                 default:
1457                         M_HASHTYPE_SET(mbuf, M_HASHTYPE_OPAQUE_HASH);
1458                 }
1459         } else {
1460                 mbuf->m_pkthdr.flowid = rx_ring->qid;
1461                 M_HASHTYPE_SET(mbuf, M_HASHTYPE_NONE);
1462         }
1463 }
1464
1465 /**
1466  * ena_rx_mbuf - assemble mbuf from descriptors
1467  * @rx_ring: ring for which we want to clean packets
1468  * @ena_bufs: buffer info
1469  * @ena_rx_ctx: metadata for this packet(s)
1470  * @next_to_clean: ring pointer, will be updated only upon success
1471  *
1472  **/
1473 static struct mbuf*
1474 ena_rx_mbuf(struct ena_ring *rx_ring, struct ena_com_rx_buf_info *ena_bufs,
1475     struct ena_com_rx_ctx *ena_rx_ctx, uint16_t *next_to_clean)
1476 {
1477         struct mbuf *mbuf;
1478         struct ena_rx_buffer *rx_info;
1479         struct ena_adapter *adapter;
1480         unsigned int descs = ena_rx_ctx->descs;
1481         int rc;
1482         uint16_t ntc, len, req_id, buf = 0;
1483
1484         ntc = *next_to_clean;
1485         adapter = rx_ring->adapter;
1486
1487         len = ena_bufs[buf].len;
1488         req_id = ena_bufs[buf].req_id;
1489         rc = validate_rx_req_id(rx_ring, req_id);
1490         if (unlikely(rc != 0))
1491                 return (NULL);
1492
1493         rx_info = &rx_ring->rx_buffer_info[req_id];
1494         if (unlikely(rx_info->mbuf == NULL)) {
1495                 device_printf(adapter->pdev, "NULL mbuf in rx_info");
1496                 return (NULL);
1497         }
1498
1499         ena_trace(ENA_DBG | ENA_RXPTH, "rx_info %p, mbuf %p, paddr %jx",
1500             rx_info, rx_info->mbuf, (uintmax_t)rx_info->ena_buf.paddr);
1501
1502         bus_dmamap_sync(adapter->rx_buf_tag, rx_info->map,
1503             BUS_DMASYNC_POSTREAD);
1504         mbuf = rx_info->mbuf;
1505         mbuf->m_flags |= M_PKTHDR;
1506         mbuf->m_pkthdr.len = len;
1507         mbuf->m_len = len;
1508         mbuf->m_pkthdr.rcvif = rx_ring->que->adapter->ifp;
1509
1510         /* Fill mbuf with hash key and it's interpretation for optimization */
1511         ena_rx_hash_mbuf(rx_ring, ena_rx_ctx, mbuf);
1512
1513         ena_trace(ENA_DBG | ENA_RXPTH, "rx mbuf 0x%p, flags=0x%x, len: %d",
1514             mbuf, mbuf->m_flags, mbuf->m_pkthdr.len);
1515
1516         /* DMA address is not needed anymore, unmap it */
1517         bus_dmamap_unload(rx_ring->adapter->rx_buf_tag, rx_info->map);
1518
1519         rx_info->mbuf = NULL;
1520         rx_ring->free_rx_ids[ntc] = req_id;
1521         ntc = ENA_RX_RING_IDX_NEXT(ntc, rx_ring->ring_size);
1522
1523         /*
1524          * While we have more than 1 descriptors for one rcvd packet, append
1525          * other mbufs to the main one
1526          */
1527         while (--descs) {
1528                 ++buf;
1529                 len = ena_bufs[buf].len;
1530                 req_id = ena_bufs[buf].req_id;
1531                 rc = validate_rx_req_id(rx_ring, req_id);
1532                 if (unlikely(rc != 0)) {
1533                         /*
1534                          * If the req_id is invalid, then the device will be
1535                          * reset. In that case we must free all mbufs that
1536                          * were already gathered.
1537                          */
1538                         m_freem(mbuf);
1539                         return (NULL);
1540                 }
1541                 rx_info = &rx_ring->rx_buffer_info[req_id];
1542
1543                 if (unlikely(rx_info->mbuf == NULL)) {
1544                         device_printf(adapter->pdev, "NULL mbuf in rx_info");
1545                         /*
1546                          * If one of the required mbufs was not allocated yet,
1547                          * we can break there.
1548                          * All earlier used descriptors will be reallocated
1549                          * later and not used mbufs can be reused.
1550                          * The next_to_clean pointer will not be updated in case
1551                          * of an error, so caller should advance it manually
1552                          * in error handling routine to keep it up to date
1553                          * with hw ring.
1554                          */
1555                         m_freem(mbuf);
1556                         return (NULL);
1557                 }
1558
1559                 bus_dmamap_sync(adapter->rx_buf_tag, rx_info->map,
1560                     BUS_DMASYNC_POSTREAD);
1561                 if (unlikely(m_append(mbuf, len, rx_info->mbuf->m_data) == 0)) {
1562                         counter_u64_add(rx_ring->rx_stats.mbuf_alloc_fail, 1);
1563                         ena_trace(ENA_WARNING, "Failed to append Rx mbuf %p",
1564                             mbuf);
1565                 }
1566
1567                 ena_trace(ENA_DBG | ENA_RXPTH,
1568                     "rx mbuf updated. len %d", mbuf->m_pkthdr.len);
1569
1570                 /* Free already appended mbuf, it won't be useful anymore */
1571                 bus_dmamap_unload(rx_ring->adapter->rx_buf_tag, rx_info->map);
1572                 m_freem(rx_info->mbuf);
1573                 rx_info->mbuf = NULL;
1574
1575                 rx_ring->free_rx_ids[ntc] = req_id;
1576                 ntc = ENA_RX_RING_IDX_NEXT(ntc, rx_ring->ring_size);
1577         }
1578
1579         *next_to_clean = ntc;
1580
1581         return (mbuf);
1582 }
1583
1584 /**
1585  * ena_rx_checksum - indicate in mbuf if hw indicated a good cksum
1586  **/
1587 static inline void
1588 ena_rx_checksum(struct ena_ring *rx_ring, struct ena_com_rx_ctx *ena_rx_ctx,
1589     struct mbuf *mbuf)
1590 {
1591
1592         /* if IP and error */
1593         if (unlikely((ena_rx_ctx->l3_proto == ENA_ETH_IO_L3_PROTO_IPV4) &&
1594             ena_rx_ctx->l3_csum_err)) {
1595                 /* ipv4 checksum error */
1596                 mbuf->m_pkthdr.csum_flags = 0;
1597                 counter_u64_add(rx_ring->rx_stats.bad_csum, 1);
1598                 ena_trace(ENA_DBG, "RX IPv4 header checksum error");
1599                 return;
1600         }
1601
1602         /* if TCP/UDP */
1603         if ((ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_TCP) ||
1604             (ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_UDP)) {
1605                 if (ena_rx_ctx->l4_csum_err) {
1606                         /* TCP/UDP checksum error */
1607                         mbuf->m_pkthdr.csum_flags = 0;
1608                         counter_u64_add(rx_ring->rx_stats.bad_csum, 1);
1609                         ena_trace(ENA_DBG, "RX L4 checksum error");
1610                 } else {
1611                         mbuf->m_pkthdr.csum_flags = CSUM_IP_CHECKED;
1612                         mbuf->m_pkthdr.csum_flags |= CSUM_IP_VALID;
1613                 }
1614         }
1615 }
1616
1617 /**
1618  * ena_rx_cleanup - handle rx irq
1619  * @arg: ring for which irq is being handled
1620  **/
1621 static int
1622 ena_rx_cleanup(struct ena_ring *rx_ring)
1623 {
1624         struct ena_adapter *adapter;
1625         struct mbuf *mbuf;
1626         struct ena_com_rx_ctx ena_rx_ctx;
1627         struct ena_com_io_cq* io_cq;
1628         struct ena_com_io_sq* io_sq;
1629         if_t ifp;
1630         uint16_t ena_qid;
1631         uint16_t next_to_clean;
1632         uint32_t refill_required;
1633         uint32_t refill_threshold;
1634         uint32_t do_if_input = 0;
1635         unsigned int qid;
1636         int rc, i;
1637         int budget = RX_BUDGET;
1638
1639         adapter = rx_ring->que->adapter;
1640         ifp = adapter->ifp;
1641         qid = rx_ring->que->id;
1642         ena_qid = ENA_IO_RXQ_IDX(qid);
1643         io_cq = &adapter->ena_dev->io_cq_queues[ena_qid];
1644         io_sq = &adapter->ena_dev->io_sq_queues[ena_qid];
1645         next_to_clean = rx_ring->next_to_clean;
1646
1647         ena_trace(ENA_DBG, "rx: qid %d", qid);
1648
1649         do {
1650                 ena_rx_ctx.ena_bufs = rx_ring->ena_bufs;
1651                 ena_rx_ctx.max_bufs = adapter->max_rx_sgl_size;
1652                 ena_rx_ctx.descs = 0;
1653                 bus_dmamap_sync(io_cq->cdesc_addr.mem_handle.tag,
1654                     io_cq->cdesc_addr.mem_handle.map, BUS_DMASYNC_POSTREAD);
1655                 rc = ena_com_rx_pkt(io_cq, io_sq, &ena_rx_ctx);
1656
1657                 if (unlikely(rc != 0))
1658                         goto error;
1659
1660                 if (unlikely(ena_rx_ctx.descs == 0))
1661                         break;
1662
1663                 ena_trace(ENA_DBG | ENA_RXPTH, "rx: q %d got packet from ena. "
1664                     "descs #: %d l3 proto %d l4 proto %d hash: %x",
1665                     rx_ring->qid, ena_rx_ctx.descs, ena_rx_ctx.l3_proto,
1666                     ena_rx_ctx.l4_proto, ena_rx_ctx.hash);
1667
1668                 /* Receive mbuf from the ring */
1669                 mbuf = ena_rx_mbuf(rx_ring, rx_ring->ena_bufs,
1670                     &ena_rx_ctx, &next_to_clean);
1671                 bus_dmamap_sync(io_cq->cdesc_addr.mem_handle.tag,
1672                     io_cq->cdesc_addr.mem_handle.map, BUS_DMASYNC_PREREAD);
1673                 /* Exit if we failed to retrieve a buffer */
1674                 if (unlikely(mbuf == NULL)) {
1675                         for (i = 0; i < ena_rx_ctx.descs; ++i) {
1676                                 rx_ring->free_rx_ids[next_to_clean] =
1677                                     rx_ring->ena_bufs[i].req_id;
1678                                 next_to_clean =
1679                                     ENA_RX_RING_IDX_NEXT(next_to_clean,
1680                                     rx_ring->ring_size);
1681
1682                         }
1683                         break;
1684                 }
1685
1686                 if (((ifp->if_capenable & IFCAP_RXCSUM) != 0) ||
1687                     ((ifp->if_capenable & IFCAP_RXCSUM_IPV6) != 0)) {
1688                         ena_rx_checksum(rx_ring, &ena_rx_ctx, mbuf);
1689                 }
1690
1691                 counter_enter();
1692                 counter_u64_add_protected(rx_ring->rx_stats.bytes,
1693                     mbuf->m_pkthdr.len);
1694                 counter_u64_add_protected(adapter->hw_stats.rx_bytes,
1695                     mbuf->m_pkthdr.len);
1696                 counter_exit();
1697                 /*
1698                  * LRO is only for IP/TCP packets and TCP checksum of the packet
1699                  * should be computed by hardware.
1700                  */
1701                 do_if_input = 1;
1702                 if (((ifp->if_capenable & IFCAP_LRO) != 0)  &&
1703                     ((mbuf->m_pkthdr.csum_flags & CSUM_IP_VALID) != 0) &&
1704                     (ena_rx_ctx.l4_proto == ENA_ETH_IO_L4_PROTO_TCP)) {
1705                         /*
1706                          * Send to the stack if:
1707                          *  - LRO not enabled, or
1708                          *  - no LRO resources, or
1709                          *  - lro enqueue fails
1710                          */
1711                         if ((rx_ring->lro.lro_cnt != 0) &&
1712                             (tcp_lro_rx(&rx_ring->lro, mbuf, 0) == 0))
1713                                         do_if_input = 0;
1714                 }
1715                 if (do_if_input != 0) {
1716                         ena_trace(ENA_DBG | ENA_RXPTH,
1717                             "calling if_input() with mbuf %p", mbuf);
1718                         (*ifp->if_input)(ifp, mbuf);
1719                 }
1720
1721                 counter_enter();
1722                 counter_u64_add_protected(rx_ring->rx_stats.cnt, 1);
1723                 counter_u64_add_protected(adapter->hw_stats.rx_packets, 1);
1724                 counter_exit();
1725         } while (--budget);
1726
1727         rx_ring->next_to_clean = next_to_clean;
1728
1729         refill_required = ena_com_free_desc(io_sq);
1730         refill_threshold = rx_ring->ring_size / ENA_RX_REFILL_THRESH_DIVIDER;
1731
1732         if (refill_required > refill_threshold) {
1733                 ena_com_update_dev_comp_head(rx_ring->ena_com_io_cq);
1734                 ena_refill_rx_bufs(rx_ring, refill_required);
1735         }
1736
1737         tcp_lro_flush_all(&rx_ring->lro);
1738
1739         return (RX_BUDGET - budget);
1740
1741 error:
1742         counter_u64_add(rx_ring->rx_stats.bad_desc_num, 1);
1743
1744         /* Too many desc from the device. Trigger reset */
1745         adapter->reset_reason = ENA_REGS_RESET_TOO_MANY_RX_DESCS;
1746         adapter->trigger_reset = true;
1747
1748         return (0);
1749 }
1750
1751 /*********************************************************************
1752  *
1753  *  MSIX & Interrupt Service routine
1754  *
1755  **********************************************************************/
1756
1757 /**
1758  * ena_handle_msix - MSIX Interrupt Handler for admin/async queue
1759  * @arg: interrupt number
1760  **/
1761 static void
1762 ena_intr_msix_mgmnt(void *arg)
1763 {
1764         struct ena_adapter *adapter = (struct ena_adapter *)arg;
1765
1766         ena_com_admin_q_comp_intr_handler(adapter->ena_dev);
1767         if (likely(adapter->running))
1768                 ena_com_aenq_intr_handler(adapter->ena_dev, arg);
1769 }
1770
1771 static void
1772 ena_cleanup(void *arg, int pending)
1773 {
1774         struct ena_que  *que = arg;
1775         struct ena_adapter *adapter = que->adapter;
1776         if_t ifp = adapter->ifp;
1777         struct ena_ring *tx_ring;
1778         struct ena_ring *rx_ring;
1779         struct ena_com_io_cq* io_cq;
1780         struct ena_eth_io_intr_reg intr_reg;
1781         int qid, ena_qid;
1782         int txc, rxc, i;
1783
1784         if (unlikely((if_getdrvflags(ifp) & IFF_DRV_RUNNING) == 0))
1785                 return;
1786
1787         ena_trace(ENA_DBG, "MSI-X TX/RX routine");
1788
1789         tx_ring = que->tx_ring;
1790         rx_ring = que->rx_ring;
1791         qid = que->id;
1792         ena_qid = ENA_IO_TXQ_IDX(qid);
1793         io_cq = &adapter->ena_dev->io_cq_queues[ena_qid];
1794
1795         tx_ring->first_interrupt = true;
1796         rx_ring->first_interrupt = true;
1797
1798         for (i = 0; i < CLEAN_BUDGET; ++i) {
1799                 rxc = ena_rx_cleanup(rx_ring);
1800                 txc = ena_tx_cleanup(tx_ring);
1801
1802                 if (unlikely((if_getdrvflags(ifp) & IFF_DRV_RUNNING) == 0))
1803                         return;
1804
1805                 if ((txc != TX_BUDGET) && (rxc != RX_BUDGET))
1806                        break;
1807         }
1808
1809         /* Signal that work is done and unmask interrupt */
1810         ena_com_update_intr_reg(&intr_reg,
1811             RX_IRQ_INTERVAL,
1812             TX_IRQ_INTERVAL,
1813             true);
1814         ena_com_unmask_intr(io_cq, &intr_reg);
1815 }
1816
1817 /**
1818  * ena_handle_msix - MSIX Interrupt Handler for Tx/Rx
1819  * @arg: queue
1820  **/
1821 static int
1822 ena_handle_msix(void *arg)
1823 {
1824         struct ena_que *queue = arg;
1825         struct ena_adapter *adapter = queue->adapter;
1826         if_t ifp = adapter->ifp;
1827
1828         if (unlikely((if_getdrvflags(ifp) & IFF_DRV_RUNNING) == 0))
1829                 return (FILTER_STRAY);
1830
1831         taskqueue_enqueue(queue->cleanup_tq, &queue->cleanup_task);
1832
1833         return (FILTER_HANDLED);
1834 }
1835
1836 static int
1837 ena_enable_msix(struct ena_adapter *adapter)
1838 {
1839         device_t dev = adapter->pdev;
1840         int msix_vecs, msix_req;
1841         int i, rc = 0;
1842
1843         /* Reserved the max msix vectors we might need */
1844         msix_vecs = ENA_MAX_MSIX_VEC(adapter->num_queues);
1845
1846         adapter->msix_entries = malloc(msix_vecs * sizeof(struct msix_entry),
1847             M_DEVBUF, M_WAITOK | M_ZERO);
1848
1849         ena_trace(ENA_DBG, "trying to enable MSI-X, vectors: %d", msix_vecs);
1850
1851         for (i = 0; i < msix_vecs; i++) {
1852                 adapter->msix_entries[i].entry = i;
1853                 /* Vectors must start from 1 */
1854                 adapter->msix_entries[i].vector = i + 1;
1855         }
1856
1857         msix_req = msix_vecs;
1858         rc = pci_alloc_msix(dev, &msix_vecs);
1859         if (unlikely(rc != 0)) {
1860                 device_printf(dev,
1861                     "Failed to enable MSIX, vectors %d rc %d\n", msix_vecs, rc);
1862
1863                 rc = ENOSPC;
1864                 goto err_msix_free;
1865         }
1866
1867         if (msix_vecs != msix_req) {
1868                 if (msix_vecs == ENA_ADMIN_MSIX_VEC) {
1869                         device_printf(dev,
1870                             "Not enough number of MSI-x allocated: %d\n",
1871                             msix_vecs);
1872                         pci_release_msi(dev);
1873                         rc = ENOSPC;
1874                         goto err_msix_free;
1875                 }
1876                 device_printf(dev, "Enable only %d MSI-x (out of %d), reduce "
1877                     "the number of queues\n", msix_vecs, msix_req);
1878                 adapter->num_queues = msix_vecs - ENA_ADMIN_MSIX_VEC;
1879         }
1880
1881         adapter->msix_vecs = msix_vecs;
1882         adapter->msix_enabled = true;
1883
1884         return (0);
1885
1886 err_msix_free:
1887         free(adapter->msix_entries, M_DEVBUF);
1888         adapter->msix_entries = NULL;
1889
1890         return (rc);
1891 }
1892
1893 static void
1894 ena_setup_mgmnt_intr(struct ena_adapter *adapter)
1895 {
1896
1897         snprintf(adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].name,
1898             ENA_IRQNAME_SIZE, "ena-mgmnt@pci:%s",
1899             device_get_nameunit(adapter->pdev));
1900         /*
1901          * Handler is NULL on purpose, it will be set
1902          * when mgmnt interrupt is acquired
1903          */
1904         adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].handler = NULL;
1905         adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].data = adapter;
1906         adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].vector =
1907             adapter->msix_entries[ENA_MGMNT_IRQ_IDX].vector;
1908 }
1909
1910 static void
1911 ena_setup_io_intr(struct ena_adapter *adapter)
1912 {
1913         static int last_bind_cpu = -1;
1914         int irq_idx;
1915
1916         for (int i = 0; i < adapter->num_queues; i++) {
1917                 irq_idx = ENA_IO_IRQ_IDX(i);
1918
1919                 snprintf(adapter->irq_tbl[irq_idx].name, ENA_IRQNAME_SIZE,
1920                     "%s-TxRx-%d", device_get_nameunit(adapter->pdev), i);
1921                 adapter->irq_tbl[irq_idx].handler = ena_handle_msix;
1922                 adapter->irq_tbl[irq_idx].data = &adapter->que[i];
1923                 adapter->irq_tbl[irq_idx].vector =
1924                     adapter->msix_entries[irq_idx].vector;
1925                 ena_trace(ENA_INFO | ENA_IOQ, "ena_setup_io_intr vector: %d\n",
1926                     adapter->msix_entries[irq_idx].vector);
1927
1928                 /*
1929                  * We want to bind rings to the corresponding cpu
1930                  * using something similar to the RSS round-robin technique.
1931                  */
1932                 if (unlikely(last_bind_cpu < 0))
1933                         last_bind_cpu = CPU_FIRST();
1934                 adapter->que[i].cpu = adapter->irq_tbl[irq_idx].cpu =
1935                     last_bind_cpu;
1936                 last_bind_cpu = CPU_NEXT(last_bind_cpu);
1937         }
1938 }
1939
1940 static int
1941 ena_request_mgmnt_irq(struct ena_adapter *adapter)
1942 {
1943         struct ena_irq *irq;
1944         unsigned long flags;
1945         int rc, rcc;
1946
1947         flags = RF_ACTIVE | RF_SHAREABLE;
1948
1949         irq = &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX];
1950         irq->res = bus_alloc_resource_any(adapter->pdev, SYS_RES_IRQ,
1951             &irq->vector, flags);
1952
1953         if (unlikely(irq->res == NULL)) {
1954                 device_printf(adapter->pdev, "could not allocate "
1955                     "irq vector: %d\n", irq->vector);
1956                 return (ENXIO);
1957         }
1958
1959         rc = bus_setup_intr(adapter->pdev, irq->res,
1960             INTR_TYPE_NET | INTR_MPSAFE, NULL, ena_intr_msix_mgmnt,
1961             irq->data, &irq->cookie);
1962         if (unlikely(rc != 0)) {
1963                 device_printf(adapter->pdev, "failed to register "
1964                     "interrupt handler for irq %ju: %d\n",
1965                     rman_get_start(irq->res), rc);
1966                 goto err_res_free;
1967         }
1968         irq->requested = true;
1969
1970         return (rc);
1971
1972 err_res_free:
1973         ena_trace(ENA_INFO | ENA_ADMQ, "releasing resource for irq %d\n",
1974             irq->vector);
1975         rcc = bus_release_resource(adapter->pdev, SYS_RES_IRQ,
1976             irq->vector, irq->res);
1977         if (unlikely(rcc != 0))
1978                 device_printf(adapter->pdev, "dev has no parent while "
1979                     "releasing res for irq: %d\n", irq->vector);
1980         irq->res = NULL;
1981
1982         return (rc);
1983 }
1984
1985 static int
1986 ena_request_io_irq(struct ena_adapter *adapter)
1987 {
1988         struct ena_irq *irq;
1989         unsigned long flags = 0;
1990         int rc = 0, i, rcc;
1991
1992         if (unlikely(adapter->msix_enabled == 0)) {
1993                 device_printf(adapter->pdev,
1994                     "failed to request I/O IRQ: MSI-X is not enabled\n");
1995                 return (EINVAL);
1996         } else {
1997                 flags = RF_ACTIVE | RF_SHAREABLE;
1998         }
1999
2000         for (i = ENA_IO_IRQ_FIRST_IDX; i < adapter->msix_vecs; i++) {
2001                 irq = &adapter->irq_tbl[i];
2002
2003                 if (unlikely(irq->requested))
2004                         continue;
2005
2006                 irq->res = bus_alloc_resource_any(adapter->pdev, SYS_RES_IRQ,
2007                     &irq->vector, flags);
2008                 if (unlikely(irq->res == NULL)) {
2009                         rc = ENOMEM;
2010                         device_printf(adapter->pdev, "could not allocate "
2011                             "irq vector: %d\n", irq->vector);
2012                         goto err;
2013                 }
2014
2015                 rc = bus_setup_intr(adapter->pdev, irq->res,
2016                     INTR_TYPE_NET | INTR_MPSAFE, irq->handler, NULL,
2017                     irq->data, &irq->cookie);
2018                  if (unlikely(rc != 0)) {
2019                         device_printf(adapter->pdev, "failed to register "
2020                             "interrupt handler for irq %ju: %d\n",
2021                             rman_get_start(irq->res), rc);
2022                         goto err;
2023                 }
2024                 irq->requested = true;
2025
2026                 ena_trace(ENA_INFO, "queue %d - cpu %d\n",
2027                     i - ENA_IO_IRQ_FIRST_IDX, irq->cpu);
2028         }
2029
2030         return (rc);
2031
2032 err:
2033
2034         for (; i >= ENA_IO_IRQ_FIRST_IDX; i--) {
2035                 irq = &adapter->irq_tbl[i];
2036                 rcc = 0;
2037
2038                 /* Once we entered err: section and irq->requested is true we
2039                    free both intr and resources */
2040                 if (irq->requested)
2041                         rcc = bus_teardown_intr(adapter->pdev, irq->res, irq->cookie);
2042                 if (unlikely(rcc != 0))
2043                         device_printf(adapter->pdev, "could not release"
2044                             " irq: %d, error: %d\n", irq->vector, rcc);
2045
2046                 /* If we entred err: section without irq->requested set we know
2047                    it was bus_alloc_resource_any() that needs cleanup, provided
2048                    res is not NULL. In case res is NULL no work in needed in
2049                    this iteration */
2050                 rcc = 0;
2051                 if (irq->res != NULL) {
2052                         rcc = bus_release_resource(adapter->pdev, SYS_RES_IRQ,
2053                             irq->vector, irq->res);
2054                 }
2055                 if (unlikely(rcc != 0))
2056                         device_printf(adapter->pdev, "dev has no parent while "
2057                             "releasing res for irq: %d\n", irq->vector);
2058                 irq->requested = false;
2059                 irq->res = NULL;
2060         }
2061
2062         return (rc);
2063 }
2064
2065 static void
2066 ena_free_mgmnt_irq(struct ena_adapter *adapter)
2067 {
2068         struct ena_irq *irq;
2069         int rc;
2070
2071         irq = &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX];
2072         if (irq->requested) {
2073                 ena_trace(ENA_INFO | ENA_ADMQ, "tear down irq: %d\n",
2074                     irq->vector);
2075                 rc = bus_teardown_intr(adapter->pdev, irq->res, irq->cookie);
2076                 if (unlikely(rc != 0))
2077                         device_printf(adapter->pdev, "failed to tear "
2078                             "down irq: %d\n", irq->vector);
2079                 irq->requested = 0;
2080         }
2081
2082         if (irq->res != NULL) {
2083                 ena_trace(ENA_INFO | ENA_ADMQ, "release resource irq: %d\n",
2084                     irq->vector);
2085                 rc = bus_release_resource(adapter->pdev, SYS_RES_IRQ,
2086                     irq->vector, irq->res);
2087                 irq->res = NULL;
2088                 if (unlikely(rc != 0))
2089                         device_printf(adapter->pdev, "dev has no parent while "
2090                             "releasing res for irq: %d\n", irq->vector);
2091         }
2092 }
2093
2094 static void
2095 ena_free_io_irq(struct ena_adapter *adapter)
2096 {
2097         struct ena_irq *irq;
2098         int rc;
2099
2100         for (int i = ENA_IO_IRQ_FIRST_IDX; i < adapter->msix_vecs; i++) {
2101                 irq = &adapter->irq_tbl[i];
2102                 if (irq->requested) {
2103                         ena_trace(ENA_INFO | ENA_IOQ, "tear down irq: %d\n",
2104                             irq->vector);
2105                         rc = bus_teardown_intr(adapter->pdev, irq->res,
2106                             irq->cookie);
2107                         if (unlikely(rc != 0)) {
2108                                 device_printf(adapter->pdev, "failed to tear "
2109                                     "down irq: %d\n", irq->vector);
2110                         }
2111                         irq->requested = 0;
2112                 }
2113
2114                 if (irq->res != NULL) {
2115                         ena_trace(ENA_INFO | ENA_IOQ, "release resource irq: %d\n",
2116                             irq->vector);
2117                         rc = bus_release_resource(adapter->pdev, SYS_RES_IRQ,
2118                             irq->vector, irq->res);
2119                         irq->res = NULL;
2120                         if (unlikely(rc != 0)) {
2121                                 device_printf(adapter->pdev, "dev has no parent"
2122                                     " while releasing res for irq: %d\n",
2123                                     irq->vector);
2124                         }
2125                 }
2126         }
2127 }
2128
2129 static void
2130 ena_free_irqs(struct ena_adapter* adapter)
2131 {
2132
2133         ena_free_io_irq(adapter);
2134         ena_free_mgmnt_irq(adapter);
2135         ena_disable_msix(adapter);
2136 }
2137
2138 static void
2139 ena_disable_msix(struct ena_adapter *adapter)
2140 {
2141
2142         pci_release_msi(adapter->pdev);
2143
2144         adapter->msix_vecs = 0;
2145         free(adapter->msix_entries, M_DEVBUF);
2146         adapter->msix_entries = NULL;
2147 }
2148
2149 static void
2150 ena_unmask_all_io_irqs(struct ena_adapter *adapter)
2151 {
2152         struct ena_com_io_cq* io_cq;
2153         struct ena_eth_io_intr_reg intr_reg;
2154         uint16_t ena_qid;
2155         int i;
2156
2157         /* Unmask interrupts for all queues */
2158         for (i = 0; i < adapter->num_queues; i++) {
2159                 ena_qid = ENA_IO_TXQ_IDX(i);
2160                 io_cq = &adapter->ena_dev->io_cq_queues[ena_qid];
2161                 ena_com_update_intr_reg(&intr_reg, 0, 0, true);
2162                 ena_com_unmask_intr(io_cq, &intr_reg);
2163         }
2164 }
2165
2166 /* Configure the Rx forwarding */
2167 static int
2168 ena_rss_configure(struct ena_adapter *adapter)
2169 {
2170         struct ena_com_dev *ena_dev = adapter->ena_dev;
2171         int rc;
2172
2173         /* Set indirect table */
2174         rc = ena_com_indirect_table_set(ena_dev);
2175         if (unlikely((rc != 0) && (rc != EOPNOTSUPP)))
2176                 return (rc);
2177
2178         /* Configure hash function (if supported) */
2179         rc = ena_com_set_hash_function(ena_dev);
2180         if (unlikely((rc != 0) && (rc != EOPNOTSUPP)))
2181                 return (rc);
2182
2183         /* Configure hash inputs (if supported) */
2184         rc = ena_com_set_hash_ctrl(ena_dev);
2185         if (unlikely((rc != 0) && (rc != EOPNOTSUPP)))
2186                 return (rc);
2187
2188         return (0);
2189 }
2190
2191 static int
2192 ena_up_complete(struct ena_adapter *adapter)
2193 {
2194         int rc;
2195
2196         if (likely(adapter->rss_support)) {
2197                 rc = ena_rss_configure(adapter);
2198                 if (rc != 0)
2199                         return (rc);
2200         }
2201
2202         rc = ena_change_mtu(adapter->ifp, adapter->ifp->if_mtu);
2203         if (unlikely(rc != 0))
2204                 return (rc);
2205
2206         ena_refill_all_rx_bufs(adapter);
2207         ena_reset_counters((counter_u64_t *)&adapter->hw_stats,
2208             sizeof(adapter->hw_stats));
2209
2210         return (0);
2211 }
2212
2213 static int
2214 ena_up(struct ena_adapter *adapter)
2215 {
2216         int rc = 0;
2217
2218         if (unlikely(device_is_attached(adapter->pdev) == 0)) {
2219                 device_printf(adapter->pdev, "device is not attached!\n");
2220                 return (ENXIO);
2221         }
2222
2223         if (unlikely(!adapter->running)) {
2224                 device_printf(adapter->pdev, "device is not running!\n");
2225                 return (ENXIO);
2226         }
2227
2228         if (!adapter->up) {
2229                 device_printf(adapter->pdev, "device is going UP\n");
2230
2231                 /* setup interrupts for IO queues */
2232                 ena_setup_io_intr(adapter);
2233                 rc = ena_request_io_irq(adapter);
2234                 if (unlikely(rc != 0)) {
2235                         ena_trace(ENA_ALERT, "err_req_irq");
2236                         goto err_req_irq;
2237                 }
2238
2239                 /* allocate transmit descriptors */
2240                 rc = ena_setup_all_tx_resources(adapter);
2241                 if (unlikely(rc != 0)) {
2242                         ena_trace(ENA_ALERT, "err_setup_tx");
2243                         goto err_setup_tx;
2244                 }
2245
2246                 /* allocate receive descriptors */
2247                 rc = ena_setup_all_rx_resources(adapter);
2248                 if (unlikely(rc != 0)) {
2249                         ena_trace(ENA_ALERT, "err_setup_rx");
2250                         goto err_setup_rx;
2251                 }
2252
2253                 /* create IO queues for Rx & Tx */
2254                 rc = ena_create_io_queues(adapter);
2255                 if (unlikely(rc != 0)) {
2256                         ena_trace(ENA_ALERT,
2257                             "create IO queues failed");
2258                         goto err_io_que;
2259                 }
2260
2261                 if (unlikely(adapter->link_status))
2262                         if_link_state_change(adapter->ifp, LINK_STATE_UP);
2263
2264                 rc = ena_up_complete(adapter);
2265                 if (unlikely(rc != 0))
2266                         goto err_up_complete;
2267
2268                 counter_u64_add(adapter->dev_stats.interface_up, 1);
2269
2270                 ena_update_hwassist(adapter);
2271
2272                 if_setdrvflagbits(adapter->ifp, IFF_DRV_RUNNING,
2273                     IFF_DRV_OACTIVE);
2274
2275                 callout_reset_sbt(&adapter->timer_service, SBT_1S, SBT_1S,
2276                     ena_timer_service, (void *)adapter, 0);
2277
2278                 adapter->up = true;
2279
2280                 ena_unmask_all_io_irqs(adapter);
2281         }
2282
2283         return (0);
2284
2285 err_up_complete:
2286         ena_destroy_all_io_queues(adapter);
2287 err_io_que:
2288         ena_free_all_rx_resources(adapter);
2289 err_setup_rx:
2290         ena_free_all_tx_resources(adapter);
2291 err_setup_tx:
2292         ena_free_io_irq(adapter);
2293 err_req_irq:
2294         return (rc);
2295 }
2296
2297 static uint64_t
2298 ena_get_counter(if_t ifp, ift_counter cnt)
2299 {
2300         struct ena_adapter *adapter;
2301         struct ena_hw_stats *stats;
2302
2303         adapter = if_getsoftc(ifp);
2304         stats = &adapter->hw_stats;
2305
2306         switch (cnt) {
2307         case IFCOUNTER_IPACKETS:
2308                 return (counter_u64_fetch(stats->rx_packets));
2309         case IFCOUNTER_OPACKETS:
2310                 return (counter_u64_fetch(stats->tx_packets));
2311         case IFCOUNTER_IBYTES:
2312                 return (counter_u64_fetch(stats->rx_bytes));
2313         case IFCOUNTER_OBYTES:
2314                 return (counter_u64_fetch(stats->tx_bytes));
2315         case IFCOUNTER_IQDROPS:
2316                 return (counter_u64_fetch(stats->rx_drops));
2317         default:
2318                 return (if_get_counter_default(ifp, cnt));
2319         }
2320 }
2321
2322 static int
2323 ena_media_change(if_t ifp)
2324 {
2325         /* Media Change is not supported by firmware */
2326         return (0);
2327 }
2328
2329 static void
2330 ena_media_status(if_t ifp, struct ifmediareq *ifmr)
2331 {
2332         struct ena_adapter *adapter = if_getsoftc(ifp);
2333         ena_trace(ENA_DBG, "enter");
2334
2335         mtx_lock(&adapter->global_mtx);
2336
2337         ifmr->ifm_status = IFM_AVALID;
2338         ifmr->ifm_active = IFM_ETHER;
2339
2340         if (!adapter->link_status) {
2341                 mtx_unlock(&adapter->global_mtx);
2342                 ena_trace(ENA_INFO, "link_status = false");
2343                 return;
2344         }
2345
2346         ifmr->ifm_status |= IFM_ACTIVE;
2347         ifmr->ifm_active |= IFM_UNKNOWN | IFM_FDX;
2348
2349         mtx_unlock(&adapter->global_mtx);
2350 }
2351
2352 static void
2353 ena_init(void *arg)
2354 {
2355         struct ena_adapter *adapter = (struct ena_adapter *)arg;
2356
2357         if (!adapter->up) {
2358                 sx_xlock(&adapter->ioctl_sx);
2359                 ena_up(adapter);
2360                 sx_unlock(&adapter->ioctl_sx);
2361         }
2362 }
2363
2364 static int
2365 ena_ioctl(if_t ifp, u_long command, caddr_t data)
2366 {
2367         struct ena_adapter *adapter;
2368         struct ifreq *ifr;
2369         int rc;
2370
2371         adapter = ifp->if_softc;
2372         ifr = (struct ifreq *)data;
2373
2374         /*
2375          * Acquiring lock to prevent from running up and down routines parallel.
2376          */
2377         rc = 0;
2378         switch (command) {
2379         case SIOCSIFMTU:
2380                 if (ifp->if_mtu == ifr->ifr_mtu)
2381                         break;
2382                 sx_xlock(&adapter->ioctl_sx);
2383                 ena_down(adapter);
2384
2385                 ena_change_mtu(ifp, ifr->ifr_mtu);
2386
2387                 rc = ena_up(adapter);
2388                 sx_unlock(&adapter->ioctl_sx);
2389                 break;
2390
2391         case SIOCSIFFLAGS:
2392                 if ((ifp->if_flags & IFF_UP) != 0) {
2393                         if ((if_getdrvflags(ifp) & IFF_DRV_RUNNING) != 0) {
2394                                 if ((ifp->if_flags & (IFF_PROMISC |
2395                                     IFF_ALLMULTI)) != 0) {
2396                                         device_printf(adapter->pdev,
2397                                             "ioctl promisc/allmulti\n");
2398                                 }
2399                         } else {
2400                                 sx_xlock(&adapter->ioctl_sx);
2401                                 rc = ena_up(adapter);
2402                                 sx_unlock(&adapter->ioctl_sx);
2403                         }
2404                 } else {
2405                         if ((if_getdrvflags(ifp) & IFF_DRV_RUNNING) != 0) {
2406                                 sx_xlock(&adapter->ioctl_sx);
2407                                 ena_down(adapter);
2408                                 sx_unlock(&adapter->ioctl_sx);
2409                         }
2410                 }
2411                 break;
2412
2413         case SIOCADDMULTI:
2414         case SIOCDELMULTI:
2415                 break;
2416
2417         case SIOCSIFMEDIA:
2418         case SIOCGIFMEDIA:
2419                 rc = ifmedia_ioctl(ifp, ifr, &adapter->media, command);
2420                 break;
2421
2422         case SIOCSIFCAP:
2423                 {
2424                         int reinit = 0;
2425
2426                         if (ifr->ifr_reqcap != ifp->if_capenable) {
2427                                 ifp->if_capenable = ifr->ifr_reqcap;
2428                                 reinit = 1;
2429                         }
2430
2431                         if ((reinit != 0) &&
2432                             ((if_getdrvflags(ifp) & IFF_DRV_RUNNING) != 0)) {
2433                                 sx_xlock(&adapter->ioctl_sx);
2434                                 ena_down(adapter);
2435                                 rc = ena_up(adapter);
2436                                 sx_unlock(&adapter->ioctl_sx);
2437                         }
2438                 }
2439
2440                 break;
2441         default:
2442                 rc = ether_ioctl(ifp, command, data);
2443                 break;
2444         }
2445
2446         return (rc);
2447 }
2448
2449 static int
2450 ena_get_dev_offloads(struct ena_com_dev_get_features_ctx *feat)
2451 {
2452         int caps = 0;
2453
2454         if ((feat->offload.tx &
2455             (ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV4_CSUM_FULL_MASK |
2456             ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV4_CSUM_PART_MASK |
2457             ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L3_CSUM_IPV4_MASK)) != 0)
2458                 caps |= IFCAP_TXCSUM;
2459
2460         if ((feat->offload.tx &
2461             (ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV6_CSUM_FULL_MASK |
2462             ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV6_CSUM_PART_MASK)) != 0)
2463                 caps |= IFCAP_TXCSUM_IPV6;
2464
2465         if ((feat->offload.tx &
2466             ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV4_MASK) != 0)
2467                 caps |= IFCAP_TSO4;
2468
2469         if ((feat->offload.tx &
2470             ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV6_MASK) != 0)
2471                 caps |= IFCAP_TSO6;
2472
2473         if ((feat->offload.rx_supported &
2474             (ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV4_CSUM_MASK |
2475             ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L3_CSUM_IPV4_MASK)) != 0)
2476                 caps |= IFCAP_RXCSUM;
2477
2478         if ((feat->offload.rx_supported &
2479             ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV6_CSUM_MASK) != 0)
2480                 caps |= IFCAP_RXCSUM_IPV6;
2481
2482         caps |= IFCAP_LRO | IFCAP_JUMBO_MTU;
2483
2484         return (caps);
2485 }
2486
2487 static void
2488 ena_update_host_info(struct ena_admin_host_info *host_info, if_t ifp)
2489 {
2490
2491         host_info->supported_network_features[0] =
2492             (uint32_t)if_getcapabilities(ifp);
2493 }
2494
2495 static void
2496 ena_update_hwassist(struct ena_adapter *adapter)
2497 {
2498         if_t ifp = adapter->ifp;
2499         uint32_t feat = adapter->tx_offload_cap;
2500         int cap = if_getcapenable(ifp);
2501         int flags = 0;
2502
2503         if_clearhwassist(ifp);
2504
2505         if ((cap & IFCAP_TXCSUM) != 0) {
2506                 if ((feat &
2507                     ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L3_CSUM_IPV4_MASK) != 0)
2508                         flags |= CSUM_IP;
2509                 if ((feat &
2510                     (ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV4_CSUM_FULL_MASK |
2511                     ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV4_CSUM_PART_MASK)) != 0)
2512                         flags |= CSUM_IP_UDP | CSUM_IP_TCP;
2513         }
2514
2515         if ((cap & IFCAP_TXCSUM_IPV6) != 0)
2516                 flags |= CSUM_IP6_UDP | CSUM_IP6_TCP;
2517
2518         if ((cap & IFCAP_TSO4) != 0)
2519                 flags |= CSUM_IP_TSO;
2520
2521         if ((cap & IFCAP_TSO6) != 0)
2522                 flags |= CSUM_IP6_TSO;
2523
2524         if_sethwassistbits(ifp, flags, 0);
2525 }
2526
2527 static int
2528 ena_setup_ifnet(device_t pdev, struct ena_adapter *adapter,
2529     struct ena_com_dev_get_features_ctx *feat)
2530 {
2531         if_t ifp;
2532         int caps = 0;
2533
2534         ifp = adapter->ifp = if_gethandle(IFT_ETHER);
2535         if (unlikely(ifp == NULL)) {
2536                 ena_trace(ENA_ALERT, "can not allocate ifnet structure\n");
2537                 return (ENXIO);
2538         }
2539         if_initname(ifp, device_get_name(pdev), device_get_unit(pdev));
2540         if_setdev(ifp, pdev);
2541         if_setsoftc(ifp, adapter);
2542
2543         if_setflags(ifp, IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST);
2544         if_setinitfn(ifp, ena_init);
2545         if_settransmitfn(ifp, ena_mq_start);
2546         if_setqflushfn(ifp, ena_qflush);
2547         if_setioctlfn(ifp, ena_ioctl);
2548         if_setgetcounterfn(ifp, ena_get_counter);
2549
2550         if_setsendqlen(ifp, adapter->tx_ring_size);
2551         if_setsendqready(ifp);
2552         if_setmtu(ifp, ETHERMTU);
2553         if_setbaudrate(ifp, 0);
2554         /* Zeroize capabilities... */
2555         if_setcapabilities(ifp, 0);
2556         if_setcapenable(ifp, 0);
2557         /* check hardware support */
2558         caps = ena_get_dev_offloads(feat);
2559         /* ... and set them */
2560         if_setcapabilitiesbit(ifp, caps, 0);
2561
2562         /* TSO parameters */
2563         ifp->if_hw_tsomax = ENA_TSO_MAXSIZE -
2564             (ETHER_HDR_LEN + ETHER_VLAN_ENCAP_LEN);
2565         ifp->if_hw_tsomaxsegcount = adapter->max_tx_sgl_size - 1;
2566         ifp->if_hw_tsomaxsegsize = ENA_TSO_MAXSIZE;
2567
2568         if_setifheaderlen(ifp, sizeof(struct ether_vlan_header));
2569         if_setcapenable(ifp, if_getcapabilities(ifp));
2570
2571         /*
2572          * Specify the media types supported by this adapter and register
2573          * callbacks to update media and link information
2574          */
2575         ifmedia_init(&adapter->media, IFM_IMASK,
2576             ena_media_change, ena_media_status);
2577         ifmedia_add(&adapter->media, IFM_ETHER | IFM_AUTO, 0, NULL);
2578         ifmedia_set(&adapter->media, IFM_ETHER | IFM_AUTO);
2579
2580         ether_ifattach(ifp, adapter->mac_addr);
2581
2582         return (0);
2583 }
2584
2585 static void
2586 ena_down(struct ena_adapter *adapter)
2587 {
2588         int rc;
2589
2590         if (adapter->up) {
2591                 device_printf(adapter->pdev, "device is going DOWN\n");
2592
2593                 callout_drain(&adapter->timer_service);
2594
2595                 adapter->up = false;
2596                 if_setdrvflagbits(adapter->ifp, IFF_DRV_OACTIVE,
2597                     IFF_DRV_RUNNING);
2598
2599                 ena_free_io_irq(adapter);
2600
2601                 if (adapter->trigger_reset) {
2602                         rc = ena_com_dev_reset(adapter->ena_dev,
2603                             adapter->reset_reason);
2604                         if (unlikely(rc != 0))
2605                                 device_printf(adapter->pdev,
2606                                     "Device reset failed\n");
2607                 }
2608
2609                 ena_destroy_all_io_queues(adapter);
2610
2611                 ena_free_all_tx_bufs(adapter);
2612                 ena_free_all_rx_bufs(adapter);
2613                 ena_free_all_tx_resources(adapter);
2614                 ena_free_all_rx_resources(adapter);
2615
2616                 counter_u64_add(adapter->dev_stats.interface_down, 1);
2617         }
2618 }
2619
2620 static void
2621 ena_tx_csum(struct ena_com_tx_ctx *ena_tx_ctx, struct mbuf *mbuf)
2622 {
2623         struct ena_com_tx_meta *ena_meta;
2624         struct ether_vlan_header *eh;
2625         u32 mss;
2626         bool offload;
2627         uint16_t etype;
2628         int ehdrlen;
2629         struct ip *ip;
2630         int iphlen;
2631         struct tcphdr *th;
2632
2633         offload = false;
2634         ena_meta = &ena_tx_ctx->ena_meta;
2635         mss = mbuf->m_pkthdr.tso_segsz;
2636
2637         if (mss != 0)
2638                 offload = true;
2639
2640         if ((mbuf->m_pkthdr.csum_flags & CSUM_TSO) != 0)
2641                 offload = true;
2642
2643         if ((mbuf->m_pkthdr.csum_flags & CSUM_OFFLOAD) != 0)
2644                 offload = true;
2645
2646         if (!offload) {
2647                 ena_tx_ctx->meta_valid = 0;
2648                 return;
2649         }
2650
2651         /* Determine where frame payload starts. */
2652         eh = mtod(mbuf, struct ether_vlan_header *);
2653         if (eh->evl_encap_proto == htons(ETHERTYPE_VLAN)) {
2654                 etype = ntohs(eh->evl_proto);
2655                 ehdrlen = ETHER_HDR_LEN + ETHER_VLAN_ENCAP_LEN;
2656         } else {
2657                 etype = ntohs(eh->evl_encap_proto);
2658                 ehdrlen = ETHER_HDR_LEN;
2659         }
2660
2661         ip = (struct ip *)(mbuf->m_data + ehdrlen);
2662         iphlen = ip->ip_hl << 2;
2663         th = (struct tcphdr *)((caddr_t)ip + iphlen);
2664
2665         if ((mbuf->m_pkthdr.csum_flags & CSUM_IP) != 0) {
2666                 ena_tx_ctx->l3_csum_enable = 1;
2667         }
2668         if ((mbuf->m_pkthdr.csum_flags & CSUM_TSO) != 0) {
2669                 ena_tx_ctx->tso_enable = 1;
2670                 ena_meta->l4_hdr_len = (th->th_off);
2671         }
2672
2673         switch (etype) {
2674         case ETHERTYPE_IP:
2675                 ena_tx_ctx->l3_proto = ENA_ETH_IO_L3_PROTO_IPV4;
2676                 if ((ip->ip_off & htons(IP_DF)) != 0)
2677                         ena_tx_ctx->df = 1;
2678                 break;
2679         case ETHERTYPE_IPV6:
2680                 ena_tx_ctx->l3_proto = ENA_ETH_IO_L3_PROTO_IPV6;
2681
2682         default:
2683                 break;
2684         }
2685
2686         if (ip->ip_p == IPPROTO_TCP) {
2687                 ena_tx_ctx->l4_proto = ENA_ETH_IO_L4_PROTO_TCP;
2688                 if ((mbuf->m_pkthdr.csum_flags &
2689                     (CSUM_IP_TCP | CSUM_IP6_TCP)) != 0)
2690                         ena_tx_ctx->l4_csum_enable = 1;
2691                 else
2692                         ena_tx_ctx->l4_csum_enable = 0;
2693         } else if (ip->ip_p == IPPROTO_UDP) {
2694                 ena_tx_ctx->l4_proto = ENA_ETH_IO_L4_PROTO_UDP;
2695                 if ((mbuf->m_pkthdr.csum_flags &
2696                     (CSUM_IP_UDP | CSUM_IP6_UDP)) != 0)
2697                         ena_tx_ctx->l4_csum_enable = 1;
2698                 else
2699                         ena_tx_ctx->l4_csum_enable = 0;
2700         } else {
2701                 ena_tx_ctx->l4_proto = ENA_ETH_IO_L4_PROTO_UNKNOWN;
2702                 ena_tx_ctx->l4_csum_enable = 0;
2703         }
2704
2705         ena_meta->mss = mss;
2706         ena_meta->l3_hdr_len = iphlen;
2707         ena_meta->l3_hdr_offset = ehdrlen;
2708         ena_tx_ctx->meta_valid = 1;
2709 }
2710
2711 static int
2712 ena_check_and_collapse_mbuf(struct ena_ring *tx_ring, struct mbuf **mbuf)
2713 {
2714         struct ena_adapter *adapter;
2715         struct mbuf *collapsed_mbuf;
2716         int num_frags;
2717
2718         adapter = tx_ring->adapter;
2719         num_frags = ena_mbuf_count(*mbuf);
2720
2721         /* One segment must be reserved for configuration descriptor. */
2722         if (num_frags < adapter->max_tx_sgl_size)
2723                 return (0);
2724         counter_u64_add(tx_ring->tx_stats.collapse, 1);
2725
2726         collapsed_mbuf = m_collapse(*mbuf, M_NOWAIT,
2727             adapter->max_tx_sgl_size - 1);
2728         if (unlikely(collapsed_mbuf == NULL)) {
2729                 counter_u64_add(tx_ring->tx_stats.collapse_err, 1);
2730                 return (ENOMEM);
2731         }
2732
2733         /* If mbuf was collapsed succesfully, original mbuf is released. */
2734         *mbuf = collapsed_mbuf;
2735
2736         return (0);
2737 }
2738
2739 static int
2740 ena_xmit_mbuf(struct ena_ring *tx_ring, struct mbuf **mbuf)
2741 {
2742         struct ena_adapter *adapter;
2743         struct ena_tx_buffer *tx_info;
2744         struct ena_com_tx_ctx ena_tx_ctx;
2745         struct ena_com_dev *ena_dev;
2746         struct ena_com_buf *ena_buf;
2747         struct ena_com_io_sq* io_sq;
2748         bus_dma_segment_t segs[ENA_BUS_DMA_SEGS];
2749         void *push_hdr;
2750         uint16_t next_to_use;
2751         uint16_t req_id;
2752         uint16_t push_len;
2753         uint16_t ena_qid;
2754         uint32_t nsegs, header_len;
2755         int i, rc;
2756         int nb_hw_desc;
2757
2758         ena_qid = ENA_IO_TXQ_IDX(tx_ring->que->id);
2759         adapter = tx_ring->que->adapter;
2760         ena_dev = adapter->ena_dev;
2761         io_sq = &ena_dev->io_sq_queues[ena_qid];
2762
2763         rc = ena_check_and_collapse_mbuf(tx_ring, mbuf);
2764         if (unlikely(rc != 0)) {
2765                 ena_trace(ENA_WARNING,
2766                     "Failed to collapse mbuf! err: %d", rc);
2767                 return (rc);
2768         }
2769
2770         next_to_use = tx_ring->next_to_use;
2771         req_id = tx_ring->free_tx_ids[next_to_use];
2772         tx_info = &tx_ring->tx_buffer_info[req_id];
2773
2774         tx_info->mbuf = *mbuf;
2775         tx_info->num_of_bufs = 0;
2776
2777         ena_buf = tx_info->bufs;
2778
2779         ena_trace(ENA_DBG | ENA_TXPTH, "Tx: %d bytes", (*mbuf)->m_pkthdr.len);
2780
2781         push_len = 0;
2782         /*
2783          * header_len is just a hint for the device. Because FreeBSD is not
2784          * giving us information about packet header length and it is not
2785          * guaranteed that all packet headers will be in the 1st mbuf, setting
2786          * header_len to 0 is making the device ignore this value and resolve
2787          * header on it's own.
2788          */
2789         header_len = 0;
2790         push_hdr = NULL;
2791
2792         rc = bus_dmamap_load_mbuf_sg(adapter->tx_buf_tag, tx_info->map,
2793             *mbuf, segs, &nsegs, BUS_DMA_NOWAIT);
2794
2795         if (unlikely((rc != 0) || (nsegs == 0))) {
2796                 ena_trace(ENA_WARNING,
2797                     "dmamap load failed! err: %d nsegs: %d", rc, nsegs);
2798                 counter_u64_add(tx_ring->tx_stats.dma_mapping_err, 1);
2799                 tx_info->mbuf = NULL;
2800                 if (rc == ENOMEM)
2801                         return (ENA_COM_NO_MEM);
2802                 else
2803                         return (ENA_COM_INVAL);
2804         }
2805
2806         for (i = 0; i < nsegs; i++) {
2807                 ena_buf->len = segs[i].ds_len;
2808                 ena_buf->paddr = segs[i].ds_addr;
2809                 ena_buf++;
2810         }
2811         tx_info->num_of_bufs = nsegs;
2812
2813         memset(&ena_tx_ctx, 0x0, sizeof(struct ena_com_tx_ctx));
2814         ena_tx_ctx.ena_bufs = tx_info->bufs;
2815         ena_tx_ctx.push_header = push_hdr;
2816         ena_tx_ctx.num_bufs = tx_info->num_of_bufs;
2817         ena_tx_ctx.req_id = req_id;
2818         ena_tx_ctx.header_len = header_len;
2819
2820         /* Set flags and meta data */
2821         ena_tx_csum(&ena_tx_ctx, *mbuf);
2822         /* Prepare the packet's descriptors and send them to device */
2823         rc = ena_com_prepare_tx(io_sq, &ena_tx_ctx, &nb_hw_desc);
2824         if (unlikely(rc != 0)) {
2825                 if (likely(rc == ENA_COM_NO_MEM)) {
2826                         ena_trace(ENA_DBG | ENA_TXPTH,
2827                             "tx ring[%d] if out of space\n", tx_ring->que->id);
2828                 } else {
2829                         device_printf(adapter->pdev,
2830                             "failed to prepare tx bufs\n");
2831                 }
2832                 counter_u64_add(tx_ring->tx_stats.prepare_ctx_err, 1);
2833                 goto dma_error;
2834         }
2835
2836         counter_enter();
2837         counter_u64_add_protected(tx_ring->tx_stats.cnt, 1);
2838         counter_u64_add_protected(tx_ring->tx_stats.bytes,
2839             (*mbuf)->m_pkthdr.len);
2840
2841         counter_u64_add_protected(adapter->hw_stats.tx_packets, 1);
2842         counter_u64_add_protected(adapter->hw_stats.tx_bytes,
2843             (*mbuf)->m_pkthdr.len);
2844         counter_exit();
2845
2846         tx_info->tx_descs = nb_hw_desc;
2847         getbinuptime(&tx_info->timestamp);
2848         tx_info->print_once = true;
2849
2850         tx_ring->next_to_use = ENA_TX_RING_IDX_NEXT(next_to_use,
2851             tx_ring->ring_size);
2852
2853         /* stop the queue when no more space available, the packet can have up
2854          * to sgl_size + 2. one for the meta descriptor and one for header
2855          * (if the header is larger than tx_max_header_size).
2856          */
2857         if (unlikely(!ena_com_sq_have_enough_space(tx_ring->ena_com_io_sq,
2858             adapter->max_tx_sgl_size + 2))) {
2859                 ena_trace(ENA_DBG | ENA_TXPTH, "Stop queue %d\n",
2860                     tx_ring->que->id);
2861
2862                 tx_ring->running = false;
2863                 counter_u64_add(tx_ring->tx_stats.queue_stop, 1);
2864
2865                 /* There is a rare condition where this function decides to
2866                  * stop the queue but meanwhile tx_cleanup() updates
2867                  * next_to_completion and terminates.
2868                  * The queue will remain stopped forever.
2869                  * To solve this issue this function performs mb(), checks
2870                  * the wakeup condition and wakes up the queue if needed.
2871                  */
2872                 mb();
2873
2874                 if (ena_com_sq_have_enough_space(tx_ring->ena_com_io_sq,
2875                     ENA_TX_RESUME_THRESH)) {
2876                         tx_ring->running = true;
2877                         counter_u64_add(tx_ring->tx_stats.queue_wakeup, 1);
2878                 }
2879         }
2880
2881         bus_dmamap_sync(adapter->tx_buf_tag, tx_info->map,
2882             BUS_DMASYNC_PREWRITE);
2883
2884         return (0);
2885
2886 dma_error:
2887         tx_info->mbuf = NULL;
2888         bus_dmamap_unload(adapter->tx_buf_tag, tx_info->map);
2889
2890         return (rc);
2891 }
2892
2893 static void
2894 ena_start_xmit(struct ena_ring *tx_ring)
2895 {
2896         struct mbuf *mbuf;
2897         struct ena_adapter *adapter = tx_ring->adapter;
2898         struct ena_com_io_sq* io_sq;
2899         int ena_qid;
2900         int acum_pkts = 0;
2901         int ret = 0;
2902
2903         if (unlikely((if_getdrvflags(adapter->ifp) & IFF_DRV_RUNNING) == 0))
2904                 return;
2905
2906         if (unlikely(!adapter->link_status))
2907                 return;
2908
2909         ena_qid = ENA_IO_TXQ_IDX(tx_ring->que->id);
2910         io_sq = &adapter->ena_dev->io_sq_queues[ena_qid];
2911
2912         while ((mbuf = drbr_peek(adapter->ifp, tx_ring->br)) != NULL) {
2913                 ena_trace(ENA_DBG | ENA_TXPTH, "\ndequeued mbuf %p with flags %#x and"
2914                     " header csum flags %#jx",
2915                     mbuf, mbuf->m_flags, (uint64_t)mbuf->m_pkthdr.csum_flags);
2916
2917                 if (unlikely(!tx_ring->running)) {
2918                         drbr_putback(adapter->ifp, tx_ring->br, mbuf);
2919                         break;
2920                 }
2921
2922                 if (unlikely((ret = ena_xmit_mbuf(tx_ring, &mbuf)) != 0)) {
2923                         if (ret == ENA_COM_NO_MEM) {
2924                                 drbr_putback(adapter->ifp, tx_ring->br, mbuf);
2925                         } else if (ret == ENA_COM_NO_SPACE) {
2926                                 drbr_putback(adapter->ifp, tx_ring->br, mbuf);
2927                         } else {
2928                                 m_freem(mbuf);
2929                                 drbr_advance(adapter->ifp, tx_ring->br);
2930                         }
2931
2932                         break;
2933                 }
2934
2935                 drbr_advance(adapter->ifp, tx_ring->br);
2936
2937                 if (unlikely((if_getdrvflags(adapter->ifp) &
2938                     IFF_DRV_RUNNING) == 0))
2939                         return;
2940
2941                 acum_pkts++;
2942
2943                 BPF_MTAP(adapter->ifp, mbuf);
2944
2945                 if (unlikely(acum_pkts == DB_THRESHOLD)) {
2946                         acum_pkts = 0;
2947                         wmb();
2948                         /* Trigger the dma engine */
2949                         ena_com_write_sq_doorbell(io_sq);
2950                         counter_u64_add(tx_ring->tx_stats.doorbells, 1);
2951                 }
2952
2953         }
2954
2955         if (likely(acum_pkts != 0)) {
2956                 wmb();
2957                 /* Trigger the dma engine */
2958                 ena_com_write_sq_doorbell(io_sq);
2959                 counter_u64_add(tx_ring->tx_stats.doorbells, 1);
2960         }
2961
2962         if (unlikely(!tx_ring->running))
2963                 taskqueue_enqueue(tx_ring->que->cleanup_tq,
2964                     &tx_ring->que->cleanup_task);
2965 }
2966
2967 static void
2968 ena_deferred_mq_start(void *arg, int pending)
2969 {
2970         struct ena_ring *tx_ring = (struct ena_ring *)arg;
2971         struct ifnet *ifp = tx_ring->adapter->ifp;
2972
2973         while (!drbr_empty(ifp, tx_ring->br) &&
2974             tx_ring->running &&
2975             (if_getdrvflags(ifp) & IFF_DRV_RUNNING) != 0) {
2976                 ENA_RING_MTX_LOCK(tx_ring);
2977                 ena_start_xmit(tx_ring);
2978                 ENA_RING_MTX_UNLOCK(tx_ring);
2979         }
2980 }
2981
2982 static int
2983 ena_mq_start(if_t ifp, struct mbuf *m)
2984 {
2985         struct ena_adapter *adapter = ifp->if_softc;
2986         struct ena_ring *tx_ring;
2987         int ret, is_drbr_empty;
2988         uint32_t i;
2989
2990         if (unlikely((if_getdrvflags(adapter->ifp) & IFF_DRV_RUNNING) == 0))
2991                 return (ENODEV);
2992
2993         /* Which queue to use */
2994         /*
2995          * If everything is setup correctly, it should be the
2996          * same bucket that the current CPU we're on is.
2997          * It should improve performance.
2998          */
2999         if (M_HASHTYPE_GET(m) != M_HASHTYPE_NONE) {
3000                 i = m->m_pkthdr.flowid % adapter->num_queues;
3001         } else {
3002                 i = curcpu % adapter->num_queues;
3003         }
3004         tx_ring = &adapter->tx_ring[i];
3005
3006         /* Check if drbr is empty before putting packet */
3007         is_drbr_empty = drbr_empty(ifp, tx_ring->br);
3008         ret = drbr_enqueue(ifp, tx_ring->br, m);
3009         if (unlikely(ret != 0)) {
3010                 taskqueue_enqueue(tx_ring->enqueue_tq, &tx_ring->enqueue_task);
3011                 return (ret);
3012         }
3013
3014         if (is_drbr_empty && (ENA_RING_MTX_TRYLOCK(tx_ring) != 0)) {
3015                 ena_start_xmit(tx_ring);
3016                 ENA_RING_MTX_UNLOCK(tx_ring);
3017         } else {
3018                 taskqueue_enqueue(tx_ring->enqueue_tq, &tx_ring->enqueue_task);
3019         }
3020
3021         return (0);
3022 }
3023
3024 static void
3025 ena_qflush(if_t ifp)
3026 {
3027         struct ena_adapter *adapter = ifp->if_softc;
3028         struct ena_ring *tx_ring = adapter->tx_ring;
3029         int i;
3030
3031         for(i = 0; i < adapter->num_queues; ++i, ++tx_ring)
3032                 if (!drbr_empty(ifp, tx_ring->br)) {
3033                         ENA_RING_MTX_LOCK(tx_ring);
3034                         drbr_flush(ifp, tx_ring->br);
3035                         ENA_RING_MTX_UNLOCK(tx_ring);
3036                 }
3037
3038         if_qflush(ifp);
3039 }
3040
3041 static int
3042 ena_calc_io_queue_num(struct ena_adapter *adapter,
3043     struct ena_com_dev_get_features_ctx *get_feat_ctx)
3044 {
3045         struct ena_com_dev *ena_dev = adapter->ena_dev;
3046         int io_sq_num, io_cq_num, io_queue_num;
3047
3048         /* Regular queues capabilities */
3049         if (ena_dev->supported_features & BIT(ENA_ADMIN_MAX_QUEUES_EXT)) {
3050                 struct ena_admin_queue_ext_feature_fields *max_queue_ext =
3051                     &get_feat_ctx->max_queue_ext.max_queue_ext;
3052                 io_sq_num = max_queue_ext->max_rx_sq_num;
3053                 io_sq_num = min_t(int, io_sq_num, max_queue_ext->max_tx_sq_num);
3054
3055                 io_cq_num = max_queue_ext->max_rx_cq_num;
3056                 io_cq_num = min_t(int, io_cq_num, max_queue_ext->max_tx_cq_num);
3057         } else {
3058                 struct ena_admin_queue_feature_desc *max_queues =
3059                     &get_feat_ctx->max_queues;
3060                 io_sq_num = max_queues->max_sq_num;
3061                 io_cq_num = max_queues->max_cq_num;
3062         }
3063
3064         io_queue_num = min_t(int, mp_ncpus, ENA_MAX_NUM_IO_QUEUES);
3065         io_queue_num = min_t(int, io_queue_num, io_sq_num);
3066         io_queue_num = min_t(int, io_queue_num, io_cq_num);
3067         /* 1 IRQ for for mgmnt and 1 IRQ for each TX/RX pair */
3068         io_queue_num = min_t(int, io_queue_num,
3069             pci_msix_count(adapter->pdev) - 1);
3070
3071         return (io_queue_num);
3072 }
3073
3074 static int
3075 ena_calc_queue_size(struct ena_adapter *adapter,
3076     struct ena_calc_queue_size_ctx *ctx)
3077 {
3078         uint32_t tx_queue_size = ENA_DEFAULT_RING_SIZE;
3079         uint32_t rx_queue_size = adapter->rx_ring_size;
3080
3081         if (ctx->ena_dev->supported_features & BIT(ENA_ADMIN_MAX_QUEUES_EXT)) {
3082                 struct ena_admin_queue_ext_feature_fields *max_queue_ext =
3083                     &ctx->get_feat_ctx->max_queue_ext.max_queue_ext;
3084                 rx_queue_size = min_t(uint32_t, rx_queue_size,
3085                     max_queue_ext->max_rx_cq_depth);
3086                 rx_queue_size = min_t(uint32_t, rx_queue_size,
3087                     max_queue_ext->max_rx_sq_depth);
3088                 tx_queue_size = min_t(uint32_t, tx_queue_size,
3089                     max_queue_ext->max_tx_cq_depth);
3090                 tx_queue_size = min_t(uint32_t, tx_queue_size,
3091                     max_queue_ext->max_tx_sq_depth);
3092                 ctx->max_rx_sgl_size = min_t(uint16_t, ENA_PKT_MAX_BUFS,
3093                     max_queue_ext->max_per_packet_rx_descs);
3094                 ctx->max_tx_sgl_size = min_t(uint16_t, ENA_PKT_MAX_BUFS,
3095                     max_queue_ext->max_per_packet_tx_descs);
3096         } else {
3097                 struct ena_admin_queue_feature_desc *max_queues =
3098                     &ctx->get_feat_ctx->max_queues;
3099                 rx_queue_size = min_t(uint32_t, rx_queue_size,
3100                     max_queues->max_cq_depth);
3101                 rx_queue_size = min_t(uint32_t, rx_queue_size,
3102                     max_queues->max_sq_depth);
3103                 tx_queue_size = rx_queue_size;
3104                 ctx->max_rx_sgl_size = min_t(uint16_t, ENA_PKT_MAX_BUFS,
3105                     max_queues->max_packet_tx_descs);
3106                 ctx->max_tx_sgl_size = min_t(uint16_t, ENA_PKT_MAX_BUFS,
3107                     max_queues->max_packet_rx_descs);
3108         }
3109
3110         /* round down to the nearest power of 2 */
3111         rx_queue_size = 1 << (fls(rx_queue_size) - 1);
3112         tx_queue_size = 1 << (fls(tx_queue_size) - 1);
3113
3114         if (unlikely(rx_queue_size == 0 || tx_queue_size == 0)) {
3115                 device_printf(ctx->pdev, "Invalid queue size\n");
3116                 return (EFAULT);
3117         }
3118
3119         ctx->rx_queue_size = rx_queue_size;
3120         ctx->tx_queue_size = tx_queue_size;
3121
3122         return (0);
3123 }
3124
3125 static int
3126 ena_handle_updated_queues(struct ena_adapter *adapter,
3127     struct ena_com_dev_get_features_ctx *get_feat_ctx)
3128 {
3129         struct ena_com_dev *ena_dev = adapter->ena_dev;
3130         struct ena_calc_queue_size_ctx calc_queue_ctx = { 0 };
3131         device_t pdev = adapter->pdev;
3132         bool are_queues_changed = false;
3133         int io_queue_num, rc;
3134
3135         calc_queue_ctx.ena_dev = ena_dev;
3136         calc_queue_ctx.get_feat_ctx = get_feat_ctx;
3137         calc_queue_ctx.pdev = pdev;
3138
3139         io_queue_num = ena_calc_io_queue_num(adapter, get_feat_ctx);
3140         rc = ena_calc_queue_size(adapter, &calc_queue_ctx);
3141         if (unlikely(rc != 0 || io_queue_num <= 0))
3142                 return EFAULT;
3143
3144         if (adapter->tx_ring->buf_ring_size != adapter->buf_ring_size)
3145                 are_queues_changed = true;
3146
3147         if (unlikely(adapter->tx_ring_size > calc_queue_ctx.tx_queue_size ||
3148             adapter->rx_ring_size > calc_queue_ctx.rx_queue_size)) {
3149                 device_printf(pdev,
3150                     "Not enough resources to allocate requested queue sizes "
3151                     "(TX,RX)=(%d,%d), falling back to queue sizes "
3152                     "(TX,RX)=(%d,%d)\n",
3153                     adapter->tx_ring_size,
3154                     adapter->rx_ring_size,
3155                     calc_queue_ctx.tx_queue_size,
3156                     calc_queue_ctx.rx_queue_size);
3157                 adapter->tx_ring_size = calc_queue_ctx.tx_queue_size;
3158                 adapter->rx_ring_size = calc_queue_ctx.rx_queue_size;
3159                 adapter->max_tx_sgl_size = calc_queue_ctx.max_tx_sgl_size;
3160                 adapter->max_rx_sgl_size = calc_queue_ctx.max_rx_sgl_size;
3161                 are_queues_changed = true;
3162         }
3163
3164         if (unlikely(adapter->num_queues > io_queue_num)) {
3165                 device_printf(pdev,
3166                     "Not enough resources to allocate %d queues, "
3167                     "falling back to %d queues\n",
3168                     adapter->num_queues, io_queue_num);
3169                 adapter->num_queues = io_queue_num;
3170                 if (adapter->rss_support) {
3171                         ena_com_rss_destroy(ena_dev);
3172                         rc = ena_rss_init_default(adapter);
3173                         if (unlikely(rc != 0) && (rc != EOPNOTSUPP)) {
3174                                 device_printf(pdev, "Cannot init RSS rc: %d\n",
3175                                     rc);
3176                                 return (rc);
3177                         }
3178                 }
3179                 are_queues_changed = true;
3180         }
3181
3182         if (unlikely(are_queues_changed)) {
3183                 ena_free_all_io_rings_resources(adapter);
3184                 ena_init_io_rings(adapter);
3185         }
3186
3187         return (0);
3188 }
3189
3190 static int
3191 ena_rss_init_default(struct ena_adapter *adapter)
3192 {
3193         struct ena_com_dev *ena_dev = adapter->ena_dev;
3194         device_t dev = adapter->pdev;
3195         int qid, rc, i;
3196
3197         rc = ena_com_rss_init(ena_dev, ENA_RX_RSS_TABLE_LOG_SIZE);
3198         if (unlikely(rc != 0)) {
3199                 device_printf(dev, "Cannot init indirect table\n");
3200                 return (rc);
3201         }
3202
3203         for (i = 0; i < ENA_RX_RSS_TABLE_SIZE; i++) {
3204                 qid = i % adapter->num_queues;
3205                 rc = ena_com_indirect_table_fill_entry(ena_dev, i,
3206                     ENA_IO_RXQ_IDX(qid));
3207                 if (unlikely((rc != 0) && (rc != EOPNOTSUPP))) {
3208                         device_printf(dev, "Cannot fill indirect table\n");
3209                         goto err_rss_destroy;
3210                 }
3211         }
3212
3213         rc = ena_com_fill_hash_function(ena_dev, ENA_ADMIN_CRC32, NULL,
3214             ENA_HASH_KEY_SIZE, 0xFFFFFFFF);
3215         if (unlikely((rc != 0) && (rc != EOPNOTSUPP))) {
3216                 device_printf(dev, "Cannot fill hash function\n");
3217                 goto err_rss_destroy;
3218         }
3219
3220         rc = ena_com_set_default_hash_ctrl(ena_dev);
3221         if (unlikely((rc != 0) && (rc != EOPNOTSUPP))) {
3222                 device_printf(dev, "Cannot fill hash control\n");
3223                 goto err_rss_destroy;
3224         }
3225
3226         return (0);
3227
3228 err_rss_destroy:
3229         ena_com_rss_destroy(ena_dev);
3230         return (rc);
3231 }
3232
3233 static void
3234 ena_rss_init_default_deferred(void *arg)
3235 {
3236         struct ena_adapter *adapter;
3237         devclass_t dc;
3238         int max;
3239         int rc;
3240
3241         dc = devclass_find("ena");
3242         if (unlikely(dc == NULL)) {
3243                 ena_trace(ENA_ALERT, "No devclass ena\n");
3244                 return;
3245         }
3246
3247         max = devclass_get_maxunit(dc);
3248         while (max-- >= 0) {
3249                 adapter = devclass_get_softc(dc, max);
3250                 if (adapter != NULL) {
3251                         rc = ena_rss_init_default(adapter);
3252                         adapter->rss_support = true;
3253                         if (unlikely(rc != 0)) {
3254                                 device_printf(adapter->pdev,
3255                                     "WARNING: RSS was not properly initialized,"
3256                                     " it will affect bandwidth\n");
3257                                 adapter->rss_support = false;
3258                         }
3259                 }
3260         }
3261 }
3262 SYSINIT(ena_rss_init, SI_SUB_KICK_SCHEDULER, SI_ORDER_SECOND, ena_rss_init_default_deferred, NULL);
3263
3264 static void
3265 ena_config_host_info(struct ena_com_dev *ena_dev)
3266 {
3267         struct ena_admin_host_info *host_info;
3268         int rc;
3269
3270         /* Allocate only the host info */
3271         rc = ena_com_allocate_host_info(ena_dev);
3272         if (unlikely(rc != 0)) {
3273                 ena_trace(ENA_ALERT, "Cannot allocate host info\n");
3274                 return;
3275         }
3276
3277         host_info = ena_dev->host_attr.host_info;
3278
3279         host_info->os_type = ENA_ADMIN_OS_FREEBSD;
3280         host_info->kernel_ver = osreldate;
3281
3282         sprintf(host_info->kernel_ver_str, "%d", osreldate);
3283         host_info->os_dist = 0;
3284         strncpy(host_info->os_dist_str, osrelease,
3285             sizeof(host_info->os_dist_str) - 1);
3286
3287         host_info->driver_version =
3288                 (DRV_MODULE_VER_MAJOR) |
3289                 (DRV_MODULE_VER_MINOR << ENA_ADMIN_HOST_INFO_MINOR_SHIFT) |
3290                 (DRV_MODULE_VER_SUBMINOR << ENA_ADMIN_HOST_INFO_SUB_MINOR_SHIFT);
3291         host_info->num_cpus = mp_ncpus;
3292
3293         rc = ena_com_set_host_attributes(ena_dev);
3294         if (unlikely(rc != 0)) {
3295                 if (rc == EOPNOTSUPP)
3296                         ena_trace(ENA_WARNING, "Cannot set host attributes\n");
3297                 else
3298                         ena_trace(ENA_ALERT, "Cannot set host attributes\n");
3299
3300                 goto err;
3301         }
3302
3303         return;
3304
3305 err:
3306         ena_com_delete_host_info(ena_dev);
3307 }
3308
3309 static int
3310 ena_device_init(struct ena_adapter *adapter, device_t pdev,
3311     struct ena_com_dev_get_features_ctx *get_feat_ctx, int *wd_active)
3312 {
3313         struct ena_com_dev* ena_dev = adapter->ena_dev;
3314         bool readless_supported;
3315         uint32_t aenq_groups;
3316         int dma_width;
3317         int rc;
3318
3319         rc = ena_com_mmio_reg_read_request_init(ena_dev);
3320         if (unlikely(rc != 0)) {
3321                 device_printf(pdev, "failed to init mmio read less\n");
3322                 return (rc);
3323         }
3324
3325         /*
3326          * The PCIe configuration space revision id indicate if mmio reg
3327          * read is disabled
3328          */
3329         readless_supported = !(pci_get_revid(pdev) & ENA_MMIO_DISABLE_REG_READ);
3330         ena_com_set_mmio_read_mode(ena_dev, readless_supported);
3331
3332         rc = ena_com_dev_reset(ena_dev, ENA_REGS_RESET_NORMAL);
3333         if (unlikely(rc != 0)) {
3334                 device_printf(pdev, "Can not reset device\n");
3335                 goto err_mmio_read_less;
3336         }
3337
3338         rc = ena_com_validate_version(ena_dev);
3339         if (unlikely(rc != 0)) {
3340                 device_printf(pdev, "device version is too low\n");
3341                 goto err_mmio_read_less;
3342         }
3343
3344         dma_width = ena_com_get_dma_width(ena_dev);
3345         if (unlikely(dma_width < 0)) {
3346                 device_printf(pdev, "Invalid dma width value %d", dma_width);
3347                 rc = dma_width;
3348                 goto err_mmio_read_less;
3349         }
3350         adapter->dma_width = dma_width;
3351
3352         /* ENA admin level init */
3353         rc = ena_com_admin_init(ena_dev, &aenq_handlers);
3354         if (unlikely(rc != 0)) {
3355                 device_printf(pdev,
3356                     "Can not initialize ena admin queue with device\n");
3357                 goto err_mmio_read_less;
3358         }
3359
3360         /*
3361          * To enable the msix interrupts the driver needs to know the number
3362          * of queues. So the driver uses polling mode to retrieve this
3363          * information
3364          */
3365         ena_com_set_admin_polling_mode(ena_dev, true);
3366
3367         ena_config_host_info(ena_dev);
3368
3369         /* Get Device Attributes */
3370         rc = ena_com_get_dev_attr_feat(ena_dev, get_feat_ctx);
3371         if (unlikely(rc != 0)) {
3372                 device_printf(pdev,
3373                     "Cannot get attribute for ena device rc: %d\n", rc);
3374                 goto err_admin_init;
3375         }
3376
3377         aenq_groups = BIT(ENA_ADMIN_LINK_CHANGE) |
3378             BIT(ENA_ADMIN_FATAL_ERROR) |
3379             BIT(ENA_ADMIN_WARNING) |
3380             BIT(ENA_ADMIN_NOTIFICATION) |
3381             BIT(ENA_ADMIN_KEEP_ALIVE);
3382
3383         aenq_groups &= get_feat_ctx->aenq.supported_groups;
3384         rc = ena_com_set_aenq_config(ena_dev, aenq_groups);
3385         if (unlikely(rc != 0)) {
3386                 device_printf(pdev, "Cannot configure aenq groups rc: %d\n", rc);
3387                 goto err_admin_init;
3388         }
3389
3390         *wd_active = !!(aenq_groups & BIT(ENA_ADMIN_KEEP_ALIVE));
3391
3392         return (0);
3393
3394 err_admin_init:
3395         ena_com_delete_host_info(ena_dev);
3396         ena_com_admin_destroy(ena_dev);
3397 err_mmio_read_less:
3398         ena_com_mmio_reg_read_request_destroy(ena_dev);
3399
3400         return (rc);
3401 }
3402
3403 static int ena_enable_msix_and_set_admin_interrupts(struct ena_adapter *adapter,
3404     int io_vectors)
3405 {
3406         struct ena_com_dev *ena_dev = adapter->ena_dev;
3407         int rc;
3408
3409         rc = ena_enable_msix(adapter);
3410         if (unlikely(rc != 0)) {
3411                 device_printf(adapter->pdev, "Error with MSI-X enablement\n");
3412                 return (rc);
3413         }
3414
3415         ena_setup_mgmnt_intr(adapter);
3416
3417         rc = ena_request_mgmnt_irq(adapter);
3418         if (unlikely(rc != 0)) {
3419                 device_printf(adapter->pdev, "Cannot setup mgmnt queue intr\n");
3420                 goto err_disable_msix;
3421         }
3422
3423         ena_com_set_admin_polling_mode(ena_dev, false);
3424
3425         ena_com_admin_aenq_enable(ena_dev);
3426
3427         return (0);
3428
3429 err_disable_msix:
3430         ena_disable_msix(adapter);
3431
3432         return (rc);
3433 }
3434
3435 /* Function called on ENA_ADMIN_KEEP_ALIVE event */
3436 static void ena_keep_alive_wd(void *adapter_data,
3437     struct ena_admin_aenq_entry *aenq_e)
3438 {
3439         struct ena_adapter *adapter = (struct ena_adapter *)adapter_data;
3440         struct ena_admin_aenq_keep_alive_desc *desc;
3441         sbintime_t stime;
3442         uint64_t rx_drops;
3443
3444         desc = (struct ena_admin_aenq_keep_alive_desc *)aenq_e;
3445
3446         rx_drops = ((uint64_t)desc->rx_drops_high << 32) | desc->rx_drops_low;
3447         counter_u64_zero(adapter->hw_stats.rx_drops);
3448         counter_u64_add(adapter->hw_stats.rx_drops, rx_drops);
3449
3450         stime = getsbinuptime();
3451         atomic_store_rel_64(&adapter->keep_alive_timestamp, stime);
3452 }
3453
3454 /* Check for keep alive expiration */
3455 static void check_for_missing_keep_alive(struct ena_adapter *adapter)
3456 {
3457         sbintime_t timestamp, time;
3458
3459         if (adapter->wd_active == 0)
3460                 return;
3461
3462         if (adapter->keep_alive_timeout == ENA_HW_HINTS_NO_TIMEOUT)
3463                 return;
3464
3465         timestamp = atomic_load_acq_64(&adapter->keep_alive_timestamp);
3466         time = getsbinuptime() - timestamp;
3467         if (unlikely(time > adapter->keep_alive_timeout)) {
3468                 device_printf(adapter->pdev,
3469                     "Keep alive watchdog timeout.\n");
3470                 counter_u64_add(adapter->dev_stats.wd_expired, 1);
3471                 adapter->reset_reason = ENA_REGS_RESET_KEEP_ALIVE_TO;
3472                 adapter->trigger_reset = true;
3473         }
3474 }
3475
3476 /* Check if admin queue is enabled */
3477 static void check_for_admin_com_state(struct ena_adapter *adapter)
3478 {
3479         if (unlikely(ena_com_get_admin_running_state(adapter->ena_dev) ==
3480             false)) {
3481                 device_printf(adapter->pdev,
3482                     "ENA admin queue is not in running state!\n");
3483                 counter_u64_add(adapter->dev_stats.admin_q_pause, 1);
3484                 adapter->reset_reason = ENA_REGS_RESET_ADMIN_TO;
3485                 adapter->trigger_reset = true;
3486         }
3487 }
3488
3489 static int
3490 check_for_rx_interrupt_queue(struct ena_adapter *adapter,
3491     struct ena_ring *rx_ring)
3492 {
3493         if (likely(rx_ring->first_interrupt))
3494                 return (0);
3495
3496         if (ena_com_cq_empty(rx_ring->ena_com_io_cq))
3497                 return (0);
3498
3499         rx_ring->no_interrupt_event_cnt++;
3500
3501         if (rx_ring->no_interrupt_event_cnt == ENA_MAX_NO_INTERRUPT_ITERATIONS) {
3502                 device_printf(adapter->pdev, "Potential MSIX issue on Rx side "
3503                    "Queue = %d. Reset the device\n", rx_ring->qid);
3504                 adapter->reset_reason = ENA_REGS_RESET_MISS_INTERRUPT;
3505                 adapter->trigger_reset = true;
3506                 return (EIO);
3507         }
3508
3509         return (0);
3510 }
3511
3512 static int
3513 check_missing_comp_in_tx_queue(struct ena_adapter *adapter,
3514     struct ena_ring *tx_ring)
3515 {
3516         struct bintime curtime, time;
3517         struct ena_tx_buffer *tx_buf;
3518         sbintime_t time_offset;
3519         uint32_t missed_tx = 0;
3520         int i, rc = 0;
3521
3522         getbinuptime(&curtime);
3523
3524         for (i = 0; i < tx_ring->ring_size; i++) {
3525                 tx_buf = &tx_ring->tx_buffer_info[i];
3526
3527                 if (bintime_isset(&tx_buf->timestamp) == 0)
3528                         continue;
3529
3530                 time = curtime;
3531                 bintime_sub(&time, &tx_buf->timestamp);
3532                 time_offset = bttosbt(time);
3533
3534                 if (unlikely(!tx_ring->first_interrupt &&
3535                     time_offset > 2 * adapter->missing_tx_timeout)) {
3536                         /*
3537                          * If after graceful period interrupt is still not
3538                          * received, we schedule a reset.
3539                          */
3540                         device_printf(adapter->pdev,
3541                             "Potential MSIX issue on Tx side Queue = %d. "
3542                             "Reset the device\n", tx_ring->qid);
3543                         adapter->reset_reason = ENA_REGS_RESET_MISS_INTERRUPT;
3544                         adapter->trigger_reset = true;
3545                         return (EIO);
3546                 }
3547
3548                 /* Check again if packet is still waiting */
3549                 if (unlikely(time_offset > adapter->missing_tx_timeout)) {
3550
3551                         if (!tx_buf->print_once)
3552                                 ena_trace(ENA_WARNING, "Found a Tx that wasn't "
3553                                     "completed on time, qid %d, index %d.\n",
3554                                     tx_ring->qid, i);
3555
3556                         tx_buf->print_once = true;
3557                         missed_tx++;
3558                 }
3559         }
3560
3561         if (unlikely(missed_tx > adapter->missing_tx_threshold)) {
3562                 device_printf(adapter->pdev,
3563                     "The number of lost tx completion is above the threshold "
3564                     "(%d > %d). Reset the device\n",
3565                     missed_tx, adapter->missing_tx_threshold);
3566                 adapter->reset_reason = ENA_REGS_RESET_MISS_TX_CMPL;
3567                 adapter->trigger_reset = true;
3568                 rc = EIO;
3569         }
3570
3571         counter_u64_add(tx_ring->tx_stats.missing_tx_comp, missed_tx);
3572
3573         return (rc);
3574 }
3575
3576 /*
3577  * Check for TX which were not completed on time.
3578  * Timeout is defined by "missing_tx_timeout".
3579  * Reset will be performed if number of incompleted
3580  * transactions exceeds "missing_tx_threshold".
3581  */
3582 static void
3583 check_for_missing_completions(struct ena_adapter *adapter)
3584 {
3585         struct ena_ring *tx_ring;
3586         struct ena_ring *rx_ring;
3587         int i, budget, rc;
3588
3589         /* Make sure the driver doesn't turn the device in other process */
3590         rmb();
3591
3592         if (!adapter->up)
3593                 return;
3594
3595         if (adapter->trigger_reset)
3596                 return;
3597
3598         if (adapter->missing_tx_timeout == ENA_HW_HINTS_NO_TIMEOUT)
3599                 return;
3600
3601         budget = adapter->missing_tx_max_queues;
3602
3603         for (i = adapter->next_monitored_tx_qid; i < adapter->num_queues; i++) {
3604                 tx_ring = &adapter->tx_ring[i];
3605                 rx_ring = &adapter->rx_ring[i];
3606
3607                 rc = check_missing_comp_in_tx_queue(adapter, tx_ring);
3608                 if (unlikely(rc != 0))
3609                         return;
3610
3611                 rc = check_for_rx_interrupt_queue(adapter, rx_ring);
3612                 if (unlikely(rc != 0))
3613                         return;
3614
3615                 budget--;
3616                 if (budget == 0) {
3617                         i++;
3618                         break;
3619                 }
3620         }
3621
3622         adapter->next_monitored_tx_qid = i % adapter->num_queues;
3623 }
3624
3625 /* trigger rx cleanup after 2 consecutive detections */
3626 #define EMPTY_RX_REFILL 2
3627 /* For the rare case where the device runs out of Rx descriptors and the
3628  * msix handler failed to refill new Rx descriptors (due to a lack of memory
3629  * for example).
3630  * This case will lead to a deadlock:
3631  * The device won't send interrupts since all the new Rx packets will be dropped
3632  * The msix handler won't allocate new Rx descriptors so the device won't be
3633  * able to send new packets.
3634  *
3635  * When such a situation is detected - execute rx cleanup task in another thread
3636  */
3637 static void
3638 check_for_empty_rx_ring(struct ena_adapter *adapter)
3639 {
3640         struct ena_ring *rx_ring;
3641         int i, refill_required;
3642
3643         if (!adapter->up)
3644                 return;
3645
3646         if (adapter->trigger_reset)
3647                 return;
3648
3649         for (i = 0; i < adapter->num_queues; i++) {
3650                 rx_ring = &adapter->rx_ring[i];
3651
3652                 refill_required = ena_com_free_desc(rx_ring->ena_com_io_sq);
3653                 if (unlikely(refill_required == (rx_ring->ring_size - 1))) {
3654                         rx_ring->empty_rx_queue++;
3655
3656                         if (rx_ring->empty_rx_queue >= EMPTY_RX_REFILL) {
3657                                 counter_u64_add(rx_ring->rx_stats.empty_rx_ring,
3658                                     1);
3659
3660                                 device_printf(adapter->pdev,
3661                                     "trigger refill for ring %d\n", i);
3662
3663                                 taskqueue_enqueue(rx_ring->que->cleanup_tq,
3664                                     &rx_ring->que->cleanup_task);
3665                                 rx_ring->empty_rx_queue = 0;
3666                         }
3667                 } else {
3668                         rx_ring->empty_rx_queue = 0;
3669                 }
3670         }
3671 }
3672
3673 static void ena_update_hints(struct ena_adapter *adapter,
3674                              struct ena_admin_ena_hw_hints *hints)
3675 {
3676         struct ena_com_dev *ena_dev = adapter->ena_dev;
3677
3678         if (hints->admin_completion_tx_timeout)
3679                 ena_dev->admin_queue.completion_timeout =
3680                     hints->admin_completion_tx_timeout * 1000;
3681
3682         if (hints->mmio_read_timeout)
3683                 /* convert to usec */
3684                 ena_dev->mmio_read.reg_read_to =
3685                     hints->mmio_read_timeout * 1000;
3686
3687         if (hints->missed_tx_completion_count_threshold_to_reset)
3688                 adapter->missing_tx_threshold =
3689                     hints->missed_tx_completion_count_threshold_to_reset;
3690
3691         if (hints->missing_tx_completion_timeout) {
3692                 if (hints->missing_tx_completion_timeout ==
3693                      ENA_HW_HINTS_NO_TIMEOUT)
3694                         adapter->missing_tx_timeout = ENA_HW_HINTS_NO_TIMEOUT;
3695                 else
3696                         adapter->missing_tx_timeout =
3697                             SBT_1MS * hints->missing_tx_completion_timeout;
3698         }
3699
3700         if (hints->driver_watchdog_timeout) {
3701                 if (hints->driver_watchdog_timeout == ENA_HW_HINTS_NO_TIMEOUT)
3702                         adapter->keep_alive_timeout = ENA_HW_HINTS_NO_TIMEOUT;
3703                 else
3704                         adapter->keep_alive_timeout =
3705                             SBT_1MS * hints->driver_watchdog_timeout;
3706         }
3707 }
3708
3709 static void
3710 ena_timer_service(void *data)
3711 {
3712         struct ena_adapter *adapter = (struct ena_adapter *)data;
3713         struct ena_admin_host_info *host_info =
3714             adapter->ena_dev->host_attr.host_info;
3715
3716         check_for_missing_keep_alive(adapter);
3717
3718         check_for_admin_com_state(adapter);
3719
3720         check_for_missing_completions(adapter);
3721
3722         check_for_empty_rx_ring(adapter);
3723
3724         if (host_info != NULL)
3725                 ena_update_host_info(host_info, adapter->ifp);
3726
3727         if (unlikely(adapter->trigger_reset)) {
3728                 device_printf(adapter->pdev, "Trigger reset is on\n");
3729                 taskqueue_enqueue(adapter->reset_tq, &adapter->reset_task);
3730                 return;
3731         }
3732
3733         /*
3734          * Schedule another timeout one second from now.
3735          */
3736         callout_schedule_sbt(&adapter->timer_service, SBT_1S, SBT_1S, 0);
3737 }
3738
3739 static void
3740 ena_reset_task(void *arg, int pending)
3741 {
3742         struct ena_com_dev_get_features_ctx get_feat_ctx;
3743         struct ena_adapter *adapter = (struct ena_adapter *)arg;
3744         struct ena_com_dev *ena_dev = adapter->ena_dev;
3745         bool dev_up;
3746         int rc;
3747
3748         if (unlikely(!adapter->trigger_reset)) {
3749                 device_printf(adapter->pdev,
3750                     "device reset scheduled but trigger_reset is off\n");
3751                 return;
3752         }
3753
3754         sx_xlock(&adapter->ioctl_sx);
3755
3756         callout_drain(&adapter->timer_service);
3757
3758         dev_up = adapter->up;
3759
3760         ena_com_set_admin_running_state(ena_dev, false);
3761         ena_down(adapter);
3762         ena_free_mgmnt_irq(adapter);
3763         ena_disable_msix(adapter);
3764         ena_com_abort_admin_commands(ena_dev);
3765         ena_com_wait_for_abort_completion(ena_dev);
3766         ena_com_admin_destroy(ena_dev);
3767         ena_com_mmio_reg_read_request_destroy(ena_dev);
3768
3769         adapter->reset_reason = ENA_REGS_RESET_NORMAL;
3770         adapter->trigger_reset = false;
3771
3772         /* Finished destroy part. Restart the device */
3773         rc = ena_device_init(adapter, adapter->pdev, &get_feat_ctx,
3774             &adapter->wd_active);
3775         if (unlikely(rc != 0)) {
3776                 device_printf(adapter->pdev,
3777                     "ENA device init failed! (err: %d)\n", rc);
3778                 goto err_dev_free;
3779         }
3780
3781         rc = ena_handle_updated_queues(adapter, &get_feat_ctx);
3782         if (unlikely(rc != 0))
3783                 goto err_dev_free;
3784
3785         rc = ena_enable_msix_and_set_admin_interrupts(adapter,
3786             adapter->num_queues);
3787         if (unlikely(rc != 0)) {
3788                 device_printf(adapter->pdev, "Enable MSI-X failed\n");
3789                 goto err_com_free;
3790         }
3791
3792         /* If the interface was up before the reset bring it up */
3793         if (dev_up) {
3794                 rc = ena_up(adapter);
3795                 if (unlikely(rc != 0)) {
3796                         device_printf(adapter->pdev,
3797                             "Failed to create I/O queues\n");
3798                         goto err_msix_free;
3799                 }
3800         }
3801
3802         callout_reset_sbt(&adapter->timer_service, SBT_1S, SBT_1S,
3803             ena_timer_service, (void *)adapter, 0);
3804
3805         sx_unlock(&adapter->ioctl_sx);
3806
3807         return;
3808
3809 err_msix_free:
3810         ena_free_mgmnt_irq(adapter);
3811         ena_disable_msix(adapter);
3812 err_com_free:
3813         ena_com_admin_destroy(ena_dev);
3814 err_dev_free:
3815         device_printf(adapter->pdev, "ENA reset failed!\n");
3816         adapter->running = false;
3817         sx_unlock(&adapter->ioctl_sx);
3818 }
3819
3820 /**
3821  * ena_attach - Device Initialization Routine
3822  * @pdev: device information struct
3823  *
3824  * Returns 0 on success, otherwise on failure.
3825  *
3826  * ena_attach initializes an adapter identified by a device structure.
3827  * The OS initialization, configuring of the adapter private structure,
3828  * and a hardware reset occur.
3829  **/
3830 static int
3831 ena_attach(device_t pdev)
3832 {
3833         struct ena_com_dev_get_features_ctx get_feat_ctx;
3834         struct ena_calc_queue_size_ctx calc_queue_ctx = { 0 };
3835         static int version_printed;
3836         struct ena_adapter *adapter;
3837         struct ena_com_dev *ena_dev = NULL;
3838         int io_queue_num;
3839         int rc;
3840         adapter = device_get_softc(pdev);
3841         adapter->pdev = pdev;
3842
3843         mtx_init(&adapter->global_mtx, "ENA global mtx", NULL, MTX_DEF);
3844         sx_init(&adapter->ioctl_sx, "ENA ioctl sx");
3845
3846         /* Set up the timer service */
3847         callout_init_mtx(&adapter->timer_service, &adapter->global_mtx, 0);
3848         adapter->keep_alive_timeout = DEFAULT_KEEP_ALIVE_TO;
3849         adapter->missing_tx_timeout = DEFAULT_TX_CMP_TO;
3850         adapter->missing_tx_max_queues = DEFAULT_TX_MONITORED_QUEUES;
3851         adapter->missing_tx_threshold = DEFAULT_TX_CMP_THRESHOLD;
3852
3853         if (version_printed++ == 0)
3854                 device_printf(pdev, "%s\n", ena_version);
3855
3856         rc = ena_allocate_pci_resources(adapter);
3857         if (unlikely(rc != 0)) {
3858                 device_printf(pdev, "PCI resource allocation failed!\n");
3859                 ena_free_pci_resources(adapter);
3860                 return (rc);
3861         }
3862
3863         /* Allocate memory for ena_dev structure */
3864         ena_dev = malloc(sizeof(struct ena_com_dev), M_DEVBUF,
3865             M_WAITOK | M_ZERO);
3866
3867         adapter->ena_dev = ena_dev;
3868         ena_dev->dmadev = pdev;
3869         ena_dev->bus = malloc(sizeof(struct ena_bus), M_DEVBUF,
3870             M_WAITOK | M_ZERO);
3871
3872         /* Store register resources */
3873         ((struct ena_bus*)(ena_dev->bus))->reg_bar_t =
3874             rman_get_bustag(adapter->registers);
3875         ((struct ena_bus*)(ena_dev->bus))->reg_bar_h =
3876             rman_get_bushandle(adapter->registers);
3877
3878         if (unlikely(((struct ena_bus*)(ena_dev->bus))->reg_bar_h == 0)) {
3879                 device_printf(pdev, "failed to pmap registers bar\n");
3880                 rc = ENXIO;
3881                 goto err_bus_free;
3882         }
3883
3884         ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST;
3885
3886         /* Device initialization */
3887         rc = ena_device_init(adapter, pdev, &get_feat_ctx, &adapter->wd_active);
3888         if (unlikely(rc != 0)) {
3889                 device_printf(pdev, "ENA device init failed! (err: %d)\n", rc);
3890                 rc = ENXIO;
3891                 goto err_bus_free;
3892         }
3893
3894         adapter->keep_alive_timestamp = getsbinuptime();
3895
3896         adapter->tx_offload_cap = get_feat_ctx.offload.tx;
3897
3898         /* Set for sure that interface is not up */
3899         adapter->up = false;
3900
3901         memcpy(adapter->mac_addr, get_feat_ctx.dev_attr.mac_addr,
3902             ETHER_ADDR_LEN);
3903
3904         calc_queue_ctx.ena_dev = ena_dev;
3905         calc_queue_ctx.get_feat_ctx = &get_feat_ctx;
3906         calc_queue_ctx.pdev = pdev;
3907
3908         /* calculate IO queue number to create */
3909         io_queue_num = ena_calc_io_queue_num(adapter, &get_feat_ctx);
3910
3911         ENA_ASSERT(io_queue_num > 0, "Invalid queue number: %d\n",
3912             io_queue_num);
3913         adapter->num_queues = io_queue_num;
3914
3915         adapter->max_mtu = get_feat_ctx.dev_attr.max_mtu;
3916         // Set the requested Rx ring size
3917         adapter->rx_ring_size = ENA_DEFAULT_RING_SIZE;
3918         /* calculatre ring sizes */
3919         rc = ena_calc_queue_size(adapter, &calc_queue_ctx);
3920         if (unlikely((rc != 0) || (io_queue_num <= 0))) {
3921                 rc = EFAULT;
3922                 goto err_com_free;
3923         }
3924
3925         adapter->reset_reason = ENA_REGS_RESET_NORMAL;
3926
3927         adapter->tx_ring_size = calc_queue_ctx.tx_queue_size;
3928         adapter->rx_ring_size = calc_queue_ctx.rx_queue_size;
3929
3930         adapter->max_tx_sgl_size = calc_queue_ctx.max_tx_sgl_size;
3931         adapter->max_rx_sgl_size = calc_queue_ctx.max_rx_sgl_size;
3932
3933         adapter->buf_ring_size = ENA_DEFAULT_BUF_RING_SIZE;
3934
3935         /* set up dma tags for rx and tx buffers */
3936         rc = ena_setup_tx_dma_tag(adapter);
3937         if (unlikely(rc != 0)) {
3938                 device_printf(pdev, "Failed to create TX DMA tag\n");
3939                 goto err_com_free;
3940         }
3941
3942         rc = ena_setup_rx_dma_tag(adapter);
3943         if (unlikely(rc != 0)) {
3944                 device_printf(pdev, "Failed to create RX DMA tag\n");
3945                 goto err_tx_tag_free;
3946         }
3947
3948         /* initialize rings basic information */
3949         device_printf(pdev,
3950             "Creating %d io queues. Rx queue size: %d, Tx queue size: %d\n",
3951             io_queue_num,
3952             calc_queue_ctx.rx_queue_size,
3953             calc_queue_ctx.tx_queue_size);
3954         ena_init_io_rings(adapter);
3955
3956         rc = ena_enable_msix_and_set_admin_interrupts(adapter, io_queue_num);
3957         if (unlikely(rc != 0)) {
3958                 device_printf(pdev,
3959                     "Failed to enable and set the admin interrupts\n");
3960                 goto err_io_free;
3961         }
3962
3963         /* setup network interface */
3964         rc = ena_setup_ifnet(pdev, adapter, &get_feat_ctx);
3965         if (unlikely(rc != 0)) {
3966                 device_printf(pdev, "Error with network interface setup\n");
3967                 goto err_msix_free;
3968         }
3969
3970         /* Initialize reset task queue */
3971         TASK_INIT(&adapter->reset_task, 0, ena_reset_task, adapter);
3972         adapter->reset_tq = taskqueue_create("ena_reset_enqueue",
3973             M_WAITOK | M_ZERO, taskqueue_thread_enqueue, &adapter->reset_tq);
3974         taskqueue_start_threads(&adapter->reset_tq, 1, PI_NET,
3975             "%s rstq", device_get_nameunit(adapter->pdev));
3976
3977         /* Initialize statistics */
3978         ena_alloc_counters((counter_u64_t *)&adapter->dev_stats,
3979             sizeof(struct ena_stats_dev));
3980         ena_alloc_counters((counter_u64_t *)&adapter->hw_stats,
3981             sizeof(struct ena_hw_stats));
3982         ena_sysctl_add_nodes(adapter);
3983
3984         /* Tell the stack that the interface is not active */
3985         if_setdrvflagbits(adapter->ifp, IFF_DRV_OACTIVE, IFF_DRV_RUNNING);
3986
3987         adapter->running = true;
3988         return (0);
3989
3990 err_msix_free:
3991         ena_com_dev_reset(adapter->ena_dev, ENA_REGS_RESET_INIT_ERR);
3992         ena_free_mgmnt_irq(adapter);
3993         ena_disable_msix(adapter);
3994 err_io_free:
3995         ena_free_all_io_rings_resources(adapter);
3996         ena_free_rx_dma_tag(adapter);
3997 err_tx_tag_free:
3998         ena_free_tx_dma_tag(adapter);
3999 err_com_free:
4000         ena_com_admin_destroy(ena_dev);
4001         ena_com_delete_host_info(ena_dev);
4002         ena_com_mmio_reg_read_request_destroy(ena_dev);
4003 err_bus_free:
4004         free(ena_dev->bus, M_DEVBUF);
4005         free(ena_dev, M_DEVBUF);
4006         ena_free_pci_resources(adapter);
4007
4008         return (rc);
4009 }
4010
4011 /**
4012  * ena_detach - Device Removal Routine
4013  * @pdev: device information struct
4014  *
4015  * ena_detach is called by the device subsystem to alert the driver
4016  * that it should release a PCI device.
4017  **/
4018 static int
4019 ena_detach(device_t pdev)
4020 {
4021         struct ena_adapter *adapter = device_get_softc(pdev);
4022         struct ena_com_dev *ena_dev = adapter->ena_dev;
4023         int rc;
4024
4025         /* Make sure VLANS are not using driver */
4026         if (adapter->ifp->if_vlantrunk != NULL) {
4027                 device_printf(adapter->pdev ,"VLAN is in use, detach first\n");
4028                 return (EBUSY);
4029         }
4030
4031         ether_ifdetach(adapter->ifp);
4032
4033         /* Free reset task and callout */
4034         callout_drain(&adapter->timer_service);
4035         while (taskqueue_cancel(adapter->reset_tq, &adapter->reset_task, NULL))
4036                 taskqueue_drain(adapter->reset_tq, &adapter->reset_task);
4037         taskqueue_free(adapter->reset_tq);
4038
4039         sx_xlock(&adapter->ioctl_sx);
4040         ena_down(adapter);
4041         sx_unlock(&adapter->ioctl_sx);
4042
4043         ena_free_all_io_rings_resources(adapter);
4044
4045         ena_free_counters((counter_u64_t *)&adapter->hw_stats,
4046             sizeof(struct ena_hw_stats));
4047         ena_free_counters((counter_u64_t *)&adapter->dev_stats,
4048             sizeof(struct ena_stats_dev));
4049
4050         if (likely(adapter->rss_support))
4051                 ena_com_rss_destroy(ena_dev);
4052
4053         rc = ena_free_rx_dma_tag(adapter);
4054         if (unlikely(rc != 0))
4055                 device_printf(adapter->pdev,
4056                     "Unmapped RX DMA tag associations\n");
4057
4058         rc = ena_free_tx_dma_tag(adapter);
4059         if (unlikely(rc != 0))
4060                 device_printf(adapter->pdev,
4061                     "Unmapped TX DMA tag associations\n");
4062
4063         /* Reset the device only if the device is running. */
4064         if (adapter->running)
4065                 ena_com_dev_reset(ena_dev, adapter->reset_reason);
4066
4067         ena_com_delete_host_info(ena_dev);
4068
4069         ena_free_irqs(adapter);
4070
4071         ena_com_abort_admin_commands(ena_dev);
4072
4073         ena_com_wait_for_abort_completion(ena_dev);
4074
4075         ena_com_admin_destroy(ena_dev);
4076
4077         ena_com_mmio_reg_read_request_destroy(ena_dev);
4078
4079         ena_free_pci_resources(adapter);
4080
4081         mtx_destroy(&adapter->global_mtx);
4082         sx_destroy(&adapter->ioctl_sx);
4083
4084         if_free(adapter->ifp);
4085
4086         if (ena_dev->bus != NULL)
4087                 free(ena_dev->bus, M_DEVBUF);
4088
4089         if (ena_dev != NULL)
4090                 free(ena_dev, M_DEVBUF);
4091
4092         return (bus_generic_detach(pdev));
4093 }
4094
4095 /******************************************************************************
4096  ******************************** AENQ Handlers *******************************
4097  *****************************************************************************/
4098 /**
4099  * ena_update_on_link_change:
4100  * Notify the network interface about the change in link status
4101  **/
4102 static void
4103 ena_update_on_link_change(void *adapter_data,
4104     struct ena_admin_aenq_entry *aenq_e)
4105 {
4106         struct ena_adapter *adapter = (struct ena_adapter *)adapter_data;
4107         struct ena_admin_aenq_link_change_desc *aenq_desc;
4108         int status;
4109         if_t ifp;
4110
4111         aenq_desc = (struct ena_admin_aenq_link_change_desc *)aenq_e;
4112         ifp = adapter->ifp;
4113         status = aenq_desc->flags &
4114             ENA_ADMIN_AENQ_LINK_CHANGE_DESC_LINK_STATUS_MASK;
4115
4116         if (status != 0) {
4117                 device_printf(adapter->pdev, "link is UP\n");
4118                 if_link_state_change(ifp, LINK_STATE_UP);
4119         } else if (status == 0) {
4120                 device_printf(adapter->pdev, "link is DOWN\n");
4121                 if_link_state_change(ifp, LINK_STATE_DOWN);
4122         } else {
4123                 device_printf(adapter->pdev, "invalid value recvd\n");
4124                 BUG();
4125         }
4126
4127         adapter->link_status = status;
4128 }
4129
4130 static void ena_notification(void *adapter_data,
4131     struct ena_admin_aenq_entry *aenq_e)
4132 {
4133         struct ena_adapter *adapter = (struct ena_adapter *)adapter_data;
4134         struct ena_admin_ena_hw_hints *hints;
4135
4136         ENA_WARN(aenq_e->aenq_common_desc.group != ENA_ADMIN_NOTIFICATION,
4137             "Invalid group(%x) expected %x\n",  aenq_e->aenq_common_desc.group,
4138             ENA_ADMIN_NOTIFICATION);
4139
4140         switch (aenq_e->aenq_common_desc.syndrom) {
4141         case ENA_ADMIN_UPDATE_HINTS:
4142                 hints =
4143                     (struct ena_admin_ena_hw_hints *)(&aenq_e->inline_data_w4);
4144                 ena_update_hints(adapter, hints);
4145                 break;
4146         default:
4147                 device_printf(adapter->pdev,
4148                     "Invalid aenq notification link state %d\n",
4149                     aenq_e->aenq_common_desc.syndrom);
4150         }
4151 }
4152
4153 /**
4154  * This handler will called for unknown event group or unimplemented handlers
4155  **/
4156 static void
4157 unimplemented_aenq_handler(void *adapter_data,
4158     struct ena_admin_aenq_entry *aenq_e)
4159 {
4160         struct ena_adapter *adapter = (struct ena_adapter *)adapter_data;
4161
4162         device_printf(adapter->pdev,
4163             "Unknown event was received or event with unimplemented handler\n");
4164 }
4165
4166 static struct ena_aenq_handlers aenq_handlers = {
4167     .handlers = {
4168             [ENA_ADMIN_LINK_CHANGE] = ena_update_on_link_change,
4169             [ENA_ADMIN_NOTIFICATION] = ena_notification,
4170             [ENA_ADMIN_KEEP_ALIVE] = ena_keep_alive_wd,
4171     },
4172     .unimplemented_handler = unimplemented_aenq_handler
4173 };
4174
4175 /*********************************************************************
4176  *  FreeBSD Device Interface Entry Points
4177  *********************************************************************/
4178
4179 static device_method_t ena_methods[] = {
4180     /* Device interface */
4181     DEVMETHOD(device_probe, ena_probe),
4182     DEVMETHOD(device_attach, ena_attach),
4183     DEVMETHOD(device_detach, ena_detach),
4184     DEVMETHOD_END
4185 };
4186
4187 static driver_t ena_driver = {
4188     "ena", ena_methods, sizeof(struct ena_adapter),
4189 };
4190
4191 devclass_t ena_devclass;
4192 DRIVER_MODULE(ena, pci, ena_driver, ena_devclass, 0, 0);
4193 MODULE_PNP_INFO("U16:vendor;U16:device", pci, ena, ena_vendor_info_array,
4194     nitems(ena_vendor_info_array) - 1);
4195 MODULE_DEPEND(ena, pci, 1, 1, 1);
4196 MODULE_DEPEND(ena, ether, 1, 1, 1);
4197
4198 /*********************************************************************/