2 * Copyright (c) 1994 Herb Peyerl <hpeyerl@novatel.ca>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. All advertising materials mentioning features or use of this software
14 * must display the following acknowledgement:
15 * This product includes software developed by Herb Peyerl.
16 * 4. The name of Herb Peyerl may not be used to endorse or promote products
17 * derived from this software without specific prior written permission.
19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
20 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
21 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
22 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
23 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
24 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
25 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
26 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
28 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 #include <sys/cdefs.h>
32 __FBSDID("$FreeBSD$");
35 * Modified from the FreeBSD 1.1.5.1 version by:
37 * INRIA - Sophia Antipolis, France
38 * avega@sophia.inria.fr
42 * Promiscuous mode added and interrupt logic slightly changed
43 * to reduce the number of adapter failures. Transceiver select
44 * logic changed to use value from EEPROM. Autoconfiguration
48 * Chelindbank (Chelyabinsk, Russia)
49 * babkin@hq.icb.chel.su
53 * Pccard support for 3C589 by:
59 * MAINTAINER: Matthew N. Dodd <winter@jurai.net>
63 #include <sys/param.h>
64 #include <sys/systm.h>
66 #include <sys/socket.h>
67 #include <sys/sockio.h>
70 #include <machine/bus.h>
71 #include <machine/resource.h>
75 #include <net/if_arp.h>
76 #include <net/if_media.h>
77 #include <net/ethernet.h>
80 #include <dev/ep/if_epreg.h>
81 #include <dev/ep/if_epvar.h>
83 /* Exported variables */
84 devclass_t ep_devclass;
86 static int ep_media2if_media[] =
87 {IFM_10_T, IFM_10_5, IFM_NONE, IFM_10_2, IFM_NONE};
90 static void epinit(void *);
91 static int epioctl(struct ifnet *, u_long, caddr_t);
92 static void epstart(struct ifnet *);
93 static void epwatchdog(struct ifnet *);
95 static void epstart_locked(struct ifnet *);
96 static void epinit_locked(struct ep_softc *);
98 /* if_media functions */
99 static int ep_ifmedia_upd(struct ifnet *);
100 static void ep_ifmedia_sts(struct ifnet *, struct ifmediareq *);
102 static void epstop(struct ep_softc *);
103 static void epread(struct ep_softc *);
104 static int eeprom_rdy(struct ep_softc *);
106 #define EP_FTST(sc, f) (sc->stat & (f))
107 #define EP_FSET(sc, f) (sc->stat |= (f))
108 #define EP_FRST(sc, f) (sc->stat &= ~(f))
111 eeprom_rdy(struct ep_softc *sc)
115 for (i = 0; is_eeprom_busy(sc) && i < MAX_EEPROMBUSY; i++)
118 if (i >= MAX_EEPROMBUSY) {
119 printf("ep%d: eeprom failed to come ready.\n", sc->unit);
127 * get_e: gets a 16 bits word from the EEPROM. we must have set the window
131 get_e(struct ep_softc *sc, uint16_t offset, uint16_t *result)
137 CSR_WRITE_2(sc, EP_W0_EEPROM_COMMAND,
138 (EEPROM_CMD_RD << sc->epb.cmd_off) | offset);
143 (*result) = CSR_READ_2(sc, EP_W0_EEPROM_DATA);
149 ep_get_macaddr(struct ep_softc *sc, u_char *addr)
156 macaddr = (uint16_t *) addr;
159 for (i = EEPROM_NODE_ADDR_0; i <= EEPROM_NODE_ADDR_2; i++) {
160 error = get_e(sc, i, &result);
163 macaddr[i] = htons(result);
170 ep_alloc(device_t dev)
172 struct ep_softc *sc = device_get_softc(dev);
178 sc->iobase = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &rid,
181 device_printf(dev, "No I/O space?!\n");
186 sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE);
188 device_printf(dev, "No irq?!\n");
193 sc->unit = device_get_unit(dev);
194 sc->stat = 0; /* 16 bit access */
196 sc->bst = rman_get_bustag(sc->iobase);
197 sc->bsh = rman_get_bushandle(sc->iobase);
199 sc->ep_connectors = 0;
200 sc->ep_connector = 0;
205 error = get_e(sc, EEPROM_PROD_ID, &result);
208 sc->epb.prod_id = result;
210 error = get_e(sc, EEPROM_RESOURCE_CFG, &result);
213 sc->epb.res_cfg = result;
222 ep_get_media(struct ep_softc *sc)
227 config = CSR_READ_2(sc, EP_W0_CONFIG_CTRL);
229 sc->ep_connectors |= AUI;
231 sc->ep_connectors |= BNC;
233 sc->ep_connectors |= UTP;
235 if (!(sc->ep_connectors & 7))
237 device_printf(sc->dev, "no connectors!\n");
240 * This works for most of the cards so we'll do it here.
241 * The cards that require something different can override
244 sc->ep_connector = CSR_READ_2(sc, EP_W0_ADDRESS_CFG) >> ACF_CONNECTOR_BITS;
248 ep_free(device_t dev)
250 struct ep_softc *sc = device_get_softc(dev);
253 bus_teardown_intr(dev, sc->irq, sc->ep_intrhand);
255 bus_release_resource(dev, SYS_RES_IOPORT, 0, sc->iobase);
257 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq);
261 ep_attach(struct ep_softc *sc)
263 struct ifnet *ifp = NULL;
264 struct ifmedia *ifm = NULL;
272 error = ep_get_macaddr(sc, (u_char *)&sc->arpcom.ac_enaddr);
274 device_printf(sc->dev, "Unable to get Ethernet address!\n");
279 * Setup the station address
281 p = (u_short *)&sc->arpcom.ac_enaddr;
283 for (i = 0; i < 3; i++)
284 CSR_WRITE_2(sc, EP_W2_ADDR_0 + (i * 2), ntohs(p[i]));
286 ifp = &sc->arpcom.ac_if;
287 attached = (ifp->if_softc != 0);
290 if_initname(ifp, device_get_name(sc->dev), device_get_unit(sc->dev));
291 ifp->if_mtu = ETHERMTU;
292 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
293 ifp->if_start = epstart;
294 ifp->if_ioctl = epioctl;
295 ifp->if_watchdog = epwatchdog;
296 ifp->if_init = epinit;
297 ifp->if_snd.ifq_maxlen = IFQ_MAXLEN;
299 if (!sc->epb.mii_trans) {
300 ifmedia_init(&sc->ifmedia, 0, ep_ifmedia_upd, ep_ifmedia_sts);
302 if (sc->ep_connectors & AUI)
303 ifmedia_add(&sc->ifmedia,
304 IFM_ETHER | IFM_10_5, 0, NULL);
305 if (sc->ep_connectors & UTP)
306 ifmedia_add(&sc->ifmedia,
307 IFM_ETHER | IFM_10_T, 0, NULL);
308 if (sc->ep_connectors & BNC)
309 ifmedia_add(&sc->ifmedia,
310 IFM_ETHER | IFM_10_2, 0, NULL);
311 if (!sc->ep_connectors)
312 ifmedia_add(&sc->ifmedia,
313 IFM_ETHER | IFM_NONE, 0, NULL);
315 ifmedia_set(&sc->ifmedia,
316 IFM_ETHER | ep_media2if_media[sc->ep_connector]);
319 ifm->ifm_media = ifm->ifm_cur->ifm_media;
323 ether_ifattach(ifp, sc->arpcom.ac_enaddr);
325 #ifdef EP_LOCAL_STATS
326 sc->rx_no_first = sc->rx_no_mbuf = sc->rx_bpf_disc =
327 sc->rx_overrunf = sc->rx_overrunl = sc->tx_underrun = 0;
329 EP_FSET(sc, F_RX_FIRST);
330 sc->top = sc->mcur = 0;
338 ep_detach(device_t dev)
343 sc = device_get_softc(dev);
344 EP_ASSERT_UNLOCKED(sc);
345 ifp = &sc->arpcom.ac_if;
348 device_printf(dev, "already unloaded\n");
351 if (bus_child_present(dev))
354 ifp->if_flags &= ~IFF_RUNNING;
367 struct ep_softc *sc = xsc;
374 * The order in here seems important. Otherwise we may not receive
378 epinit_locked(struct ep_softc *sc)
380 struct ifnet *ifp = &sc->arpcom.ac_if;
386 EP_ASSERT_LOCKED(sc);
390 CSR_WRITE_2(sc, EP_COMMAND, STOP_TRANSCEIVER);
392 CSR_WRITE_2(sc, EP_W4_MEDIA_TYPE, DISABLE_UTP);
395 /* Disable the card */
396 CSR_WRITE_2(sc, EP_W0_CONFIG_CTRL, 0);
398 /* Enable the card */
399 CSR_WRITE_2(sc, EP_W0_CONFIG_CTRL, ENABLE_DRQ_IRQ);
403 /* Reload the ether_addr. */
404 for (i = 0; i < 6; i++)
405 CSR_WRITE_1(sc, EP_W2_ADDR_0 + i, sc->arpcom.ac_enaddr[i]);
407 CSR_WRITE_2(sc, EP_COMMAND, RX_RESET);
408 CSR_WRITE_2(sc, EP_COMMAND, TX_RESET);
411 /* Window 1 is operating window */
413 for (i = 0; i < 31; i++)
414 CSR_READ_1(sc, EP_W1_TX_STATUS);
416 /* get rid of stray intr's */
417 CSR_WRITE_2(sc, EP_COMMAND, ACK_INTR | 0xff);
419 CSR_WRITE_2(sc, EP_COMMAND, SET_RD_0_MASK | S_5_INTS);
421 CSR_WRITE_2(sc, EP_COMMAND, SET_INTR_MASK | S_5_INTS);
423 if (ifp->if_flags & IFF_PROMISC)
424 CSR_WRITE_2(sc, EP_COMMAND, SET_RX_FILTER | FIL_INDIVIDUAL |
425 FIL_MULTICAST | FIL_BRDCST | FIL_PROMISC);
427 CSR_WRITE_2(sc, EP_COMMAND, SET_RX_FILTER | FIL_INDIVIDUAL |
428 FIL_MULTICAST | FIL_BRDCST);
430 if (!sc->epb.mii_trans)
433 CSR_WRITE_2(sc, EP_COMMAND, RX_ENABLE);
434 CSR_WRITE_2(sc, EP_COMMAND, TX_ENABLE);
436 ifp->if_flags |= IFF_RUNNING;
437 ifp->if_flags &= ~IFF_OACTIVE; /* just in case */
439 #ifdef EP_LOCAL_STATS
440 sc->rx_no_first = sc->rx_no_mbuf =
441 sc->rx_overrunf = sc->rx_overrunl = sc->tx_underrun = 0;
443 EP_FSET(sc, F_RX_FIRST);
446 sc->top = sc->mcur = 0;
448 CSR_WRITE_2(sc, EP_COMMAND, SET_RX_EARLY_THRESH | RX_INIT_EARLY_THRESH);
449 CSR_WRITE_2(sc, EP_COMMAND, SET_TX_START_THRESH | 16);
452 * Store up a bunch of mbuf's for use later. (MAX_MBS).
453 * First we free up any that we had in case we're being
454 * called from intr or somewhere else.
462 epstart(struct ifnet *ifp)
472 epstart_locked(struct ifnet *ifp)
482 EP_ASSERT_LOCKED(sc);
484 if (ifp->if_flags & IFF_OACTIVE)
487 /* Sneak a peek at the next packet */
488 IF_DEQUEUE(&ifp->if_snd, m0);
491 for (len = 0, m = m0; m != NULL; m = m->m_next)
497 * The 3c509 automatically pads short packets to minimum
498 * ethernet length, but we drop packets that are too large.
499 * Perhaps we should truncate them instead?
501 if (len + pad > ETHER_MAX_LEN) {
502 /* packet is obviously too large: toss it */
507 if (CSR_READ_2(sc, EP_W1_FREE_TX) < len + pad + 4) {
508 /* no room in FIFO */
509 CSR_WRITE_2(sc, EP_COMMAND, SET_TX_AVAIL_THRESH | (len + pad + 4));
511 if (CSR_READ_2(sc, EP_W1_FREE_TX) < len + pad + 4) {
512 ifp->if_flags |= IFF_OACTIVE;
513 IF_PREPEND(&ifp->if_snd, m0);
517 CSR_WRITE_2(sc, EP_COMMAND,
518 SET_TX_AVAIL_THRESH | EP_THRESH_DISABLE);
520 /* XXX 4.x and earlier would splhigh here */
522 CSR_WRITE_2(sc, EP_W1_TX_PIO_WR_1, len);
523 /* Second dword meaningless */
524 CSR_WRITE_2(sc, EP_W1_TX_PIO_WR_1, 0x0);
526 if (EP_FTST(sc, F_ACCESS_32_BITS)) {
527 for (m = m0; m != NULL; m = m->m_next) {
529 CSR_WRITE_MULTI_4(sc, EP_W1_TX_PIO_WR_1,
530 mtod(m, uint32_t *), m->m_len / 4);
532 CSR_WRITE_MULTI_1(sc, EP_W1_TX_PIO_WR_1,
533 mtod(m, uint8_t *)+(m->m_len & (~3)),
537 for (m = m0; m != NULL; m = m->m_next) {
539 CSR_WRITE_MULTI_2(sc, EP_W1_TX_PIO_WR_1,
540 mtod(m, uint16_t *), m->m_len / 2);
542 CSR_WRITE_1(sc, EP_W1_TX_PIO_WR_1,
543 *(mtod(m, uint8_t *)+m->m_len - 1));
548 CSR_WRITE_1(sc, EP_W1_TX_PIO_WR_1, 0); /* Padding */
550 /* XXX and drop splhigh here */
559 * Is another packet coming in? We don't want to overflow
563 if (CSR_READ_2(sc, EP_W1_RX_STATUS) & RX_BYTES_MASK) {
565 * we check if we have packets left, in that case
566 * we prepare to come back later
568 if (ifp->if_snd.ifq_head)
569 CSR_WRITE_2(sc, EP_COMMAND, SET_TX_AVAIL_THRESH | 8);
584 sc = (struct ep_softc *) arg;
586 /* XXX 4.x splbio'd here to reduce interruptability */
589 * quick fix: Try to detect an interrupt when the card goes away.
591 if (sc->gone || CSR_READ_2(sc, EP_STATUS) == 0xffff) {
595 ifp = &sc->arpcom.ac_if;
597 CSR_WRITE_2(sc, EP_COMMAND, SET_INTR_MASK); /* disable all Ints */
601 while ((status = CSR_READ_2(sc, EP_STATUS)) & S_5_INTS) {
603 /* first acknowledge all interrupt sources */
604 CSR_WRITE_2(sc, EP_COMMAND, ACK_INTR | (status & S_MASK));
606 if (status & (S_RX_COMPLETE | S_RX_EARLY))
608 if (status & S_TX_AVAIL) {
611 ifp->if_flags &= ~IFF_OACTIVE;
613 CSR_READ_2(sc, EP_W1_FREE_TX);
616 if (status & S_CARD_FAILURE) {
618 #ifdef EP_LOCAL_STATS
619 printf("\nep%d:\n\tStatus: %x\n", sc->unit, status);
621 printf("\tFIFO Diagnostic: %x\n",
622 CSR_READ_2(sc, EP_W4_FIFO_DIAG));
623 printf("\tStat: %x\n", sc->stat);
624 printf("\tIpackets=%d, Opackets=%d\n",
625 ifp->if_ipackets, ifp->if_opackets);
626 printf("\tNOF=%d, NOMB=%d, RXOF=%d, RXOL=%d, TXU=%d\n",
627 sc->rx_no_first, sc->rx_no_mbuf, sc->rx_overrunf,
628 sc->rx_overrunl, sc->tx_underrun);
632 printf("ep%d: Status: %x (input buffer overflow)\n",
643 if (status & S_TX_COMPLETE) {
646 * We need ACK. We do it at the end.
648 * We need to read TX_STATUS until we get a
649 * 0 status in order to turn off the interrupt flag.
651 while ((status = CSR_READ_1(sc, EP_W1_TX_STATUS)) &
653 if (status & TXS_SUCCES_INTR_REQ)
656 (TXS_UNDERRUN | TXS_JABBER |
657 TXS_MAX_COLLISION)) {
658 CSR_WRITE_2(sc, EP_COMMAND, TX_RESET);
659 if (status & TXS_UNDERRUN) {
660 #ifdef EP_LOCAL_STATS
664 if (status & TXS_JABBER);
666 ++ifp->if_collisions;
673 CSR_WRITE_2(sc, EP_COMMAND, TX_ENABLE);
675 * To have a tx_avail_int but giving
676 * the chance to the Reception
678 if (ifp->if_snd.ifq_head)
679 CSR_WRITE_2(sc, EP_COMMAND,
680 SET_TX_AVAIL_THRESH | 8);
682 /* pops up the next status */
683 CSR_WRITE_1(sc, EP_W1_TX_STATUS, 0x0);
685 ifp->if_flags &= ~IFF_OACTIVE;
687 CSR_READ_2(sc, EP_W1_FREE_TX);
689 } /* end TX_COMPLETE */
692 CSR_WRITE_2(sc, EP_COMMAND, C_INTR_LATCH); /* ACK int Latch */
694 if ((status = CSR_READ_2(sc, EP_STATUS)) & S_5_INTS)
698 CSR_WRITE_2(sc, EP_COMMAND, SET_INTR_MASK | S_5_INTS);
703 epread(struct ep_softc *sc)
705 struct mbuf *top, *mcur, *m;
708 short rx_fifo2, status;
711 /* XXX Must be called with sc locked */
713 ifp = &sc->arpcom.ac_if;
714 status = CSR_READ_2(sc, EP_W1_RX_STATUS);
718 if (status & ERR_RX) {
720 if (status & ERR_RX_OVERRUN) {
722 * We can think the rx latency is actually
723 * greather than we expect
725 #ifdef EP_LOCAL_STATS
726 if (EP_FTST(sc, F_RX_FIRST))
734 rx_fifo = rx_fifo2 = status & RX_BYTES_MASK;
736 if (EP_FTST(sc, F_RX_FIRST)) {
737 MGETHDR(m, M_DONTWAIT, MT_DATA);
740 if (rx_fifo >= MINCLSIZE)
741 MCLGET(m, M_DONTWAIT);
742 sc->top = sc->mcur = top = m;
743 #define EROUND ((sizeof(struct ether_header) + 3) & ~3)
744 #define EOFF (EROUND - sizeof(struct ether_header))
747 /* Read what should be the header. */
748 CSR_READ_MULTI_2(sc, EP_W1_RX_PIO_RD_1,
749 mtod(top, uint16_t *), sizeof(struct ether_header) / 2);
750 top->m_len = sizeof(struct ether_header);
751 rx_fifo -= sizeof(struct ether_header);
752 sc->cur_len = rx_fifo2;
754 /* come here if we didn't have a complete packet last time */
757 sc->cur_len += rx_fifo2;
760 /* Reads what is left in the RX FIFO */
761 while (rx_fifo > 0) {
762 lenthisone = min(rx_fifo, M_TRAILINGSPACE(m));
763 if (lenthisone == 0) { /* no room in this one */
765 MGET(m, M_DONTWAIT, MT_DATA);
768 if (rx_fifo >= MINCLSIZE)
769 MCLGET(m, M_DONTWAIT);
772 lenthisone = min(rx_fifo, M_TRAILINGSPACE(m));
774 if (EP_FTST(sc, F_ACCESS_32_BITS)) {
775 /* default for EISA configured cards */
776 CSR_READ_MULTI_4(sc, EP_W1_RX_PIO_RD_1,
777 (uint32_t *)(mtod(m, caddr_t)+m->m_len),
779 m->m_len += (lenthisone & ~3);
781 CSR_READ_MULTI_1(sc, EP_W1_RX_PIO_RD_1,
782 mtod(m, caddr_t)+m->m_len, lenthisone & 3);
783 m->m_len += (lenthisone & 3);
785 CSR_READ_MULTI_2(sc, EP_W1_RX_PIO_RD_1,
786 (uint16_t *)(mtod(m, caddr_t)+m->m_len),
788 m->m_len += lenthisone;
790 *(mtod(m, caddr_t)+m->m_len - 1) =
791 CSR_READ_1(sc, EP_W1_RX_PIO_RD_1);
793 rx_fifo -= lenthisone;
796 if (status & ERR_RX_INCOMPLETE) {
797 /* we haven't received the complete packet */
799 #ifdef EP_LOCAL_STATS
800 /* to know how often we come here */
803 EP_FRST(sc, F_RX_FIRST);
804 status = CSR_READ_2(sc, EP_W1_RX_STATUS);
805 if (!status & ERR_RX_INCOMPLETE) {
807 * We see if by now, the packet has completly
812 CSR_WRITE_2(sc, EP_COMMAND,
813 SET_RX_EARLY_THRESH | RX_NEXT_EARLY_THRESH);
816 CSR_WRITE_2(sc, EP_COMMAND, RX_DISCARD_TOP_PACK);
818 EP_FSET(sc, F_RX_FIRST);
819 top->m_pkthdr.rcvif = &sc->arpcom.ac_if;
820 top->m_pkthdr.len = sc->cur_len;
823 * Drop locks before calling if_input() since it may re-enter
824 * ep_start() in the netisr case. This would result in a
825 * lock reversal. Better performance might be obtained by
826 * chaining all packets received, dropping the lock, and then
827 * calling if_input() on each one.
830 (*ifp->if_input) (ifp, top);
834 CSR_WRITE_2(sc, EP_COMMAND, SET_RX_EARLY_THRESH | RX_INIT_EARLY_THRESH);
838 CSR_WRITE_2(sc, EP_COMMAND, RX_DISCARD_TOP_PACK);
842 #ifdef EP_LOCAL_STATS
846 EP_FSET(sc, F_RX_FIRST);
848 CSR_WRITE_2(sc, EP_COMMAND, SET_RX_EARLY_THRESH | RX_INIT_EARLY_THRESH);
852 ep_ifmedia_upd(struct ifnet *ifp)
854 struct ep_softc *sc = ifp->if_softc;
858 CSR_WRITE_2(sc, EP_COMMAND, STOP_TRANSCEIVER);
860 CSR_WRITE_2(sc, EP_W4_MEDIA_TYPE, DISABLE_UTP);
863 switch (IFM_SUBTYPE(sc->ifmedia.ifm_media)) {
865 if (sc->ep_connectors & UTP) {
866 i = ACF_CONNECTOR_UTP;
868 CSR_WRITE_2(sc, EP_W4_MEDIA_TYPE, ENABLE_UTP);
872 if (sc->ep_connectors & BNC) {
873 i = ACF_CONNECTOR_BNC;
874 CSR_WRITE_2(sc, EP_COMMAND, START_TRANSCEIVER);
875 DELAY(DELAY_MULTIPLE * 1000);
879 if (sc->ep_connectors & AUI)
880 i = ACF_CONNECTOR_AUI;
883 i = sc->ep_connector;
884 device_printf(sc->dev,
885 "strange connector type in EEPROM: assuming AUI\n");
889 j = CSR_READ_2(sc, EP_W0_ADDRESS_CFG) & 0x3fff;
890 CSR_WRITE_2(sc, EP_W0_ADDRESS_CFG, j | (i << ACF_CONNECTOR_BITS));
896 ep_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
898 struct ep_softc *sc = ifp->if_softc;
900 ifmr->ifm_active = sc->ifmedia.ifm_media;
904 epioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
906 struct ep_softc *sc = ifp->if_softc;
907 struct ifreq *ifr = (struct ifreq *) data;
913 if (((ifp->if_flags & IFF_UP) == 0) &&
914 (ifp->if_flags & IFF_RUNNING)) {
915 ifp->if_flags &= ~IFF_RUNNING;
918 /* reinitialize card on any parameter change */
924 bcopy((caddr_t)sc->sc_addr, (caddr_t)&ifr->ifr_data,
925 sizeof(sc->sc_addr));
931 * The Etherlink III has no programmable multicast
932 * filter. We always initialize the card to be
933 * promiscuous to multicast, since we're always a
934 * member of the ALL-SYSTEMS group, so there's no
935 * need to process SIOC*MULTI requests.
941 if (!sc->epb.mii_trans)
942 error = ifmedia_ioctl(ifp, ifr, &sc->ifmedia, cmd);
947 error = ether_ioctl(ifp, cmd, data);
954 epwatchdog(struct ifnet *ifp)
956 struct ep_softc *sc = ifp->if_softc;
960 ifp->if_flags &= ~IFF_OACTIVE;
962 ep_intr(ifp->if_softc);
966 epstop(struct ep_softc *sc)
970 CSR_WRITE_2(sc, EP_COMMAND, RX_DISABLE);
971 CSR_WRITE_2(sc, EP_COMMAND, RX_DISCARD_TOP_PACK);
974 CSR_WRITE_2(sc, EP_COMMAND, TX_DISABLE);
975 CSR_WRITE_2(sc, EP_COMMAND, STOP_TRANSCEIVER);
978 CSR_WRITE_2(sc, EP_COMMAND, RX_RESET);
980 CSR_WRITE_2(sc, EP_COMMAND, TX_RESET);
983 CSR_WRITE_2(sc, EP_COMMAND, C_INTR_LATCH);
984 CSR_WRITE_2(sc, EP_COMMAND, SET_RD_0_MASK);
985 CSR_WRITE_2(sc, EP_COMMAND, SET_INTR_MASK);
986 CSR_WRITE_2(sc, EP_COMMAND, SET_RX_FILTER);