2 * Copyright (c) 1994 Herb Peyerl <hpeyerl@novatel.ca>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. All advertising materials mentioning features or use of this software
14 * must display the following acknowledgement:
15 * This product includes software developed by Herb Peyerl.
16 * 4. The name of Herb Peyerl may not be used to endorse or promote products
17 * derived from this software without specific prior written permission.
19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
20 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
21 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
22 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
23 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
24 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
25 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
26 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
28 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 #include <sys/cdefs.h>
32 __FBSDID("$FreeBSD$");
35 * Modified from the FreeBSD 1.1.5.1 version by:
37 * INRIA - Sophia Antipolis, France
38 * avega@sophia.inria.fr
42 * Promiscuous mode added and interrupt logic slightly changed
43 * to reduce the number of adapter failures. Transceiver select
44 * logic changed to use value from EEPROM. Autoconfiguration
48 * Chelindbank (Chelyabinsk, Russia)
49 * babkin@hq.icb.chel.su
53 * Pccard support for 3C589 by:
59 * MAINTAINER: Matthew N. Dodd <winter@jurai.net>
63 #include <sys/param.h>
64 #include <sys/systm.h>
66 #include <sys/socket.h>
67 #include <sys/sockio.h>
70 #include <machine/bus.h>
71 #include <machine/resource.h>
75 #include <net/if_dl.h>
76 #include <net/if_media.h>
77 #include <net/if_types.h>
78 #include <net/ethernet.h>
81 #include <dev/ep/if_epreg.h>
82 #include <dev/ep/if_epvar.h>
84 /* Exported variables */
85 devclass_t ep_devclass;
87 static int ep_media2if_media[] =
88 {IFM_10_T, IFM_10_5, IFM_NONE, IFM_10_2, IFM_NONE};
91 static void epinit(void *);
92 static int epioctl(struct ifnet *, u_long, caddr_t);
93 static void epstart(struct ifnet *);
94 static void epwatchdog(struct ifnet *);
96 static void epstart_locked(struct ifnet *);
97 static void epinit_locked(struct ep_softc *);
99 /* if_media functions */
100 static int ep_ifmedia_upd(struct ifnet *);
101 static void ep_ifmedia_sts(struct ifnet *, struct ifmediareq *);
103 static void epstop(struct ep_softc *);
104 static void epread(struct ep_softc *);
105 static int eeprom_rdy(struct ep_softc *);
107 #define EP_FTST(sc, f) (sc->stat & (f))
108 #define EP_FSET(sc, f) (sc->stat |= (f))
109 #define EP_FRST(sc, f) (sc->stat &= ~(f))
112 eeprom_rdy(struct ep_softc *sc)
116 for (i = 0; is_eeprom_busy(sc) && i < MAX_EEPROMBUSY; i++)
119 if (i >= MAX_EEPROMBUSY) {
120 device_printf(sc->dev, "eeprom failed to come ready.\n");
128 * get_e: gets a 16 bits word from the EEPROM. we must have set the window
132 ep_get_e(struct ep_softc *sc, uint16_t offset, uint16_t *result)
138 CSR_WRITE_2(sc, EP_W0_EEPROM_COMMAND,
139 (EEPROM_CMD_RD << sc->epb.cmd_off) | offset);
144 (*result) = CSR_READ_2(sc, EP_W0_EEPROM_DATA);
150 ep_get_macaddr(struct ep_softc *sc, u_char *addr)
157 macaddr = (uint16_t *) addr;
160 for (i = EEPROM_NODE_ADDR_0; i <= EEPROM_NODE_ADDR_2; i++) {
161 error = ep_get_e(sc, i, &result);
164 macaddr[i] = htons(result);
170 ep_alloc(device_t dev)
172 struct ep_softc *sc = device_get_softc(dev);
178 sc->iobase = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &rid,
181 device_printf(dev, "No I/O space?!\n");
186 sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE);
188 device_printf(dev, "No irq?!\n");
193 sc->stat = 0; /* 16 bit access */
195 sc->bst = rman_get_bustag(sc->iobase);
196 sc->bsh = rman_get_bushandle(sc->iobase);
198 sc->ep_connectors = 0;
199 sc->ep_connector = 0;
203 error = ep_get_e(sc, EEPROM_PROD_ID, &result);
206 sc->epb.prod_id = result;
208 error = ep_get_e(sc, EEPROM_RESOURCE_CFG, &result);
211 sc->epb.res_cfg = result;
220 ep_get_media(struct ep_softc *sc)
225 config = CSR_READ_2(sc, EP_W0_CONFIG_CTRL);
227 sc->ep_connectors |= AUI;
229 sc->ep_connectors |= BNC;
231 sc->ep_connectors |= UTP;
233 if (!(sc->ep_connectors & 7))
235 device_printf(sc->dev, "no connectors!\n");
238 * This works for most of the cards so we'll do it here.
239 * The cards that require something different can override
242 sc->ep_connector = CSR_READ_2(sc, EP_W0_ADDRESS_CFG) >> ACF_CONNECTOR_BITS;
246 ep_free(device_t dev)
248 struct ep_softc *sc = device_get_softc(dev);
251 bus_teardown_intr(dev, sc->irq, sc->ep_intrhand);
253 bus_release_resource(dev, SYS_RES_IOPORT, 0, sc->iobase);
255 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq);
262 ep_setup_station(struct ep_softc *sc, u_char *enaddr)
267 * Setup the station address
270 for (i = 0; i < ETHER_ADDR_LEN; i++)
271 CSR_WRITE_1(sc, EP_W2_ADDR_0 + i, enaddr[i]);
275 ep_attach(struct ep_softc *sc)
277 struct ifnet *ifp = NULL;
278 struct ifmedia *ifm = NULL;
283 if (! (sc->stat & F_ENADDR_SKIP)) {
284 error = ep_get_macaddr(sc, sc->eaddr);
286 device_printf(sc->dev, "Unable to get MAC address!\n");
291 ep_setup_station(sc, sc->eaddr);
292 ifp = sc->ifp = if_alloc(IFT_ETHER);
294 device_printf(sc->dev, "if_alloc() failed\n");
300 if_initname(ifp, device_get_name(sc->dev), device_get_unit(sc->dev));
301 ifp->if_mtu = ETHERMTU;
302 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
303 ifp->if_start = epstart;
304 ifp->if_ioctl = epioctl;
305 ifp->if_watchdog = epwatchdog;
306 ifp->if_init = epinit;
307 ifp->if_snd.ifq_maxlen = IFQ_MAXLEN;
309 if (!sc->epb.mii_trans) {
310 ifmedia_init(&sc->ifmedia, 0, ep_ifmedia_upd, ep_ifmedia_sts);
312 if (sc->ep_connectors & AUI)
313 ifmedia_add(&sc->ifmedia,
314 IFM_ETHER | IFM_10_5, 0, NULL);
315 if (sc->ep_connectors & UTP)
316 ifmedia_add(&sc->ifmedia,
317 IFM_ETHER | IFM_10_T, 0, NULL);
318 if (sc->ep_connectors & BNC)
319 ifmedia_add(&sc->ifmedia,
320 IFM_ETHER | IFM_10_2, 0, NULL);
321 if (!sc->ep_connectors)
322 ifmedia_add(&sc->ifmedia,
323 IFM_ETHER | IFM_NONE, 0, NULL);
325 ifmedia_set(&sc->ifmedia,
326 IFM_ETHER | ep_media2if_media[sc->ep_connector]);
329 ifm->ifm_media = ifm->ifm_cur->ifm_media;
332 ether_ifattach(ifp, sc->eaddr);
334 #ifdef EP_LOCAL_STATS
335 sc->rx_no_first = sc->rx_no_mbuf = sc->rx_bpf_disc =
336 sc->rx_overrunf = sc->rx_overrunl = sc->tx_underrun = 0;
338 EP_FSET(sc, F_RX_FIRST);
339 sc->top = sc->mcur = 0;
347 ep_detach(device_t dev)
352 sc = device_get_softc(dev);
354 EP_ASSERT_UNLOCKED(sc);
356 if (bus_child_present(dev))
359 ifp->if_drv_flags &= ~IFF_DRV_RUNNING;
373 struct ep_softc *sc = xsc;
380 * The order in here seems important. Otherwise we may not receive
384 epinit_locked(struct ep_softc *sc)
386 struct ifnet *ifp = sc->ifp;
392 EP_ASSERT_LOCKED(sc);
396 CSR_WRITE_2(sc, EP_COMMAND, STOP_TRANSCEIVER);
398 CSR_WRITE_2(sc, EP_W4_MEDIA_TYPE, DISABLE_UTP);
401 /* Disable the card */
402 CSR_WRITE_2(sc, EP_W0_CONFIG_CTRL, 0);
404 /* Enable the card */
405 CSR_WRITE_2(sc, EP_W0_CONFIG_CTRL, ENABLE_DRQ_IRQ);
408 /* Reload the ether_addr. */
409 ep_setup_station(sc, IF_LLADDR(sc->ifp));
411 CSR_WRITE_2(sc, EP_COMMAND, RX_RESET);
412 CSR_WRITE_2(sc, EP_COMMAND, TX_RESET);
415 /* Window 1 is operating window */
417 for (i = 0; i < 31; i++)
418 CSR_READ_1(sc, EP_W1_TX_STATUS);
420 /* get rid of stray intr's */
421 CSR_WRITE_2(sc, EP_COMMAND, ACK_INTR | 0xff);
423 CSR_WRITE_2(sc, EP_COMMAND, SET_RD_0_MASK | S_5_INTS);
424 CSR_WRITE_2(sc, EP_COMMAND, SET_INTR_MASK | S_5_INTS);
426 if (ifp->if_flags & IFF_PROMISC)
427 CSR_WRITE_2(sc, EP_COMMAND, SET_RX_FILTER | FIL_INDIVIDUAL |
428 FIL_MULTICAST | FIL_BRDCST | FIL_PROMISC);
430 CSR_WRITE_2(sc, EP_COMMAND, SET_RX_FILTER | FIL_INDIVIDUAL |
431 FIL_MULTICAST | FIL_BRDCST);
433 if (!sc->epb.mii_trans)
436 CSR_WRITE_2(sc, EP_COMMAND, RX_ENABLE);
437 CSR_WRITE_2(sc, EP_COMMAND, TX_ENABLE);
439 ifp->if_drv_flags |= IFF_DRV_RUNNING;
440 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; /* just in case */
442 #ifdef EP_LOCAL_STATS
443 sc->rx_no_first = sc->rx_no_mbuf =
444 sc->rx_overrunf = sc->rx_overrunl = sc->tx_underrun = 0;
446 EP_FSET(sc, F_RX_FIRST);
449 sc->top = sc->mcur = 0;
451 CSR_WRITE_2(sc, EP_COMMAND, SET_RX_EARLY_THRESH | RX_INIT_EARLY_THRESH);
452 CSR_WRITE_2(sc, EP_COMMAND, SET_TX_START_THRESH | 16);
459 epstart(struct ifnet *ifp)
469 epstart_locked(struct ifnet *ifp)
479 EP_ASSERT_LOCKED(sc);
481 if (ifp->if_drv_flags & IFF_DRV_OACTIVE)
484 /* Sneak a peek at the next packet */
485 IF_DEQUEUE(&ifp->if_snd, m0);
488 for (len = 0, m = m0; m != NULL; m = m->m_next)
494 * The 3c509 automatically pads short packets to minimum
495 * ethernet length, but we drop packets that are too large.
496 * Perhaps we should truncate them instead?
498 if (len + pad > ETHER_MAX_LEN) {
499 /* packet is obviously too large: toss it */
504 if (CSR_READ_2(sc, EP_W1_FREE_TX) < len + pad + 4) {
505 /* no room in FIFO */
506 CSR_WRITE_2(sc, EP_COMMAND, SET_TX_AVAIL_THRESH | (len + pad + 4));
508 if (CSR_READ_2(sc, EP_W1_FREE_TX) < len + pad + 4) {
509 ifp->if_drv_flags |= IFF_DRV_OACTIVE;
510 IF_PREPEND(&ifp->if_snd, m0);
514 CSR_WRITE_2(sc, EP_COMMAND,
515 SET_TX_AVAIL_THRESH | EP_THRESH_DISABLE);
517 /* XXX 4.x and earlier would splhigh here */
519 CSR_WRITE_2(sc, EP_W1_TX_PIO_WR_1, len);
520 /* Second dword meaningless */
521 CSR_WRITE_2(sc, EP_W1_TX_PIO_WR_1, 0x0);
523 if (EP_FTST(sc, F_ACCESS_32_BITS)) {
524 for (m = m0; m != NULL; m = m->m_next) {
526 CSR_WRITE_MULTI_4(sc, EP_W1_TX_PIO_WR_1,
527 mtod(m, uint32_t *), m->m_len / 4);
529 CSR_WRITE_MULTI_1(sc, EP_W1_TX_PIO_WR_1,
530 mtod(m, uint8_t *)+(m->m_len & (~3)),
534 for (m = m0; m != NULL; m = m->m_next) {
536 CSR_WRITE_MULTI_2(sc, EP_W1_TX_PIO_WR_1,
537 mtod(m, uint16_t *), m->m_len / 2);
539 CSR_WRITE_1(sc, EP_W1_TX_PIO_WR_1,
540 *(mtod(m, uint8_t *)+m->m_len - 1));
545 CSR_WRITE_1(sc, EP_W1_TX_PIO_WR_1, 0); /* Padding */
547 /* XXX and drop splhigh here */
556 * Is another packet coming in? We don't want to overflow
560 if (CSR_READ_2(sc, EP_W1_RX_STATUS) & RX_BYTES_MASK) {
562 * we check if we have packets left, in that case
563 * we prepare to come back later
565 if (ifp->if_snd.ifq_head)
566 CSR_WRITE_2(sc, EP_COMMAND, SET_TX_AVAIL_THRESH | 8);
581 sc = (struct ep_softc *) arg;
583 /* XXX 4.x splbio'd here to reduce interruptability */
586 * quick fix: Try to detect an interrupt when the card goes away.
588 if (sc->gone || CSR_READ_2(sc, EP_STATUS) == 0xffff) {
594 CSR_WRITE_2(sc, EP_COMMAND, SET_INTR_MASK); /* disable all Ints */
598 while ((status = CSR_READ_2(sc, EP_STATUS)) & S_5_INTS) {
600 /* first acknowledge all interrupt sources */
601 CSR_WRITE_2(sc, EP_COMMAND, ACK_INTR | (status & S_MASK));
603 if (status & (S_RX_COMPLETE | S_RX_EARLY))
605 if (status & S_TX_AVAIL) {
608 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
610 CSR_READ_2(sc, EP_W1_FREE_TX);
613 if (status & S_CARD_FAILURE) {
615 #ifdef EP_LOCAL_STATS
616 device_printf(sc->dev, "\n\tStatus: %x\n", status);
618 printf("\tFIFO Diagnostic: %x\n",
619 CSR_READ_2(sc, EP_W4_FIFO_DIAG));
620 printf("\tStat: %x\n", sc->stat);
621 printf("\tIpackets=%d, Opackets=%d\n",
622 ifp->if_ipackets, ifp->if_opackets);
623 printf("\tNOF=%d, NOMB=%d, RXOF=%d, RXOL=%d, TXU=%d\n",
624 sc->rx_no_first, sc->rx_no_mbuf, sc->rx_overrunf,
625 sc->rx_overrunl, sc->tx_underrun);
629 device_printf(sc->dev,
630 "Status: %x (input buffer overflow)\n", status);
640 if (status & S_TX_COMPLETE) {
643 * We need ACK. We do it at the end.
645 * We need to read TX_STATUS until we get a
646 * 0 status in order to turn off the interrupt flag.
648 while ((status = CSR_READ_1(sc, EP_W1_TX_STATUS)) &
650 if (status & TXS_SUCCES_INTR_REQ)
653 (TXS_UNDERRUN | TXS_JABBER |
654 TXS_MAX_COLLISION)) {
655 CSR_WRITE_2(sc, EP_COMMAND, TX_RESET);
656 if (status & TXS_UNDERRUN) {
657 #ifdef EP_LOCAL_STATS
661 if (status & TXS_JABBER);
663 ++ifp->if_collisions;
670 CSR_WRITE_2(sc, EP_COMMAND, TX_ENABLE);
672 * To have a tx_avail_int but giving
673 * the chance to the Reception
675 if (ifp->if_snd.ifq_head)
676 CSR_WRITE_2(sc, EP_COMMAND,
677 SET_TX_AVAIL_THRESH | 8);
679 /* pops up the next status */
680 CSR_WRITE_1(sc, EP_W1_TX_STATUS, 0x0);
682 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
684 CSR_READ_2(sc, EP_W1_FREE_TX);
686 } /* end TX_COMPLETE */
689 CSR_WRITE_2(sc, EP_COMMAND, C_INTR_LATCH); /* ACK int Latch */
691 if ((status = CSR_READ_2(sc, EP_STATUS)) & S_5_INTS)
695 CSR_WRITE_2(sc, EP_COMMAND, SET_INTR_MASK | S_5_INTS);
700 epread(struct ep_softc *sc)
702 struct mbuf *top, *mcur, *m;
705 short rx_fifo2, status;
708 /* XXX Must be called with sc locked */
711 status = CSR_READ_2(sc, EP_W1_RX_STATUS);
715 if (status & ERR_RX) {
717 if (status & ERR_RX_OVERRUN) {
719 * We can think the rx latency is actually
720 * greather than we expect
722 #ifdef EP_LOCAL_STATS
723 if (EP_FTST(sc, F_RX_FIRST))
731 rx_fifo = rx_fifo2 = status & RX_BYTES_MASK;
733 if (EP_FTST(sc, F_RX_FIRST)) {
734 MGETHDR(m, M_DONTWAIT, MT_DATA);
737 if (rx_fifo >= MINCLSIZE)
738 MCLGET(m, M_DONTWAIT);
739 sc->top = sc->mcur = top = m;
740 #define EROUND ((sizeof(struct ether_header) + 3) & ~3)
741 #define EOFF (EROUND - sizeof(struct ether_header))
744 /* Read what should be the header. */
745 CSR_READ_MULTI_2(sc, EP_W1_RX_PIO_RD_1,
746 mtod(top, uint16_t *), sizeof(struct ether_header) / 2);
747 top->m_len = sizeof(struct ether_header);
748 rx_fifo -= sizeof(struct ether_header);
749 sc->cur_len = rx_fifo2;
751 /* come here if we didn't have a complete packet last time */
754 sc->cur_len += rx_fifo2;
757 /* Reads what is left in the RX FIFO */
758 while (rx_fifo > 0) {
759 lenthisone = min(rx_fifo, M_TRAILINGSPACE(m));
760 if (lenthisone == 0) { /* no room in this one */
762 MGET(m, M_DONTWAIT, MT_DATA);
765 if (rx_fifo >= MINCLSIZE)
766 MCLGET(m, M_DONTWAIT);
769 lenthisone = min(rx_fifo, M_TRAILINGSPACE(m));
771 if (EP_FTST(sc, F_ACCESS_32_BITS)) {
772 /* default for EISA configured cards */
773 CSR_READ_MULTI_4(sc, EP_W1_RX_PIO_RD_1,
774 (uint32_t *)(mtod(m, caddr_t)+m->m_len),
776 m->m_len += (lenthisone & ~3);
778 CSR_READ_MULTI_1(sc, EP_W1_RX_PIO_RD_1,
779 mtod(m, caddr_t)+m->m_len, lenthisone & 3);
780 m->m_len += (lenthisone & 3);
782 CSR_READ_MULTI_2(sc, EP_W1_RX_PIO_RD_1,
783 (uint16_t *)(mtod(m, caddr_t)+m->m_len),
785 m->m_len += lenthisone;
787 *(mtod(m, caddr_t)+m->m_len - 1) =
788 CSR_READ_1(sc, EP_W1_RX_PIO_RD_1);
790 rx_fifo -= lenthisone;
793 if (status & ERR_RX_INCOMPLETE) {
794 /* we haven't received the complete packet */
796 #ifdef EP_LOCAL_STATS
797 /* to know how often we come here */
800 EP_FRST(sc, F_RX_FIRST);
801 status = CSR_READ_2(sc, EP_W1_RX_STATUS);
802 if (!status & ERR_RX_INCOMPLETE) {
804 * We see if by now, the packet has completly
809 CSR_WRITE_2(sc, EP_COMMAND,
810 SET_RX_EARLY_THRESH | RX_NEXT_EARLY_THRESH);
813 CSR_WRITE_2(sc, EP_COMMAND, RX_DISCARD_TOP_PACK);
815 EP_FSET(sc, F_RX_FIRST);
816 top->m_pkthdr.rcvif = sc->ifp;
817 top->m_pkthdr.len = sc->cur_len;
820 * Drop locks before calling if_input() since it may re-enter
821 * ep_start() in the netisr case. This would result in a
822 * lock reversal. Better performance might be obtained by
823 * chaining all packets received, dropping the lock, and then
824 * calling if_input() on each one.
827 (*ifp->if_input) (ifp, top);
831 CSR_WRITE_2(sc, EP_COMMAND, SET_RX_EARLY_THRESH | RX_INIT_EARLY_THRESH);
835 CSR_WRITE_2(sc, EP_COMMAND, RX_DISCARD_TOP_PACK);
839 #ifdef EP_LOCAL_STATS
843 EP_FSET(sc, F_RX_FIRST);
845 CSR_WRITE_2(sc, EP_COMMAND, SET_RX_EARLY_THRESH | RX_INIT_EARLY_THRESH);
849 ep_ifmedia_upd(struct ifnet *ifp)
851 struct ep_softc *sc = ifp->if_softc;
855 CSR_WRITE_2(sc, EP_COMMAND, STOP_TRANSCEIVER);
857 CSR_WRITE_2(sc, EP_W4_MEDIA_TYPE, DISABLE_UTP);
860 switch (IFM_SUBTYPE(sc->ifmedia.ifm_media)) {
862 if (sc->ep_connectors & UTP) {
863 i = ACF_CONNECTOR_UTP;
865 CSR_WRITE_2(sc, EP_W4_MEDIA_TYPE, ENABLE_UTP);
869 if (sc->ep_connectors & BNC) {
870 i = ACF_CONNECTOR_BNC;
871 CSR_WRITE_2(sc, EP_COMMAND, START_TRANSCEIVER);
872 DELAY(DELAY_MULTIPLE * 1000);
876 if (sc->ep_connectors & AUI)
877 i = ACF_CONNECTOR_AUI;
880 i = sc->ep_connector;
881 device_printf(sc->dev,
882 "strange connector type in EEPROM: assuming AUI\n");
886 j = CSR_READ_2(sc, EP_W0_ADDRESS_CFG) & 0x3fff;
887 CSR_WRITE_2(sc, EP_W0_ADDRESS_CFG, j | (i << ACF_CONNECTOR_BITS));
893 ep_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
895 struct ep_softc *sc = ifp->if_softc;
897 ifmr->ifm_active = sc->ifmedia.ifm_media;
901 epioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
903 struct ep_softc *sc = ifp->if_softc;
904 struct ifreq *ifr = (struct ifreq *) data;
910 if (((ifp->if_flags & IFF_UP) == 0) &&
911 (ifp->if_drv_flags & IFF_DRV_RUNNING)) {
912 ifp->if_drv_flags &= ~IFF_DRV_RUNNING;
915 /* reinitialize card on any parameter change */
921 bcopy((caddr_t)sc->sc_addr, (caddr_t)&ifr->ifr_data,
922 sizeof(sc->sc_addr));
928 * The Etherlink III has no programmable multicast
929 * filter. We always initialize the card to be
930 * promiscuous to multicast, since we're always a
931 * member of the ALL-SYSTEMS group, so there's no
932 * need to process SIOC*MULTI requests.
938 if (!sc->epb.mii_trans)
939 error = ifmedia_ioctl(ifp, ifr, &sc->ifmedia, cmd);
944 error = ether_ioctl(ifp, cmd, data);
951 epwatchdog(struct ifnet *ifp)
953 struct ep_softc *sc = ifp->if_softc;
957 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
959 ep_intr(ifp->if_softc);
963 epstop(struct ep_softc *sc)
965 CSR_WRITE_2(sc, EP_COMMAND, RX_DISABLE);
966 CSR_WRITE_2(sc, EP_COMMAND, RX_DISCARD_TOP_PACK);
969 CSR_WRITE_2(sc, EP_COMMAND, TX_DISABLE);
970 CSR_WRITE_2(sc, EP_COMMAND, STOP_TRANSCEIVER);
973 CSR_WRITE_2(sc, EP_COMMAND, RX_RESET);
975 CSR_WRITE_2(sc, EP_COMMAND, TX_RESET);
978 CSR_WRITE_2(sc, EP_COMMAND, C_INTR_LATCH);
979 CSR_WRITE_2(sc, EP_COMMAND, SET_RD_0_MASK);
980 CSR_WRITE_2(sc, EP_COMMAND, SET_INTR_MASK);
981 CSR_WRITE_2(sc, EP_COMMAND, SET_RX_FILTER);