2 * Copyright (c) 2011-2012 Stefan Bethke.
3 * Copyright (c) 2013 Adrian Chadd <adrian@FreeBSD.org>
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 #include <sys/param.h>
32 #include <sys/errno.h>
33 #include <sys/kernel.h>
34 #include <sys/module.h>
35 #include <sys/socket.h>
36 #include <sys/sockio.h>
37 #include <sys/sysctl.h>
38 #include <sys/systm.h>
41 #include <net/if_arp.h>
42 #include <net/ethernet.h>
43 #include <net/if_dl.h>
44 #include <net/if_media.h>
45 #include <net/if_types.h>
47 #include <machine/bus.h>
48 #include <dev/iicbus/iic.h>
49 #include <dev/iicbus/iiconf.h>
50 #include <dev/iicbus/iicbus.h>
51 #include <dev/mii/mii.h>
52 #include <dev/mii/miivar.h>
53 #include <dev/mdio/mdio.h>
55 #include <dev/etherswitch/etherswitch.h>
57 #include <dev/etherswitch/arswitch/arswitchreg.h>
58 #include <dev/etherswitch/arswitch/arswitchvar.h>
59 #include <dev/etherswitch/arswitch/arswitch_reg.h>
60 #include <dev/etherswitch/arswitch/arswitch_phy.h> /* XXX for probe */
61 #include <dev/etherswitch/arswitch/arswitch_9340.h>
64 #include "miibus_if.h"
65 #include "etherswitch_if.h"
68 * AR9340 specific functions
71 ar9340_hw_setup(struct arswitch_softc *sc)
78 * Initialise other global values for the AR9340.
81 ar9340_hw_global_setup(struct arswitch_softc *sc)
86 /* Enable CPU port; disable mirror port */
87 arswitch_writereg(sc->sc_dev, AR8X16_REG_CPU_PORT,
88 AR8X16_CPU_PORT_EN | AR8X16_CPU_MIRROR_DIS);
90 /* Setup TAG priority mapping */
91 arswitch_writereg(sc->sc_dev, AR8X16_REG_TAG_PRIO, 0xfa50);
93 /* Enable aging, MAC replacing */
94 arswitch_writereg(sc->sc_dev, AR934X_REG_AT_CTRL,
95 0x2b /* 5 min age time */ |
96 AR934X_AT_CTRL_AGE_EN |
97 AR934X_AT_CTRL_LEARN_CHANGE);
99 /* Enable ARP frame acknowledge */
100 arswitch_modifyreg(sc->sc_dev, AR934X_REG_QM_CTRL,
101 AR934X_QM_CTRL_ARP_EN, AR934X_QM_CTRL_ARP_EN);
103 /* Enable Broadcast frames transmitted to the CPU */
104 arswitch_modifyreg(sc->sc_dev, AR934X_REG_FLOOD_MASK,
105 AR934X_FLOOD_MASK_BC_DP(0),
106 AR934X_FLOOD_MASK_BC_DP(0));
107 arswitch_modifyreg(sc->sc_dev, AR934X_REG_FLOOD_MASK,
108 AR934X_FLOOD_MASK_MC_DP(0),
109 AR934X_FLOOD_MASK_MC_DP(0));
111 /* Enable MIB counters */
112 arswitch_modifyreg(sc->sc_dev, AR8X16_REG_MIB_FUNC0,
113 AR934X_MIB_ENABLE, AR934X_MIB_ENABLE);
116 arswitch_modifyreg(sc->sc_dev, AR8X16_REG_GLOBAL_CTRL,
117 AR7240_GLOBAL_CTRL_MTU_MASK,
118 SM(1536, AR7240_GLOBAL_CTRL_MTU_MASK));
121 arswitch_modifyreg(sc->sc_dev, AR8X16_REG_SERVICE_TAG,
122 AR8X16_SERVICE_TAG_MASK, 0);
128 * Check PHY mode bits.
130 * This dictates whether the connected port is to be wired
131 * up via GMII or MII. I'm not sure why - this is an internal
135 device_printf(sc->sc_dev, "%s: GMII\n", __func__);
136 arswitch_modifyreg(sc->sc_dev, AR934X_REG_OPER_MODE0,
137 AR934X_OPER_MODE0_MAC_GMII_EN,
138 AR934X_OPER_MODE0_MAC_GMII_EN);
139 } else if (sc->is_mii) {
140 device_printf(sc->sc_dev, "%s: MII\n", __func__);
141 arswitch_modifyreg(sc->sc_dev, AR934X_REG_OPER_MODE0,
142 AR934X_OPER_MODE0_PHY_MII_EN,
143 AR934X_OPER_MODE0_PHY_MII_EN);
145 device_printf(sc->sc_dev, "%s: need is_gmii or is_mii set\n",
152 * Whether to connect PHY 4 via MII (ie a switch port) or
153 * treat it as a CPU port.
156 device_printf(sc->sc_dev, "%s: PHY4 - CPU\n", __func__);
157 arswitch_modifyreg(sc->sc_dev, AR934X_REG_OPER_MODE1,
158 AR934X_REG_OPER_MODE1_PHY4_MII_EN,
159 AR934X_REG_OPER_MODE1_PHY4_MII_EN);
160 sc->info.es_nports = 5;
162 device_printf(sc->sc_dev, "%s: PHY4 - Local\n", __func__);
163 sc->info.es_nports = 6;
174 * The AR9340 switch probes (almost) the same as the AR7240 on-chip switch.
176 * However, the support is slightly different.
178 * So instead of checking the PHY revision or mask register contents,
179 * we simply fall back to a hint check.
182 ar9340_probe(device_t dev)
186 if (resource_int_value(device_get_name(dev), device_get_unit(dev),
187 "is_9340", &is_9340) != 0)
197 ar9340_attach(struct arswitch_softc *sc)
200 sc->hal.arswitch_hw_setup = ar9340_hw_setup;
201 sc->hal.arswitch_hw_global_setup = ar9340_hw_global_setup;
203 /* Set the switch vlan capabilities. */
204 sc->info.es_vlan_caps = ETHERSWITCH_VLAN_DOT1Q |
205 ETHERSWITCH_VLAN_PORT | ETHERSWITCH_VLAN_DOUBLE_TAG;
206 sc->info.es_nvlangroups = AR8X16_MAX_VLANS;