2 * Copyright (c) 2011-2012 Stefan Bethke.
3 * Copyright (c) 2012 Adrian Chadd.
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 #include <sys/param.h>
32 #include <sys/errno.h>
33 #include <sys/kernel.h>
35 #include <sys/module.h>
36 #include <sys/mutex.h>
37 #include <sys/socket.h>
38 #include <sys/sockio.h>
39 #include <sys/sysctl.h>
40 #include <sys/systm.h>
43 #include <net/if_media.h>
45 #include <machine/bus.h>
46 #include <dev/iicbus/iic.h>
47 #include <dev/iicbus/iiconf.h>
48 #include <dev/iicbus/iicbus.h>
49 #include <dev/mii/mii.h>
50 #include <dev/mii/miivar.h>
51 #include <dev/etherswitch/mdio.h>
53 #include <dev/etherswitch/etherswitch.h>
55 #include <dev/etherswitch/arswitch/arswitchreg.h>
56 #include <dev/etherswitch/arswitch/arswitchvar.h>
58 #include <dev/etherswitch/arswitch/arswitch_reg.h>
59 #include <dev/etherswitch/arswitch/arswitch_phy.h>
62 #include "miibus_if.h"
63 #include "etherswitch_if.h"
66 static SYSCTL_NODE(_debug, OID_AUTO, arswitch, CTLFLAG_RD, 0, "arswitch");
70 * access PHYs integrated into the switch chip through the switch's MDIO
74 arswitch_readphy(device_t dev, int phy, int reg)
76 struct arswitch_softc *sc;
77 uint32_t data = 0, ctrl;
81 sc = device_get_softc(dev);
82 ARSWITCH_LOCK_ASSERT(sc, MA_NOTOWNED);
84 if (phy < 0 || phy >= 32)
86 if (reg < 0 || reg >= 32)
89 if (AR8X16_IS_SWITCH(sc, AR8327))
90 a = AR8327_REG_MDIO_CTRL;
92 a = AR8X16_REG_MDIO_CTRL;
95 err = arswitch_writereg_msb(dev, a,
96 AR8X16_MDIO_CTRL_BUSY | AR8X16_MDIO_CTRL_MASTER_EN |
97 AR8X16_MDIO_CTRL_CMD_READ |
98 (phy << AR8X16_MDIO_CTRL_PHY_ADDR_SHIFT) |
99 (reg << AR8X16_MDIO_CTRL_REG_ADDR_SHIFT));
100 DEVERR(dev, err, "arswitch_readphy()=%d: phy=%d.%02x\n", phy, reg);
103 for (timeout = 100; timeout--; ) {
104 ctrl = arswitch_readreg_msb(dev, a);
105 if ((ctrl & AR8X16_MDIO_CTRL_BUSY) == 0)
110 data = arswitch_readreg_lsb(dev, a) &
111 AR8X16_MDIO_CTRL_DATA_MASK;
121 arswitch_writephy(device_t dev, int phy, int reg, int data)
123 struct arswitch_softc *sc;
128 sc = device_get_softc(dev);
129 ARSWITCH_LOCK_ASSERT(sc, MA_NOTOWNED);
131 if (reg < 0 || reg >= 32)
134 if (AR8X16_IS_SWITCH(sc, AR8327))
135 a = AR8327_REG_MDIO_CTRL;
137 a = AR8X16_REG_MDIO_CTRL;
140 err = arswitch_writereg(dev, a,
141 AR8X16_MDIO_CTRL_BUSY |
142 AR8X16_MDIO_CTRL_MASTER_EN |
143 AR8X16_MDIO_CTRL_CMD_WRITE |
144 (phy << AR8X16_MDIO_CTRL_PHY_ADDR_SHIFT) |
145 (reg << AR8X16_MDIO_CTRL_REG_ADDR_SHIFT) |
146 (data & AR8X16_MDIO_CTRL_DATA_MASK));
149 for (timeout = 100; timeout--; ) {
150 ctrl = arswitch_readreg(dev, a);
151 if ((ctrl & AR8X16_MDIO_CTRL_BUSY) == 0)
157 DEVERR(dev, err, "arswitch_writephy()=%d: phy=%d.%02x\n", phy, reg);