2 * Copyright (c) 2011-2012 Stefan Bethke.
3 * Copyright (c) 2012 Adrian Chadd.
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 #include <sys/param.h>
32 #include <sys/errno.h>
33 #include <sys/kernel.h>
35 #include <sys/module.h>
36 #include <sys/mutex.h>
37 #include <sys/socket.h>
38 #include <sys/sockio.h>
39 #include <sys/sysctl.h>
40 #include <sys/systm.h>
43 #include <net/if_media.h>
45 #include <machine/bus.h>
46 #include <dev/iicbus/iic.h>
47 #include <dev/iicbus/iiconf.h>
48 #include <dev/iicbus/iicbus.h>
49 #include <dev/mii/mii.h>
50 #include <dev/mii/miivar.h>
51 #include <dev/etherswitch/mdio.h>
53 #include <dev/etherswitch/etherswitch.h>
55 #include <dev/etherswitch/arswitch/arswitchreg.h>
56 #include <dev/etherswitch/arswitch/arswitchvar.h>
58 #include <dev/etherswitch/arswitch/arswitch_reg.h>
59 #include <dev/etherswitch/arswitch/arswitch_phy.h>
62 #include "miibus_if.h"
63 #include "etherswitch_if.h"
66 static SYSCTL_NODE(_debug, OID_AUTO, arswitch, CTLFLAG_RD, 0, "arswitch");
70 * Access PHYs integrated into the switch by going direct
71 * to the PHY space itself, rather than through the switch
75 arswitch_readphy_external(device_t dev, int phy, int reg)
78 struct arswitch_softc *sc;
80 sc = device_get_softc(dev);
83 ret = (MDIO_READREG(device_get_parent(dev), phy, reg));
90 arswitch_writephy_external(device_t dev, int phy, int reg, int data)
92 struct arswitch_softc *sc;
94 sc = device_get_softc(dev);
97 (void) MDIO_WRITEREG(device_get_parent(dev), phy,
105 * Access PHYs integrated into the switch chip through the switch's MDIO
109 arswitch_readphy_internal(device_t dev, int phy, int reg)
111 struct arswitch_softc *sc;
112 uint32_t data = 0, ctrl;
116 sc = device_get_softc(dev);
117 ARSWITCH_LOCK_ASSERT(sc, MA_NOTOWNED);
119 if (phy < 0 || phy >= 32)
121 if (reg < 0 || reg >= 32)
124 if (AR8X16_IS_SWITCH(sc, AR8327))
125 a = AR8327_REG_MDIO_CTRL;
127 a = AR8X16_REG_MDIO_CTRL;
130 err = arswitch_writereg_msb(dev, a,
131 AR8X16_MDIO_CTRL_BUSY | AR8X16_MDIO_CTRL_MASTER_EN |
132 AR8X16_MDIO_CTRL_CMD_READ |
133 (phy << AR8X16_MDIO_CTRL_PHY_ADDR_SHIFT) |
134 (reg << AR8X16_MDIO_CTRL_REG_ADDR_SHIFT));
135 DEVERR(dev, err, "arswitch_readphy()=%d: phy=%d.%02x\n", phy, reg);
138 for (timeout = 100; timeout--; ) {
139 ctrl = arswitch_readreg_msb(dev, a);
140 if ((ctrl & AR8X16_MDIO_CTRL_BUSY) == 0)
144 DPRINTF(dev, "arswitch_readphy(): phy=%d.%02x; timeout=%d\n", phy, reg, timeout);
147 data = arswitch_readreg_lsb(dev, a) &
148 AR8X16_MDIO_CTRL_DATA_MASK;
158 arswitch_writephy_internal(device_t dev, int phy, int reg, int data)
160 struct arswitch_softc *sc;
165 sc = device_get_softc(dev);
166 ARSWITCH_LOCK_ASSERT(sc, MA_NOTOWNED);
168 if (reg < 0 || reg >= 32)
171 if (AR8X16_IS_SWITCH(sc, AR8327))
172 a = AR8327_REG_MDIO_CTRL;
174 a = AR8X16_REG_MDIO_CTRL;
177 err = arswitch_writereg(dev, a,
178 AR8X16_MDIO_CTRL_BUSY |
179 AR8X16_MDIO_CTRL_MASTER_EN |
180 AR8X16_MDIO_CTRL_CMD_WRITE |
181 (phy << AR8X16_MDIO_CTRL_PHY_ADDR_SHIFT) |
182 (reg << AR8X16_MDIO_CTRL_REG_ADDR_SHIFT) |
183 (data & AR8X16_MDIO_CTRL_DATA_MASK));
186 for (timeout = 100; timeout--; ) {
187 ctrl = arswitch_readreg(dev, a);
188 if ((ctrl & AR8X16_MDIO_CTRL_BUSY) == 0)
194 DEVERR(dev, err, "arswitch_writephy()=%d: phy=%d.%02x\n", phy, reg);