2 * Copyright (c) 2013 Luiz Otavio O Souza.
3 * Copyright (c) 2011-2012 Stefan Bethke.
4 * Copyright (c) 2012 Adrian Chadd.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 #include <sys/param.h>
33 #include <sys/errno.h>
35 #include <sys/kernel.h>
36 #include <sys/mutex.h>
37 #include <sys/systm.h>
38 #include <sys/socket.h>
41 #include <dev/mii/mii.h>
43 #include <dev/etherswitch/etherswitch.h>
44 #include <dev/etherswitch/arswitch/arswitchreg.h>
45 #include <dev/etherswitch/arswitch/arswitchvar.h>
46 #include <dev/etherswitch/arswitch/arswitch_reg.h>
47 #include <dev/etherswitch/arswitch/arswitch_vlans.h>
50 #include "miibus_if.h"
51 #include "etherswitch_if.h"
54 * XXX TODO: teach about the AR933x SoC switch
55 * XXX TODO: teach about the AR934x SoC switch
56 * XXX TODO: teach about the AR8327 external switch
60 arswitch_vlan_op(struct arswitch_softc *sc, uint32_t op, uint32_t vid,
65 if (arswitch_waitreg(sc->sc_dev, AR8X16_REG_VLAN_CTRL,
66 AR8X16_VLAN_ACTIVE, 0, 5))
69 /* Load the vlan data if needed. */
70 if (op == AR8X16_VLAN_OP_LOAD) {
71 err = arswitch_writereg(sc->sc_dev, AR8X16_REG_VLAN_DATA,
72 (data & AR8X16_VLAN_MEMBER) | AR8X16_VLAN_VALID);
78 op |= ((vid & ETHERSWITCH_VID_MASK) << AR8X16_VLAN_VID_SHIFT);
79 op |= AR8X16_VLAN_ACTIVE;
80 arswitch_writereg(sc->sc_dev, AR8X16_REG_VLAN_CTRL, op);
82 /* Wait for command processing. */
83 if (arswitch_waitreg(sc->sc_dev, AR8X16_REG_VLAN_CTRL,
84 AR8X16_VLAN_ACTIVE, 0, 5))
91 arswitch_flush_dot1q_vlan(struct arswitch_softc *sc)
94 ARSWITCH_LOCK_ASSERT(sc, MA_OWNED);
95 return (arswitch_vlan_op(sc, AR8X16_VLAN_OP_FLUSH, 0, 0));
99 arswitch_purge_dot1q_vlan(struct arswitch_softc *sc, int vid)
102 ARSWITCH_LOCK_ASSERT(sc, MA_OWNED);
103 return (arswitch_vlan_op(sc, AR8X16_VLAN_OP_PURGE, vid, 0));
107 ar8xxx_get_dot1q_vlan(struct arswitch_softc *sc, uint32_t *ports, int vid)
112 ARSWITCH_LOCK_ASSERT(sc, MA_OWNED);
113 err = arswitch_vlan_op(sc, AR8X16_VLAN_OP_GET, vid, 0);
117 reg = arswitch_readreg(sc->sc_dev, AR8X16_REG_VLAN_DATA);
118 if ((reg & AR8X16_VLAN_VALID) == 0) {
122 reg &= ((1 << (sc->numphys + 1)) - 1);
128 ar8xxx_set_dot1q_vlan(struct arswitch_softc *sc, uint32_t ports, int vid)
132 ARSWITCH_LOCK_ASSERT(sc, MA_OWNED);
133 err = arswitch_vlan_op(sc, AR8X16_VLAN_OP_LOAD, vid, ports);
140 ar8xxx_get_port_vlan(struct arswitch_softc *sc, uint32_t *ports, int vid)
145 ARSWITCH_LOCK_ASSERT(sc, MA_OWNED);
146 /* For port based vlans the vlanid is the same as the port index. */
147 port = vid & ETHERSWITCH_VID_MASK;
148 reg = arswitch_readreg(sc->sc_dev, AR8X16_REG_PORT_VLAN(port));
149 *ports = (reg >> AR8X16_PORT_VLAN_DEST_PORTS_SHIFT);
150 *ports &= AR8X16_VLAN_MEMBER;
155 ar8xxx_set_port_vlan(struct arswitch_softc *sc, uint32_t ports, int vid)
159 ARSWITCH_LOCK_ASSERT(sc, MA_OWNED);
160 /* For port based vlans the vlanid is the same as the port index. */
161 port = vid & ETHERSWITCH_VID_MASK;
162 err = arswitch_modifyreg(sc->sc_dev, AR8X16_REG_PORT_VLAN(port),
163 AR8X16_VLAN_MEMBER << AR8X16_PORT_VLAN_DEST_PORTS_SHIFT,
164 (ports & AR8X16_VLAN_MEMBER) << AR8X16_PORT_VLAN_DEST_PORTS_SHIFT);
171 * Reset vlans to default state.
174 ar8xxx_reset_vlans(struct arswitch_softc *sc)
179 ARSWITCH_LOCK_ASSERT(sc, MA_NOTOWNED);
183 /* Reset all vlan data. */
184 memset(sc->vid, 0, sizeof(sc->vid));
186 /* Disable the QinQ and egress filters for all ports. */
187 for (i = 0; i <= sc->numphys; i++) {
188 if (arswitch_modifyreg(sc->sc_dev, AR8X16_REG_PORT_CTRL(i),
189 0x3 << AR8X16_PORT_CTRL_EGRESS_VLAN_MODE_SHIFT |
190 AR8X16_PORT_CTRL_DOUBLE_TAG, 0)) {
196 if (arswitch_flush_dot1q_vlan(sc)) {
201 if (sc->vlan_mode == ETHERSWITCH_VLAN_DOT1Q) {
203 * Reset the port based vlan settings and turn on the
204 * ingress filter for all ports.
207 for (i = 0; i <= sc->numphys; i++)
208 arswitch_modifyreg(sc->sc_dev,
209 AR8X16_REG_PORT_VLAN(i),
210 AR8X16_PORT_VLAN_MODE_MASK |
211 AR8X16_VLAN_MEMBER <<
212 AR8X16_PORT_VLAN_DEST_PORTS_SHIFT,
213 AR8X16_PORT_VLAN_MODE_SECURE <<
214 AR8X16_PORT_VLAN_MODE_SHIFT);
217 * Setup vlan 1 as PVID for all switch ports. Add all ports
218 * as members of vlan 1.
221 /* Set PVID for everyone. */
222 for (i = 0; i <= sc->numphys; i++)
223 sc->hal.arswitch_vlan_set_pvid(sc, i, sc->vid[0]);
225 for (i = 0; i <= sc->numphys; i++)
227 sc->hal.arswitch_set_dot1q_vlan(sc, ports, sc->vid[0]);
228 sc->vid[0] |= ETHERSWITCH_VID_VALID;
229 } else if (sc->vlan_mode == ETHERSWITCH_VLAN_PORT) {
230 /* Initialize the port based vlans. */
231 for (i = 0; i <= sc->numphys; i++) {
232 sc->vid[i] = i | ETHERSWITCH_VID_VALID;
234 for (j = 0; j <= sc->numphys; j++)
236 arswitch_modifyreg(sc->sc_dev,
237 AR8X16_REG_PORT_VLAN(i),
238 AR8X16_PORT_VLAN_MODE_MASK |
239 AR8X16_VLAN_MEMBER <<
240 AR8X16_PORT_VLAN_DEST_PORTS_SHIFT,
241 ports << AR8X16_PORT_VLAN_DEST_PORTS_SHIFT |
242 AR8X16_PORT_VLAN_MODE_SECURE <<
243 AR8X16_PORT_VLAN_MODE_PORT_ONLY);
246 /* Disable the ingress filter and get everyone on all vlans. */
247 for (i = 0; i <= sc->numphys; i++)
248 arswitch_modifyreg(sc->sc_dev,
249 AR8X16_REG_PORT_VLAN(i),
250 AR8X16_PORT_VLAN_MODE_MASK |
251 AR8X16_VLAN_MEMBER <<
252 AR8X16_PORT_VLAN_DEST_PORTS_SHIFT,
253 AR8X16_VLAN_MEMBER <<
254 AR8X16_PORT_VLAN_DEST_PORTS_SHIFT |
255 AR8X16_PORT_VLAN_MODE_SECURE <<
256 AR8X16_PORT_VLAN_MODE_PORT_ONLY);
262 ar8xxx_getvgroup(struct arswitch_softc *sc, etherswitch_vlangroup_t *vg)
266 ARSWITCH_LOCK_ASSERT(sc, MA_NOTOWNED);
268 if (vg->es_vlangroup > sc->info.es_nvlangroups)
271 /* Reset the members ports. */
272 vg->es_untagged_ports = 0;
273 vg->es_member_ports = 0;
280 vg->es_vid = sc->vid[vg->es_vlangroup];
281 if ((vg->es_vid & ETHERSWITCH_VID_VALID) == 0) {
287 switch (sc->vlan_mode) {
288 case ETHERSWITCH_VLAN_DOT1Q:
289 err = sc->hal.arswitch_get_dot1q_vlan(sc, &vg->es_member_ports,
292 case ETHERSWITCH_VLAN_PORT:
293 err = sc->hal.arswitch_get_port_vlan(sc, &vg->es_member_ports,
297 vg->es_member_ports = 0;
301 vg->es_untagged_ports = vg->es_member_ports;
306 ar8xxx_setvgroup(struct arswitch_softc *sc, etherswitch_vlangroup_t *vg)
310 ARSWITCH_LOCK_ASSERT(sc, MA_NOTOWNED);
312 /* Check VLAN mode. */
313 if (sc->vlan_mode == 0)
317 * Check if we are changing the vlanid for an already used vtu entry.
318 * Then purge the entry first.
321 vid = sc->vid[vg->es_vlangroup];
322 if (sc->vlan_mode == ETHERSWITCH_VLAN_DOT1Q &&
323 (vid & ETHERSWITCH_VID_VALID) != 0 &&
324 (vid & ETHERSWITCH_VID_MASK) !=
325 (vg->es_vid & ETHERSWITCH_VID_MASK)) {
326 err = arswitch_purge_dot1q_vlan(sc, vid);
334 if (sc->vlan_mode == ETHERSWITCH_VLAN_DOT1Q) {
335 sc->vid[vg->es_vlangroup] = vg->es_vid & ETHERSWITCH_VID_MASK;
336 /* Setting the vlanid to zero disables the vlangroup. */
337 if (sc->vid[vg->es_vlangroup] == 0) {
341 sc->vid[vg->es_vlangroup] |= ETHERSWITCH_VID_VALID;
342 vid = sc->vid[vg->es_vlangroup];
346 switch (sc->vlan_mode) {
347 case ETHERSWITCH_VLAN_DOT1Q:
348 err = sc->hal.arswitch_set_dot1q_vlan(sc, vg->es_member_ports, vid);
350 case ETHERSWITCH_VLAN_PORT:
351 err = sc->hal.arswitch_set_port_vlan(sc, vg->es_member_ports, vid);
361 ar8xxx_get_pvid(struct arswitch_softc *sc, int port, int *pvid)
365 ARSWITCH_LOCK_ASSERT(sc, MA_OWNED);
366 reg = arswitch_readreg(sc->sc_dev, AR8X16_REG_PORT_VLAN(port));
372 ar8xxx_set_pvid(struct arswitch_softc *sc, int port, int pvid)
375 ARSWITCH_LOCK_ASSERT(sc, MA_OWNED);
376 return (arswitch_modifyreg(sc->sc_dev,
377 AR8X16_REG_PORT_VLAN(port), 0xfff, pvid));