sys/dev/etherswitch/e6000sw/e6000sw.c

   1 /*-
   2  * Copyright (c) 2015 Semihalf
   3  * Copyright (c) 2015 Stormshield
   4  * Copyright (c) 2018-2019, Rubicon Communications, LLC (Netgate)
   5  * All rights reserved.
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions
   9  * are met:
  10  * 1. Redistributions of source code must retain the above copyright
  11  *    notice, this list of conditions and the following disclaimer.
  12  * 2. Redistributions in binary form must reproduce the above copyright
  13  *    notice, this list of conditions and the following disclaimer in the
  14  *    documentation and/or other materials provided with the distribution.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  26  * SUCH DAMAGE.
  27  */
  28
  29 #include <sys/cdefs.h>
  30 __FBSDID("$FreeBSD$");
  31
  32 #include <sys/param.h>
  33 #include <sys/bus.h>
  34 #include <sys/errno.h>
  35 #include <sys/kernel.h>
  36 #include <sys/kthread.h>
  37 #include <sys/module.h>
  38 #include <sys/socket.h>
  39 #include <sys/sockio.h>
  40
  41 #include <net/if.h>
  42 #include <net/if_media.h>
  43 #include <net/if_types.h>
  44
  45 #include <dev/etherswitch/etherswitch.h>
  46 #include <dev/mii/mii.h>
  47 #include <dev/mii/miivar.h>
  48
  49 #include <dev/ofw/ofw_bus.h>
  50 #include <dev/ofw/ofw_bus_subr.h>
  51
  52 #include "e6000swreg.h"
  53 #include "etherswitch_if.h"
  54 #include "miibus_if.h"
  55 #include "mdio_if.h"
  56
  57 MALLOC_DECLARE(M_E6000SW);
  58 MALLOC_DEFINE(M_E6000SW, "e6000sw", "e6000sw switch");
  59
  60 #define E6000SW_LOCK(_sc)               sx_xlock(&(_sc)->sx)
  61 #define E6000SW_UNLOCK(_sc)             sx_unlock(&(_sc)->sx)
  62 #define E6000SW_LOCK_ASSERT(_sc, _what) sx_assert(&(_sc)->sx, (_what))
  63 #define E6000SW_TRYLOCK(_sc)            sx_tryxlock(&(_sc)->sx)
  64 #define E6000SW_WAITREADY(_sc, _reg, _bit)                              \
  65     e6000sw_waitready((_sc), REG_GLOBAL, (_reg), (_bit))
  66 #define E6000SW_WAITREADY2(_sc, _reg, _bit)                             \
  67     e6000sw_waitready((_sc), REG_GLOBAL2, (_reg), (_bit))
  68 #define MDIO_READ(dev, addr, reg)                                       \
  69     MDIO_READREG(device_get_parent(dev), (addr), (reg))
  70 #define MDIO_WRITE(dev, addr, reg, val)                                 \
  71     MDIO_WRITEREG(device_get_parent(dev), (addr), (reg), (val))
  72
  73
  74 typedef struct e6000sw_softc {
  75         device_t                dev;
  76         phandle_t               node;
  77
  78         struct sx               sx;
  79         struct ifnet            *ifp[E6000SW_MAX_PORTS];
  80         char                    *ifname[E6000SW_MAX_PORTS];
  81         device_t                miibus[E6000SW_MAX_PORTS];
  82         struct proc             *kproc;
  83
  84         int                     vlans[E6000SW_NUM_VLANS];
  85         uint32_t                swid;
  86         uint32_t                vlan_mode;
  87         uint32_t                cpuports_mask;
  88         uint32_t                fixed_mask;
  89         uint32_t                fixed25_mask;
  90         uint32_t                ports_mask;
  91         int                     phy_base;
  92         int                     sw_addr;
  93         int                     num_ports;
  94 } e6000sw_softc_t;
  95
  96 static etherswitch_info_t etherswitch_info = {
  97         .es_nports =            0,
  98         .es_nvlangroups =       0,
  99         .es_vlan_caps =         ETHERSWITCH_VLAN_PORT | ETHERSWITCH_VLAN_DOT1Q,
 100         .es_name =              "Marvell 6000 series switch"
 101 };
 102
 103 static void e6000sw_identify(driver_t *, device_t);
 104 static int e6000sw_probe(device_t);
 105 static int e6000sw_parse_fixed_link(e6000sw_softc_t *, phandle_t, uint32_t);
 106 static int e6000sw_parse_ethernet(e6000sw_softc_t *, phandle_t, uint32_t);
 107 static int e6000sw_attach(device_t);
 108 static int e6000sw_detach(device_t);
 109 static int e6000sw_read_xmdio(device_t, int, int, int);
 110 static int e6000sw_write_xmdio(device_t, int, int, int, int);
 111 static int e6000sw_readphy(device_t, int, int);
 112 static int e6000sw_writephy(device_t, int, int, int);
 113 static etherswitch_info_t* e6000sw_getinfo(device_t);
 114 static int e6000sw_getconf(device_t, etherswitch_conf_t *);
 115 static int e6000sw_setconf(device_t, etherswitch_conf_t *);
 116 static void e6000sw_lock(device_t);
 117 static void e6000sw_unlock(device_t);
 118 static int e6000sw_getport(device_t, etherswitch_port_t *);
 119 static int e6000sw_setport(device_t, etherswitch_port_t *);
 120 static int e6000sw_set_vlan_mode(e6000sw_softc_t *, uint32_t);
 121 static int e6000sw_readreg_wrapper(device_t, int);
 122 static int e6000sw_writereg_wrapper(device_t, int, int);
 123 static int e6000sw_readphy_wrapper(device_t, int, int);
 124 static int e6000sw_writephy_wrapper(device_t, int, int, int);
 125 static int e6000sw_getvgroup_wrapper(device_t, etherswitch_vlangroup_t *);
 126 static int e6000sw_setvgroup_wrapper(device_t, etherswitch_vlangroup_t *);
 127 static int e6000sw_setvgroup(device_t, etherswitch_vlangroup_t *);
 128 static int e6000sw_getvgroup(device_t, etherswitch_vlangroup_t *);
 129 static void e6000sw_setup(device_t, e6000sw_softc_t *);
 130 static void e6000sw_tick(void *);
 131 static void e6000sw_set_atustat(device_t, e6000sw_softc_t *, int, int);
 132 static int e6000sw_atu_flush(device_t, e6000sw_softc_t *, int);
 133 static int e6000sw_vtu_flush(e6000sw_softc_t *);
 134 static int e6000sw_vtu_update(e6000sw_softc_t *, int, int, int, int, int);
 135 static __inline void e6000sw_writereg(e6000sw_softc_t *, int, int, int);
 136 static __inline uint32_t e6000sw_readreg(e6000sw_softc_t *, int, int);
 137 static int e6000sw_ifmedia_upd(struct ifnet *);
 138 static void e6000sw_ifmedia_sts(struct ifnet *, struct ifmediareq *);
 139 static int e6000sw_atu_mac_table(device_t, e6000sw_softc_t *, struct atu_opt *,
 140     int);
 141 static int e6000sw_get_pvid(e6000sw_softc_t *, int, int *);
 142 static void e6000sw_set_pvid(e6000sw_softc_t *, int, int);
 143 static __inline bool e6000sw_is_cpuport(e6000sw_softc_t *, int);
 144 static __inline bool e6000sw_is_fixedport(e6000sw_softc_t *, int);
 145 static __inline bool e6000sw_is_fixed25port(e6000sw_softc_t *, int);
 146 static __inline bool e6000sw_is_phyport(e6000sw_softc_t *, int);
 147 static __inline bool e6000sw_is_portenabled(e6000sw_softc_t *, int);
 148 static __inline struct mii_data *e6000sw_miiforphy(e6000sw_softc_t *,
 149     unsigned int);
 150
 151 static device_method_t e6000sw_methods[] = {
 152         /* device interface */
 153         DEVMETHOD(device_identify,              e6000sw_identify),
 154         DEVMETHOD(device_probe,                 e6000sw_probe),
 155         DEVMETHOD(device_attach,                e6000sw_attach),
 156         DEVMETHOD(device_detach,                e6000sw_detach),
 157
 158         /* bus interface */
 159         DEVMETHOD(bus_add_child,                device_add_child_ordered),
 160
 161         /* mii interface */
 162         DEVMETHOD(miibus_readreg,               e6000sw_readphy),
 163         DEVMETHOD(miibus_writereg,              e6000sw_writephy),
 164
 165         /* etherswitch interface */
 166         DEVMETHOD(etherswitch_getinfo,          e6000sw_getinfo),
 167         DEVMETHOD(etherswitch_getconf,          e6000sw_getconf),
 168         DEVMETHOD(etherswitch_setconf,          e6000sw_setconf),
 169         DEVMETHOD(etherswitch_lock,             e6000sw_lock),
 170         DEVMETHOD(etherswitch_unlock,           e6000sw_unlock),
 171         DEVMETHOD(etherswitch_getport,          e6000sw_getport),
 172         DEVMETHOD(etherswitch_setport,          e6000sw_setport),
 173         DEVMETHOD(etherswitch_readreg,          e6000sw_readreg_wrapper),
 174         DEVMETHOD(etherswitch_writereg,         e6000sw_writereg_wrapper),
 175         DEVMETHOD(etherswitch_readphyreg,       e6000sw_readphy_wrapper),
 176         DEVMETHOD(etherswitch_writephyreg,      e6000sw_writephy_wrapper),
 177         DEVMETHOD(etherswitch_setvgroup,        e6000sw_setvgroup_wrapper),
 178         DEVMETHOD(etherswitch_getvgroup,        e6000sw_getvgroup_wrapper),
 179
 180         DEVMETHOD_END
 181 };
 182
 183 static devclass_t e6000sw_devclass;
 184
 185 DEFINE_CLASS_0(e6000sw, e6000sw_driver, e6000sw_methods,
 186     sizeof(e6000sw_softc_t));
 187
 188 DRIVER_MODULE(e6000sw, mdio, e6000sw_driver, e6000sw_devclass, 0, 0);
 189 DRIVER_MODULE(etherswitch, e6000sw, etherswitch_driver, etherswitch_devclass, 0,
 190     0);
 191 DRIVER_MODULE(miibus, e6000sw, miibus_driver, miibus_devclass, 0, 0);
 192 MODULE_DEPEND(e6000sw, mdio, 1, 1, 1);
 193
 194
 195 static void
 196 e6000sw_identify(driver_t *driver, device_t parent)
 197 {
 198
 199         if (device_find_child(parent, "e6000sw", -1) == NULL)
 200                 BUS_ADD_CHILD(parent, 0, "e6000sw", -1);
 201 }
 202
 203 static int
 204 e6000sw_probe(device_t dev)
 205 {
 206         e6000sw_softc_t *sc;
 207         const char *description;
 208         phandle_t switch_node;
 209
 210         sc = device_get_softc(dev);
 211         switch_node = ofw_bus_find_compatible(OF_finddevice("/"),
 212             "marvell,mv88e6085");
 213         if (switch_node == 0) {
 214                 switch_node = ofw_bus_find_compatible(OF_finddevice("/"),
 215                     "marvell,mv88e6190");
 216
 217                 if (switch_node == 0)
 218                         return (ENXIO);
 219
 220                 /*
 221                  * Trust DTS and fix the port register offset for the MV88E6190
 222                  * detection bellow.
 223                  */
 224                 sc->swid = MV88E6190;
 225         }
 226
 227         if (bootverbose)
 228                 device_printf(dev, "Found switch_node: 0x%x\n", switch_node);
 229
 230         sc->dev = dev;
 231         sc->node = switch_node;
 232
 233         if (OF_getencprop(sc->node, "reg", &sc->sw_addr,
 234             sizeof(sc->sw_addr)) < 0)
 235                 return (ENXIO);
 236         if (sc->sw_addr < 0 || sc->sw_addr > 32)
 237                 return (ENXIO);
 238
 239         /*
 240          * Create temporary lock, just to satisfy assertions,
 241          * when obtaining the switch ID. Destroy immediately afterwards.
 242          */
 243         sx_init(&sc->sx, "e6000sw_tmp");
 244         E6000SW_LOCK(sc);
 245         sc->swid = e6000sw_readreg(sc, REG_PORT(sc, 0), SWITCH_ID) & 0xfff0;
 246         E6000SW_UNLOCK(sc);
 247         sx_destroy(&sc->sx);
 248
 249         switch (sc->swid) {
 250         case MV88E6141:
 251                 description = "Marvell 88E6141";
 252                 sc->phy_base = 0x10;
 253                 sc->num_ports = 6;
 254                 break;
 255         case MV88E6341:
 256                 description = "Marvell 88E6341";
 257                 sc->phy_base = 0x10;
 258                 sc->num_ports = 6;
 259                 break;
 260         case MV88E6352:
 261                 description = "Marvell 88E6352";
 262                 sc->num_ports = 7;
 263                 break;
 264         case MV88E6172:
 265                 description = "Marvell 88E6172";
 266                 sc->num_ports = 7;
 267                 break;
 268         case MV88E6176:
 269                 description = "Marvell 88E6176";
 270                 sc->num_ports = 7;
 271                 break;
 272         case MV88E6190:
 273                 description = "Marvell 88E6190";
 274                 sc->num_ports = 11;
 275                 break;
 276         default:
 277                 device_printf(dev, "Unrecognized device, id 0x%x.\n", sc->swid);
 278                 return (ENXIO);
 279         }
 280
 281         device_set_desc(dev, description);
 282
 283         return (BUS_PROBE_DEFAULT);
 284 }
 285
 286 static int
 287 e6000sw_parse_fixed_link(e6000sw_softc_t *sc, phandle_t node, uint32_t port)
 288 {
 289         int speed;
 290         phandle_t fixed_link;
 291
 292         fixed_link = ofw_bus_find_child(node, "fixed-link");
 293
 294         if (fixed_link != 0) {
 295                 sc->fixed_mask |= (1 << port);
 296
 297                 if (OF_getencprop(fixed_link,
 298                     "speed", &speed, sizeof(speed)) < 0) {
 299                         device_printf(sc->dev,
 300                             "Port %d has a fixed-link node without a speed "
 301                             "property\n", port);
 302                         return (ENXIO);
 303                 }
 304                 if (speed == 2500 && (MVSWITCH(sc, MV88E6141) ||
 305                      MVSWITCH(sc, MV88E6341) || MVSWITCH(sc, MV88E6190)))
 306                         sc->fixed25_mask |= (1 << port);
 307         }
 308
 309         return (0);
 310 }
 311
 312 static int
 313 e6000sw_parse_ethernet(e6000sw_softc_t *sc, phandle_t port_handle, uint32_t port) {
 314         phandle_t switch_eth, switch_eth_handle;
 315
 316         if (OF_getencprop(port_handle, "ethernet", (void*)&switch_eth_handle,
 317             sizeof(switch_eth_handle)) > 0) {
 318                 if (switch_eth_handle > 0) {
 319                         switch_eth = OF_node_from_xref(switch_eth_handle);
 320
 321                         device_printf(sc->dev, "CPU port at %d\n", port);
 322                         sc->cpuports_mask |= (1 << port);
 323
 324                         return (e6000sw_parse_fixed_link(sc, switch_eth, port));
 325                 } else
 326                         device_printf(sc->dev,
 327                                 "Port %d has ethernet property but it points "
 328                                 "to an invalid location\n", port);
 329         }
 330
 331         return (0);
 332 }
 333
 334 static int
 335 e6000sw_parse_child_fdt(e6000sw_softc_t *sc, phandle_t child, int *pport)
 336 {
 337         uint32_t port;
 338
 339         if (pport == NULL)
 340                 return (ENXIO);
 341
 342         if (OF_getencprop(child, "reg", (void *)&port, sizeof(port)) < 0)
 343                 return (ENXIO);
 344         if (port >= sc->num_ports)
 345                 return (ENXIO);
 346         *pport = port;
 347
 348         if (e6000sw_parse_fixed_link(sc, child, port) != 0)
 349                 return (ENXIO);
 350
 351         if (e6000sw_parse_ethernet(sc, child, port) != 0)
 352                 return (ENXIO);
 353
 354         if ((sc->fixed_mask & (1 << port)) != 0)
 355                 device_printf(sc->dev, "fixed port at %d\n", port);
 356         else
 357                 device_printf(sc->dev, "PHY at port %d\n", port);
 358
 359         return (0);
 360 }
 361
 362 static int
 363 e6000sw_init_interface(e6000sw_softc_t *sc, int port)
 364 {
 365         char name[IFNAMSIZ];
 366
 367         snprintf(name, IFNAMSIZ, "%sport", device_get_nameunit(sc->dev));
 368
 369         sc->ifp[port] = if_alloc(IFT_ETHER);
 370         if (sc->ifp[port] == NULL)
 371                 return (ENOMEM);
 372         sc->ifp[port]->if_softc = sc;
 373         sc->ifp[port]->if_flags |= IFF_UP | IFF_BROADCAST |
 374             IFF_DRV_RUNNING | IFF_SIMPLEX;
 375         sc->ifname[port] = malloc(strlen(name) + 1, M_E6000SW, M_NOWAIT);
 376         if (sc->ifname[port] == NULL) {
 377                 if_free(sc->ifp[port]);
 378                 return (ENOMEM);
 379         }
 380         memcpy(sc->ifname[port], name, strlen(name) + 1);
 381         if_initname(sc->ifp[port], sc->ifname[port], port);
 382
 383         return (0);
 384 }
 385
 386 static int
 387 e6000sw_attach_miibus(e6000sw_softc_t *sc, int port)
 388 {
 389         int err;
 390
 391         err = mii_attach(sc->dev, &sc->miibus[port], sc->ifp[port],
 392             e6000sw_ifmedia_upd, e6000sw_ifmedia_sts, BMSR_DEFCAPMASK,
 393             port + sc->phy_base, MII_OFFSET_ANY, 0);
 394         if (err != 0)
 395                 return (err);
 396
 397         return (0);
 398 }
 399
 400 static void
 401 e6000sw_serdes_power(device_t dev, int port, bool sgmii)
 402 {
 403         uint32_t reg;
 404
 405         /* SGMII */
 406         reg = e6000sw_read_xmdio(dev, port, E6000SW_SERDES_DEV,
 407             E6000SW_SERDES_SGMII_CTL);
 408         if (sgmii)
 409                 reg &= ~E6000SW_SERDES_PDOWN;
 410         else
 411                 reg |= E6000SW_SERDES_PDOWN;
 412         e6000sw_write_xmdio(dev, port, E6000SW_SERDES_DEV,
 413             E6000SW_SERDES_SGMII_CTL, reg);
 414
 415         /* 10GBASE-R/10GBASE-X4/X2 */
 416         reg = e6000sw_read_xmdio(dev, port, E6000SW_SERDES_DEV,
 417             E6000SW_SERDES_PCS_CTL1);
 418         if (sgmii)
 419                 reg |= E6000SW_SERDES_PDOWN;
 420         else
 421                 reg &= ~E6000SW_SERDES_PDOWN;
 422         e6000sw_write_xmdio(dev, port, E6000SW_SERDES_DEV,
 423             E6000SW_SERDES_PCS_CTL1, reg);
 424 }
 425
 426 static int
 427 e6000sw_attach(device_t dev)
 428 {
 429         bool sgmii;
 430         e6000sw_softc_t *sc;
 431         phandle_t child, ports;
 432         int err, port;
 433         uint32_t reg;
 434
 435         err = 0;
 436         sc = device_get_softc(dev);
 437
 438         /*
 439          * According to the Linux source code, all of the Switch IDs we support
 440          * are multi_chip capable, and should go into multi-chip mode if the
 441          * sw_addr != 0.
 442          */
 443         if (MVSWITCH_MULTICHIP(sc))
 444                 device_printf(dev, "multi-chip addressing mode (%#x)\n",
 445                     sc->sw_addr);
 446         else
 447                 device_printf(dev, "single-chip addressing mode\n");
 448
 449         sx_init(&sc->sx, "e6000sw");
 450
 451         E6000SW_LOCK(sc);
 452         e6000sw_setup(dev, sc);
 453
 454         ports = ofw_bus_find_child(sc->node, "ports");
 455
 456         if (ports == 0) {
 457                 device_printf(dev, "failed to parse DTS: no ports found for "
 458                     "switch\n");
 459                 return (ENXIO);
 460         }
 461
 462         for (child = OF_child(ports); child != 0; child = OF_peer(child)) {
 463                 err = e6000sw_parse_child_fdt(sc, child, &port);
 464                 if (err != 0) {
 465                         device_printf(sc->dev, "failed to parse DTS\n");
 466                         goto out_fail;
 467                 }
 468
 469                 /* Port is in use. */
 470                 sc->ports_mask |= (1 << port);
 471
 472                 err = e6000sw_init_interface(sc, port);
 473                 if (err != 0) {
 474                         device_printf(sc->dev, "failed to init interface\n");
 475                         goto out_fail;
 476                 }
 477
 478                 if (e6000sw_is_fixedport(sc, port)) {
 479                         /* Link must be down to change speed force value. */
 480                         reg = e6000sw_readreg(sc, REG_PORT(sc, port),
 481                             PSC_CONTROL);
 482                         reg &= ~PSC_CONTROL_LINK_UP;
 483                         reg |= PSC_CONTROL_FORCED_LINK;
 484                         e6000sw_writereg(sc, REG_PORT(sc, port), PSC_CONTROL,
 485                             reg);
 486
 487                         /*
 488                          * Force speed, full-duplex, EEE off and flow-control
 489                          * on.
 490                          */
 491                         reg &= ~(PSC_CONTROL_SPD2500 | PSC_CONTROL_ALT_SPD |
 492                             PSC_CONTROL_FORCED_FC | PSC_CONTROL_FC_ON |
 493                             PSC_CONTROL_FORCED_EEE);
 494                         if (e6000sw_is_fixed25port(sc, port))
 495                                 reg |= PSC_CONTROL_SPD2500;
 496                         else
 497                                 reg |= PSC_CONTROL_SPD1000;
 498                         if (MVSWITCH(sc, MV88E6190) &&
 499                             e6000sw_is_fixed25port(sc, port))
 500                                 reg |= PSC_CONTROL_ALT_SPD;
 501                         reg |= PSC_CONTROL_FORCED_DPX | PSC_CONTROL_FULLDPX |
 502                             PSC_CONTROL_FORCED_LINK | PSC_CONTROL_LINK_UP |
 503                             PSC_CONTROL_FORCED_SPD;
 504                         if (!MVSWITCH(sc, MV88E6190))
 505                                 reg |= PSC_CONTROL_FORCED_FC | PSC_CONTROL_FC_ON;
 506                         if (MVSWITCH(sc, MV88E6141) ||
 507                             MVSWITCH(sc, MV88E6341) ||
 508                             MVSWITCH(sc, MV88E6190))
 509                                 reg |= PSC_CONTROL_FORCED_EEE;
 510                         e6000sw_writereg(sc, REG_PORT(sc, port), PSC_CONTROL,
 511                             reg);
 512                         /* Power on the SERDES interfaces. */
 513                         if (MVSWITCH(sc, MV88E6190) &&
 514                             (port == 9 || port == 10)) {
 515                                 if (e6000sw_is_fixed25port(sc, port))
 516                                         sgmii = false;
 517                                 else
 518                                         sgmii = true;
 519                                 e6000sw_serdes_power(sc->dev, port, sgmii);
 520                         }
 521                 }
 522
 523                 /* Don't attach miibus at CPU/fixed ports */
 524                 if (!e6000sw_is_phyport(sc, port))
 525                         continue;
 526
 527                 err = e6000sw_attach_miibus(sc, port);
 528                 if (err != 0) {
 529                         device_printf(sc->dev, "failed to attach miibus\n");
 530                         goto out_fail;
 531                 }
 532         }
 533
 534         etherswitch_info.es_nports = sc->num_ports;
 535
 536         /* Default to port vlan. */
 537         e6000sw_set_vlan_mode(sc, ETHERSWITCH_VLAN_PORT);
 538
 539         reg = e6000sw_readreg(sc, REG_GLOBAL, SWITCH_GLOBAL_STATUS);
 540         if (reg & SWITCH_GLOBAL_STATUS_IR)
 541                 device_printf(dev, "switch is ready.\n");
 542         E6000SW_UNLOCK(sc);
 543
 544         bus_generic_probe(dev);
 545         bus_generic_attach(dev);
 546
 547         kproc_create(e6000sw_tick, sc, &sc->kproc, 0, 0, "e6000sw tick kproc");
 548
 549         return (0);
 550
 551 out_fail:
 552         E6000SW_UNLOCK(sc);
 553         e6000sw_detach(dev);
 554
 555         return (err);
 556 }
 557
 558 static int
 559 e6000sw_waitready(e6000sw_softc_t *sc, uint32_t phy, uint32_t reg,
 560     uint32_t busybit)
 561 {
 562         int i;
 563
 564         for (i = 0; i < E6000SW_RETRIES; i++) {
 565                 if ((e6000sw_readreg(sc, phy, reg) & busybit) == 0)
 566                         return (0);
 567                 DELAY(1);
 568         }
 569
 570         return (1);
 571 }
 572
 573 /* XMDIO/Clause 45 access. */
 574 static int
 575 e6000sw_read_xmdio(device_t dev, int phy, int devaddr, int devreg)
 576 {
 577         e6000sw_softc_t *sc;
 578         uint32_t reg;
 579
 580         sc = device_get_softc(dev);
 581         E6000SW_LOCK_ASSERT(sc, SA_XLOCKED);
 582         if (E6000SW_WAITREADY2(sc, SMI_PHY_CMD_REG, SMI_CMD_BUSY)) {
 583                 device_printf(dev, "Timeout while waiting for switch\n");
 584                 return (ETIMEDOUT);
 585         }
 586
 587         reg = devaddr & SMI_CMD_REG_ADDR_MASK;
 588         reg |= (phy << SMI_CMD_DEV_ADDR) & SMI_CMD_DEV_ADDR_MASK;
 589
 590         /* Load C45 register address. */
 591         e6000sw_writereg(sc, REG_GLOBAL2, SMI_PHY_DATA_REG, devreg);
 592         e6000sw_writereg(sc, REG_GLOBAL2, SMI_PHY_CMD_REG,
 593             reg | SMI_CMD_OP_C45_ADDR);
 594         if (E6000SW_WAITREADY2(sc, SMI_PHY_CMD_REG, SMI_CMD_BUSY)) {
 595                 device_printf(dev, "Timeout while waiting for switch\n");
 596                 return (ETIMEDOUT);
 597         }
 598
 599         /* Start C45 read operation. */
 600         e6000sw_writereg(sc, REG_GLOBAL2, SMI_PHY_CMD_REG,
 601             reg | SMI_CMD_OP_C45_READ);
 602         if (E6000SW_WAITREADY2(sc, SMI_PHY_CMD_REG, SMI_CMD_BUSY)) {
 603                 device_printf(dev, "Timeout while waiting for switch\n");
 604                 return (ETIMEDOUT);
 605         }
 606
 607         /* Read C45 data. */
 608         reg = e6000sw_readreg(sc, REG_GLOBAL2, SMI_PHY_DATA_REG);
 609
 610         return (reg & PHY_DATA_MASK);
 611 }
 612
 613 static int
 614 e6000sw_write_xmdio(device_t dev, int phy, int devaddr, int devreg, int val)
 615 {
 616         e6000sw_softc_t *sc;
 617         uint32_t reg;
 618
 619         sc = device_get_softc(dev);
 620         E6000SW_LOCK_ASSERT(sc, SA_XLOCKED);
 621         if (E6000SW_WAITREADY2(sc, SMI_PHY_CMD_REG, SMI_CMD_BUSY)) {
 622                 device_printf(dev, "Timeout while waiting for switch\n");
 623                 return (ETIMEDOUT);
 624         }
 625
 626         reg = devaddr & SMI_CMD_REG_ADDR_MASK;
 627         reg |= (phy << SMI_CMD_DEV_ADDR) & SMI_CMD_DEV_ADDR_MASK;
 628
 629         /* Load C45 register address. */
 630         e6000sw_writereg(sc, REG_GLOBAL2, SMI_PHY_DATA_REG, devreg);
 631         e6000sw_writereg(sc, REG_GLOBAL2, SMI_PHY_CMD_REG,
 632             reg | SMI_CMD_OP_C45_ADDR);
 633         if (E6000SW_WAITREADY2(sc, SMI_PHY_CMD_REG, SMI_CMD_BUSY)) {
 634                 device_printf(dev, "Timeout while waiting for switch\n");
 635                 return (ETIMEDOUT);
 636         }
 637
 638         /* Load data and start the C45 write operation. */
 639         e6000sw_writereg(sc, REG_GLOBAL2, SMI_PHY_DATA_REG, devreg);
 640         e6000sw_writereg(sc, REG_GLOBAL2, SMI_PHY_CMD_REG,
 641             reg | SMI_CMD_OP_C45_WRITE);
 642
 643         return (0);
 644 }
 645
 646 /*
 647  * PHY registers are paged. Put page index in reg 22 (accessible from every
 648  * page), then access specific register.
 649  */
 650 static int
 651 e6000sw_readphy(device_t dev, int phy, int reg)
 652 {
 653         e6000sw_softc_t *sc;
 654         uint32_t val;
 655
 656         sc = device_get_softc(dev);
 657         if (!e6000sw_is_phyport(sc, phy) || reg >= E6000SW_NUM_PHY_REGS) {
 658                 device_printf(dev, "Wrong register address.\n");
 659                 return (EINVAL);
 660         }
 661
 662         E6000SW_LOCK_ASSERT(sc, SA_XLOCKED);
 663         if (E6000SW_WAITREADY2(sc, SMI_PHY_CMD_REG, SMI_CMD_BUSY)) {
 664                 device_printf(dev, "Timeout while waiting for switch\n");
 665                 return (ETIMEDOUT);
 666         }
 667
 668         e6000sw_writereg(sc, REG_GLOBAL2, SMI_PHY_CMD_REG,
 669             SMI_CMD_OP_C22_READ | (reg & SMI_CMD_REG_ADDR_MASK) |
 670             ((phy << SMI_CMD_DEV_ADDR) & SMI_CMD_DEV_ADDR_MASK));
 671         if (E6000SW_WAITREADY2(sc, SMI_PHY_CMD_REG, SMI_CMD_BUSY)) {
 672                 device_printf(dev, "Timeout while waiting for switch\n");
 673                 return (ETIMEDOUT);
 674         }
 675
 676         val = e6000sw_readreg(sc, REG_GLOBAL2, SMI_PHY_DATA_REG);
 677
 678         return (val & PHY_DATA_MASK);
 679 }
 680
 681 static int
 682 e6000sw_writephy(device_t dev, int phy, int reg, int data)
 683 {
 684         e6000sw_softc_t *sc;
 685
 686         sc = device_get_softc(dev);
 687         if (!e6000sw_is_phyport(sc, phy) || reg >= E6000SW_NUM_PHY_REGS) {
 688                 device_printf(dev, "Wrong register address.\n");
 689                 return (EINVAL);
 690         }
 691
 692         E6000SW_LOCK_ASSERT(sc, SA_XLOCKED);
 693         if (E6000SW_WAITREADY2(sc, SMI_PHY_CMD_REG, SMI_CMD_BUSY)) {
 694                 device_printf(dev, "Timeout while waiting for switch\n");
 695                 return (ETIMEDOUT);
 696         }
 697
 698         e6000sw_writereg(sc, REG_GLOBAL2, SMI_PHY_DATA_REG,
 699             data & PHY_DATA_MASK);
 700         e6000sw_writereg(sc, REG_GLOBAL2, SMI_PHY_CMD_REG,
 701             SMI_CMD_OP_C22_WRITE | (reg & SMI_CMD_REG_ADDR_MASK) |
 702             ((phy << SMI_CMD_DEV_ADDR) & SMI_CMD_DEV_ADDR_MASK));
 703
 704         return (0);
 705 }
 706
 707 static int
 708 e6000sw_detach(device_t dev)
 709 {
 710         int phy;
 711         e6000sw_softc_t *sc;
 712
 713         sc = device_get_softc(dev);
 714         bus_generic_detach(dev);
 715         sx_destroy(&sc->sx);
 716         for (phy = 0; phy < sc->num_ports; phy++) {
 717                 if (sc->miibus[phy] != NULL)
 718                         device_delete_child(dev, sc->miibus[phy]);
 719                 if (sc->ifp[phy] != NULL)
 720                         if_free(sc->ifp[phy]);
 721                 if (sc->ifname[phy] != NULL)
 722                         free(sc->ifname[phy], M_E6000SW);
 723         }
 724
 725         return (0);
 726 }
 727
 728 static etherswitch_info_t*
 729 e6000sw_getinfo(device_t dev)
 730 {
 731
 732         return (&etherswitch_info);
 733 }
 734
 735 static int
 736 e6000sw_getconf(device_t dev, etherswitch_conf_t *conf)
 737 {
 738         struct e6000sw_softc *sc;
 739
 740         /* Return the VLAN mode. */
 741         sc = device_get_softc(dev);
 742         conf->cmd = ETHERSWITCH_CONF_VLAN_MODE;
 743         conf->vlan_mode = sc->vlan_mode;
 744
 745         return (0);
 746 }
 747
 748 static int
 749 e6000sw_setconf(device_t dev, etherswitch_conf_t *conf)
 750 {
 751         struct e6000sw_softc *sc;
 752
 753         /* Set the VLAN mode. */
 754         sc = device_get_softc(dev);
 755         if (conf->cmd & ETHERSWITCH_CONF_VLAN_MODE) {
 756                 E6000SW_LOCK(sc);
 757                 e6000sw_set_vlan_mode(sc, conf->vlan_mode);
 758                 E6000SW_UNLOCK(sc);
 759         }
 760
 761         return (0);
 762 }
 763
 764 static void
 765 e6000sw_lock(device_t dev)
 766 {
 767         struct e6000sw_softc *sc;
 768
 769         sc = device_get_softc(dev);
 770
 771         E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED);
 772         E6000SW_LOCK(sc);
 773 }
 774
 775 static void
 776 e6000sw_unlock(device_t dev)
 777 {
 778         struct e6000sw_softc *sc;
 779
 780         sc = device_get_softc(dev);
 781
 782         E6000SW_LOCK_ASSERT(sc, SA_XLOCKED);
 783         E6000SW_UNLOCK(sc);
 784 }
 785
 786 static int
 787 e6000sw_getport(device_t dev, etherswitch_port_t *p)
 788 {
 789         struct mii_data *mii;
 790         int err;
 791         struct ifmediareq *ifmr;
 792         uint32_t reg;
 793
 794         e6000sw_softc_t *sc = device_get_softc(dev);
 795         E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED);
 796
 797         if (p->es_port >= sc->num_ports || p->es_port < 0)
 798                 return (EINVAL);
 799         if (!e6000sw_is_portenabled(sc, p->es_port))
 800                 return (0);
 801
 802         E6000SW_LOCK(sc);
 803         e6000sw_get_pvid(sc, p->es_port, &p->es_pvid);
 804
 805         /* Port flags. */
 806         reg = e6000sw_readreg(sc, REG_PORT(sc, p->es_port), PORT_CONTROL2);
 807         if (reg & PORT_CONTROL2_DISC_TAGGED)
 808                 p->es_flags |= ETHERSWITCH_PORT_DROPTAGGED;
 809         if (reg & PORT_CONTROL2_DISC_UNTAGGED)
 810                 p->es_flags |= ETHERSWITCH_PORT_DROPUNTAGGED;
 811
 812         err = 0;
 813         if (e6000sw_is_fixedport(sc, p->es_port)) {
 814                 if (e6000sw_is_cpuport(sc, p->es_port))
 815                         p->es_flags |= ETHERSWITCH_PORT_CPU;
 816                 ifmr = &p->es_ifmr;
 817                 ifmr->ifm_status = IFM_ACTIVE | IFM_AVALID;
 818                 ifmr->ifm_count = 0;
 819                 if (e6000sw_is_fixed25port(sc, p->es_port))
 820                         ifmr->ifm_active = IFM_2500_T;
 821                 else
 822                         ifmr->ifm_active = IFM_1000_T;
 823                 ifmr->ifm_active |= IFM_ETHER | IFM_FDX;
 824                 ifmr->ifm_current = ifmr->ifm_active;
 825                 ifmr->ifm_mask = 0;
 826         } else {
 827                 mii = e6000sw_miiforphy(sc, p->es_port);
 828                 err = ifmedia_ioctl(mii->mii_ifp, &p->es_ifr,
 829                     &mii->mii_media, SIOCGIFMEDIA);
 830         }
 831         E6000SW_UNLOCK(sc);
 832
 833         return (err);
 834 }
 835
 836 static int
 837 e6000sw_setport(device_t dev, etherswitch_port_t *p)
 838 {
 839         e6000sw_softc_t *sc;
 840         int err;
 841         struct mii_data *mii;
 842         uint32_t reg;
 843
 844         sc = device_get_softc(dev);
 845         E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED);
 846
 847         if (p->es_port >= sc->num_ports || p->es_port < 0)
 848                 return (EINVAL);
 849         if (!e6000sw_is_portenabled(sc, p->es_port))
 850                 return (0);
 851
 852         E6000SW_LOCK(sc);
 853
 854         /* Port flags. */
 855         reg = e6000sw_readreg(sc, REG_PORT(sc, p->es_port), PORT_CONTROL2);
 856         if (p->es_flags & ETHERSWITCH_PORT_DROPTAGGED)
 857                 reg |= PORT_CONTROL2_DISC_TAGGED;
 858         else
 859                 reg &= ~PORT_CONTROL2_DISC_TAGGED;
 860         if (p->es_flags & ETHERSWITCH_PORT_DROPUNTAGGED)
 861                 reg |= PORT_CONTROL2_DISC_UNTAGGED;
 862         else
 863                 reg &= ~PORT_CONTROL2_DISC_UNTAGGED;
 864         e6000sw_writereg(sc, REG_PORT(sc, p->es_port), PORT_CONTROL2, reg);
 865
 866         err = 0;
 867         if (p->es_pvid != 0)
 868                 e6000sw_set_pvid(sc, p->es_port, p->es_pvid);
 869         if (e6000sw_is_phyport(sc, p->es_port)) {
 870                 mii = e6000sw_miiforphy(sc, p->es_port);
 871                 err = ifmedia_ioctl(mii->mii_ifp, &p->es_ifr, &mii->mii_media,
 872                     SIOCSIFMEDIA);
 873         }
 874         E6000SW_UNLOCK(sc);
 875
 876         return (err);
 877 }
 878
 879 static __inline void
 880 e6000sw_port_vlan_assign(e6000sw_softc_t *sc, int port, uint32_t fid,
 881     uint32_t members)
 882 {
 883         uint32_t reg;
 884
 885         reg = e6000sw_readreg(sc, REG_PORT(sc, port), PORT_VLAN_MAP);
 886         reg &= ~(PORT_MASK(sc) | PORT_VLAN_MAP_FID_MASK);
 887         reg |= members & PORT_MASK(sc) & ~(1 << port);
 888         reg |= (fid << PORT_VLAN_MAP_FID) & PORT_VLAN_MAP_FID_MASK;
 889         e6000sw_writereg(sc, REG_PORT(sc, port), PORT_VLAN_MAP, reg);
 890         reg = e6000sw_readreg(sc, REG_PORT(sc, port), PORT_CONTROL1);
 891         reg &= ~PORT_CONTROL1_FID_MASK;
 892         reg |= (fid >> 4) & PORT_CONTROL1_FID_MASK;
 893         e6000sw_writereg(sc, REG_PORT(sc, port), PORT_CONTROL1, reg);
 894 }
 895
 896 static int
 897 e6000sw_init_vlan(struct e6000sw_softc *sc)
 898 {
 899         int i, port, ret;
 900         uint32_t members;
 901
 902         /* Disable all ports */
 903         for (port = 0; port < sc->num_ports; port++) {
 904                 ret = e6000sw_readreg(sc, REG_PORT(sc, port), PORT_CONTROL);
 905                 e6000sw_writereg(sc, REG_PORT(sc, port), PORT_CONTROL,
 906                     (ret & ~PORT_CONTROL_ENABLE));
 907         }
 908
 909         /* Flush VTU. */
 910         e6000sw_vtu_flush(sc);
 911
 912         for (port = 0; port < sc->num_ports; port++) {
 913                 /* Reset the egress and frame mode. */
 914                 ret = e6000sw_readreg(sc, REG_PORT(sc, port), PORT_CONTROL);
 915                 ret &= ~(PORT_CONTROL_EGRESS | PORT_CONTROL_FRAME);
 916                 e6000sw_writereg(sc, REG_PORT(sc, port), PORT_CONTROL, ret);
 917
 918                 /* Set the the 802.1q mode. */
 919                 ret = e6000sw_readreg(sc, REG_PORT(sc, port), PORT_CONTROL2);
 920                 ret &= ~PORT_CONTROL2_DOT1Q;
 921                 if (sc->vlan_mode == ETHERSWITCH_VLAN_DOT1Q)
 922                         ret |= PORT_CONTROL2_DOT1Q;
 923                 e6000sw_writereg(sc, REG_PORT(sc, port), PORT_CONTROL2, ret);
 924         }
 925
 926         for (port = 0; port < sc->num_ports; port++) {
 927                 if (!e6000sw_is_portenabled(sc, port))
 928                         continue;
 929
 930                 ret = e6000sw_readreg(sc, REG_PORT(sc, port), PORT_VID);
 931
 932                 /* Set port priority */
 933                 ret &= ~PORT_VID_PRIORITY_MASK;
 934
 935                 /* Set VID map */
 936                 ret &= ~PORT_VID_DEF_VID_MASK;
 937                 if (sc->vlan_mode == ETHERSWITCH_VLAN_DOT1Q)
 938                         ret |= 1;
 939                 else
 940                         ret |= (port + 1);
 941                 e6000sw_writereg(sc, REG_PORT(sc, port), PORT_VID, ret);
 942         }
 943
 944         /* Assign the member ports to each origin port. */
 945         for (port = 0; port < sc->num_ports; port++) {
 946                 members = 0;
 947                 if (e6000sw_is_portenabled(sc, port)) {
 948                         for (i = 0; i < sc->num_ports; i++) {
 949                                 if (i == port || !e6000sw_is_portenabled(sc, i))
 950                                         continue;
 951                                 members |= (1 << i);
 952                         }
 953                 }
 954                 /* Default to FID 0. */
 955                 e6000sw_port_vlan_assign(sc, port, 0, members);
 956         }
 957
 958         /* Reset internal VLAN table. */
 959         for (i = 0; i < nitems(sc->vlans); i++)
 960                 sc->vlans[i] = 0;
 961
 962         /* Create default VLAN (1). */
 963         if (sc->vlan_mode == ETHERSWITCH_VLAN_DOT1Q) {
 964                 sc->vlans[0] = 1;
 965                 e6000sw_vtu_update(sc, 0, sc->vlans[0], 1, 0, sc->ports_mask);
 966         }
 967
 968         /* Enable all ports */
 969         for (port = 0; port < sc->num_ports; port++) {
 970                 if (!e6000sw_is_portenabled(sc, port))
 971                         continue;
 972                 ret = e6000sw_readreg(sc, REG_PORT(sc, port), PORT_CONTROL);
 973                 e6000sw_writereg(sc, REG_PORT(sc, port), PORT_CONTROL,
 974                     (ret | PORT_CONTROL_ENABLE));
 975         }
 976
 977         return (0);
 978 }
 979
 980 static int
 981 e6000sw_set_vlan_mode(struct e6000sw_softc *sc, uint32_t mode)
 982 {
 983
 984         E6000SW_LOCK_ASSERT(sc, SA_XLOCKED);
 985         switch (mode) {
 986         case ETHERSWITCH_VLAN_PORT:
 987                 sc->vlan_mode = ETHERSWITCH_VLAN_PORT;
 988                 etherswitch_info.es_nvlangroups = sc->num_ports;
 989                 return (e6000sw_init_vlan(sc));
 990                 break;
 991         case ETHERSWITCH_VLAN_DOT1Q:
 992                 sc->vlan_mode = ETHERSWITCH_VLAN_DOT1Q;
 993                 etherswitch_info.es_nvlangroups = E6000SW_NUM_VLANS;
 994                 return (e6000sw_init_vlan(sc));
 995                 break;
 996         default:
 997                 return (EINVAL);
 998         }
 999 }
1000
1001 /*
1002  * Registers in this switch are divided into sections, specified in
1003  * documentation. So as to access any of them, section index and reg index
1004  * is necessary. etherswitchcfg uses only one variable, so indexes were
1005  * compressed into addr_reg: 32 * section_index + reg_index.
1006  */
1007 static int
1008 e6000sw_readreg_wrapper(device_t dev, int addr_reg)
1009 {
1010         e6000sw_softc_t *sc;
1011
1012         sc = device_get_softc(dev);
1013         if ((addr_reg > (REG_GLOBAL2 * 32 + REG_NUM_MAX)) ||
1014             (addr_reg < (REG_PORT(sc, 0) * 32))) {
1015                 device_printf(dev, "Wrong register address.\n");
1016                 return (EINVAL);
1017         }
1018
1019         return (e6000sw_readreg(device_get_softc(dev), addr_reg / 32,
1020             addr_reg % 32));
1021 }
1022
1023 static int
1024 e6000sw_writereg_wrapper(device_t dev, int addr_reg, int val)
1025 {
1026         e6000sw_softc_t *sc;
1027
1028         sc = device_get_softc(dev);
1029         if ((addr_reg > (REG_GLOBAL2 * 32 + REG_NUM_MAX)) ||
1030             (addr_reg < (REG_PORT(sc, 0) * 32))) {
1031                 device_printf(dev, "Wrong register address.\n");
1032                 return (EINVAL);
1033         }
1034         e6000sw_writereg(device_get_softc(dev), addr_reg / 5,
1035             addr_reg % 32, val);
1036
1037         return (0);
1038 }
1039
1040 /*
1041  * These wrappers are necessary because PHY accesses from etherswitchcfg
1042  * need to be synchronized with locks, while miibus PHY accesses do not.
1043  */
1044 static int
1045 e6000sw_readphy_wrapper(device_t dev, int phy, int reg)
1046 {
1047         e6000sw_softc_t *sc;
1048         int ret;
1049
1050         sc = device_get_softc(dev);
1051         E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED);
1052
1053         E6000SW_LOCK(sc);
1054         ret = e6000sw_readphy(dev, phy, reg);
1055         E6000SW_UNLOCK(sc);
1056
1057         return (ret);
1058 }
1059
1060 static int
1061 e6000sw_writephy_wrapper(device_t dev, int phy, int reg, int data)
1062 {
1063         e6000sw_softc_t *sc;
1064         int ret;
1065
1066         sc = device_get_softc(dev);
1067         E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED);
1068
1069         E6000SW_LOCK(sc);
1070         ret = e6000sw_writephy(dev, phy, reg, data);
1071         E6000SW_UNLOCK(sc);
1072
1073         return (ret);
1074 }
1075
1076 /*
1077  * setvgroup/getvgroup called from etherswitchfcg need to be locked,
1078  * while internal calls do not.
1079  */
1080 static int
1081 e6000sw_setvgroup_wrapper(device_t dev, etherswitch_vlangroup_t *vg)
1082 {
1083         e6000sw_softc_t *sc;
1084         int ret;
1085
1086         sc = device_get_softc(dev);
1087         E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED);
1088
1089         E6000SW_LOCK(sc);
1090         ret = e6000sw_setvgroup(dev, vg);
1091         E6000SW_UNLOCK(sc);
1092
1093         return (ret);
1094 }
1095
1096 static int
1097 e6000sw_getvgroup_wrapper(device_t dev, etherswitch_vlangroup_t *vg)
1098 {
1099         e6000sw_softc_t *sc;
1100         int ret;
1101
1102         sc = device_get_softc(dev);
1103         E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED);
1104
1105         E6000SW_LOCK(sc);
1106         ret = e6000sw_getvgroup(dev, vg);
1107         E6000SW_UNLOCK(sc);
1108
1109         return (ret);
1110 }
1111
1112 static int
1113 e6000sw_set_port_vlan(e6000sw_softc_t *sc, etherswitch_vlangroup_t *vg)
1114 {
1115         uint32_t port;
1116
1117         port = vg->es_vlangroup;
1118         if (port > sc->num_ports)
1119                 return (EINVAL);
1120
1121         if (vg->es_member_ports != vg->es_untagged_ports) {
1122                 device_printf(sc->dev, "Tagged ports not supported.\n");
1123                 return (EINVAL);
1124         }
1125
1126         e6000sw_port_vlan_assign(sc, port, 0, vg->es_untagged_ports);
1127         vg->es_vid = port | ETHERSWITCH_VID_VALID;
1128
1129         return (0);
1130 }
1131
1132 static int
1133 e6000sw_set_dot1q_vlan(e6000sw_softc_t *sc, etherswitch_vlangroup_t *vg)
1134 {
1135         int i, vlan;
1136
1137         vlan = vg->es_vid & ETHERSWITCH_VID_MASK;
1138
1139         /* Set VLAN to '0' removes it from table. */
1140         if (vlan == 0) {
1141                 e6000sw_vtu_update(sc, VTU_PURGE,
1142                     sc->vlans[vg->es_vlangroup], 0, 0, 0);
1143                 sc->vlans[vg->es_vlangroup] = 0;
1144                 return (0);
1145         }
1146
1147         /* Is this VLAN already in table ? */
1148         for (i = 0; i < etherswitch_info.es_nvlangroups; i++)
1149                 if (i != vg->es_vlangroup && vlan == sc->vlans[i])
1150                         return (EINVAL);
1151
1152         sc->vlans[vg->es_vlangroup] = vlan;
1153         e6000sw_vtu_update(sc, 0, vlan, vg->es_vlangroup + 1,
1154             vg->es_member_ports & sc->ports_mask,
1155             vg->es_untagged_ports & sc->ports_mask);
1156
1157         return (0);
1158 }
1159
1160 static int
1161 e6000sw_setvgroup(device_t dev, etherswitch_vlangroup_t *vg)
1162 {
1163         e6000sw_softc_t *sc;
1164
1165         sc = device_get_softc(dev);
1166         E6000SW_LOCK_ASSERT(sc, SA_XLOCKED);
1167
1168         if (sc->vlan_mode == ETHERSWITCH_VLAN_PORT)
1169                 return (e6000sw_set_port_vlan(sc, vg));
1170         else if (sc->vlan_mode == ETHERSWITCH_VLAN_DOT1Q)
1171                 return (e6000sw_set_dot1q_vlan(sc, vg));
1172
1173         return (EINVAL);
1174 }
1175
1176 static int
1177 e6000sw_get_port_vlan(e6000sw_softc_t *sc, etherswitch_vlangroup_t *vg)
1178 {
1179         uint32_t port, reg;
1180
1181         port = vg->es_vlangroup;
1182         if (port > sc->num_ports)
1183                 return (EINVAL);
1184
1185         if (!e6000sw_is_portenabled(sc, port)) {
1186                 vg->es_vid = port;
1187                 return (0);
1188         }
1189
1190         reg = e6000sw_readreg(sc, REG_PORT(sc, port), PORT_VLAN_MAP);
1191         vg->es_untagged_ports = vg->es_member_ports = reg & PORT_MASK(sc);
1192         vg->es_vid = port | ETHERSWITCH_VID_VALID;
1193         vg->es_fid = (reg & PORT_VLAN_MAP_FID_MASK) >> PORT_VLAN_MAP_FID;
1194         reg = e6000sw_readreg(sc, REG_PORT(sc, port), PORT_CONTROL1);
1195         vg->es_fid |= (reg & PORT_CONTROL1_FID_MASK) << 4;
1196
1197         return (0);
1198 }
1199
1200 static int
1201 e6000sw_get_dot1q_vlan(e6000sw_softc_t *sc, etherswitch_vlangroup_t *vg)
1202 {
1203         int i, port;
1204         uint32_t reg;
1205
1206         vg->es_fid = 0;
1207         vg->es_vid = sc->vlans[vg->es_vlangroup];
1208         vg->es_untagged_ports = vg->es_member_ports = 0;
1209         if (vg->es_vid == 0)
1210                 return (0);
1211
1212         if (E6000SW_WAITREADY(sc, VTU_OPERATION, VTU_BUSY)) {
1213                 device_printf(sc->dev, "VTU unit is busy, cannot access\n");
1214                 return (EBUSY);
1215         }
1216
1217         e6000sw_writereg(sc, REG_GLOBAL, VTU_VID, vg->es_vid - 1);
1218
1219         reg = e6000sw_readreg(sc, REG_GLOBAL, VTU_OPERATION);
1220         reg &= ~VTU_OP_MASK;
1221         reg |= VTU_GET_NEXT | VTU_BUSY;
1222         e6000sw_writereg(sc, REG_GLOBAL, VTU_OPERATION, reg);
1223         if (E6000SW_WAITREADY(sc, VTU_OPERATION, VTU_BUSY)) {
1224                 device_printf(sc->dev, "Timeout while reading\n");
1225                 return (EBUSY);
1226         }
1227
1228         reg = e6000sw_readreg(sc, REG_GLOBAL, VTU_VID);
1229         if (reg == VTU_VID_MASK || (reg & VTU_VID_VALID) == 0)
1230                 return (EINVAL);
1231         if ((reg & VTU_VID_MASK) != vg->es_vid)
1232                 return (EINVAL);
1233
1234         vg->es_vid |= ETHERSWITCH_VID_VALID;
1235         reg = e6000sw_readreg(sc, REG_GLOBAL, VTU_DATA);
1236         for (i = 0; i < sc->num_ports; i++) {
1237                 if (i == VTU_PPREG(sc))
1238                         reg = e6000sw_readreg(sc, REG_GLOBAL, VTU_DATA2);
1239                 port = (reg >> VTU_PORT(sc, i)) & VTU_PORT_MASK;
1240                 if (port == VTU_PORT_UNTAGGED) {
1241                         vg->es_untagged_ports |= (1 << i);
1242                         vg->es_member_ports |= (1 << i);
1243                 } else if (port == VTU_PORT_TAGGED)
1244                         vg->es_member_ports |= (1 << i);
1245         }
1246
1247         return (0);
1248 }
1249
1250 static int
1251 e6000sw_getvgroup(device_t dev, etherswitch_vlangroup_t *vg)
1252 {
1253         e6000sw_softc_t *sc;
1254
1255         sc = device_get_softc(dev);
1256         E6000SW_LOCK_ASSERT(sc, SA_XLOCKED);
1257
1258         if (sc->vlan_mode == ETHERSWITCH_VLAN_PORT)
1259                 return (e6000sw_get_port_vlan(sc, vg));
1260         else if (sc->vlan_mode == ETHERSWITCH_VLAN_DOT1Q)
1261                 return (e6000sw_get_dot1q_vlan(sc, vg));
1262
1263         return (EINVAL);
1264 }
1265
1266 static __inline struct mii_data*
1267 e6000sw_miiforphy(e6000sw_softc_t *sc, unsigned int phy)
1268 {
1269
1270         if (!e6000sw_is_phyport(sc, phy))
1271                 return (NULL);
1272
1273         return (device_get_softc(sc->miibus[phy]));
1274 }
1275
1276 static int
1277 e6000sw_ifmedia_upd(struct ifnet *ifp)
1278 {
1279         e6000sw_softc_t *sc;
1280         struct mii_data *mii;
1281
1282         sc = ifp->if_softc;
1283         mii = e6000sw_miiforphy(sc, ifp->if_dunit);
1284         if (mii == NULL)
1285                 return (ENXIO);
1286         mii_mediachg(mii);
1287
1288         return (0);
1289 }
1290
1291 static void
1292 e6000sw_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
1293 {
1294         e6000sw_softc_t *sc;
1295         struct mii_data *mii;
1296
1297         sc = ifp->if_softc;
1298         mii = e6000sw_miiforphy(sc, ifp->if_dunit);
1299
1300         if (mii == NULL)
1301                 return;
1302
1303         mii_pollstat(mii);
1304         ifmr->ifm_active = mii->mii_media_active;
1305         ifmr->ifm_status = mii->mii_media_status;
1306 }
1307
1308 static int
1309 e6000sw_smi_waitready(e6000sw_softc_t *sc, int phy)
1310 {
1311         int i;
1312
1313         for (i = 0; i < E6000SW_SMI_TIMEOUT; i++) {
1314                 if ((MDIO_READ(sc->dev, phy, SMI_CMD) & SMI_CMD_BUSY) == 0)
1315                         return (0);
1316                 DELAY(1);
1317         }
1318
1319         return (1);
1320 }
1321
1322 static __inline uint32_t
1323 e6000sw_readreg(e6000sw_softc_t *sc, int addr, int reg)
1324 {
1325
1326         E6000SW_LOCK_ASSERT(sc, SA_XLOCKED);
1327
1328         if (!MVSWITCH_MULTICHIP(sc))
1329                 return (MDIO_READ(sc->dev, addr, reg) & 0xffff);
1330
1331         if (e6000sw_smi_waitready(sc, sc->sw_addr)) {
1332                 printf("e6000sw: readreg timeout\n");
1333                 return (0xffff);
1334         }
1335         MDIO_WRITE(sc->dev, sc->sw_addr, SMI_CMD,
1336             SMI_CMD_OP_C22_READ | (reg & SMI_CMD_REG_ADDR_MASK) |
1337             ((addr << SMI_CMD_DEV_ADDR) & SMI_CMD_DEV_ADDR_MASK));
1338         if (e6000sw_smi_waitready(sc, sc->sw_addr)) {
1339                 printf("e6000sw: readreg timeout\n");
1340                 return (0xffff);
1341         }
1342
1343         return (MDIO_READ(sc->dev, sc->sw_addr, SMI_DATA) & 0xffff);
1344 }
1345
1346 static __inline void
1347 e6000sw_writereg(e6000sw_softc_t *sc, int addr, int reg, int val)
1348 {
1349
1350         E6000SW_LOCK_ASSERT(sc, SA_XLOCKED);
1351
1352         if (!MVSWITCH_MULTICHIP(sc)) {
1353                 MDIO_WRITE(sc->dev, addr, reg, val);
1354                 return;
1355         }
1356
1357         if (e6000sw_smi_waitready(sc, sc->sw_addr)) {
1358                 printf("e6000sw: readreg timeout\n");
1359                 return;
1360         }
1361         MDIO_WRITE(sc->dev, sc->sw_addr, SMI_DATA, val);
1362         MDIO_WRITE(sc->dev, sc->sw_addr, SMI_CMD,
1363             SMI_CMD_OP_C22_WRITE | (reg & SMI_CMD_REG_ADDR_MASK) |
1364             ((addr << SMI_CMD_DEV_ADDR) & SMI_CMD_DEV_ADDR_MASK));
1365 }
1366
1367 static __inline bool
1368 e6000sw_is_cpuport(e6000sw_softc_t *sc, int port)
1369 {
1370
1371         return ((sc->cpuports_mask & (1 << port)) ? true : false);
1372 }
1373
1374 static __inline bool
1375 e6000sw_is_fixedport(e6000sw_softc_t *sc, int port)
1376 {
1377
1378         return ((sc->fixed_mask & (1 << port)) ? true : false);
1379 }
1380
1381 static __inline bool
1382 e6000sw_is_fixed25port(e6000sw_softc_t *sc, int port)
1383 {
1384
1385         return ((sc->fixed25_mask & (1 << port)) ? true : false);
1386 }
1387
1388 static __inline bool
1389 e6000sw_is_phyport(e6000sw_softc_t *sc, int port)
1390 {
1391         uint32_t phy_mask;
1392         phy_mask = ~(sc->fixed_mask | sc->cpuports_mask);
1393
1394         return ((phy_mask & (1 << port)) ? true : false);
1395 }
1396
1397 static __inline bool
1398 e6000sw_is_portenabled(e6000sw_softc_t *sc, int port)
1399 {
1400
1401         return ((sc->ports_mask & (1 << port)) ? true : false);
1402 }
1403
1404 static __inline void
1405 e6000sw_set_pvid(e6000sw_softc_t *sc, int port, int pvid)
1406 {
1407         uint32_t reg;
1408
1409         reg = e6000sw_readreg(sc, REG_PORT(sc, port), PORT_VID);
1410         reg &= ~PORT_VID_DEF_VID_MASK;
1411         reg |= (pvid & PORT_VID_DEF_VID_MASK);
1412         e6000sw_writereg(sc, REG_PORT(sc, port), PORT_VID, reg);
1413 }
1414
1415 static __inline int
1416 e6000sw_get_pvid(e6000sw_softc_t *sc, int port, int *pvid)
1417 {
1418
1419         if (pvid == NULL)
1420                 return (ENXIO);
1421
1422         *pvid = e6000sw_readreg(sc, REG_PORT(sc, port), PORT_VID) &
1423             PORT_VID_DEF_VID_MASK;
1424
1425         return (0);
1426 }
1427
1428 /*
1429  * Convert port status to ifmedia.
1430  */
1431 static void
1432 e6000sw_update_ifmedia(uint16_t portstatus, u_int *media_status, u_int *media_active)
1433 {
1434         *media_active = IFM_ETHER;
1435         *media_status = IFM_AVALID;
1436
1437         if ((portstatus & PORT_STATUS_LINK_MASK) != 0)
1438                 *media_status |= IFM_ACTIVE;
1439         else {
1440                 *media_active |= IFM_NONE;
1441                 return;
1442         }
1443
1444         switch (portstatus & PORT_STATUS_SPEED_MASK) {
1445         case PORT_STATUS_SPEED_10:
1446                 *media_active |= IFM_10_T;
1447                 break;
1448         case PORT_STATUS_SPEED_100:
1449                 *media_active |= IFM_100_TX;
1450                 break;
1451         case PORT_STATUS_SPEED_1000:
1452                 *media_active |= IFM_1000_T;
1453                 break;
1454         }
1455
1456         if ((portstatus & PORT_STATUS_DUPLEX_MASK) == 0)
1457                 *media_active |= IFM_FDX;
1458         else
1459                 *media_active |= IFM_HDX;
1460 }
1461
1462 static void
1463 e6000sw_tick(void *arg)
1464 {
1465         e6000sw_softc_t *sc;
1466         struct mii_data *mii;
1467         struct mii_softc *miisc;
1468         uint16_t portstatus;
1469         int port;
1470
1471         sc = arg;
1472
1473         E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED);
1474
1475         for (;;) {
1476                 E6000SW_LOCK(sc);
1477                 for (port = 0; port < sc->num_ports; port++) {
1478                         /* Tick only on PHY ports */
1479                         if (!e6000sw_is_portenabled(sc, port) ||
1480                             !e6000sw_is_phyport(sc, port))
1481                                 continue;
1482
1483                         mii = e6000sw_miiforphy(sc, port);
1484                         if (mii == NULL)
1485                                 continue;
1486
1487                         portstatus = e6000sw_readreg(sc, REG_PORT(sc, port),
1488                             PORT_STATUS);
1489
1490                         e6000sw_update_ifmedia(portstatus,
1491                             &mii->mii_media_status, &mii->mii_media_active);
1492
1493                         LIST_FOREACH(miisc, &mii->mii_phys, mii_list) {
1494                                 if (IFM_INST(mii->mii_media.ifm_cur->ifm_media)
1495                                     != miisc->mii_inst)
1496                                         continue;
1497                                 mii_phy_update(miisc, MII_POLLSTAT);
1498                         }
1499                 }
1500                 E6000SW_UNLOCK(sc);
1501                 pause("e6000sw tick", 1000);
1502         }
1503 }
1504
1505 static void
1506 e6000sw_setup(device_t dev, e6000sw_softc_t *sc)
1507 {
1508         uint32_t atu_ctrl;
1509
1510         /* Set aging time. */
1511         atu_ctrl = e6000sw_readreg(sc, REG_GLOBAL, ATU_CONTROL);
1512         atu_ctrl &= ~ATU_CONTROL_AGETIME_MASK;
1513         atu_ctrl |= E6000SW_DEFAULT_AGETIME << ATU_CONTROL_AGETIME;
1514         e6000sw_writereg(sc, REG_GLOBAL, ATU_CONTROL, atu_ctrl);
1515
1516         /* Send all with specific mac address to cpu port */
1517         e6000sw_writereg(sc, REG_GLOBAL2, MGMT_EN_2x, MGMT_EN_ALL);
1518         e6000sw_writereg(sc, REG_GLOBAL2, MGMT_EN_0x, MGMT_EN_ALL);
1519
1520         /* Disable Remote Management */
1521         e6000sw_writereg(sc, REG_GLOBAL, SWITCH_GLOBAL_CONTROL2, 0);
1522
1523         /* Disable loopback filter and flow control messages */
1524         e6000sw_writereg(sc, REG_GLOBAL2, SWITCH_MGMT,
1525             SWITCH_MGMT_PRI_MASK |
1526             (1 << SWITCH_MGMT_RSVD2CPU) |
1527             SWITCH_MGMT_FC_PRI_MASK |
1528             (1 << SWITCH_MGMT_FORCEFLOW));
1529
1530         e6000sw_atu_flush(dev, sc, NO_OPERATION);
1531         e6000sw_atu_mac_table(dev, sc, NULL, NO_OPERATION);
1532         e6000sw_set_atustat(dev, sc, 0, COUNT_ALL);
1533 }
1534
1535 static void
1536 e6000sw_set_atustat(device_t dev, e6000sw_softc_t *sc, int bin, int flag)
1537 {
1538         uint16_t ret;
1539
1540         ret = e6000sw_readreg(sc, REG_GLOBAL2, ATU_STATS);
1541         e6000sw_writereg(sc, REG_GLOBAL2, ATU_STATS, (bin << ATU_STATS_BIN ) |
1542             (flag << ATU_STATS_FLAG));
1543 }
1544
1545 static int
1546 e6000sw_atu_mac_table(device_t dev, e6000sw_softc_t *sc, struct atu_opt *atu,
1547     int flag)
1548 {
1549         uint16_t ret_opt;
1550         uint16_t ret_data;
1551
1552         if (flag == NO_OPERATION)
1553                 return (0);
1554         else if ((flag & (LOAD_FROM_FIB | PURGE_FROM_FIB | GET_NEXT_IN_FIB |
1555             GET_VIOLATION_DATA | CLEAR_VIOLATION_DATA)) == 0) {
1556                 device_printf(dev, "Wrong Opcode for ATU operation\n");
1557                 return (EINVAL);
1558         }
1559
1560         if (E6000SW_WAITREADY(sc, ATU_OPERATION, ATU_UNIT_BUSY)) {
1561                 device_printf(dev, "ATU unit is busy, cannot access\n");
1562                 return (EBUSY);
1563         }
1564
1565         ret_opt = e6000sw_readreg(sc, REG_GLOBAL, ATU_OPERATION);
1566         if (flag & LOAD_FROM_FIB) {
1567                 ret_data = e6000sw_readreg(sc, REG_GLOBAL, ATU_DATA);
1568                 e6000sw_writereg(sc, REG_GLOBAL2, ATU_DATA, (ret_data &
1569                     ~ENTRY_STATE));
1570         }
1571         e6000sw_writereg(sc, REG_GLOBAL, ATU_MAC_ADDR01, atu->mac_01);
1572         e6000sw_writereg(sc, REG_GLOBAL, ATU_MAC_ADDR23, atu->mac_23);
1573         e6000sw_writereg(sc, REG_GLOBAL, ATU_MAC_ADDR45, atu->mac_45);
1574         e6000sw_writereg(sc, REG_GLOBAL, ATU_FID, atu->fid);
1575
1576         e6000sw_writereg(sc, REG_GLOBAL, ATU_OPERATION,
1577             (ret_opt | ATU_UNIT_BUSY | flag));
1578
1579         if (E6000SW_WAITREADY(sc, ATU_OPERATION, ATU_UNIT_BUSY))
1580                 device_printf(dev, "Timeout while waiting ATU\n");
1581         else if (flag & GET_NEXT_IN_FIB) {
1582                 atu->mac_01 = e6000sw_readreg(sc, REG_GLOBAL,
1583                     ATU_MAC_ADDR01);
1584                 atu->mac_23 = e6000sw_readreg(sc, REG_GLOBAL,
1585                     ATU_MAC_ADDR23);
1586                 atu->mac_45 = e6000sw_readreg(sc, REG_GLOBAL,
1587                     ATU_MAC_ADDR45);
1588         }
1589
1590         return (0);
1591 }
1592
1593 static int
1594 e6000sw_atu_flush(device_t dev, e6000sw_softc_t *sc, int flag)
1595 {
1596         uint32_t reg;
1597
1598         if (flag == NO_OPERATION)
1599                 return (0);
1600
1601         if (E6000SW_WAITREADY(sc, ATU_OPERATION, ATU_UNIT_BUSY)) {
1602                 device_printf(dev, "ATU unit is busy, cannot access\n");
1603                 return (EBUSY);
1604         }
1605         reg = e6000sw_readreg(sc, REG_GLOBAL, ATU_OPERATION);
1606         e6000sw_writereg(sc, REG_GLOBAL, ATU_OPERATION,
1607             (reg | ATU_UNIT_BUSY | flag));
1608         if (E6000SW_WAITREADY(sc, ATU_OPERATION, ATU_UNIT_BUSY))
1609                 device_printf(dev, "Timeout while flushing ATU\n");
1610
1611         return (0);
1612 }
1613
1614 static int
1615 e6000sw_vtu_flush(e6000sw_softc_t *sc)
1616 {
1617
1618         if (E6000SW_WAITREADY(sc, VTU_OPERATION, VTU_BUSY)) {
1619                 device_printf(sc->dev, "VTU unit is busy, cannot access\n");
1620                 return (EBUSY);
1621         }
1622
1623         e6000sw_writereg(sc, REG_GLOBAL, VTU_OPERATION, VTU_FLUSH | VTU_BUSY);
1624         if (E6000SW_WAITREADY(sc, VTU_OPERATION, VTU_BUSY)) {
1625                 device_printf(sc->dev, "Timeout while flushing VTU\n");
1626                 return (ETIMEDOUT);
1627         }
1628
1629         return (0);
1630 }
1631
1632 static int
1633 e6000sw_vtu_update(e6000sw_softc_t *sc, int purge, int vid, int fid,
1634     int members, int untagged)
1635 {
1636         int i, op;
1637         uint32_t data[2];
1638
1639         if (E6000SW_WAITREADY(sc, VTU_OPERATION, VTU_BUSY)) {
1640                 device_printf(sc->dev, "VTU unit is busy, cannot access\n");
1641                 return (EBUSY);
1642         }
1643
1644         *data = (vid & VTU_VID_MASK);
1645         if (purge == 0)
1646                 *data |= VTU_VID_VALID;
1647         e6000sw_writereg(sc, REG_GLOBAL, VTU_VID, *data);
1648
1649         if (purge == 0) {
1650                 data[0] = 0;
1651                 data[1] = 0;
1652                 for (i = 0; i < sc->num_ports; i++) {
1653                         if ((untagged & (1 << i)) != 0)
1654                                 data[i / VTU_PPREG(sc)] |=
1655                                     VTU_PORT_UNTAGGED << VTU_PORT(sc, i);
1656                         else if ((members & (1 << i)) != 0)
1657                                 data[i / VTU_PPREG(sc)] |=
1658                                     VTU_PORT_TAGGED << VTU_PORT(sc, i);
1659                         else
1660                                 data[i / VTU_PPREG(sc)] |=
1661                                     VTU_PORT_DISCARD << VTU_PORT(sc, i);
1662                 }
1663                 e6000sw_writereg(sc, REG_GLOBAL, VTU_DATA, data[0]);
1664                 e6000sw_writereg(sc, REG_GLOBAL, VTU_DATA2, data[1]);
1665                 e6000sw_writereg(sc, REG_GLOBAL, VTU_FID,
1666                     fid & VTU_FID_MASK(sc));
1667                 op = VTU_LOAD;
1668         } else
1669                 op = VTU_PURGE;
1670
1671         e6000sw_writereg(sc, REG_GLOBAL, VTU_OPERATION, op | VTU_BUSY);
1672         if (E6000SW_WAITREADY(sc, VTU_OPERATION, VTU_BUSY)) {
1673                 device_printf(sc->dev, "Timeout while flushing VTU\n");
1674                 return (ETIMEDOUT);
1675         }
1676
1677         return (0);
1678 }