2 * Copyright (c) 2015 Semihalf
3 * Copyright (c) 2015 Stormshield
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
31 #include <sys/types.h>
32 #include <sys/param.h>
33 #include <sys/systm.h>
34 #include <sys/sockio.h>
35 #include <sys/kernel.h>
36 #include <sys/kthread.h>
37 #include <sys/socket.h>
38 #include <sys/module.h>
39 #include <sys/errno.h>
43 #include <sys/fcntl.h>
46 #include <net/if_media.h>
47 #include <net/if_types.h>
49 #include <machine/bus.h>
50 #include <machine/resource.h>
52 #include <arm/mv/mvwin.h>
53 #include <arm/mv/mvreg.h>
54 #include <arm/mv/mvvar.h>
56 #include <dev/etherswitch/etherswitch.h>
57 #include <dev/mdio/mdio.h>
58 #include <dev/mii/mii.h>
59 #include <dev/mii/miivar.h>
60 #include <dev/mge/if_mgevar.h>
62 #include <dev/fdt/fdt_common.h>
63 #include <dev/ofw/ofw_bus.h>
64 #include <dev/ofw/ofw_bus_subr.h>
66 #include "e6000swreg.h"
67 #include "etherswitch_if.h"
68 #include "miibus_if.h"
71 MALLOC_DECLARE(M_E6000SW);
72 MALLOC_DEFINE(M_E6000SW, "e6000sw", "e6000sw switch");
74 #define E6000SW_LOCK(_sc) \
76 #define E6000SW_UNLOCK(_sc) \
78 #define E6000SW_LOCK_ASSERT(_sc, _what) \
79 sx_assert(&(_sc)->sx, (_what))
80 #define E6000SW_TRYLOCK(_sc) \
81 sx_tryxlock(&(_sc)->sx)
83 typedef struct e6000sw_softc {
88 struct ifnet *ifp[E6000SW_MAX_PORTS];
89 char *ifname[E6000SW_MAX_PORTS];
90 device_t miibus[E6000SW_MAX_PORTS];
91 struct mii_data *mii[E6000SW_MAX_PORTS];
92 struct callout tick_callout;
94 uint32_t cpuports_mask;
100 int vid[E6000SW_NUM_VGROUPS];
101 int members[E6000SW_NUM_VGROUPS];
102 int vgroup[E6000SW_MAX_PORTS];
105 static etherswitch_info_t etherswitch_info = {
107 .es_nvlangroups = E6000SW_NUM_VGROUPS,
108 .es_name = "Marvell 6000 series switch"
111 static void e6000sw_identify(driver_t *driver, device_t parent);
112 static int e6000sw_probe(device_t dev);
113 static int e6000sw_attach(device_t dev);
114 static int e6000sw_detach(device_t dev);
115 static int e6000sw_readphy(device_t dev, int phy, int reg);
116 static int e6000sw_writephy(device_t dev, int phy, int reg, int data);
117 static etherswitch_info_t* e6000sw_getinfo(device_t dev);
118 static void e6000sw_lock(device_t dev);
119 static void e6000sw_unlock(device_t dev);
120 static int e6000sw_getport(device_t dev, etherswitch_port_t *p);
121 static int e6000sw_setport(device_t dev, etherswitch_port_t *p);
122 static int e6000sw_readreg_wrapper(device_t dev, int addr_reg);
123 static int e6000sw_writereg_wrapper(device_t dev, int addr_reg, int val);
124 static int e6000sw_readphy_wrapper(device_t dev, int phy, int reg);
125 static int e6000sw_writephy_wrapper(device_t dev, int phy, int reg, int data);
126 static int e6000sw_getvgroup_wrapper(device_t dev, etherswitch_vlangroup_t *vg);
127 static int e6000sw_setvgroup_wrapper(device_t dev, etherswitch_vlangroup_t *vg);
128 static int e6000sw_setvgroup(device_t dev, etherswitch_vlangroup_t *vg);
129 static int e6000sw_getvgroup(device_t dev, etherswitch_vlangroup_t *vg);
130 static void e6000sw_setup(device_t dev, e6000sw_softc_t *sc);
131 static void e6000sw_port_vlan_conf(e6000sw_softc_t *sc);
132 static void e6000sw_tick(void *arg);
133 static void e6000sw_set_atustat(device_t dev, e6000sw_softc_t *sc, int bin,
135 static int e6000sw_atu_flush(device_t dev, e6000sw_softc_t *sc, int flag);
136 static __inline void e6000sw_writereg(e6000sw_softc_t *sc, int addr, int reg,
138 static __inline uint32_t e6000sw_readreg(e6000sw_softc_t *sc, int addr,
140 static int e6000sw_ifmedia_upd(struct ifnet *ifp);
141 static void e6000sw_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr);
142 static int e6000sw_atu_mac_table(device_t dev, e6000sw_softc_t *sc, struct
143 atu_opt *atu, int flag);
144 static int e6000sw_get_pvid(e6000sw_softc_t *sc, int port, int *pvid);
145 static int e6000sw_set_pvid(e6000sw_softc_t *sc, int port, int pvid);
146 static __inline int e6000sw_is_cpuport(e6000sw_softc_t *sc, int port);
147 static __inline int e6000sw_is_fixedport(e6000sw_softc_t *sc, int port);
148 static __inline int e6000sw_is_phyport(e6000sw_softc_t *sc, int port);
149 static __inline struct mii_data *e6000sw_miiforphy(e6000sw_softc_t *sc,
152 static struct proc *e6000sw_kproc;
154 static device_method_t e6000sw_methods[] = {
155 /* device interface */
156 DEVMETHOD(device_identify, e6000sw_identify),
157 DEVMETHOD(device_probe, e6000sw_probe),
158 DEVMETHOD(device_attach, e6000sw_attach),
159 DEVMETHOD(device_detach, e6000sw_detach),
162 DEVMETHOD(bus_add_child, device_add_child_ordered),
165 DEVMETHOD(miibus_readreg, e6000sw_readphy),
166 DEVMETHOD(miibus_writereg, e6000sw_writephy),
168 /* etherswitch interface */
169 DEVMETHOD(etherswitch_getinfo, e6000sw_getinfo),
170 DEVMETHOD(etherswitch_lock, e6000sw_lock),
171 DEVMETHOD(etherswitch_unlock, e6000sw_unlock),
172 DEVMETHOD(etherswitch_getport, e6000sw_getport),
173 DEVMETHOD(etherswitch_setport, e6000sw_setport),
174 DEVMETHOD(etherswitch_readreg, e6000sw_readreg_wrapper),
175 DEVMETHOD(etherswitch_writereg, e6000sw_writereg_wrapper),
176 DEVMETHOD(etherswitch_readphyreg, e6000sw_readphy_wrapper),
177 DEVMETHOD(etherswitch_writephyreg, e6000sw_writephy_wrapper),
178 DEVMETHOD(etherswitch_setvgroup, e6000sw_setvgroup_wrapper),
179 DEVMETHOD(etherswitch_getvgroup, e6000sw_getvgroup_wrapper),
184 static devclass_t e6000sw_devclass;
186 DEFINE_CLASS_0(e6000sw, e6000sw_driver, e6000sw_methods,
187 sizeof(e6000sw_softc_t));
189 DRIVER_MODULE(e6000sw, mdio, e6000sw_driver, e6000sw_devclass, 0, 0);
190 DRIVER_MODULE(etherswitch, e6000sw, etherswitch_driver, etherswitch_devclass, 0,
192 DRIVER_MODULE(miibus, e6000sw, miibus_driver, miibus_devclass, 0, 0);
193 MODULE_DEPEND(e6000sw, mdio, 1, 1, 1);
196 #define SMI_CMD_BUSY (1<<15)
197 #define SMI_CMD_OP_READ ((2<<10)|SMI_CMD_BUSY|(1<<12))
198 #define SMI_CMD_OP_WRITE ((1<<10)|SMI_CMD_BUSY|(1<<12))
201 #define MDIO_READ(dev, addr, reg) MDIO_READREG(device_get_parent(dev), (addr), (reg))
202 #define MDIO_WRITE(dev, addr, reg, val) MDIO_WRITEREG(device_get_parent(dev), (addr), (reg), (val))
204 e6000sw_identify(driver_t *driver, device_t parent)
207 if (device_find_child(parent, "e6000sw", -1) == NULL)
208 BUS_ADD_CHILD(parent, 0, "e6000sw", -1);
212 e6000sw_probe(device_t dev)
215 const char *description;
217 phandle_t dsa_node, switch_node;
219 dsa_node = fdt_find_compatible(OF_finddevice("/"),
221 switch_node = OF_child(dsa_node);
223 if (switch_node == 0)
226 sc = device_get_softc(dev);
227 bzero(sc, sizeof(e6000sw_softc_t));
229 sc->node = switch_node;
231 if (OF_getencprop(sc->node, "reg", &sc->sw_addr,
232 sizeof(sc->sw_addr)) < 0)
234 if (sc->sw_addr != 0 && (sc->sw_addr % 2) == 0)
235 sc->multi_chip = true;
237 /* Lock is necessary due to assertions. */
238 sx_init(&sc->sx, "e6000sw");
241 id = e6000sw_readreg(sc, REG_PORT(0), SWITCH_ID);
243 switch (id & 0xfff0) {
245 description = "Marvell 88E6352";
248 description = "Marvell 88E6172";
251 description = "Marvell 88E6176";
256 device_printf(dev, "Unrecognized device, id 0x%x.\n", id);
260 device_set_desc(dev, description);
264 return (BUS_PROBE_DEFAULT);
268 e6000sw_parse_child_fdt(device_t dev, phandle_t child, uint32_t *fixed_mask,
269 uint32_t *cpu_mask, int *pport, int *pvlangroup)
272 uint32_t port, vlangroup;
273 boolean_t fixed_link;
275 if (fixed_mask == NULL || cpu_mask == NULL || pport == NULL)
278 OF_getprop(child, "label", (void *)portlabel, 100);
279 OF_getencprop(child, "reg", (void *)&port, sizeof(port));
281 if (OF_getencprop(child, "vlangroup", (void *)&vlangroup,
282 sizeof(vlangroup)) > 0) {
283 if (vlangroup >= E6000SW_NUM_VGROUPS)
285 *pvlangroup = vlangroup;
290 if (port >= E6000SW_MAX_PORTS)
294 if (strncmp(portlabel, "cpu", 3) == 0) {
295 device_printf(dev, "CPU port at %d\n", port);
296 *cpu_mask |= (1 << port);
300 fixed_link = OF_child(child);
302 *fixed_mask |= (1 << port);
303 device_printf(dev, "fixed port at %d\n", port);
305 device_printf(dev, "PHY at %d\n", port);
312 e6000sw_init_interface(e6000sw_softc_t *sc, int port)
316 snprintf(name, IFNAMSIZ, "%sport", device_get_nameunit(sc->dev));
318 sc->ifp[port] = if_alloc(IFT_ETHER);
319 if (sc->ifp[port] == NULL)
321 sc->ifp[port]->if_softc = sc;
322 sc->ifp[port]->if_flags |= IFF_UP | IFF_BROADCAST |
323 IFF_DRV_RUNNING | IFF_SIMPLEX;
324 sc->ifname[port] = malloc(strlen(name) + 1, M_E6000SW, M_WAITOK);
325 if (sc->ifname[port] == NULL)
327 memcpy(sc->ifname[port], name, strlen(name) + 1);
328 if_initname(sc->ifp[port], sc->ifname[port], port);
334 e6000sw_attach_miibus(e6000sw_softc_t *sc, int port)
338 err = mii_attach(sc->dev, &sc->miibus[port], sc->ifp[port],
339 e6000sw_ifmedia_upd, e6000sw_ifmedia_sts, BMSR_DEFCAPMASK,
340 port, MII_OFFSET_ANY, 0);
344 sc->mii[port] = device_get_softc(sc->miibus[port]);
349 e6000sw_attach(device_t dev)
353 int err, port, vlangroup;
354 int member_ports[E6000SW_NUM_VGROUPS];
355 etherswitch_vlangroup_t vg;
358 sc = device_get_softc(dev);
361 device_printf(dev, "multi-chip addressing mode\n");
363 device_printf(dev, "single-chip addressing mode\n");
366 e6000sw_setup(dev, sc);
367 bzero(member_ports, sizeof(member_ports));
369 for (child = OF_child(sc->node); child != 0; child = OF_peer(child)) {
370 err = e6000sw_parse_child_fdt(dev, child, &sc->fixed_mask,
371 &sc->cpuports_mask, &port, &vlangroup);
373 device_printf(sc->dev, "failed to parse DTS\n");
378 member_ports[vlangroup] |= (1 << port);
382 err = e6000sw_init_interface(sc, port);
384 device_printf(sc->dev, "failed to init interface\n");
388 /* Don't attach miibus at CPU/fixed ports */
389 if (!e6000sw_is_phyport(sc, port))
392 err = e6000sw_attach_miibus(sc, port);
394 device_printf(sc->dev, "failed to attach miibus\n");
399 etherswitch_info.es_nports = sc->num_ports;
400 for (port = 0; port < sc->num_ports; port++)
401 sc->vgroup[port] = E6000SW_PORT_NO_VGROUP;
403 /* Set VLAN configuration */
404 e6000sw_port_vlan_conf(sc);
407 for (vlangroup = 0; vlangroup < E6000SW_NUM_VGROUPS; vlangroup++)
408 if (member_ports[vlangroup] != 0) {
409 vg.es_vlangroup = vg.es_vid = vlangroup;
410 vg.es_member_ports = vg.es_untagged_ports =
411 member_ports[vlangroup];
412 e6000sw_setvgroup(dev, &vg);
417 bus_generic_probe(dev);
418 bus_generic_attach(dev);
420 kproc_create(e6000sw_tick, sc, &e6000sw_kproc, 0, 0,
421 "e6000sw tick kproc");
432 e6000sw_poll_done(e6000sw_softc_t *sc)
435 while (e6000sw_readreg(sc, REG_GLOBAL2, PHY_CMD) &
436 (1 << PHY_CMD_SMI_BUSY))
441 * PHY registers are paged. Put page index in reg 22 (accessible from every
442 * page), then access specific register.
445 e6000sw_readphy(device_t dev, int phy, int reg)
450 sc = device_get_softc(dev);
453 if (!e6000sw_is_phyport(sc, phy) || reg >= E6000SW_NUM_PHY_REGS) {
454 device_printf(dev, "Wrong register address.\n");
458 E6000SW_LOCK_ASSERT(sc, SA_XLOCKED);
460 e6000sw_poll_done(sc);
461 val |= 1 << PHY_CMD_SMI_BUSY;
462 val |= PHY_CMD_MODE_MDIO << PHY_CMD_MODE;
463 val |= PHY_CMD_OPCODE_READ << PHY_CMD_OPCODE;
464 val |= (reg << PHY_CMD_REG_ADDR) & PHY_CMD_REG_ADDR_MASK;
465 val |= (phy << PHY_CMD_DEV_ADDR) & PHY_CMD_DEV_ADDR_MASK;
466 e6000sw_writereg(sc, REG_GLOBAL2, SMI_PHY_CMD_REG, val);
467 e6000sw_poll_done(sc);
468 val = e6000sw_readreg(sc, REG_GLOBAL2, SMI_PHY_DATA_REG)
475 e6000sw_writephy(device_t dev, int phy, int reg, int data)
480 sc = device_get_softc(dev);
483 if (!e6000sw_is_phyport(sc, phy) || reg >= E6000SW_NUM_PHY_REGS) {
484 device_printf(dev, "Wrong register address.\n");
488 E6000SW_LOCK_ASSERT(sc, SA_XLOCKED);
490 e6000sw_poll_done(sc);
491 val |= PHY_CMD_MODE_MDIO << PHY_CMD_MODE;
492 val |= 1 << PHY_CMD_SMI_BUSY;
493 val |= PHY_CMD_OPCODE_WRITE << PHY_CMD_OPCODE;
494 val |= (reg << PHY_CMD_REG_ADDR) & PHY_CMD_REG_ADDR_MASK;
495 val |= (phy << PHY_CMD_DEV_ADDR) & PHY_CMD_DEV_ADDR_MASK;
496 e6000sw_writereg(sc, REG_GLOBAL2, SMI_PHY_DATA_REG,
497 data & PHY_DATA_MASK);
498 e6000sw_writereg(sc, REG_GLOBAL2, SMI_PHY_CMD_REG, val);
499 e6000sw_poll_done(sc);
505 e6000sw_detach(device_t dev)
510 sc = device_get_softc(dev);
511 bus_generic_detach(dev);
513 for (phy = 0; phy < sc->num_ports; phy++) {
514 if (sc->miibus[phy] != NULL)
515 device_delete_child(dev, sc->miibus[phy]);
516 if (sc->ifp[phy] != NULL)
517 if_free(sc->ifp[phy]);
518 if (sc->ifname[phy] != NULL)
519 free(sc->ifname[phy], M_E6000SW);
525 static etherswitch_info_t*
526 e6000sw_getinfo(device_t dev)
529 return (ðerswitch_info);
533 e6000sw_lock(device_t dev)
535 struct e6000sw_softc *sc;
537 sc = device_get_softc(dev);
539 E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED);
544 e6000sw_unlock(device_t dev)
546 struct e6000sw_softc *sc;
548 sc = device_get_softc(dev);
550 E6000SW_LOCK_ASSERT(sc, SA_XLOCKED);
555 e6000sw_getport(device_t dev, etherswitch_port_t *p)
557 struct mii_data *mii;
559 struct ifmediareq *ifmr;
562 e6000sw_softc_t *sc = device_get_softc(dev);
563 E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED);
567 if (p->es_port >= sc->num_ports ||
573 e6000sw_get_pvid(sc, p->es_port, &p->es_pvid);
575 if (e6000sw_is_cpuport(sc, p->es_port)) {
576 p->es_flags |= ETHERSWITCH_PORT_CPU;
578 ifmr->ifm_status = IFM_ACTIVE | IFM_AVALID;
580 ifmr->ifm_current = ifmr->ifm_active =
581 IFM_ETHER | IFM_1000_T | IFM_FDX;
583 } else if (e6000sw_is_fixedport(sc, p->es_port)) {
585 ifmr->ifm_status = IFM_ACTIVE | IFM_AVALID;
587 ifmr->ifm_current = ifmr->ifm_active =
588 IFM_ETHER | IFM_1000_T | IFM_FDX;
591 mii = e6000sw_miiforphy(sc, p->es_port);
592 err = ifmedia_ioctl(mii->mii_ifp, &p->es_ifr,
593 &mii->mii_media, SIOCGIFMEDIA);
602 e6000sw_setport(device_t dev, etherswitch_port_t *p)
606 struct mii_data *mii;
609 sc = device_get_softc(dev);
610 E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED);
614 if (p->es_port >= sc->num_ports ||
621 e6000sw_set_pvid(sc, p->es_port, p->es_pvid);
622 if (!e6000sw_is_cpuport(sc, p->es_port)) {
623 mii = e6000sw_miiforphy(sc, p->es_port);
624 err = ifmedia_ioctl(mii->mii_ifp, &p->es_ifr, &mii->mii_media,
634 * Registers in this switch are divided into sections, specified in
635 * documentation. So as to access any of them, section index and reg index
636 * is necessary. etherswitchcfg uses only one variable, so indexes were
637 * compressed into addr_reg: 32 * section_index + reg_index.
640 e6000sw_readreg_wrapper(device_t dev, int addr_reg)
643 if ((addr_reg > (REG_GLOBAL2 * 32 + REG_NUM_MAX)) ||
644 (addr_reg < (REG_PORT(0) * 32))) {
645 device_printf(dev, "Wrong register address.\n");
649 return (e6000sw_readreg(device_get_softc(dev), addr_reg / 32,
654 e6000sw_writereg_wrapper(device_t dev, int addr_reg, int val)
657 if ((addr_reg > (REG_GLOBAL2 * 32 + REG_NUM_MAX)) ||
658 (addr_reg < (REG_PORT(0) * 32))) {
659 device_printf(dev, "Wrong register address.\n");
662 e6000sw_writereg(device_get_softc(dev), addr_reg / 5,
669 * These wrappers are necessary because PHY accesses from etherswitchcfg
670 * need to be synchronized with locks, while miibus PHY accesses do not.
673 e6000sw_readphy_wrapper(device_t dev, int phy, int reg)
678 sc = device_get_softc(dev);
679 E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED);
682 ret = e6000sw_readphy(dev, phy, reg);
689 e6000sw_writephy_wrapper(device_t dev, int phy, int reg, int data)
694 sc = device_get_softc(dev);
695 E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED);
698 ret = e6000sw_writephy(dev, phy, reg, data);
705 * setvgroup/getvgroup called from etherswitchfcg need to be locked,
706 * while internal calls do not.
709 e6000sw_setvgroup_wrapper(device_t dev, etherswitch_vlangroup_t *vg)
714 sc = device_get_softc(dev);
715 E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED);
718 ret = e6000sw_setvgroup(dev, vg);
725 e6000sw_getvgroup_wrapper(device_t dev, etherswitch_vlangroup_t *vg)
730 sc = device_get_softc(dev);
731 E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED);
734 ret = e6000sw_getvgroup(dev, vg);
741 e6000sw_flush_port(e6000sw_softc_t *sc, int port)
745 reg = e6000sw_readreg(sc, REG_PORT(port),
747 reg &= ~PORT_VLAN_MAP_TABLE_MASK;
748 reg &= ~PORT_VLAN_MAP_FID_MASK;
749 e6000sw_writereg(sc, REG_PORT(port),
751 if (sc->vgroup[port] != E6000SW_PORT_NO_VGROUP) {
753 * If port belonged somewhere, owner-group
754 * should have its entry removed.
756 sc->members[sc->vgroup[port]] &= ~(1 << port);
757 sc->vgroup[port] = E6000SW_PORT_NO_VGROUP;
762 e6000sw_port_assign_vgroup(e6000sw_softc_t *sc, int port, int fid, int vgroup,
767 reg = e6000sw_readreg(sc, REG_PORT(port),
769 reg &= ~PORT_VLAN_MAP_TABLE_MASK;
770 reg &= ~PORT_VLAN_MAP_FID_MASK;
771 reg |= members & ~(1 << port);
772 reg |= (fid << PORT_VLAN_MAP_FID) & PORT_VLAN_MAP_FID_MASK;
773 e6000sw_writereg(sc, REG_PORT(port), PORT_VLAN_MAP,
775 sc->vgroup[port] = vgroup;
779 e6000sw_setvgroup(device_t dev, etherswitch_vlangroup_t *vg)
784 sc = device_get_softc(dev);
785 E6000SW_LOCK_ASSERT(sc, SA_XLOCKED);
787 if (vg->es_vlangroup >= E6000SW_NUM_VGROUPS)
789 if (vg->es_member_ports != vg->es_untagged_ports) {
790 device_printf(dev, "Tagged ports not supported.\n");
794 vg->es_untagged_ports &= PORT_VLAN_MAP_TABLE_MASK;
795 fid = vg->es_vlangroup + 1;
796 for (port = 0; port < sc->num_ports; port++) {
797 if ((sc->members[vg->es_vlangroup] & (1 << port)) ||
798 (vg->es_untagged_ports & (1 << port)))
799 e6000sw_flush_port(sc, port);
800 if (vg->es_untagged_ports & (1 << port))
801 e6000sw_port_assign_vgroup(sc, port, fid,
802 vg->es_vlangroup, vg->es_untagged_ports);
804 sc->vid[vg->es_vlangroup] = vg->es_vid;
805 sc->members[vg->es_vlangroup] = vg->es_untagged_ports;
811 e6000sw_getvgroup(device_t dev, etherswitch_vlangroup_t *vg)
815 sc = device_get_softc(dev);
816 E6000SW_LOCK_ASSERT(sc, SA_XLOCKED);
818 if (vg->es_vlangroup >= E6000SW_NUM_VGROUPS)
820 vg->es_untagged_ports = vg->es_member_ports =
821 sc->members[vg->es_vlangroup];
822 vg->es_vid = ETHERSWITCH_VID_VALID;
827 static __inline struct mii_data*
828 e6000sw_miiforphy(e6000sw_softc_t *sc, unsigned int phy)
831 if (!e6000sw_is_phyport(sc, phy))
834 return (device_get_softc(sc->miibus[phy]));
838 e6000sw_ifmedia_upd(struct ifnet *ifp)
841 struct mii_data *mii;
844 mii = e6000sw_miiforphy(sc, ifp->if_dunit);
853 e6000sw_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
856 struct mii_data *mii;
859 mii = e6000sw_miiforphy(sc, ifp->if_dunit);
865 ifmr->ifm_active = mii->mii_media_active;
866 ifmr->ifm_status = mii->mii_media_status;
871 e6000sw_smi_waitready(e6000sw_softc_t *sc, int phy)
875 for (i = 0; i < E6000SW_SMI_TIMEOUT; i++) {
876 if ((MDIO_READ(sc->dev, phy, SMI_CMD)
877 & SMI_CMD_BUSY) == 0)
884 static __inline uint32_t
885 e6000sw_readreg(e6000sw_softc_t *sc, int addr, int reg)
888 E6000SW_LOCK_ASSERT(sc, SA_XLOCKED);
891 return (MDIO_READ(sc->dev, addr, reg) & 0xffff);
893 if (e6000sw_smi_waitready(sc, sc->sw_addr)) {
894 printf("e6000sw: readreg timeout\n");
897 MDIO_WRITE(sc->dev, sc->sw_addr, SMI_CMD, SMI_CMD_OP_READ |
899 if (e6000sw_smi_waitready(sc, sc->sw_addr)) {
900 printf("e6000sw: readreg timeout\n");
904 return (MDIO_READ(sc->dev, sc->sw_addr, SMI_DATA) & 0xffff);
908 e6000sw_writereg(e6000sw_softc_t *sc, int addr, int reg, int val)
911 E6000SW_LOCK_ASSERT(sc, SA_XLOCKED);
913 if (!sc->multi_chip) {
914 MDIO_WRITE(sc->dev, addr, reg, val);
918 if (e6000sw_smi_waitready(sc, sc->sw_addr)) {
919 printf("e6000sw: readreg timeout\n");
922 MDIO_WRITE(sc->dev, sc->sw_addr, SMI_DATA, val);
923 MDIO_WRITE(sc->dev, sc->sw_addr, SMI_CMD, SMI_CMD_OP_WRITE |
925 if (e6000sw_smi_waitready(sc, sc->sw_addr)) {
926 printf("e6000sw: readreg timeout\n");
934 e6000sw_is_cpuport(e6000sw_softc_t *sc, int port)
937 return (sc->cpuports_mask & (1 << port));
941 e6000sw_is_fixedport(e6000sw_softc_t *sc, int port)
944 return (sc->fixed_mask & (1 << port));
948 e6000sw_is_phyport(e6000sw_softc_t *sc, int port)
951 phy_mask = ~(sc->fixed_mask | sc->cpuports_mask);
953 return (phy_mask & (1 << port));
957 e6000sw_set_pvid(e6000sw_softc_t *sc, int port, int pvid)
960 e6000sw_writereg(sc, REG_PORT(port), PORT_VID, pvid &
961 PORT_VID_DEF_VID_MASK);
967 e6000sw_get_pvid(e6000sw_softc_t *sc, int port, int *pvid)
973 *pvid = e6000sw_readreg(sc, REG_PORT(port), PORT_VID) &
974 PORT_VID_DEF_VID_MASK;
980 e6000sw_tick (void *arg)
983 struct mii_softc *miisc;
988 E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED);
991 for (port = 0; port < sc->num_ports; port++) {
992 /* Tick only on PHY ports */
993 if (!e6000sw_is_phyport(sc, port))
995 mii_tick(sc->mii[port]);
996 LIST_FOREACH(miisc, &sc->mii[port]->mii_phys, mii_list) {
997 if (IFM_INST(sc->mii[port]->mii_media.ifm_cur->ifm_media)
1000 mii_phy_update(miisc, MII_POLLSTAT);
1004 pause("e6000sw tick", 1000);
1009 e6000sw_setup(device_t dev, e6000sw_softc_t *sc)
1011 uint16_t atu_ctrl, atu_age;
1013 /* Set aging time */
1014 e6000sw_writereg(sc, REG_GLOBAL, ATU_CONTROL,
1015 (E6000SW_DEFAULT_AGETIME << ATU_CONTROL_AGETIME) |
1016 (1 << ATU_CONTROL_LEARN2ALL));
1018 /* Send all with specific mac address to cpu port */
1019 e6000sw_writereg(sc, REG_GLOBAL2, MGMT_EN_2x, MGMT_EN_ALL);
1020 e6000sw_writereg(sc, REG_GLOBAL2, MGMT_EN_0x, MGMT_EN_ALL);
1022 /* Disable Remote Management */
1023 e6000sw_writereg(sc, REG_GLOBAL, SWITCH_GLOBAL_CONTROL2, 0);
1025 /* Disable loopback filter and flow control messages */
1026 e6000sw_writereg(sc, REG_GLOBAL2, SWITCH_MGMT,
1027 SWITCH_MGMT_PRI_MASK |
1028 (1 << SWITCH_MGMT_RSVD2CPU) |
1029 SWITCH_MGMT_FC_PRI_MASK |
1030 (1 << SWITCH_MGMT_FORCEFLOW));
1032 e6000sw_atu_flush(dev, sc, NO_OPERATION);
1033 e6000sw_atu_mac_table(dev, sc, NULL, NO_OPERATION);
1034 e6000sw_set_atustat(dev, sc, 0, COUNT_ALL);
1036 /* Set ATU AgeTime to 15 seconds */
1039 atu_ctrl = e6000sw_readreg(sc, REG_GLOBAL, ATU_CONTROL);
1041 /* Set new AgeTime field */
1042 atu_ctrl &= ~ATU_CONTROL_AGETIME_MASK;
1043 e6000sw_writereg(sc, REG_GLOBAL, ATU_CONTROL, atu_ctrl |
1044 (atu_age << ATU_CONTROL_AGETIME));
1048 e6000sw_port_vlan_conf(e6000sw_softc_t *sc)
1054 /* Disable all ports */
1055 for (port = 0; port < sc->num_ports; port++) {
1056 ret = e6000sw_readreg(sc, REG_PORT(port), PORT_CONTROL);
1057 e6000sw_writereg(sc, REG_PORT(port), PORT_CONTROL,
1058 (ret & ~PORT_CONTROL_ENABLE));
1061 /* Set port priority */
1062 for (port = 0; port < sc->num_ports; port++) {
1063 ret = e6000sw_readreg(sc, REG_PORT(port), PORT_VID);
1064 ret &= ~PORT_VID_PRIORITY_MASK;
1065 e6000sw_writereg(sc, REG_PORT(port), PORT_VID, ret);
1069 for (port = 0; port < sc->num_ports; port++) {
1070 ret = e6000sw_readreg(sc, REG_PORT(port), PORT_VID);
1071 ret &= ~PORT_VID_DEF_VID_MASK;
1073 e6000sw_writereg(sc, REG_PORT(port), PORT_VID, ret);
1076 /* Enable all ports */
1077 for (port = 0; port < sc->num_ports; port++) {
1078 ret = e6000sw_readreg(sc, REG_PORT(port), PORT_CONTROL);
1079 e6000sw_writereg(sc, REG_PORT(port), PORT_CONTROL, (ret |
1080 PORT_CONTROL_ENABLE));
1085 e6000sw_set_atustat(device_t dev, e6000sw_softc_t *sc, int bin, int flag)
1089 ret = e6000sw_readreg(sc, REG_GLOBAL2, ATU_STATS);
1090 e6000sw_writereg(sc, REG_GLOBAL2, ATU_STATS, (bin << ATU_STATS_BIN ) |
1091 (flag << ATU_STATS_FLAG));
1095 e6000sw_atu_mac_table(device_t dev, e6000sw_softc_t *sc, struct atu_opt *atu,
1102 if (flag == NO_OPERATION)
1104 else if ((flag & (LOAD_FROM_FIB | PURGE_FROM_FIB | GET_NEXT_IN_FIB |
1105 GET_VIOLATION_DATA | CLEAR_VIOLATION_DATA)) == 0) {
1106 device_printf(dev, "Wrong Opcode for ATU operation\n");
1110 ret_opt = e6000sw_readreg(sc, REG_GLOBAL, ATU_OPERATION);
1112 if (ret_opt & ATU_UNIT_BUSY) {
1113 device_printf(dev, "ATU unit is busy, cannot access"
1117 if(flag & LOAD_FROM_FIB) {
1118 ret_data = e6000sw_readreg(sc, REG_GLOBAL, ATU_DATA);
1119 e6000sw_writereg(sc, REG_GLOBAL2, ATU_DATA, (ret_data &
1122 e6000sw_writereg(sc, REG_GLOBAL, ATU_MAC_ADDR01, atu->mac_01);
1123 e6000sw_writereg(sc, REG_GLOBAL, ATU_MAC_ADDR23, atu->mac_23);
1124 e6000sw_writereg(sc, REG_GLOBAL, ATU_MAC_ADDR45, atu->mac_45);
1125 e6000sw_writereg(sc, REG_GLOBAL, ATU_FID, atu->fid);
1127 e6000sw_writereg(sc, REG_GLOBAL, ATU_OPERATION, (ret_opt |
1128 ATU_UNIT_BUSY | flag));
1130 retries = E6000SW_RETRIES;
1131 while (--retries & (e6000sw_readreg(sc, REG_GLOBAL,
1132 ATU_OPERATION) & ATU_UNIT_BUSY))
1136 device_printf(dev, "Timeout while flushing\n");
1137 else if (flag & GET_NEXT_IN_FIB) {
1138 atu->mac_01 = e6000sw_readreg(sc, REG_GLOBAL,
1140 atu->mac_23 = e6000sw_readreg(sc, REG_GLOBAL,
1142 atu->mac_45 = e6000sw_readreg(sc, REG_GLOBAL,
1151 e6000sw_atu_flush(device_t dev, e6000sw_softc_t *sc, int flag)
1156 if (flag == NO_OPERATION)
1159 ret = e6000sw_readreg(sc, REG_GLOBAL, ATU_OPERATION);
1160 if (ret & ATU_UNIT_BUSY) {
1161 device_printf(dev, "Atu unit is busy, cannot flush\n");
1164 e6000sw_writereg(sc, REG_GLOBAL, ATU_OPERATION, (ret |
1165 ATU_UNIT_BUSY | flag));
1166 retries = E6000SW_RETRIES;
1167 while (--retries & (e6000sw_readreg(sc, REG_GLOBAL,
1168 ATU_OPERATION) & ATU_UNIT_BUSY))
1172 device_printf(dev, "Timeout while flushing\n");