2 * Copyright (c) 2015 Semihalf
3 * Copyright (c) 2015 Stormshield
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
31 #include <sys/types.h>
32 #include <sys/param.h>
33 #include <sys/systm.h>
34 #include <sys/sockio.h>
35 #include <sys/kernel.h>
36 #include <sys/kthread.h>
37 #include <sys/socket.h>
38 #include <sys/module.h>
39 #include <sys/errno.h>
43 #include <sys/fcntl.h>
46 #include <net/if_media.h>
47 #include <net/if_types.h>
49 #include <machine/bus.h>
50 #include <machine/resource.h>
52 #include <arm/mv/mvwin.h>
53 #include <arm/mv/mvreg.h>
54 #include <arm/mv/mvvar.h>
56 #include <dev/etherswitch/etherswitch.h>
57 #include <dev/mdio/mdio.h>
58 #include <dev/mii/mii.h>
59 #include <dev/mii/miivar.h>
60 #include <dev/mge/if_mgevar.h>
62 #include <dev/fdt/fdt_common.h>
63 #include <dev/ofw/ofw_bus.h>
64 #include <dev/ofw/ofw_bus_subr.h>
66 #include "e6000swreg.h"
67 #include "etherswitch_if.h"
68 #include "miibus_if.h"
71 MALLOC_DECLARE(M_E6000SW);
72 MALLOC_DEFINE(M_E6000SW, "e6000sw", "e6000sw switch");
74 #define E6000SW_LOCK(_sc) \
76 #define E6000SW_UNLOCK(_sc) \
78 #define E6000SW_LOCK_ASSERT(_sc, _what) \
79 sx_assert(&(_sc)->sx, (_what))
80 #define E6000SW_TRYLOCK(_sc) \
81 sx_tryxlock(&(_sc)->sx)
83 typedef struct e6000sw_softc {
88 struct ifnet *ifp[E6000SW_MAX_PORTS];
89 char *ifname[E6000SW_MAX_PORTS];
90 device_t miibus[E6000SW_MAX_PORTS];
91 struct mii_data *mii[E6000SW_MAX_PORTS];
94 uint32_t cpuports_mask;
100 int vid[E6000SW_NUM_VGROUPS];
101 int members[E6000SW_NUM_VGROUPS];
102 int vgroup[E6000SW_MAX_PORTS];
105 static etherswitch_info_t etherswitch_info = {
107 .es_nvlangroups = E6000SW_NUM_VGROUPS,
108 .es_name = "Marvell 6000 series switch"
111 static void e6000sw_identify(driver_t *driver, device_t parent);
112 static int e6000sw_probe(device_t dev);
113 static int e6000sw_attach(device_t dev);
114 static int e6000sw_detach(device_t dev);
115 static int e6000sw_readphy(device_t dev, int phy, int reg);
116 static int e6000sw_writephy(device_t dev, int phy, int reg, int data);
117 static etherswitch_info_t* e6000sw_getinfo(device_t dev);
118 static void e6000sw_lock(device_t dev);
119 static void e6000sw_unlock(device_t dev);
120 static int e6000sw_getport(device_t dev, etherswitch_port_t *p);
121 static int e6000sw_setport(device_t dev, etherswitch_port_t *p);
122 static int e6000sw_readreg_wrapper(device_t dev, int addr_reg);
123 static int e6000sw_writereg_wrapper(device_t dev, int addr_reg, int val);
124 static int e6000sw_readphy_wrapper(device_t dev, int phy, int reg);
125 static int e6000sw_writephy_wrapper(device_t dev, int phy, int reg, int data);
126 static int e6000sw_getvgroup_wrapper(device_t dev, etherswitch_vlangroup_t *vg);
127 static int e6000sw_setvgroup_wrapper(device_t dev, etherswitch_vlangroup_t *vg);
128 static int e6000sw_setvgroup(device_t dev, etherswitch_vlangroup_t *vg);
129 static int e6000sw_getvgroup(device_t dev, etherswitch_vlangroup_t *vg);
130 static void e6000sw_setup(device_t dev, e6000sw_softc_t *sc);
131 static void e6000sw_port_vlan_conf(e6000sw_softc_t *sc);
132 static void e6000sw_tick(void *arg);
133 static void e6000sw_set_atustat(device_t dev, e6000sw_softc_t *sc, int bin,
135 static int e6000sw_atu_flush(device_t dev, e6000sw_softc_t *sc, int flag);
136 static __inline void e6000sw_writereg(e6000sw_softc_t *sc, int addr, int reg,
138 static __inline uint32_t e6000sw_readreg(e6000sw_softc_t *sc, int addr,
140 static int e6000sw_ifmedia_upd(struct ifnet *ifp);
141 static void e6000sw_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr);
142 static int e6000sw_atu_mac_table(device_t dev, e6000sw_softc_t *sc, struct
143 atu_opt *atu, int flag);
144 static int e6000sw_get_pvid(e6000sw_softc_t *sc, int port, int *pvid);
145 static int e6000sw_set_pvid(e6000sw_softc_t *sc, int port, int pvid);
146 static __inline int e6000sw_is_cpuport(e6000sw_softc_t *sc, int port);
147 static __inline int e6000sw_is_fixedport(e6000sw_softc_t *sc, int port);
148 static __inline int e6000sw_is_phyport(e6000sw_softc_t *sc, int port);
149 static __inline struct mii_data *e6000sw_miiforphy(e6000sw_softc_t *sc,
152 static device_method_t e6000sw_methods[] = {
153 /* device interface */
154 DEVMETHOD(device_identify, e6000sw_identify),
155 DEVMETHOD(device_probe, e6000sw_probe),
156 DEVMETHOD(device_attach, e6000sw_attach),
157 DEVMETHOD(device_detach, e6000sw_detach),
160 DEVMETHOD(bus_add_child, device_add_child_ordered),
163 DEVMETHOD(miibus_readreg, e6000sw_readphy),
164 DEVMETHOD(miibus_writereg, e6000sw_writephy),
166 /* etherswitch interface */
167 DEVMETHOD(etherswitch_getinfo, e6000sw_getinfo),
168 DEVMETHOD(etherswitch_lock, e6000sw_lock),
169 DEVMETHOD(etherswitch_unlock, e6000sw_unlock),
170 DEVMETHOD(etherswitch_getport, e6000sw_getport),
171 DEVMETHOD(etherswitch_setport, e6000sw_setport),
172 DEVMETHOD(etherswitch_readreg, e6000sw_readreg_wrapper),
173 DEVMETHOD(etherswitch_writereg, e6000sw_writereg_wrapper),
174 DEVMETHOD(etherswitch_readphyreg, e6000sw_readphy_wrapper),
175 DEVMETHOD(etherswitch_writephyreg, e6000sw_writephy_wrapper),
176 DEVMETHOD(etherswitch_setvgroup, e6000sw_setvgroup_wrapper),
177 DEVMETHOD(etherswitch_getvgroup, e6000sw_getvgroup_wrapper),
182 static devclass_t e6000sw_devclass;
184 DEFINE_CLASS_0(e6000sw, e6000sw_driver, e6000sw_methods,
185 sizeof(e6000sw_softc_t));
187 DRIVER_MODULE(e6000sw, mdio, e6000sw_driver, e6000sw_devclass, 0, 0);
188 DRIVER_MODULE(etherswitch, e6000sw, etherswitch_driver, etherswitch_devclass, 0,
190 DRIVER_MODULE(miibus, e6000sw, miibus_driver, miibus_devclass, 0, 0);
191 MODULE_DEPEND(e6000sw, mdio, 1, 1, 1);
194 #define SMI_CMD_BUSY (1<<15)
195 #define SMI_CMD_OP_READ ((2<<10)|SMI_CMD_BUSY|(1<<12))
196 #define SMI_CMD_OP_WRITE ((1<<10)|SMI_CMD_BUSY|(1<<12))
199 #define MDIO_READ(dev, addr, reg) MDIO_READREG(device_get_parent(dev), (addr), (reg))
200 #define MDIO_WRITE(dev, addr, reg, val) MDIO_WRITEREG(device_get_parent(dev), (addr), (reg), (val))
202 e6000sw_identify(driver_t *driver, device_t parent)
205 if (device_find_child(parent, "e6000sw", -1) == NULL)
206 BUS_ADD_CHILD(parent, 0, "e6000sw", -1);
210 e6000sw_probe(device_t dev)
213 const char *description;
215 phandle_t dsa_node, switch_node;
217 dsa_node = fdt_find_compatible(OF_finddevice("/"),
219 switch_node = OF_child(dsa_node);
221 if (switch_node == 0)
224 sc = device_get_softc(dev);
225 bzero(sc, sizeof(e6000sw_softc_t));
227 sc->node = switch_node;
229 if (OF_getencprop(sc->node, "reg", &sc->sw_addr,
230 sizeof(sc->sw_addr)) < 0)
232 if (sc->sw_addr != 0 && (sc->sw_addr % 2) == 0)
233 sc->multi_chip = true;
235 /* Lock is necessary due to assertions. */
236 sx_init(&sc->sx, "e6000sw");
239 id = e6000sw_readreg(sc, REG_PORT(0), SWITCH_ID);
241 switch (id & 0xfff0) {
243 description = "Marvell 88E6352";
246 description = "Marvell 88E6172";
249 description = "Marvell 88E6176";
254 device_printf(dev, "Unrecognized device, id 0x%x.\n", id);
258 device_set_desc(dev, description);
262 return (BUS_PROBE_DEFAULT);
266 e6000sw_parse_child_fdt(device_t dev, phandle_t child, uint32_t *fixed_mask,
267 uint32_t *cpu_mask, int *pport, int *pvlangroup)
270 uint32_t port, vlangroup;
271 boolean_t fixed_link;
273 if (fixed_mask == NULL || cpu_mask == NULL || pport == NULL)
276 OF_getprop(child, "label", (void *)portlabel, 100);
277 OF_getencprop(child, "reg", (void *)&port, sizeof(port));
279 if (OF_getencprop(child, "vlangroup", (void *)&vlangroup,
280 sizeof(vlangroup)) > 0) {
281 if (vlangroup >= E6000SW_NUM_VGROUPS)
283 *pvlangroup = vlangroup;
288 if (port >= E6000SW_MAX_PORTS)
292 if (strncmp(portlabel, "cpu", 3) == 0) {
293 device_printf(dev, "CPU port at %d\n", port);
294 *cpu_mask |= (1 << port);
298 fixed_link = OF_child(child);
300 *fixed_mask |= (1 << port);
301 device_printf(dev, "fixed port at %d\n", port);
303 device_printf(dev, "PHY at %d\n", port);
310 e6000sw_init_interface(e6000sw_softc_t *sc, int port)
314 snprintf(name, IFNAMSIZ, "%sport", device_get_nameunit(sc->dev));
316 sc->ifp[port] = if_alloc(IFT_ETHER);
317 if (sc->ifp[port] == NULL)
319 sc->ifp[port]->if_softc = sc;
320 sc->ifp[port]->if_flags |= IFF_UP | IFF_BROADCAST |
321 IFF_DRV_RUNNING | IFF_SIMPLEX;
322 sc->ifname[port] = malloc(strlen(name) + 1, M_E6000SW, M_NOWAIT);
323 if (sc->ifname[port] == NULL) {
324 if_free(sc->ifp[port]);
327 memcpy(sc->ifname[port], name, strlen(name) + 1);
328 if_initname(sc->ifp[port], sc->ifname[port], port);
334 e6000sw_attach_miibus(e6000sw_softc_t *sc, int port)
338 err = mii_attach(sc->dev, &sc->miibus[port], sc->ifp[port],
339 e6000sw_ifmedia_upd, e6000sw_ifmedia_sts, BMSR_DEFCAPMASK,
340 port, MII_OFFSET_ANY, 0);
344 sc->mii[port] = device_get_softc(sc->miibus[port]);
349 e6000sw_attach(device_t dev)
353 int err, port, vlangroup;
354 int member_ports[E6000SW_NUM_VGROUPS];
355 etherswitch_vlangroup_t vg;
358 sc = device_get_softc(dev);
361 device_printf(dev, "multi-chip addressing mode\n");
363 device_printf(dev, "single-chip addressing mode\n");
366 e6000sw_setup(dev, sc);
367 bzero(member_ports, sizeof(member_ports));
369 for (child = OF_child(sc->node); child != 0; child = OF_peer(child)) {
370 err = e6000sw_parse_child_fdt(dev, child, &sc->fixed_mask,
371 &sc->cpuports_mask, &port, &vlangroup);
373 device_printf(sc->dev, "failed to parse DTS\n");
378 member_ports[vlangroup] |= (1 << port);
382 err = e6000sw_init_interface(sc, port);
384 device_printf(sc->dev, "failed to init interface\n");
388 /* Don't attach miibus at CPU/fixed ports */
389 if (!e6000sw_is_phyport(sc, port))
392 err = e6000sw_attach_miibus(sc, port);
394 device_printf(sc->dev, "failed to attach miibus\n");
399 etherswitch_info.es_nports = sc->num_ports;
400 for (port = 0; port < sc->num_ports; port++)
401 sc->vgroup[port] = E6000SW_PORT_NO_VGROUP;
403 /* Set VLAN configuration */
404 e6000sw_port_vlan_conf(sc);
407 for (vlangroup = 0; vlangroup < E6000SW_NUM_VGROUPS; vlangroup++)
408 if (member_ports[vlangroup] != 0) {
409 vg.es_vlangroup = vg.es_vid = vlangroup;
410 vg.es_member_ports = vg.es_untagged_ports =
411 member_ports[vlangroup];
412 e6000sw_setvgroup(dev, &vg);
417 bus_generic_probe(dev);
418 bus_generic_attach(dev);
420 kproc_create(e6000sw_tick, sc, &sc->kproc, 0, 0, "e6000sw tick kproc");
432 e6000sw_poll_done(e6000sw_softc_t *sc)
436 for (i = 0; i < 16; i++) {
438 if (!(e6000sw_readreg(sc, REG_GLOBAL2, PHY_CMD) &
439 (1 << PHY_CMD_SMI_BUSY)))
442 pause("e6000sw PHY poll", hz/1000);
449 * PHY registers are paged. Put page index in reg 22 (accessible from every
450 * page), then access specific register.
453 e6000sw_readphy(device_t dev, int phy, int reg)
459 sc = device_get_softc(dev);
462 if (!e6000sw_is_phyport(sc, phy) || reg >= E6000SW_NUM_PHY_REGS) {
463 device_printf(dev, "Wrong register address.\n");
467 E6000SW_LOCK_ASSERT(sc, SA_XLOCKED);
469 err = e6000sw_poll_done(sc);
471 device_printf(dev, "Timeout while waiting for switch\n");
475 val |= 1 << PHY_CMD_SMI_BUSY;
476 val |= PHY_CMD_MODE_MDIO << PHY_CMD_MODE;
477 val |= PHY_CMD_OPCODE_READ << PHY_CMD_OPCODE;
478 val |= (reg << PHY_CMD_REG_ADDR) & PHY_CMD_REG_ADDR_MASK;
479 val |= (phy << PHY_CMD_DEV_ADDR) & PHY_CMD_DEV_ADDR_MASK;
480 e6000sw_writereg(sc, REG_GLOBAL2, SMI_PHY_CMD_REG, val);
482 err = e6000sw_poll_done(sc);
484 device_printf(dev, "Timeout while waiting for switch\n");
488 val = e6000sw_readreg(sc, REG_GLOBAL2, SMI_PHY_DATA_REG)
495 e6000sw_writephy(device_t dev, int phy, int reg, int data)
501 sc = device_get_softc(dev);
504 if (!e6000sw_is_phyport(sc, phy) || reg >= E6000SW_NUM_PHY_REGS) {
505 device_printf(dev, "Wrong register address.\n");
509 E6000SW_LOCK_ASSERT(sc, SA_XLOCKED);
511 err = e6000sw_poll_done(sc);
513 device_printf(dev, "Timeout while waiting for switch\n");
517 val |= PHY_CMD_MODE_MDIO << PHY_CMD_MODE;
518 val |= 1 << PHY_CMD_SMI_BUSY;
519 val |= PHY_CMD_OPCODE_WRITE << PHY_CMD_OPCODE;
520 val |= (reg << PHY_CMD_REG_ADDR) & PHY_CMD_REG_ADDR_MASK;
521 val |= (phy << PHY_CMD_DEV_ADDR) & PHY_CMD_DEV_ADDR_MASK;
522 e6000sw_writereg(sc, REG_GLOBAL2, SMI_PHY_DATA_REG,
523 data & PHY_DATA_MASK);
524 e6000sw_writereg(sc, REG_GLOBAL2, SMI_PHY_CMD_REG, val);
526 err = e6000sw_poll_done(sc);
528 device_printf(dev, "Timeout while waiting for switch\n");
536 e6000sw_detach(device_t dev)
541 sc = device_get_softc(dev);
542 bus_generic_detach(dev);
544 for (phy = 0; phy < sc->num_ports; phy++) {
545 if (sc->miibus[phy] != NULL)
546 device_delete_child(dev, sc->miibus[phy]);
547 if (sc->ifp[phy] != NULL)
548 if_free(sc->ifp[phy]);
549 if (sc->ifname[phy] != NULL)
550 free(sc->ifname[phy], M_E6000SW);
556 static etherswitch_info_t*
557 e6000sw_getinfo(device_t dev)
560 return (ðerswitch_info);
564 e6000sw_lock(device_t dev)
566 struct e6000sw_softc *sc;
568 sc = device_get_softc(dev);
570 E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED);
575 e6000sw_unlock(device_t dev)
577 struct e6000sw_softc *sc;
579 sc = device_get_softc(dev);
581 E6000SW_LOCK_ASSERT(sc, SA_XLOCKED);
586 e6000sw_getport(device_t dev, etherswitch_port_t *p)
588 struct mii_data *mii;
590 struct ifmediareq *ifmr;
593 e6000sw_softc_t *sc = device_get_softc(dev);
594 E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED);
598 if (p->es_port >= sc->num_ports ||
604 e6000sw_get_pvid(sc, p->es_port, &p->es_pvid);
606 if (e6000sw_is_cpuport(sc, p->es_port)) {
607 p->es_flags |= ETHERSWITCH_PORT_CPU;
609 ifmr->ifm_status = IFM_ACTIVE | IFM_AVALID;
611 ifmr->ifm_current = ifmr->ifm_active =
612 IFM_ETHER | IFM_1000_T | IFM_FDX;
614 } else if (e6000sw_is_fixedport(sc, p->es_port)) {
616 ifmr->ifm_status = IFM_ACTIVE | IFM_AVALID;
618 ifmr->ifm_current = ifmr->ifm_active =
619 IFM_ETHER | IFM_1000_T | IFM_FDX;
622 mii = e6000sw_miiforphy(sc, p->es_port);
623 err = ifmedia_ioctl(mii->mii_ifp, &p->es_ifr,
624 &mii->mii_media, SIOCGIFMEDIA);
633 e6000sw_setport(device_t dev, etherswitch_port_t *p)
637 struct mii_data *mii;
640 sc = device_get_softc(dev);
641 E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED);
645 if (p->es_port >= sc->num_ports ||
652 e6000sw_set_pvid(sc, p->es_port, p->es_pvid);
653 if (!e6000sw_is_cpuport(sc, p->es_port)) {
654 mii = e6000sw_miiforphy(sc, p->es_port);
655 err = ifmedia_ioctl(mii->mii_ifp, &p->es_ifr, &mii->mii_media,
665 * Registers in this switch are divided into sections, specified in
666 * documentation. So as to access any of them, section index and reg index
667 * is necessary. etherswitchcfg uses only one variable, so indexes were
668 * compressed into addr_reg: 32 * section_index + reg_index.
671 e6000sw_readreg_wrapper(device_t dev, int addr_reg)
674 if ((addr_reg > (REG_GLOBAL2 * 32 + REG_NUM_MAX)) ||
675 (addr_reg < (REG_PORT(0) * 32))) {
676 device_printf(dev, "Wrong register address.\n");
680 return (e6000sw_readreg(device_get_softc(dev), addr_reg / 32,
685 e6000sw_writereg_wrapper(device_t dev, int addr_reg, int val)
688 if ((addr_reg > (REG_GLOBAL2 * 32 + REG_NUM_MAX)) ||
689 (addr_reg < (REG_PORT(0) * 32))) {
690 device_printf(dev, "Wrong register address.\n");
693 e6000sw_writereg(device_get_softc(dev), addr_reg / 5,
700 * These wrappers are necessary because PHY accesses from etherswitchcfg
701 * need to be synchronized with locks, while miibus PHY accesses do not.
704 e6000sw_readphy_wrapper(device_t dev, int phy, int reg)
709 sc = device_get_softc(dev);
710 E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED);
713 ret = e6000sw_readphy(dev, phy, reg);
720 e6000sw_writephy_wrapper(device_t dev, int phy, int reg, int data)
725 sc = device_get_softc(dev);
726 E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED);
729 ret = e6000sw_writephy(dev, phy, reg, data);
736 * setvgroup/getvgroup called from etherswitchfcg need to be locked,
737 * while internal calls do not.
740 e6000sw_setvgroup_wrapper(device_t dev, etherswitch_vlangroup_t *vg)
745 sc = device_get_softc(dev);
746 E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED);
749 ret = e6000sw_setvgroup(dev, vg);
756 e6000sw_getvgroup_wrapper(device_t dev, etherswitch_vlangroup_t *vg)
761 sc = device_get_softc(dev);
762 E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED);
765 ret = e6000sw_getvgroup(dev, vg);
772 e6000sw_flush_port(e6000sw_softc_t *sc, int port)
776 reg = e6000sw_readreg(sc, REG_PORT(port),
778 reg &= ~PORT_VLAN_MAP_TABLE_MASK;
779 reg &= ~PORT_VLAN_MAP_FID_MASK;
780 e6000sw_writereg(sc, REG_PORT(port),
782 if (sc->vgroup[port] != E6000SW_PORT_NO_VGROUP) {
784 * If port belonged somewhere, owner-group
785 * should have its entry removed.
787 sc->members[sc->vgroup[port]] &= ~(1 << port);
788 sc->vgroup[port] = E6000SW_PORT_NO_VGROUP;
793 e6000sw_port_assign_vgroup(e6000sw_softc_t *sc, int port, int fid, int vgroup,
798 reg = e6000sw_readreg(sc, REG_PORT(port),
800 reg &= ~PORT_VLAN_MAP_TABLE_MASK;
801 reg &= ~PORT_VLAN_MAP_FID_MASK;
802 reg |= members & ~(1 << port);
803 reg |= (fid << PORT_VLAN_MAP_FID) & PORT_VLAN_MAP_FID_MASK;
804 e6000sw_writereg(sc, REG_PORT(port), PORT_VLAN_MAP,
806 sc->vgroup[port] = vgroup;
810 e6000sw_setvgroup(device_t dev, etherswitch_vlangroup_t *vg)
815 sc = device_get_softc(dev);
816 E6000SW_LOCK_ASSERT(sc, SA_XLOCKED);
818 if (vg->es_vlangroup >= E6000SW_NUM_VGROUPS)
820 if (vg->es_member_ports != vg->es_untagged_ports) {
821 device_printf(dev, "Tagged ports not supported.\n");
825 vg->es_untagged_ports &= PORT_VLAN_MAP_TABLE_MASK;
826 fid = vg->es_vlangroup + 1;
827 for (port = 0; port < sc->num_ports; port++) {
828 if ((sc->members[vg->es_vlangroup] & (1 << port)) ||
829 (vg->es_untagged_ports & (1 << port)))
830 e6000sw_flush_port(sc, port);
831 if (vg->es_untagged_ports & (1 << port))
832 e6000sw_port_assign_vgroup(sc, port, fid,
833 vg->es_vlangroup, vg->es_untagged_ports);
835 sc->vid[vg->es_vlangroup] = vg->es_vid;
836 sc->members[vg->es_vlangroup] = vg->es_untagged_ports;
842 e6000sw_getvgroup(device_t dev, etherswitch_vlangroup_t *vg)
846 sc = device_get_softc(dev);
847 E6000SW_LOCK_ASSERT(sc, SA_XLOCKED);
849 if (vg->es_vlangroup >= E6000SW_NUM_VGROUPS)
851 vg->es_untagged_ports = vg->es_member_ports =
852 sc->members[vg->es_vlangroup];
853 vg->es_vid = ETHERSWITCH_VID_VALID;
858 static __inline struct mii_data*
859 e6000sw_miiforphy(e6000sw_softc_t *sc, unsigned int phy)
862 if (!e6000sw_is_phyport(sc, phy))
865 return (device_get_softc(sc->miibus[phy]));
869 e6000sw_ifmedia_upd(struct ifnet *ifp)
872 struct mii_data *mii;
875 mii = e6000sw_miiforphy(sc, ifp->if_dunit);
884 e6000sw_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
887 struct mii_data *mii;
890 mii = e6000sw_miiforphy(sc, ifp->if_dunit);
896 ifmr->ifm_active = mii->mii_media_active;
897 ifmr->ifm_status = mii->mii_media_status;
902 e6000sw_smi_waitready(e6000sw_softc_t *sc, int phy)
906 for (i = 0; i < E6000SW_SMI_TIMEOUT; i++) {
907 if ((MDIO_READ(sc->dev, phy, SMI_CMD)
908 & SMI_CMD_BUSY) == 0)
915 static __inline uint32_t
916 e6000sw_readreg(e6000sw_softc_t *sc, int addr, int reg)
919 E6000SW_LOCK_ASSERT(sc, SA_XLOCKED);
922 return (MDIO_READ(sc->dev, addr, reg) & 0xffff);
924 if (e6000sw_smi_waitready(sc, sc->sw_addr)) {
925 printf("e6000sw: readreg timeout\n");
928 MDIO_WRITE(sc->dev, sc->sw_addr, SMI_CMD, SMI_CMD_OP_READ |
930 if (e6000sw_smi_waitready(sc, sc->sw_addr)) {
931 printf("e6000sw: readreg timeout\n");
935 return (MDIO_READ(sc->dev, sc->sw_addr, SMI_DATA) & 0xffff);
939 e6000sw_writereg(e6000sw_softc_t *sc, int addr, int reg, int val)
942 E6000SW_LOCK_ASSERT(sc, SA_XLOCKED);
944 if (!sc->multi_chip) {
945 MDIO_WRITE(sc->dev, addr, reg, val);
949 if (e6000sw_smi_waitready(sc, sc->sw_addr)) {
950 printf("e6000sw: readreg timeout\n");
953 MDIO_WRITE(sc->dev, sc->sw_addr, SMI_DATA, val);
954 MDIO_WRITE(sc->dev, sc->sw_addr, SMI_CMD, SMI_CMD_OP_WRITE |
956 if (e6000sw_smi_waitready(sc, sc->sw_addr)) {
957 printf("e6000sw: readreg timeout\n");
965 e6000sw_is_cpuport(e6000sw_softc_t *sc, int port)
968 return (sc->cpuports_mask & (1 << port));
972 e6000sw_is_fixedport(e6000sw_softc_t *sc, int port)
975 return (sc->fixed_mask & (1 << port));
979 e6000sw_is_phyport(e6000sw_softc_t *sc, int port)
982 phy_mask = ~(sc->fixed_mask | sc->cpuports_mask);
984 return (phy_mask & (1 << port));
988 e6000sw_set_pvid(e6000sw_softc_t *sc, int port, int pvid)
991 e6000sw_writereg(sc, REG_PORT(port), PORT_VID, pvid &
992 PORT_VID_DEF_VID_MASK);
998 e6000sw_get_pvid(e6000sw_softc_t *sc, int port, int *pvid)
1004 *pvid = e6000sw_readreg(sc, REG_PORT(port), PORT_VID) &
1005 PORT_VID_DEF_VID_MASK;
1011 * Convert port status to ifmedia.
1014 e6000sw_update_ifmedia(uint16_t portstatus, u_int *media_status, u_int *media_active)
1016 *media_active = IFM_ETHER;
1017 *media_status = IFM_AVALID;
1019 if ((portstatus & PORT_STATUS_LINK_MASK) != 0)
1020 *media_status |= IFM_ACTIVE;
1022 *media_active |= IFM_NONE;
1026 switch (portstatus & PORT_STATUS_SPEED_MASK) {
1027 case PORT_STATUS_SPEED_10:
1028 *media_active |= IFM_10_T;
1030 case PORT_STATUS_SPEED_100:
1031 *media_active |= IFM_100_TX;
1033 case PORT_STATUS_SPEED_1000:
1034 *media_active |= IFM_1000_T;
1038 if ((portstatus & PORT_STATUS_DUPLEX_MASK) == 0)
1039 *media_active |= IFM_FDX;
1041 *media_active |= IFM_HDX;
1045 e6000sw_tick (void *arg)
1047 e6000sw_softc_t *sc;
1048 struct mii_softc *miisc;
1049 uint16_t portstatus;
1054 E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED);
1058 for (port = 0; port < sc->num_ports; port++) {
1059 /* Tick only on PHY ports */
1060 if (!e6000sw_is_phyport(sc, port))
1063 portstatus = e6000sw_readreg(sc, REG_PORT(port), PORT_STATUS);
1065 e6000sw_update_ifmedia(portstatus,
1066 &sc->mii[port]->mii_media_status,
1067 &sc->mii[port]->mii_media_active);
1069 LIST_FOREACH(miisc, &sc->mii[port]->mii_phys, mii_list) {
1070 if (IFM_INST(sc->mii[port]->mii_media.ifm_cur->ifm_media)
1073 mii_phy_update(miisc, MII_POLLSTAT);
1077 pause("e6000sw tick", 1000);
1082 e6000sw_setup(device_t dev, e6000sw_softc_t *sc)
1084 uint16_t atu_ctrl, atu_age;
1086 /* Set aging time */
1087 e6000sw_writereg(sc, REG_GLOBAL, ATU_CONTROL,
1088 (E6000SW_DEFAULT_AGETIME << ATU_CONTROL_AGETIME) |
1089 (1 << ATU_CONTROL_LEARN2ALL));
1091 /* Send all with specific mac address to cpu port */
1092 e6000sw_writereg(sc, REG_GLOBAL2, MGMT_EN_2x, MGMT_EN_ALL);
1093 e6000sw_writereg(sc, REG_GLOBAL2, MGMT_EN_0x, MGMT_EN_ALL);
1095 /* Disable Remote Management */
1096 e6000sw_writereg(sc, REG_GLOBAL, SWITCH_GLOBAL_CONTROL2, 0);
1098 /* Disable loopback filter and flow control messages */
1099 e6000sw_writereg(sc, REG_GLOBAL2, SWITCH_MGMT,
1100 SWITCH_MGMT_PRI_MASK |
1101 (1 << SWITCH_MGMT_RSVD2CPU) |
1102 SWITCH_MGMT_FC_PRI_MASK |
1103 (1 << SWITCH_MGMT_FORCEFLOW));
1105 e6000sw_atu_flush(dev, sc, NO_OPERATION);
1106 e6000sw_atu_mac_table(dev, sc, NULL, NO_OPERATION);
1107 e6000sw_set_atustat(dev, sc, 0, COUNT_ALL);
1109 /* Set ATU AgeTime to 15 seconds */
1112 atu_ctrl = e6000sw_readreg(sc, REG_GLOBAL, ATU_CONTROL);
1114 /* Set new AgeTime field */
1115 atu_ctrl &= ~ATU_CONTROL_AGETIME_MASK;
1116 e6000sw_writereg(sc, REG_GLOBAL, ATU_CONTROL, atu_ctrl |
1117 (atu_age << ATU_CONTROL_AGETIME));
1121 e6000sw_port_vlan_conf(e6000sw_softc_t *sc)
1127 /* Disable all ports */
1128 for (port = 0; port < sc->num_ports; port++) {
1129 ret = e6000sw_readreg(sc, REG_PORT(port), PORT_CONTROL);
1130 e6000sw_writereg(sc, REG_PORT(port), PORT_CONTROL,
1131 (ret & ~PORT_CONTROL_ENABLE));
1134 /* Set port priority */
1135 for (port = 0; port < sc->num_ports; port++) {
1136 ret = e6000sw_readreg(sc, REG_PORT(port), PORT_VID);
1137 ret &= ~PORT_VID_PRIORITY_MASK;
1138 e6000sw_writereg(sc, REG_PORT(port), PORT_VID, ret);
1142 for (port = 0; port < sc->num_ports; port++) {
1143 ret = e6000sw_readreg(sc, REG_PORT(port), PORT_VID);
1144 ret &= ~PORT_VID_DEF_VID_MASK;
1146 e6000sw_writereg(sc, REG_PORT(port), PORT_VID, ret);
1149 /* Enable all ports */
1150 for (port = 0; port < sc->num_ports; port++) {
1151 ret = e6000sw_readreg(sc, REG_PORT(port), PORT_CONTROL);
1152 e6000sw_writereg(sc, REG_PORT(port), PORT_CONTROL, (ret |
1153 PORT_CONTROL_ENABLE));
1158 e6000sw_set_atustat(device_t dev, e6000sw_softc_t *sc, int bin, int flag)
1162 ret = e6000sw_readreg(sc, REG_GLOBAL2, ATU_STATS);
1163 e6000sw_writereg(sc, REG_GLOBAL2, ATU_STATS, (bin << ATU_STATS_BIN ) |
1164 (flag << ATU_STATS_FLAG));
1168 e6000sw_atu_mac_table(device_t dev, e6000sw_softc_t *sc, struct atu_opt *atu,
1175 if (flag == NO_OPERATION)
1177 else if ((flag & (LOAD_FROM_FIB | PURGE_FROM_FIB | GET_NEXT_IN_FIB |
1178 GET_VIOLATION_DATA | CLEAR_VIOLATION_DATA)) == 0) {
1179 device_printf(dev, "Wrong Opcode for ATU operation\n");
1183 ret_opt = e6000sw_readreg(sc, REG_GLOBAL, ATU_OPERATION);
1185 if (ret_opt & ATU_UNIT_BUSY) {
1186 device_printf(dev, "ATU unit is busy, cannot access"
1190 if(flag & LOAD_FROM_FIB) {
1191 ret_data = e6000sw_readreg(sc, REG_GLOBAL, ATU_DATA);
1192 e6000sw_writereg(sc, REG_GLOBAL2, ATU_DATA, (ret_data &
1195 e6000sw_writereg(sc, REG_GLOBAL, ATU_MAC_ADDR01, atu->mac_01);
1196 e6000sw_writereg(sc, REG_GLOBAL, ATU_MAC_ADDR23, atu->mac_23);
1197 e6000sw_writereg(sc, REG_GLOBAL, ATU_MAC_ADDR45, atu->mac_45);
1198 e6000sw_writereg(sc, REG_GLOBAL, ATU_FID, atu->fid);
1200 e6000sw_writereg(sc, REG_GLOBAL, ATU_OPERATION, (ret_opt |
1201 ATU_UNIT_BUSY | flag));
1203 retries = E6000SW_RETRIES;
1204 while (--retries & (e6000sw_readreg(sc, REG_GLOBAL,
1205 ATU_OPERATION) & ATU_UNIT_BUSY))
1209 device_printf(dev, "Timeout while flushing\n");
1210 else if (flag & GET_NEXT_IN_FIB) {
1211 atu->mac_01 = e6000sw_readreg(sc, REG_GLOBAL,
1213 atu->mac_23 = e6000sw_readreg(sc, REG_GLOBAL,
1215 atu->mac_45 = e6000sw_readreg(sc, REG_GLOBAL,
1224 e6000sw_atu_flush(device_t dev, e6000sw_softc_t *sc, int flag)
1229 if (flag == NO_OPERATION)
1232 ret = e6000sw_readreg(sc, REG_GLOBAL, ATU_OPERATION);
1233 if (ret & ATU_UNIT_BUSY) {
1234 device_printf(dev, "Atu unit is busy, cannot flush\n");
1237 e6000sw_writereg(sc, REG_GLOBAL, ATU_OPERATION, (ret |
1238 ATU_UNIT_BUSY | flag));
1239 retries = E6000SW_RETRIES;
1240 while (--retries & (e6000sw_readreg(sc, REG_GLOBAL,
1241 ATU_OPERATION) & ATU_UNIT_BUSY))
1245 device_printf(dev, "Timeout while flushing\n");