2 * Copyright (c) 2015 Semihalf
3 * Copyright (c) 2015 Stormshield
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
31 #include <sys/types.h>
32 #include <sys/param.h>
33 #include <sys/systm.h>
34 #include <sys/sockio.h>
35 #include <sys/kernel.h>
36 #include <sys/kthread.h>
37 #include <sys/socket.h>
38 #include <sys/module.h>
39 #include <sys/errno.h>
43 #include <sys/fcntl.h>
46 #include <net/if_media.h>
47 #include <net/if_types.h>
49 #include <machine/bus.h>
50 #include <machine/resource.h>
52 #include <arm/mv/mvwin.h>
53 #include <arm/mv/mvreg.h>
54 #include <arm/mv/mvvar.h>
56 #include <dev/etherswitch/etherswitch.h>
57 #include <dev/mdio/mdio.h>
58 #include <dev/mii/mii.h>
59 #include <dev/mii/miivar.h>
60 #include <dev/mge/if_mgevar.h>
62 #include <dev/fdt/fdt_common.h>
63 #include <dev/ofw/ofw_bus.h>
64 #include <dev/ofw/ofw_bus_subr.h>
66 #include "e6000swreg.h"
67 #include "etherswitch_if.h"
68 #include "miibus_if.h"
71 MALLOC_DECLARE(M_E6000SW);
72 MALLOC_DEFINE(M_E6000SW, "e6000sw", "e6000sw switch");
74 #define E6000SW_LOCK(_sc) \
76 #define E6000SW_UNLOCK(_sc) \
78 #define E6000SW_LOCK_ASSERT(_sc, _what) \
79 sx_assert(&(_sc)->sx, (_what))
80 #define E6000SW_TRYLOCK(_sc) \
81 sx_tryxlock(&(_sc)->sx)
83 typedef struct e6000sw_softc {
88 struct ifnet *ifp[E6000SW_MAX_PORTS];
89 char *ifname[E6000SW_MAX_PORTS];
90 device_t miibus[E6000SW_MAX_PORTS];
91 struct mii_data *mii[E6000SW_MAX_PORTS];
92 struct callout tick_callout;
94 uint32_t cpuports_mask;
100 int vid[E6000SW_NUM_VGROUPS];
101 int members[E6000SW_NUM_VGROUPS];
102 int vgroup[E6000SW_MAX_PORTS];
105 static etherswitch_info_t etherswitch_info = {
107 .es_nvlangroups = E6000SW_NUM_VGROUPS,
108 .es_name = "Marvell 6000 series switch"
111 static void e6000sw_identify(driver_t *driver, device_t parent);
112 static int e6000sw_probe(device_t dev);
113 static int e6000sw_attach(device_t dev);
114 static int e6000sw_detach(device_t dev);
115 static int e6000sw_readphy(device_t dev, int phy, int reg);
116 static int e6000sw_writephy(device_t dev, int phy, int reg, int data);
117 static etherswitch_info_t* e6000sw_getinfo(device_t dev);
118 static void e6000sw_lock(device_t dev);
119 static void e6000sw_unlock(device_t dev);
120 static int e6000sw_getport(device_t dev, etherswitch_port_t *p);
121 static int e6000sw_setport(device_t dev, etherswitch_port_t *p);
122 static int e6000sw_readreg_wrapper(device_t dev, int addr_reg);
123 static int e6000sw_writereg_wrapper(device_t dev, int addr_reg, int val);
124 static int e6000sw_readphy_wrapper(device_t dev, int phy, int reg);
125 static int e6000sw_writephy_wrapper(device_t dev, int phy, int reg, int data);
126 static int e6000sw_getvgroup_wrapper(device_t dev, etherswitch_vlangroup_t *vg);
127 static int e6000sw_setvgroup_wrapper(device_t dev, etherswitch_vlangroup_t *vg);
128 static int e6000sw_setvgroup(device_t dev, etherswitch_vlangroup_t *vg);
129 static int e6000sw_getvgroup(device_t dev, etherswitch_vlangroup_t *vg);
130 static void e6000sw_setup(device_t dev, e6000sw_softc_t *sc);
131 static void e6000sw_port_vlan_conf(e6000sw_softc_t *sc);
132 static void e6000sw_tick(void *arg);
133 static void e6000sw_set_atustat(device_t dev, e6000sw_softc_t *sc, int bin,
135 static int e6000sw_atu_flush(device_t dev, e6000sw_softc_t *sc, int flag);
136 static __inline void e6000sw_writereg(e6000sw_softc_t *sc, int addr, int reg,
138 static __inline uint32_t e6000sw_readreg(e6000sw_softc_t *sc, int addr,
140 static int e6000sw_ifmedia_upd(struct ifnet *ifp);
141 static void e6000sw_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr);
142 static int e6000sw_atu_mac_table(device_t dev, e6000sw_softc_t *sc, struct
143 atu_opt *atu, int flag);
144 static int e6000sw_get_pvid(e6000sw_softc_t *sc, int port, int *pvid);
145 static int e6000sw_set_pvid(e6000sw_softc_t *sc, int port, int pvid);
146 static __inline int e6000sw_is_cpuport(e6000sw_softc_t *sc, int port);
147 static __inline int e6000sw_is_fixedport(e6000sw_softc_t *sc, int port);
148 static __inline int e6000sw_is_phyport(e6000sw_softc_t *sc, int port);
149 static __inline struct mii_data *e6000sw_miiforphy(e6000sw_softc_t *sc,
152 static struct proc *e6000sw_kproc;
154 static device_method_t e6000sw_methods[] = {
155 /* device interface */
156 DEVMETHOD(device_identify, e6000sw_identify),
157 DEVMETHOD(device_probe, e6000sw_probe),
158 DEVMETHOD(device_attach, e6000sw_attach),
159 DEVMETHOD(device_detach, e6000sw_detach),
162 DEVMETHOD(bus_add_child, device_add_child_ordered),
165 DEVMETHOD(miibus_readreg, e6000sw_readphy),
166 DEVMETHOD(miibus_writereg, e6000sw_writephy),
168 /* etherswitch interface */
169 DEVMETHOD(etherswitch_getinfo, e6000sw_getinfo),
170 DEVMETHOD(etherswitch_lock, e6000sw_lock),
171 DEVMETHOD(etherswitch_unlock, e6000sw_unlock),
172 DEVMETHOD(etherswitch_getport, e6000sw_getport),
173 DEVMETHOD(etherswitch_setport, e6000sw_setport),
174 DEVMETHOD(etherswitch_readreg, e6000sw_readreg_wrapper),
175 DEVMETHOD(etherswitch_writereg, e6000sw_writereg_wrapper),
176 DEVMETHOD(etherswitch_readphyreg, e6000sw_readphy_wrapper),
177 DEVMETHOD(etherswitch_writephyreg, e6000sw_writephy_wrapper),
178 DEVMETHOD(etherswitch_setvgroup, e6000sw_setvgroup_wrapper),
179 DEVMETHOD(etherswitch_getvgroup, e6000sw_getvgroup_wrapper),
184 static devclass_t e6000sw_devclass;
186 DEFINE_CLASS_0(e6000sw, e6000sw_driver, e6000sw_methods,
187 sizeof(e6000sw_softc_t));
189 DRIVER_MODULE(e6000sw, mdio, e6000sw_driver, e6000sw_devclass, 0, 0);
190 DRIVER_MODULE(etherswitch, e6000sw, etherswitch_driver, etherswitch_devclass, 0,
192 DRIVER_MODULE(miibus, e6000sw, miibus_driver, miibus_devclass, 0, 0);
193 MODULE_DEPEND(e6000sw, mdio, 1, 1, 1);
196 #define SMI_CMD_BUSY (1<<15)
197 #define SMI_CMD_OP_READ ((2<<10)|SMI_CMD_BUSY|(1<<12))
198 #define SMI_CMD_OP_WRITE ((1<<10)|SMI_CMD_BUSY|(1<<12))
201 #define MDIO_READ(dev, addr, reg) MDIO_READREG(device_get_parent(dev), (addr), (reg))
202 #define MDIO_WRITE(dev, addr, reg, val) MDIO_WRITEREG(device_get_parent(dev), (addr), (reg), (val))
204 e6000sw_identify(driver_t *driver, device_t parent)
207 if (device_find_child(parent, "e6000sw", -1) == NULL)
208 BUS_ADD_CHILD(parent, 0, "e6000sw", -1);
212 e6000sw_probe(device_t dev)
215 const char *description;
218 phandle_t dsa_node, switch_node;
220 dsa_node = fdt_find_compatible(OF_finddevice("/"),
222 switch_node = OF_child(dsa_node);
224 if (switch_node == 0)
227 sc = device_get_softc(dev);
228 bzero(sc, sizeof(e6000sw_softc_t));
230 sc->node = switch_node;
232 /* Read ADDR[4:1]n using indirect access */
233 MDIO_WRITE(dev, REG_GLOBAL2, SCR_AND_MISC_REG,
234 SCR_AND_MISC_PTR_CFG);
235 dev_addr = MDIO_READ(dev, REG_GLOBAL2, SCR_AND_MISC_REG) &
236 SCR_AND_MISC_DATA_CFG_MASK;
238 sc->multi_chip = true;
239 device_printf(dev, "multi-chip addresing mode\n");
241 device_printf(dev, "single-chip addressing mode\n");
244 if (OF_getencprop(sc->node, "reg", &sc->sw_addr,
245 sizeof(sc->sw_addr)) < 0)
248 /* Lock is necessary due to assertions. */
249 sx_init(&sc->sx, "e6000sw");
252 id = e6000sw_readreg(sc, REG_PORT(0), SWITCH_ID);
254 switch (id & 0xfff0) {
256 description = "Marvell 88E6352";
259 description = "Marvell 88E6172";
262 description = "Marvell 88E6176";
267 device_printf(dev, "Unrecognized device, id 0x%x.\n", id);
271 device_set_desc(dev, description);
275 return (BUS_PROBE_DEFAULT);
279 e6000sw_parse_child_fdt(device_t dev, phandle_t child, uint32_t *fixed_mask,
280 uint32_t *cpu_mask, int *pport, int *pvlangroup)
283 uint32_t port, vlangroup;
284 boolean_t fixed_link;
286 if (fixed_mask == NULL || cpu_mask == NULL || pport == NULL)
289 OF_getprop(child, "label", (void *)portlabel, 100);
290 OF_getencprop(child, "reg", (void *)&port, sizeof(port));
292 if (OF_getencprop(child, "vlangroup", (void *)&vlangroup,
293 sizeof(vlangroup)) > 0) {
294 if (vlangroup >= E6000SW_NUM_VGROUPS)
296 *pvlangroup = vlangroup;
301 if (port >= E6000SW_MAX_PORTS)
305 if (strncmp(portlabel, "cpu", 3) == 0) {
306 device_printf(dev, "CPU port at %d\n", port);
307 *cpu_mask |= (1 << port);
311 fixed_link = OF_child(child);
313 *fixed_mask |= (1 << port);
314 device_printf(dev, "fixed port at %d\n", port);
316 device_printf(dev, "PHY at %d\n", port);
323 e6000sw_init_interface(e6000sw_softc_t *sc, int port)
327 snprintf(name, IFNAMSIZ, "%sport", device_get_nameunit(sc->dev));
329 sc->ifp[port] = if_alloc(IFT_ETHER);
330 if (sc->ifp[port] == NULL)
332 sc->ifp[port]->if_softc = sc;
333 sc->ifp[port]->if_flags |= IFF_UP | IFF_BROADCAST |
334 IFF_DRV_RUNNING | IFF_SIMPLEX;
335 sc->ifname[port] = malloc(strlen(name) + 1, M_E6000SW, M_WAITOK);
336 if (sc->ifname[port] == NULL)
338 memcpy(sc->ifname[port], name, strlen(name) + 1);
339 if_initname(sc->ifp[port], sc->ifname[port], port);
345 e6000sw_attach_miibus(e6000sw_softc_t *sc, int port)
349 err = mii_attach(sc->dev, &sc->miibus[port], sc->ifp[port],
350 e6000sw_ifmedia_upd, e6000sw_ifmedia_sts, BMSR_DEFCAPMASK,
351 port, MII_OFFSET_ANY, 0);
355 sc->mii[port] = device_get_softc(sc->miibus[port]);
360 e6000sw_attach(device_t dev)
364 int err, port, vlangroup;
365 int member_ports[E6000SW_NUM_VGROUPS];
366 etherswitch_vlangroup_t vg;
369 sc = device_get_softc(dev);
372 e6000sw_setup(dev, sc);
373 bzero(member_ports, sizeof(member_ports));
375 for (child = OF_child(sc->node); child != 0; child = OF_peer(child)) {
376 err = e6000sw_parse_child_fdt(dev, child, &sc->fixed_mask,
377 &sc->cpuports_mask, &port, &vlangroup);
379 device_printf(sc->dev, "failed to parse DTS\n");
384 member_ports[vlangroup] |= (1 << port);
388 err = e6000sw_init_interface(sc, port);
390 device_printf(sc->dev, "failed to init interface\n");
394 /* Don't attach miibus at CPU/fixed ports */
395 if (!e6000sw_is_phyport(sc, port))
398 err = e6000sw_attach_miibus(sc, port);
400 device_printf(sc->dev, "failed to attach miibus\n");
405 etherswitch_info.es_nports = sc->num_ports;
406 for (port = 0; port < sc->num_ports; port++)
407 sc->vgroup[port] = E6000SW_PORT_NO_VGROUP;
409 /* Set VLAN configuration */
410 e6000sw_port_vlan_conf(sc);
413 for (vlangroup = 0; vlangroup < E6000SW_NUM_VGROUPS; vlangroup++)
414 if (member_ports[vlangroup] != 0) {
415 vg.es_vlangroup = vg.es_vid = vlangroup;
416 vg.es_member_ports = vg.es_untagged_ports =
417 member_ports[vlangroup];
418 e6000sw_setvgroup(dev, &vg);
423 bus_generic_probe(dev);
424 bus_generic_attach(dev);
426 kproc_create(e6000sw_tick, sc, &e6000sw_kproc, 0, 0,
427 "e6000sw tick kproc");
438 e6000sw_poll_done(e6000sw_softc_t *sc)
441 while (e6000sw_readreg(sc, REG_GLOBAL2, PHY_CMD) &
442 (1 << PHY_CMD_SMI_BUSY))
447 * PHY registers are paged. Put page index in reg 22 (accessible from every
448 * page), then access specific register.
451 e6000sw_readphy(device_t dev, int phy, int reg)
456 sc = device_get_softc(dev);
459 if (!e6000sw_is_phyport(sc, phy) || reg >= E6000SW_NUM_PHY_REGS) {
460 device_printf(dev, "Wrong register address.\n");
464 E6000SW_LOCK_ASSERT(sc, SA_XLOCKED);
466 e6000sw_poll_done(sc);
467 val |= 1 << PHY_CMD_SMI_BUSY;
468 val |= PHY_CMD_MODE_MDIO << PHY_CMD_MODE;
469 val |= PHY_CMD_OPCODE_READ << PHY_CMD_OPCODE;
470 val |= (reg << PHY_CMD_REG_ADDR) & PHY_CMD_REG_ADDR_MASK;
471 val |= (phy << PHY_CMD_DEV_ADDR) & PHY_CMD_DEV_ADDR_MASK;
472 e6000sw_writereg(sc, REG_GLOBAL2, SMI_PHY_CMD_REG, val);
473 e6000sw_poll_done(sc);
474 val = e6000sw_readreg(sc, REG_GLOBAL2, SMI_PHY_DATA_REG)
481 e6000sw_writephy(device_t dev, int phy, int reg, int data)
486 sc = device_get_softc(dev);
489 if (!e6000sw_is_phyport(sc, phy) || reg >= E6000SW_NUM_PHY_REGS) {
490 device_printf(dev, "Wrong register address.\n");
494 E6000SW_LOCK_ASSERT(sc, SA_XLOCKED);
496 e6000sw_poll_done(sc);
497 val |= PHY_CMD_MODE_MDIO << PHY_CMD_MODE;
498 val |= 1 << PHY_CMD_SMI_BUSY;
499 val |= PHY_CMD_OPCODE_WRITE << PHY_CMD_OPCODE;
500 val |= (reg << PHY_CMD_REG_ADDR) & PHY_CMD_REG_ADDR_MASK;
501 val |= (phy << PHY_CMD_DEV_ADDR) & PHY_CMD_DEV_ADDR_MASK;
502 e6000sw_writereg(sc, REG_GLOBAL2, SMI_PHY_DATA_REG,
503 data & PHY_DATA_MASK);
504 e6000sw_writereg(sc, REG_GLOBAL2, SMI_PHY_CMD_REG, val);
505 e6000sw_poll_done(sc);
511 e6000sw_detach(device_t dev)
516 sc = device_get_softc(dev);
517 bus_generic_detach(dev);
519 for (phy = 0; phy < sc->num_ports; phy++) {
520 if (sc->miibus[phy] != NULL)
521 device_delete_child(dev, sc->miibus[phy]);
522 if (sc->ifp[phy] != NULL)
523 if_free(sc->ifp[phy]);
524 if (sc->ifname[phy] != NULL)
525 free(sc->ifname[phy], M_E6000SW);
531 static etherswitch_info_t*
532 e6000sw_getinfo(device_t dev)
535 return (ðerswitch_info);
539 e6000sw_lock(device_t dev)
541 struct e6000sw_softc *sc;
543 sc = device_get_softc(dev);
545 E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED);
550 e6000sw_unlock(device_t dev)
552 struct e6000sw_softc *sc;
554 sc = device_get_softc(dev);
556 E6000SW_LOCK_ASSERT(sc, SA_XLOCKED);
561 e6000sw_getport(device_t dev, etherswitch_port_t *p)
563 struct mii_data *mii;
565 struct ifmediareq *ifmr;
568 e6000sw_softc_t *sc = device_get_softc(dev);
569 E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED);
573 if (p->es_port >= sc->num_ports ||
579 e6000sw_get_pvid(sc, p->es_port, &p->es_pvid);
581 if (e6000sw_is_cpuport(sc, p->es_port)) {
582 p->es_flags |= ETHERSWITCH_PORT_CPU;
584 ifmr->ifm_status = IFM_ACTIVE | IFM_AVALID;
586 ifmr->ifm_current = ifmr->ifm_active =
587 IFM_ETHER | IFM_1000_T | IFM_FDX;
589 } else if (e6000sw_is_fixedport(sc, p->es_port)) {
591 ifmr->ifm_status = IFM_ACTIVE | IFM_AVALID;
593 ifmr->ifm_current = ifmr->ifm_active =
594 IFM_ETHER | IFM_1000_T | IFM_FDX;
597 mii = e6000sw_miiforphy(sc, p->es_port);
598 err = ifmedia_ioctl(mii->mii_ifp, &p->es_ifr,
599 &mii->mii_media, SIOCGIFMEDIA);
608 e6000sw_setport(device_t dev, etherswitch_port_t *p)
612 struct mii_data *mii;
615 sc = device_get_softc(dev);
616 E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED);
620 if (p->es_port >= sc->num_ports ||
627 e6000sw_set_pvid(sc, p->es_port, p->es_pvid);
628 if (!e6000sw_is_cpuport(sc, p->es_port)) {
629 mii = e6000sw_miiforphy(sc, p->es_port);
630 err = ifmedia_ioctl(mii->mii_ifp, &p->es_ifr, &mii->mii_media,
640 * Registers in this switch are divided into sections, specified in
641 * documentation. So as to access any of them, section index and reg index
642 * is necessary. etherswitchcfg uses only one variable, so indexes were
643 * compressed into addr_reg: 32 * section_index + reg_index.
646 e6000sw_readreg_wrapper(device_t dev, int addr_reg)
649 if ((addr_reg > (REG_GLOBAL2 * 32 + REG_NUM_MAX)) ||
650 (addr_reg < (REG_PORT(0) * 32))) {
651 device_printf(dev, "Wrong register address.\n");
655 return (e6000sw_readreg(device_get_softc(dev), addr_reg / 32,
660 e6000sw_writereg_wrapper(device_t dev, int addr_reg, int val)
663 if ((addr_reg > (REG_GLOBAL2 * 32 + REG_NUM_MAX)) ||
664 (addr_reg < (REG_PORT(0) * 32))) {
665 device_printf(dev, "Wrong register address.\n");
668 e6000sw_writereg(device_get_softc(dev), addr_reg / 5,
675 * These wrappers are necessary because PHY accesses from etherswitchcfg
676 * need to be synchronized with locks, while miibus PHY accesses do not.
679 e6000sw_readphy_wrapper(device_t dev, int phy, int reg)
684 sc = device_get_softc(dev);
685 E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED);
688 ret = e6000sw_readphy(dev, phy, reg);
695 e6000sw_writephy_wrapper(device_t dev, int phy, int reg, int data)
700 sc = device_get_softc(dev);
701 E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED);
704 ret = e6000sw_writephy(dev, phy, reg, data);
711 * setvgroup/getvgroup called from etherswitchfcg need to be locked,
712 * while internal calls do not.
715 e6000sw_setvgroup_wrapper(device_t dev, etherswitch_vlangroup_t *vg)
720 sc = device_get_softc(dev);
721 E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED);
724 ret = e6000sw_setvgroup(dev, vg);
731 e6000sw_getvgroup_wrapper(device_t dev, etherswitch_vlangroup_t *vg)
736 sc = device_get_softc(dev);
737 E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED);
740 ret = e6000sw_getvgroup(dev, vg);
747 e6000sw_flush_port(e6000sw_softc_t *sc, int port)
751 reg = e6000sw_readreg(sc, REG_PORT(port),
753 reg &= ~PORT_VLAN_MAP_TABLE_MASK;
754 reg &= ~PORT_VLAN_MAP_FID_MASK;
755 e6000sw_writereg(sc, REG_PORT(port),
757 if (sc->vgroup[port] != E6000SW_PORT_NO_VGROUP) {
759 * If port belonged somewhere, owner-group
760 * should have its entry removed.
762 sc->members[sc->vgroup[port]] &= ~(1 << port);
763 sc->vgroup[port] = E6000SW_PORT_NO_VGROUP;
768 e6000sw_port_assign_vgroup(e6000sw_softc_t *sc, int port, int fid, int vgroup,
773 reg = e6000sw_readreg(sc, REG_PORT(port),
775 reg &= ~PORT_VLAN_MAP_TABLE_MASK;
776 reg &= ~PORT_VLAN_MAP_FID_MASK;
777 reg |= members & ~(1 << port);
778 reg |= (fid << PORT_VLAN_MAP_FID) & PORT_VLAN_MAP_FID_MASK;
779 e6000sw_writereg(sc, REG_PORT(port), PORT_VLAN_MAP,
781 sc->vgroup[port] = vgroup;
785 e6000sw_setvgroup(device_t dev, etherswitch_vlangroup_t *vg)
790 sc = device_get_softc(dev);
791 E6000SW_LOCK_ASSERT(sc, SA_XLOCKED);
793 if (vg->es_vlangroup >= E6000SW_NUM_VGROUPS)
795 if (vg->es_member_ports != vg->es_untagged_ports) {
796 device_printf(dev, "Tagged ports not supported.\n");
800 vg->es_untagged_ports &= PORT_VLAN_MAP_TABLE_MASK;
801 fid = vg->es_vlangroup + 1;
802 for (port = 0; port < sc->num_ports; port++) {
803 if ((sc->members[vg->es_vlangroup] & (1 << port)) ||
804 (vg->es_untagged_ports & (1 << port)))
805 e6000sw_flush_port(sc, port);
806 if (vg->es_untagged_ports & (1 << port))
807 e6000sw_port_assign_vgroup(sc, port, fid,
808 vg->es_vlangroup, vg->es_untagged_ports);
810 sc->vid[vg->es_vlangroup] = vg->es_vid;
811 sc->members[vg->es_vlangroup] = vg->es_untagged_ports;
817 e6000sw_getvgroup(device_t dev, etherswitch_vlangroup_t *vg)
821 sc = device_get_softc(dev);
822 E6000SW_LOCK_ASSERT(sc, SA_XLOCKED);
824 if (vg->es_vlangroup >= E6000SW_NUM_VGROUPS)
826 vg->es_untagged_ports = vg->es_member_ports =
827 sc->members[vg->es_vlangroup];
828 vg->es_vid = ETHERSWITCH_VID_VALID;
833 static __inline struct mii_data*
834 e6000sw_miiforphy(e6000sw_softc_t *sc, unsigned int phy)
837 if (!e6000sw_is_phyport(sc, phy))
840 return (device_get_softc(sc->miibus[phy]));
844 e6000sw_ifmedia_upd(struct ifnet *ifp)
847 struct mii_data *mii;
850 mii = e6000sw_miiforphy(sc, ifp->if_dunit);
859 e6000sw_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
862 struct mii_data *mii;
865 mii = e6000sw_miiforphy(sc, ifp->if_dunit);
871 ifmr->ifm_active = mii->mii_media_active;
872 ifmr->ifm_status = mii->mii_media_status;
877 e6000sw_smi_waitready(e6000sw_softc_t *sc, int phy)
881 for (i = 0; i < E6000SW_SMI_TIMEOUT; i++) {
882 if ((MDIO_READ(sc->dev, phy, SMI_CMD)
883 & SMI_CMD_BUSY) == 0)
890 static __inline uint32_t
891 e6000sw_readreg(e6000sw_softc_t *sc, int addr, int reg)
894 E6000SW_LOCK_ASSERT(sc, SA_XLOCKED);
897 return (MDIO_READ(sc->dev, addr, reg) & 0xffff);
899 if (e6000sw_smi_waitready(sc, sc->sw_addr)) {
900 printf("e6000sw: readreg timeout\n");
903 MDIO_WRITE(sc->dev, sc->sw_addr, SMI_CMD, SMI_CMD_OP_READ |
905 if (e6000sw_smi_waitready(sc, sc->sw_addr)) {
906 printf("e6000sw: readreg timeout\n");
910 return (MDIO_READ(sc->dev, sc->sw_addr, SMI_DATA) & 0xffff);
914 e6000sw_writereg(e6000sw_softc_t *sc, int addr, int reg, int val)
917 E6000SW_LOCK_ASSERT(sc, SA_XLOCKED);
919 if (!sc->multi_chip) {
920 MDIO_WRITE(sc->dev, addr, reg, val);
924 if (e6000sw_smi_waitready(sc, sc->sw_addr)) {
925 printf("e6000sw: readreg timeout\n");
928 MDIO_WRITE(sc->dev, sc->sw_addr, SMI_DATA, val);
929 MDIO_WRITE(sc->dev, sc->sw_addr, SMI_CMD, SMI_CMD_OP_WRITE |
931 if (e6000sw_smi_waitready(sc, sc->sw_addr)) {
932 printf("e6000sw: readreg timeout\n");
940 e6000sw_is_cpuport(e6000sw_softc_t *sc, int port)
943 return (sc->cpuports_mask & (1 << port));
947 e6000sw_is_fixedport(e6000sw_softc_t *sc, int port)
950 return (sc->fixed_mask & (1 << port));
954 e6000sw_is_phyport(e6000sw_softc_t *sc, int port)
957 phy_mask = ~(sc->fixed_mask | sc->cpuports_mask);
959 return (phy_mask & (1 << port));
963 e6000sw_set_pvid(e6000sw_softc_t *sc, int port, int pvid)
966 e6000sw_writereg(sc, REG_PORT(port), PORT_VID, pvid &
967 PORT_VID_DEF_VID_MASK);
973 e6000sw_get_pvid(e6000sw_softc_t *sc, int port, int *pvid)
979 *pvid = e6000sw_readreg(sc, REG_PORT(port), PORT_VID) &
980 PORT_VID_DEF_VID_MASK;
986 e6000sw_tick (void *arg)
989 struct mii_softc *miisc;
994 E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED);
997 for (port = 0; port < sc->num_ports; port++) {
998 /* Tick only on PHY ports */
999 if (!e6000sw_is_phyport(sc, port))
1001 mii_tick(sc->mii[port]);
1002 LIST_FOREACH(miisc, &sc->mii[port]->mii_phys, mii_list) {
1003 if (IFM_INST(sc->mii[port]->mii_media.ifm_cur->ifm_media)
1006 mii_phy_update(miisc, MII_POLLSTAT);
1010 pause("e6000sw tick", 1000);
1015 e6000sw_setup(device_t dev, e6000sw_softc_t *sc)
1017 uint16_t atu_ctrl, atu_age;
1019 /* Set aging time */
1020 e6000sw_writereg(sc, REG_GLOBAL, ATU_CONTROL,
1021 (E6000SW_DEFAULT_AGETIME << ATU_CONTROL_AGETIME) |
1022 (1 << ATU_CONTROL_LEARN2ALL));
1024 /* Send all with specific mac address to cpu port */
1025 e6000sw_writereg(sc, REG_GLOBAL2, MGMT_EN_2x, MGMT_EN_ALL);
1026 e6000sw_writereg(sc, REG_GLOBAL2, MGMT_EN_0x, MGMT_EN_ALL);
1028 /* Disable Remote Management */
1029 e6000sw_writereg(sc, REG_GLOBAL, SWITCH_GLOBAL_CONTROL2, 0);
1031 /* Disable loopback filter and flow control messages */
1032 e6000sw_writereg(sc, REG_GLOBAL2, SWITCH_MGMT,
1033 SWITCH_MGMT_PRI_MASK |
1034 (1 << SWITCH_MGMT_RSVD2CPU) |
1035 SWITCH_MGMT_FC_PRI_MASK |
1036 (1 << SWITCH_MGMT_FORCEFLOW));
1038 e6000sw_atu_flush(dev, sc, NO_OPERATION);
1039 e6000sw_atu_mac_table(dev, sc, NULL, NO_OPERATION);
1040 e6000sw_set_atustat(dev, sc, 0, COUNT_ALL);
1042 /* Set ATU AgeTime to 15 seconds */
1045 atu_ctrl = e6000sw_readreg(sc, REG_GLOBAL, ATU_CONTROL);
1047 /* Set new AgeTime field */
1048 atu_ctrl &= ~ATU_CONTROL_AGETIME_MASK;
1049 e6000sw_writereg(sc, REG_GLOBAL, ATU_CONTROL, atu_ctrl |
1050 (atu_age << ATU_CONTROL_AGETIME));
1054 e6000sw_port_vlan_conf(e6000sw_softc_t *sc)
1060 /* Disable all ports */
1061 for (port = 0; port < sc->num_ports; port++) {
1062 ret = e6000sw_readreg(sc, REG_PORT(port), PORT_CONTROL);
1063 e6000sw_writereg(sc, REG_PORT(port), PORT_CONTROL,
1064 (ret & ~PORT_CONTROL_ENABLE));
1067 /* Set port priority */
1068 for (port = 0; port < sc->num_ports; port++) {
1069 ret = e6000sw_readreg(sc, REG_PORT(port), PORT_VID);
1070 ret &= ~PORT_VID_PRIORITY_MASK;
1071 e6000sw_writereg(sc, REG_PORT(port), PORT_VID, ret);
1075 for (port = 0; port < sc->num_ports; port++) {
1076 ret = e6000sw_readreg(sc, REG_PORT(port), PORT_VID);
1077 ret &= ~PORT_VID_DEF_VID_MASK;
1079 e6000sw_writereg(sc, REG_PORT(port), PORT_VID, ret);
1082 /* Enable all ports */
1083 for (port = 0; port < sc->num_ports; port++) {
1084 ret = e6000sw_readreg(sc, REG_PORT(port), PORT_CONTROL);
1085 e6000sw_writereg(sc, REG_PORT(port), PORT_CONTROL, (ret |
1086 PORT_CONTROL_ENABLE));
1091 e6000sw_set_atustat(device_t dev, e6000sw_softc_t *sc, int bin, int flag)
1095 ret = e6000sw_readreg(sc, REG_GLOBAL2, ATU_STATS);
1096 e6000sw_writereg(sc, REG_GLOBAL2, ATU_STATS, (bin << ATU_STATS_BIN ) |
1097 (flag << ATU_STATS_FLAG));
1101 e6000sw_atu_mac_table(device_t dev, e6000sw_softc_t *sc, struct atu_opt *atu,
1108 if (flag == NO_OPERATION)
1110 else if ((flag & (LOAD_FROM_FIB | PURGE_FROM_FIB | GET_NEXT_IN_FIB |
1111 GET_VIOLATION_DATA | CLEAR_VIOLATION_DATA)) == 0) {
1112 device_printf(dev, "Wrong Opcode for ATU operation\n");
1116 ret_opt = e6000sw_readreg(sc, REG_GLOBAL, ATU_OPERATION);
1118 if (ret_opt & ATU_UNIT_BUSY) {
1119 device_printf(dev, "ATU unit is busy, cannot access"
1123 if(flag & LOAD_FROM_FIB) {
1124 ret_data = e6000sw_readreg(sc, REG_GLOBAL, ATU_DATA);
1125 e6000sw_writereg(sc, REG_GLOBAL2, ATU_DATA, (ret_data &
1128 e6000sw_writereg(sc, REG_GLOBAL, ATU_MAC_ADDR01, atu->mac_01);
1129 e6000sw_writereg(sc, REG_GLOBAL, ATU_MAC_ADDR23, atu->mac_23);
1130 e6000sw_writereg(sc, REG_GLOBAL, ATU_MAC_ADDR45, atu->mac_45);
1131 e6000sw_writereg(sc, REG_GLOBAL, ATU_FID, atu->fid);
1133 e6000sw_writereg(sc, REG_GLOBAL, ATU_OPERATION, (ret_opt |
1134 ATU_UNIT_BUSY | flag));
1136 retries = E6000SW_RETRIES;
1137 while (--retries & (e6000sw_readreg(sc, REG_GLOBAL,
1138 ATU_OPERATION) & ATU_UNIT_BUSY))
1142 device_printf(dev, "Timeout while flushing\n");
1143 else if (flag & GET_NEXT_IN_FIB) {
1144 atu->mac_01 = e6000sw_readreg(sc, REG_GLOBAL,
1146 atu->mac_23 = e6000sw_readreg(sc, REG_GLOBAL,
1148 atu->mac_45 = e6000sw_readreg(sc, REG_GLOBAL,
1157 e6000sw_atu_flush(device_t dev, e6000sw_softc_t *sc, int flag)
1162 if (flag == NO_OPERATION)
1165 ret = e6000sw_readreg(sc, REG_GLOBAL, ATU_OPERATION);
1166 if (ret & ATU_UNIT_BUSY) {
1167 device_printf(dev, "Atu unit is busy, cannot flush\n");
1170 e6000sw_writereg(sc, REG_GLOBAL, ATU_OPERATION, (ret |
1171 ATU_UNIT_BUSY | flag));
1172 retries = E6000SW_RETRIES;
1173 while (--retries & (e6000sw_readreg(sc, REG_GLOBAL,
1174 ATU_OPERATION) & ATU_UNIT_BUSY))
1178 device_printf(dev, "Timeout while flushing\n");