2 * Copyright (c) 1996, Javier MartÃn Rueda (jmrueda@diatel.upm.es)
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice unmodified, this list of conditions, and the following
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 * MAINTAINER: Matthew N. Dodd <winter@jurai.net>
34 * Intel EtherExpress Pro/10, Pro/10+ Ethernet driver
38 * 30-Oct-1996: first beta version. Inet and BPF supported, but no multicast.
41 #include <sys/param.h>
42 #include <sys/systm.h>
43 #include <sys/kernel.h>
44 #include <sys/sockio.h>
46 #include <sys/socket.h>
48 #include <sys/module.h>
51 #include <machine/bus.h>
52 #include <machine/resource.h>
56 #include <net/if_arp.h>
57 #include <net/if_media.h>
58 #include <net/ethernet.h>
61 #include <netinet/in.h>
62 #include <netinet/if_ether.h>
65 #include <isa/isavar.h>
66 #include <isa/pnpvar.h>
68 #include <dev/ex/if_exreg.h>
69 #include <dev/ex/if_exvar.h>
76 static int debug_mask = 0;
77 static int exintr_count = 0;
78 # define DODEBUG(level, action) if (level & debug_mask) action
80 # define DODEBUG(level, action)
84 { -1, -1, 0, 1, -1, 2, -1, -1, -1, 0, 3, 4, -1, -1, -1, -1 };
86 { 9, 3, 5, 10, 11, 0, 0, 0 };
88 char plus_irq2eemap[] =
89 { -1, -1, -1, 0, 1, 2, -1, 3, -1, 4, 5, 6, 7, -1, -1, -1 };
90 u_char plus_ee2irqmap[] =
91 { 3, 4, 5, 7, 9, 10, 11, 12 };
93 /* Network Interface Functions */
94 static void ex_init (void *);
95 static void ex_start (struct ifnet *);
96 static int ex_ioctl (struct ifnet *, u_long, caddr_t);
97 static void ex_watchdog (struct ifnet *);
99 /* ifmedia Functions */
100 static int ex_ifmedia_upd (struct ifnet *);
101 static void ex_ifmedia_sts (struct ifnet *, struct ifmediareq *);
103 static int ex_get_media (u_int32_t iobase);
105 static void ex_reset (struct ex_softc *);
107 static void ex_tx_intr (struct ex_softc *);
108 static void ex_rx_intr (struct ex_softc *);
111 look_for_card (u_int32_t iobase)
116 * Check for the i82595 signature, and check that the round robin
117 * counter actually advances.
119 if (((count1 = inb(iobase + ID_REG)) & Id_Mask) != Id_Sig)
121 count2 = inb(iobase + ID_REG);
122 count2 = inb(iobase + ID_REG);
123 count2 = inb(iobase + ID_REG);
125 return((count2 & Counter_bits) == ((count1 + 0xc0) & Counter_bits));
129 ex_get_address (u_int32_t iobase, u_char *enaddr)
133 eaddr_tmp = eeprom_read(iobase, EE_Eth_Addr_Lo);
134 enaddr[5] = eaddr_tmp & 0xff;
135 enaddr[4] = eaddr_tmp >> 8;
136 eaddr_tmp = eeprom_read(iobase, EE_Eth_Addr_Mid);
137 enaddr[3] = eaddr_tmp & 0xff;
138 enaddr[2] = eaddr_tmp >> 8;
139 eaddr_tmp = eeprom_read(iobase, EE_Eth_Addr_Hi);
140 enaddr[1] = eaddr_tmp & 0xff;
141 enaddr[0] = eaddr_tmp >> 8;
147 ex_card_type (u_char *enaddr)
149 if ((enaddr[0] == 0x00) && (enaddr[1] == 0xA0) && (enaddr[2] == 0xC9))
150 return (CARD_TYPE_EX_10_PLUS);
152 return (CARD_TYPE_EX_10);
156 * Caller is responsible for eventually calling
157 * ex_release_resources() on failure.
160 ex_alloc_resources (device_t dev)
162 struct ex_softc * sc = device_get_softc(dev);
165 sc->ioport = bus_alloc_resource(dev, SYS_RES_IOPORT, &sc->ioport_rid,
166 0, ~0, 1, RF_ACTIVE);
168 device_printf(dev, "No I/O space?!\n");
173 sc->irq = bus_alloc_resource(dev, SYS_RES_IRQ, &sc->irq_rid,
174 0, ~0, 1, RF_ACTIVE);
177 device_printf(dev, "No IRQ?!\n");
187 ex_release_resources (device_t dev)
189 struct ex_softc * sc = device_get_softc(dev);
192 bus_teardown_intr(dev, sc->irq, sc->ih);
197 bus_release_resource(dev, SYS_RES_IOPORT,
198 sc->ioport_rid, sc->ioport);
203 bus_release_resource(dev, SYS_RES_IRQ,
204 sc->irq_rid, sc->irq);
212 ex_attach(device_t dev)
214 struct ex_softc * sc = device_get_softc(dev);
215 struct ifnet * ifp = &sc->arpcom.ac_if;
216 struct ifmedia * ifm;
217 int unit = device_get_unit(dev);
220 /* work out which set of irq <-> internal tables to use */
221 if (ex_card_type(sc->arpcom.ac_enaddr) == CARD_TYPE_EX_10_PLUS) {
222 sc->irq2ee = plus_irq2eemap;
223 sc->ee2irq = plus_ee2irqmap;
225 sc->irq2ee = irq2eemap;
226 sc->ee2irq = ee2irqmap;
229 sc->mem_size = CARD_RAM_SIZE; /* XXX This should be read from the card itself. */
232 * Initialize the ifnet structure.
237 ifp->if_mtu = ETHERMTU;
238 ifp->if_flags = IFF_SIMPLEX | IFF_BROADCAST /* XXX not done yet. | IFF_MULTICAST */;
239 ifp->if_output = ether_output;
240 ifp->if_start = ex_start;
241 ifp->if_ioctl = ex_ioctl;
242 ifp->if_watchdog = ex_watchdog;
243 ifp->if_init = ex_init;
244 ifp->if_snd.ifq_maxlen = IFQ_MAXLEN;
246 ifmedia_init(&sc->ifmedia, 0, ex_ifmedia_upd, ex_ifmedia_sts);
248 temp = eeprom_read(sc->iobase, EE_W5);
249 if (temp & EE_W5_PORT_TPE)
250 ifmedia_add(&sc->ifmedia, IFM_ETHER|IFM_10_T, 0, NULL);
251 if (temp & EE_W5_PORT_BNC)
252 ifmedia_add(&sc->ifmedia, IFM_ETHER|IFM_10_2, 0, NULL);
253 if (temp & EE_W5_PORT_AUI)
254 ifmedia_add(&sc->ifmedia, IFM_ETHER|IFM_10_5, 0, NULL);
256 ifmedia_set(&sc->ifmedia, ex_get_media(sc->iobase));
259 ifm->ifm_media = ifm->ifm_cur->ifm_media;
263 * Attach the interface.
265 ether_ifattach(ifp, ETHER_BPF_SUPPORTED);
267 device_printf(sc->dev, "Ethernet address %6D\n",
268 sc->arpcom.ac_enaddr, ":");
276 struct ex_softc * sc = (struct ex_softc *) xsc;
277 struct ifnet * ifp = &sc->arpcom.ac_if;
280 register int iobase = sc->iobase;
281 unsigned short temp_reg;
283 DODEBUG(Start_End, printf("ex_init%d: start\n", ifp->if_unit););
285 if (TAILQ_FIRST(&ifp->if_addrhead) == NULL) {
292 * Load the ethernet address into the card.
294 outb(iobase + CMD_REG, Bank2_Sel);
295 temp_reg = inb(iobase + EEPROM_REG);
296 if (temp_reg & Trnoff_Enable) {
297 outb(iobase + EEPROM_REG, temp_reg & ~Trnoff_Enable);
299 for (i = 0; i < ETHER_ADDR_LEN; i++) {
300 outb(iobase + I_ADDR_REG0 + i, sc->arpcom.ac_enaddr[i]);
303 * - Setup transmit chaining and discard bad received frames.
306 * - Set receiving mode.
309 outb(iobase + REG1, inb(iobase + REG1) | Tx_Chn_Int_Md | Tx_Chn_ErStp | Disc_Bad_Fr);
310 outb(iobase + REG2, inb(iobase + REG2) | No_SA_Ins | RX_CRC_InMem);
311 outb(iobase + REG3, inb(iobase + REG3) & 0x3f /* XXX constants. */ );
312 outb(iobase + CMD_REG, Bank1_Sel);
313 outb(iobase + INT_NO_REG, (inb(iobase + INT_NO_REG) & 0xf8) | sc->irq2ee[sc->irq_no]);
316 * Divide the available memory in the card into rcv and xmt buffers.
317 * By default, I use the first 3/4 of the memory for the rcv buffer,
318 * and the remaining 1/4 of the memory for the xmt buffer.
320 sc->rx_mem_size = sc->mem_size * 3 / 4;
321 sc->tx_mem_size = sc->mem_size - sc->rx_mem_size;
322 sc->rx_lower_limit = 0x0000;
323 sc->rx_upper_limit = sc->rx_mem_size - 2;
324 sc->tx_lower_limit = sc->rx_mem_size;
325 sc->tx_upper_limit = sc->mem_size - 2;
326 outb(iobase + RCV_LOWER_LIMIT_REG, sc->rx_lower_limit >> 8);
327 outb(iobase + RCV_UPPER_LIMIT_REG, sc->rx_upper_limit >> 8);
328 outb(iobase + XMT_LOWER_LIMIT_REG, sc->tx_lower_limit >> 8);
329 outb(iobase + XMT_UPPER_LIMIT_REG, sc->tx_upper_limit >> 8);
332 * Enable receive and transmit interrupts, and clear any pending int.
334 outb(iobase + REG1, inb(iobase + REG1) | TriST_INT);
335 outb(iobase + CMD_REG, Bank0_Sel);
336 outb(iobase + MASK_REG, All_Int & ~(Rx_Int | Tx_Int));
337 outb(iobase + STATUS_REG, All_Int);
340 * Initialize receive and transmit ring buffers.
342 outw(iobase + RCV_BAR, sc->rx_lower_limit);
343 sc->rx_head = sc->rx_lower_limit;
344 outw(iobase + RCV_STOP_REG, sc->rx_upper_limit | 0xfe);
345 outw(iobase + XMT_BAR, sc->tx_lower_limit);
346 sc->tx_head = sc->tx_tail = sc->tx_lower_limit;
348 ifp->if_flags |= IFF_RUNNING;
349 ifp->if_flags &= ~IFF_OACTIVE;
350 DODEBUG(Status, printf("OIDLE init\n"););
353 * Final reset of the board, and enable operation.
355 outb(iobase + CMD_REG, Sel_Reset_CMD);
357 outb(iobase + CMD_REG, Rcv_Enable_CMD);
362 DODEBUG(Start_End, printf("ex_init%d: finish\n", ifp->if_unit););
367 ex_start(struct ifnet *ifp)
369 struct ex_softc * sc = ifp->if_softc;
370 int iobase = sc->iobase;
371 int i, s, len, data_len, avail, dest, next;
372 unsigned char tmp16[2];
376 DODEBUG(Start_End, printf("ex_start%d: start\n", unit););
381 * Main loop: send outgoing packets to network card until there are no
382 * more packets left, or the card cannot accept any more yet.
384 while (((opkt = ifp->if_snd.ifq_head) != NULL) &&
385 !(ifp->if_flags & IFF_OACTIVE)) {
388 * Ensure there is enough free transmit buffer space for
389 * this packet, including its header. Note: the header
390 * cannot wrap around the end of the transmit buffer and
391 * must be kept together, so we allow space for twice the
392 * length of the header, just in case.
395 for (len = 0, m = opkt; m != NULL; m = m->m_next) {
401 DODEBUG(Sent_Pkts, printf("1. Sending packet with %d data bytes. ", data_len););
404 len += XMT_HEADER_LEN + 1;
406 len += XMT_HEADER_LEN;
409 if ((i = sc->tx_tail - sc->tx_head) >= 0) {
410 avail = sc->tx_mem_size - i;
415 DODEBUG(Sent_Pkts, printf("i=%d, avail=%d\n", i, avail););
417 if (avail >= len + XMT_HEADER_LEN) {
418 IF_DEQUEUE(&ifp->if_snd, opkt);
422 * Disable rx and tx interrupts, to avoid corruption
423 * of the host address register by interrupt service
425 * XXX Is this necessary with splimp() enabled?
427 outb(iobase + MASK_REG, All_Int);
431 * Compute the start and end addresses of this
432 * frame in the tx buffer.
437 if (next > sc->tx_upper_limit) {
438 if ((sc->tx_upper_limit + 2 - sc->tx_tail) <=
440 dest = sc->tx_lower_limit;
443 next = sc->tx_lower_limit +
444 next - sc->tx_upper_limit - 2;
449 * Build the packet frame in the card's ring buffer.
451 DODEBUG(Sent_Pkts, printf("2. dest=%d, next=%d. ", dest, next););
453 outw(iobase + HOST_ADDR_REG, dest);
454 outw(iobase + IO_PORT_REG, Transmit_CMD);
455 outw(iobase + IO_PORT_REG, 0);
456 outw(iobase + IO_PORT_REG, next);
457 outw(iobase + IO_PORT_REG, data_len);
460 * Output the packet data to the card. Ensure all
461 * transfers are 16-bit wide, even if individual
462 * mbufs have odd length.
465 for (m = opkt, i = 0; m != NULL; m = m->m_next) {
466 DODEBUG(Sent_Pkts, printf("[%d]", m->m_len););
468 tmp16[1] = *(mtod(m, caddr_t));
469 outsw(iobase + IO_PORT_REG, tmp16, 1);
471 outsw(iobase + IO_PORT_REG,
472 mtod(m, caddr_t) + i, (m->m_len - i) / 2);
474 if ((i = (m->m_len - i) & 1) != 0) {
475 tmp16[0] = *(mtod(m, caddr_t) +
480 outsw(iobase + IO_PORT_REG, tmp16, 1);
484 * If there were other frames chained, update the
485 * chain in the last one.
487 if (sc->tx_head != sc->tx_tail) {
488 if (sc->tx_tail != dest) {
489 outw(iobase + HOST_ADDR_REG,
490 sc->tx_last + XMT_Chain_Point);
491 outw(iobase + IO_PORT_REG, dest);
493 outw(iobase + HOST_ADDR_REG,
494 sc->tx_last + XMT_Byte_Count);
495 i = inw(iobase + IO_PORT_REG);
496 outw(iobase + HOST_ADDR_REG,
497 sc->tx_last + XMT_Byte_Count);
498 outw(iobase + IO_PORT_REG, i | Ch_bit);
502 * Resume normal operation of the card:
503 * - Make a dummy read to flush the DRAM write
505 * - Enable receive and transmit interrupts.
506 * - Send Transmit or Resume_XMT command, as
509 inw(iobase + IO_PORT_REG);
511 outb(iobase + MASK_REG, All_Int & ~(Rx_Int | Tx_Int));
513 if (sc->tx_head == sc->tx_tail) {
514 outw(iobase + XMT_BAR, dest);
515 outb(iobase + CMD_REG, Transmit_CMD);
517 DODEBUG(Sent_Pkts, printf("Transmit\n"););
519 outb(iobase + CMD_REG, Resume_XMT_List_CMD);
520 DODEBUG(Sent_Pkts, printf("Resume\n"););
526 if (ifp->if_bpf != NULL) {
534 ifp->if_flags |= IFF_OACTIVE;
535 DODEBUG(Status, printf("OACTIVE start\n"););
541 DODEBUG(Start_End, printf("ex_start%d: finish\n", unit););
545 ex_stop(struct ex_softc *sc)
547 int iobase = sc->iobase;
549 DODEBUG(Start_End, printf("ex_stop%d: start\n", unit););
552 * Disable card operation:
553 * - Disable the interrupt line.
554 * - Flush transmission and disable reception.
555 * - Mask and clear all interrupts.
558 outb(iobase + CMD_REG, Bank1_Sel);
559 outb(iobase + REG1, inb(iobase + REG1) & ~TriST_INT);
560 outb(iobase + CMD_REG, Bank0_Sel);
561 outb(iobase + CMD_REG, Rcv_Stop);
562 sc->tx_head = sc->tx_tail = sc->tx_lower_limit;
563 sc->tx_last = 0; /* XXX I think these two lines are not necessary, because ex_init will always be called again to reinit the interface. */
564 outb(iobase + MASK_REG, All_Int);
565 outb(iobase + STATUS_REG, All_Int);
566 outb(iobase + CMD_REG, Reset_CMD);
569 DODEBUG(Start_End, printf("ex_stop%d: finish\n", unit););
577 struct ex_softc * sc = (struct ex_softc *)arg;
578 struct ifnet * ifp = &sc->arpcom.ac_if;
579 int iobase = sc->iobase;
580 int int_status, send_pkts;
582 DODEBUG(Start_End, printf("ex_intr%d: start\n", unit););
585 if (++exintr_count != 1)
586 printf("WARNING: nested interrupt (%d). Mail the author.\n", exintr_count);
590 while ((int_status = inb(iobase + STATUS_REG)) & (Tx_Int | Rx_Int)) {
591 if (int_status & Rx_Int) {
592 outb(iobase + STATUS_REG, Rx_Int);
595 } else if (int_status & Tx_Int) {
596 outb(iobase + STATUS_REG, Tx_Int);
604 * If any packet has been transmitted, and there are queued packets to
605 * be sent, attempt to send more packets to the network card.
608 if (send_pkts && (ifp->if_snd.ifq_head != NULL)) {
616 DODEBUG(Start_End, printf("ex_intr%d: finish\n", unit););
622 ex_tx_intr(struct ex_softc *sc)
624 struct ifnet * ifp = &sc->arpcom.ac_if;
625 int iobase = sc->iobase;
628 DODEBUG(Start_End, printf("ex_tx_intr%d: start\n", unit););
631 * - Cancel the watchdog.
632 * For all packets transmitted since last transmit interrupt:
633 * - Advance chain pointer to next queued packet.
634 * - Update statistics.
639 while (sc->tx_head != sc->tx_tail) {
640 outw(iobase + HOST_ADDR_REG, sc->tx_head);
642 if (! inw(iobase + IO_PORT_REG) & Done_bit)
645 tx_status = inw(iobase + IO_PORT_REG);
646 sc->tx_head = inw(iobase + IO_PORT_REG);
648 if (tx_status & TX_OK_bit) {
654 ifp->if_collisions += tx_status & No_Collisions_bits;
658 * The card should be ready to accept more packets now.
661 ifp->if_flags &= ~IFF_OACTIVE;
663 DODEBUG(Status, printf("OIDLE tx_intr\n"););
664 DODEBUG(Start_End, printf("ex_tx_intr%d: finish\n", unit););
670 ex_rx_intr(struct ex_softc *sc)
672 struct ifnet * ifp = &sc->arpcom.ac_if;
673 int iobase = sc->iobase;
679 struct ether_header * eh;
681 DODEBUG(Start_End, printf("ex_rx_intr%d: start\n", unit););
684 * For all packets received since last receive interrupt:
685 * - If packet ok, read it into a new mbuf and queue it to interface,
686 * updating statistics.
687 * - If packet bad, just discard it, and update statistics.
688 * Finally, advance receive stop limit in card's memory to new location.
691 outw(iobase + HOST_ADDR_REG, sc->rx_head);
693 while (inw(iobase + IO_PORT_REG) == RCV_Done) {
695 rx_status = inw(iobase + IO_PORT_REG);
696 sc->rx_head = inw(iobase + IO_PORT_REG);
697 QQQ = pkt_len = inw(iobase + IO_PORT_REG);
699 if (rx_status & RCV_OK_bit) {
700 MGETHDR(m, M_DONTWAIT, MT_DATA);
705 ipkt->m_pkthdr.rcvif = ifp;
706 ipkt->m_pkthdr.len = pkt_len;
709 while (pkt_len > 0) {
710 if (pkt_len > MINCLSIZE) {
711 MCLGET(m, M_DONTWAIT);
712 if (m->m_flags & M_EXT) {
720 m->m_len = min(m->m_len, pkt_len);
723 * NOTE: I'm assuming that all mbufs allocated are of even length,
724 * except for the last one in an odd-length packet.
727 insw(iobase + IO_PORT_REG,
728 mtod(m, caddr_t), m->m_len / 2);
731 *(mtod(m, caddr_t) + m->m_len - 1) = inb(iobase + IO_PORT_REG);
736 MGET(m->m_next, M_DONTWAIT, MT_DATA);
737 if (m->m_next == NULL) {
746 eh = mtod(ipkt, struct ether_header *);
748 if (debug_mask & Rcvd_Pkts) {
749 if ((eh->ether_dhost[5] != 0xff) || (eh->ether_dhost[0] != 0xff)) {
750 printf("Receive packet with %d data bytes: %6D -> ", QQQ, eh->ether_shost, ":");
751 printf("%6D\n", eh->ether_dhost, ":");
755 m_adj(ipkt, sizeof(struct ether_header));
756 ether_input(ifp, eh, ipkt);
762 outw(iobase + HOST_ADDR_REG, sc->rx_head);
766 if (sc->rx_head < sc->rx_lower_limit + 2)
767 outw(iobase + RCV_STOP_REG, sc->rx_upper_limit);
769 outw(iobase + RCV_STOP_REG, sc->rx_head - 2);
771 DODEBUG(Start_End, printf("ex_rx_intr%d: finish\n", unit););
778 ex_ioctl(register struct ifnet *ifp, u_long cmd, caddr_t data)
780 struct ex_softc * sc = ifp->if_softc;
781 struct ifreq * ifr = (struct ifreq *)data;
785 DODEBUG(Start_End, printf("ex_ioctl%d: start ", ifp->if_unit););
793 error = ether_ioctl(ifp, cmd, data);
797 DODEBUG(Start_End, printf("SIOCSIFFLAGS"););
798 if ((ifp->if_flags & IFF_UP) == 0 &&
799 (ifp->if_flags & IFF_RUNNING)) {
801 ifp->if_flags &= ~IFF_RUNNING;
809 DODEBUG(Start_End, printf("SIOCGHWADDR"););
810 bcopy((caddr_t)sc->sc_addr, (caddr_t)&ifr->ifr_data,
811 sizeof(sc->sc_addr));
815 DODEBUG(Start_End, printf("SIOCADDMULTI"););
817 DODEBUG(Start_End, printf("SIOCDELMULTI"););
818 /* XXX Support not done yet. */
823 error = ifmedia_ioctl(ifp, ifr, &sc->ifmedia, cmd);
826 DODEBUG(Start_End, printf("unknown"););
832 DODEBUG(Start_End, printf("\nex_ioctl%d: finish\n", ifp->if_unit););
839 ex_reset(struct ex_softc *sc)
843 DODEBUG(Start_End, printf("ex_reset%d: start\n", unit););
852 DODEBUG(Start_End, printf("ex_reset%d: finish\n", unit););
858 ex_watchdog(struct ifnet *ifp)
860 struct ex_softc * sc = ifp->if_softc;
862 DODEBUG(Start_End, printf("ex_watchdog%d: start\n", ifp->if_unit););
864 ifp->if_flags &= ~IFF_OACTIVE;
866 DODEBUG(Status, printf("OIDLE watchdog\n"););
872 DODEBUG(Start_End, printf("ex_watchdog%d: finish\n", ifp->if_unit););
878 ex_get_media (u_int32_t iobase)
882 outb(iobase + CMD_REG, Bank2_Sel);
883 tmp = inb(iobase + REG3);
884 outb(iobase + CMD_REG, Bank0_Sel);
887 return(IFM_ETHER|IFM_10_T);
889 return(IFM_ETHER|IFM_10_2);
891 return (IFM_ETHER|IFM_10_5);
903 ex_ifmedia_sts(ifp, ifmr)
905 struct ifmediareq * ifmr;
907 struct ex_softc * sc = ifp->if_softc;
909 ifmr->ifm_active = ex_get_media(sc->iobase);
915 eeprom_read(u_int32_t iobase, int location)
920 int read_cmd = location | EE_READ_CMD;
921 short ctrl_val = EECS;
923 ee_addr = iobase + EEPROM_REG;
924 outb(iobase + CMD_REG, Bank2_Sel);
926 for (i = 8; i >= 0; i--) {
927 short outval = (read_cmd & (1 << i)) ? ctrl_val | EEDI : ctrl_val;
928 outb(ee_addr, outval);
929 outb(ee_addr, outval | EESK);
931 outb(ee_addr, outval);
934 outb(ee_addr, ctrl_val);
936 for (i = 16; i > 0; i--) {
937 outb(ee_addr, ctrl_val | EESK);
939 data = (data << 1) | ((inb(ee_addr) & EEDO) ? 1 : 0);
940 outb(ee_addr, ctrl_val);
945 outb(ee_addr, ctrl_val | EESK);
947 outb(ee_addr, ctrl_val);
949 outb(iobase + CMD_REG, Bank0_Sel);