2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright (c) 1996, Javier Mart^mn Rueda (jmrueda@diatel.upm.es)
7 * Copyright (c) 2000 Matthew N. Dodd
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
36 struct ifmedia ifmedia;
40 struct resource *ioport;
46 u_short irq_no; /* IRQ number. */
48 char * irq2ee; /* irq <-> internal */
49 u_char * ee2irq; /* representation conversion */
51 u_int mem_size; /* Total memory size, in bytes. */
52 u_int rx_mem_size; /* Rx memory size (by default, */
53 /* first 3/4 of total memory). */
55 u_int rx_lower_limit; /* Lower and upper limits of */
56 u_int rx_upper_limit; /* receive buffer. */
58 u_int rx_head; /* Head of receive ring buffer. */
59 u_int tx_mem_size; /* Tx memory size (by default, */
60 /* last quarter of total memory).*/
62 u_int tx_lower_limit; /* Lower and upper limits of */
63 u_int tx_upper_limit; /* transmit buffer. */
65 u_int tx_head; /* Head and tail of */
66 u_int tx_tail; /* transmit ring buffer. */
68 u_int tx_last; /* Pointer to beginning of last */
69 /* frame in the chain. */
74 #define HAS_INT_NO_REG 1
77 extern devclass_t ex_devclass;
79 extern char irq2eemap[];
80 extern u_char ee2irqmap[];
81 extern char plus_irq2eemap[];
82 extern u_char plus_ee2irqmap[];
84 int ex_alloc_resources(device_t);
85 void ex_release_resources(device_t);
86 int ex_attach(device_t);
87 int ex_detach(device_t);
89 driver_intr_t ex_intr;
91 u_int16_t ex_eeprom_read(struct ex_softc *, int);
92 void ex_get_address(struct ex_softc *, u_char *);
93 int ex_card_type(u_char *);
95 void ex_stop(struct ex_softc *);
97 #define CSR_READ_1(sc, off) (bus_read_1((sc)->ioport, off))
98 #define CSR_READ_2(sc, off) (bus_read_2((sc)->ioport, off))
99 #define CSR_WRITE_1(sc, off, val) \
100 bus_write_1((sc)->ioport, off, val)
101 #define CSR_WRITE_2(sc, off, val) \
102 bus_write_2((sc)->ioport, off, val)
103 #define CSR_WRITE_MULTI_1(sc, off, addr, count) \
104 bus_write_multi_1((sc)->ioport, off, addr, count)
105 #define CSR_WRITE_MULTI_2(sc, off, addr, count) \
106 bus_write_multi_2((sc)->ioport, off, addr, count)
107 #define CSR_WRITE_MULTI_4(sc, off, addr, count) \
108 bus_write_multi_4((sc)->ioport, off, addr, count)
109 #define CSR_READ_MULTI_1(sc, off, addr, count) \
110 bus_read_multi_1((sc)->ioport, off, addr, count)
111 #define CSR_READ_MULTI_2(sc, off, addr, count) \
112 bus_read_multi_2((sc)->ioport, off, addr, count)
113 #define CSR_READ_MULTI_4(sc, off, addr, count) \
114 bus_read_multi_4((sc)->ioport, off, addr, count)
116 #define EX_LOCK(sc) mtx_lock(&(sc)->lock)
117 #define EX_UNLOCK(sc) mtx_unlock(&(sc)->lock)
118 #define EX_ASSERT_LOCKED(sc) mtx_assert(&(sc)->lock, MA_OWNED)