2 * Copyright (c) 2001-2003
3 * Fraunhofer Institute for Open Communication Systems (FhG Fokus).
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * Author: Hartmut Brandt <harti@freebsd.org>
29 * Fore PCA200E driver for NATM
32 #include <sys/cdefs.h>
33 __FBSDID("$FreeBSD$");
38 #include <sys/types.h>
39 #include <sys/param.h>
40 #include <sys/systm.h>
41 #include <sys/malloc.h>
42 #include <sys/kernel.h>
44 #include <sys/errno.h>
46 #include <sys/module.h>
47 #include <sys/queue.h>
48 #include <sys/syslog.h>
49 #include <sys/endian.h>
50 #include <sys/sysctl.h>
51 #include <sys/condvar.h>
54 #include <sys/sockio.h>
56 #include <sys/socket.h>
59 #include <net/if_media.h>
60 #include <net/if_types.h>
61 #include <net/if_atm.h>
62 #include <net/route.h>
67 #include <netinet/in.h>
68 #include <netinet/if_atm.h>
71 #include <machine/bus.h>
72 #include <machine/resource.h>
75 #include <dev/pci/pcireg.h>
76 #include <dev/pci/pcivar.h>
78 #include <dev/utopia/utopia.h>
80 #include <dev/fatm/if_fatmreg.h>
81 #include <dev/fatm/if_fatmvar.h>
83 #include <dev/fatm/firmware.h>
85 devclass_t fatm_devclass;
97 static const struct rate {
101 #include <dev/fatm/if_fatm_rate.h>
103 #define RATE_TABLE_SIZE (sizeof(rate_table) / sizeof(rate_table[0]))
105 SYSCTL_DECL(_hw_atm);
107 MODULE_DEPEND(fatm, utopia, 1, 1, 1);
109 static int fatm_utopia_readregs(struct ifatm *, u_int, uint8_t *, u_int *);
110 static int fatm_utopia_writereg(struct ifatm *, u_int, u_int, u_int);
112 static const struct utopia_methods fatm_utopia_methods = {
113 fatm_utopia_readregs,
117 #define VC_OK(SC, VPI, VCI) \
118 (((VPI) & ~((1 << IFP2IFATM((SC)->ifp)->mib.vpi_bits) - 1)) == 0 && \
119 (VCI) != 0 && ((VCI) & ~((1 << IFP2IFATM((SC)->ifp)->mib.vci_bits) - 1)) == 0)
121 static int fatm_load_vc(struct fatm_softc *sc, struct card_vcc *vc);
124 * Probing is easy: step trough the list of known vendor and device
125 * ids and compare. If one is found - it's our.
128 fatm_probe(device_t dev)
132 for (i = 0; fatm_devs[i].name; i++)
133 if (pci_get_vendor(dev) == fatm_devs[i].vid &&
134 pci_get_device(dev) == fatm_devs[i].did) {
135 device_set_desc(dev, fatm_devs[i].name);
136 return (BUS_PROBE_DEFAULT);
142 * Function called at completion of a SUNI writeregs/readregs command.
143 * This is called from the interrupt handler while holding the softc lock.
144 * We use the queue entry as the randevouze point.
147 fatm_utopia_writeregs_complete(struct fatm_softc *sc, struct cmdqueue *q)
150 H_SYNCSTAT_POSTREAD(sc, q->q.statp);
151 if(H_GETSTAT(q->q.statp) & FATM_STAT_ERROR) {
152 sc->istats.suni_reg_errors++;
159 * Write a SUNI register. The bits that are 1 in mask are written from val
160 * into register reg. We wait for the command to complete by sleeping on
161 * the register memory.
163 * We assume, that we already hold the softc mutex.
166 fatm_utopia_writereg(struct ifatm *ifatm, u_int reg, u_int mask, u_int val)
170 struct fatm_softc *sc;
172 sc = ifatm->ifp->if_softc;
174 if (!(ifatm->ifp->if_drv_flags & IFF_DRV_RUNNING))
177 /* get queue element and fill it */
178 q = GET_QUEUE(sc->cmdqueue, struct cmdqueue, sc->cmdqueue.head);
180 H_SYNCSTAT_POSTREAD(sc, q->q.statp);
181 if (!(H_GETSTAT(q->q.statp) & FATM_STAT_FREE)) {
182 sc->istats.cmd_queue_full++;
185 NEXT_QUEUE_ENTRY(sc->cmdqueue.head, FATM_CMD_QLEN);
188 q->cb = fatm_utopia_writeregs_complete;
189 H_SETSTAT(q->q.statp, FATM_STAT_PENDING);
190 H_SYNCSTAT_PREWRITE(sc, q->q.statp);
192 WRITE4(sc, q->q.card + FATMOC_GETOC3_BUF, 0);
194 WRITE4(sc, q->q.card + FATMOC_OP,
195 FATM_MAKE_SETOC3(reg, val, mask) | FATM_OP_INTERRUPT_SEL);
199 * Wait for the command to complete
201 error = msleep(q, &sc->mtx, PZERO | PCATCH, "fatm_setreg", hz);
222 * Function called at completion of a SUNI readregs command.
223 * This is called from the interrupt handler while holding the softc lock.
224 * We use reg_mem as the randevouze point.
227 fatm_utopia_readregs_complete(struct fatm_softc *sc, struct cmdqueue *q)
230 H_SYNCSTAT_POSTREAD(sc, q->q.statp);
231 if (H_GETSTAT(q->q.statp) & FATM_STAT_ERROR) {
232 sc->istats.suni_reg_errors++;
235 wakeup(&sc->reg_mem);
239 * Read SUNI registers
241 * We use a preallocated buffer to read the registers. Therefor we need
242 * to protect against multiple threads trying to read registers. We do this
243 * with a condition variable and a flag. We wait for the command to complete by sleeping on
244 * the register memory.
246 * We assume, that we already hold the softc mutex.
249 fatm_utopia_readregs_internal(struct fatm_softc *sc)
257 if (!(sc->ifp->if_drv_flags & IFF_DRV_RUNNING))
259 if (!(sc->flags & FATM_REGS_INUSE))
261 cv_wait(&sc->cv_regs, &sc->mtx);
263 sc->flags |= FATM_REGS_INUSE;
265 q = GET_QUEUE(sc->cmdqueue, struct cmdqueue, sc->cmdqueue.head);
267 H_SYNCSTAT_POSTREAD(sc, q->q.statp);
268 if (!(H_GETSTAT(q->q.statp) & FATM_STAT_FREE)) {
269 sc->istats.cmd_queue_full++;
272 NEXT_QUEUE_ENTRY(sc->cmdqueue.head, FATM_CMD_QLEN);
275 q->cb = fatm_utopia_readregs_complete;
276 H_SETSTAT(q->q.statp, FATM_STAT_PENDING);
277 H_SYNCSTAT_PREWRITE(sc, q->q.statp);
279 bus_dmamap_sync(sc->reg_mem.dmat, sc->reg_mem.map, BUS_DMASYNC_PREREAD);
281 WRITE4(sc, q->q.card + FATMOC_GETOC3_BUF, sc->reg_mem.paddr);
283 WRITE4(sc, q->q.card + FATMOC_OP,
284 FATM_OP_OC3_GET_REG | FATM_OP_INTERRUPT_SEL);
288 * Wait for the command to complete
290 error = msleep(&sc->reg_mem, &sc->mtx, PZERO | PCATCH,
304 bus_dmamap_sync(sc->reg_mem.dmat, sc->reg_mem.map,
305 BUS_DMASYNC_POSTREAD);
311 /* declare buffer to be free */
312 sc->flags &= ~FATM_REGS_INUSE;
313 cv_signal(&sc->cv_regs);
318 ptr = (uint32_t *)sc->reg_mem.mem;
319 for (i = 0; i < FATM_NREGS; i++)
320 ptr[i] = le32toh(ptr[i]) & 0xff;
326 * Read SUNI registers for the SUNI module.
328 * We assume, that we already hold the mutex.
331 fatm_utopia_readregs(struct ifatm *ifatm, u_int reg, uint8_t *valp, u_int *np)
335 struct fatm_softc *sc;
337 if (reg >= FATM_NREGS)
339 if (reg + *np > FATM_NREGS)
340 *np = FATM_NREGS - reg;
341 sc = ifatm->ifp->if_softc;
344 err = fatm_utopia_readregs_internal(sc);
348 for (i = 0; i < *np; i++)
349 valp[i] = ((uint32_t *)sc->reg_mem.mem)[reg + i];
351 /* declare buffer to be free */
352 sc->flags &= ~FATM_REGS_INUSE;
353 cv_signal(&sc->cv_regs);
359 * Check whether the hard is beating. We remember the last heart beat and
360 * compare it to the current one. If it appears stuck for 10 times, we have
363 * Assume we hold the lock.
366 fatm_check_heartbeat(struct fatm_softc *sc)
372 h = READ4(sc, FATMO_HEARTBEAT);
373 DBG(sc, BEAT, ("heartbeat %08x", h));
375 if (sc->stop_cnt == 10)
378 if (h == sc->heartbeat) {
379 if (++sc->stop_cnt == 10) {
380 log(LOG_ERR, "i960 stopped???\n");
381 WRITE4(sc, FATMO_HIMR, 1);
391 * Ensure that the heart is still beating.
394 fatm_watchdog(struct ifnet *ifp)
396 struct fatm_softc *sc = ifp->if_softc;
399 if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
400 fatm_check_heartbeat(sc);
407 * Hard reset the i960 on the board. This is done by initializing registers,
408 * clearing interrupts and waiting for the selftest to finish. Not sure,
409 * whether all these barriers are actually needed.
411 * Assumes that we hold the lock.
414 fatm_reset(struct fatm_softc *sc)
421 WRITE4(sc, FATMO_APP_BASE, FATMO_COMMON_ORIGIN);
424 WRITE4(sc, FATMO_UART_TO_960, XMIT_READY);
427 WRITE4(sc, FATMO_UART_TO_HOST, XMIT_READY);
430 WRITE4(sc, FATMO_BOOT_STATUS, COLD_START);
433 WRITE1(sc, FATMO_HCR, FATM_HCR_RESET);
438 WRITE1(sc, FATMO_HCR, 0);
443 for (w = 100; w; w--) {
445 val = READ4(sc, FATMO_BOOT_STATUS);
458 * Stop the card. Must be called WITH the lock held
459 * Reset, free transmit and receive buffers. Wakeup everybody who may sleep.
462 fatm_stop(struct fatm_softc *sc)
473 utopia_stop(&sc->utopia);
474 (void)fatm_reset(sc);
477 sc->ifp->if_timer = 0;
479 if (sc->ifp->if_drv_flags & IFF_DRV_RUNNING) {
480 sc->ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
481 ATMEV_SEND_IFSTATE_CHANGED(IFP2IFATM(sc->ifp),
482 sc->utopia.carrier == UTP_CARR_OK);
485 * Collect transmit mbufs, partial receive mbufs and
488 for (i = 0; i < FATM_TX_QLEN; i++) {
489 tx = GET_QUEUE(sc->txqueue, struct txqueue, i);
491 bus_dmamap_unload(sc->tx_tag, tx->map);
497 /* Collect supplied mbufs */
498 while ((rb = LIST_FIRST(&sc->rbuf_used)) != NULL) {
499 LIST_REMOVE(rb, link);
500 bus_dmamap_unload(sc->rbuf_tag, rb->map);
503 LIST_INSERT_HEAD(&sc->rbuf_free, rb, link);
506 /* Unwait any waiters */
507 wakeup(&sc->sadi_mem);
509 /* wakeup all threads waiting for STAT or REG buffers */
510 cv_broadcast(&sc->cv_stat);
511 cv_broadcast(&sc->cv_regs);
513 sc->flags &= ~(FATM_STAT_INUSE | FATM_REGS_INUSE);
515 /* wakeup all threads waiting on commands */
516 for (i = 0; i < FATM_CMD_QLEN; i++) {
517 q = GET_QUEUE(sc->cmdqueue, struct cmdqueue, i);
519 H_SYNCSTAT_POSTREAD(sc, q->q.statp);
520 if ((stat = H_GETSTAT(q->q.statp)) != FATM_STAT_FREE) {
521 H_SETSTAT(q->q.statp, stat | FATM_STAT_ERROR);
522 H_SYNCSTAT_PREWRITE(sc, q->q.statp);
526 utopia_reset_media(&sc->utopia);
528 sc->small_cnt = sc->large_cnt = 0;
531 if (sc->vccs != NULL) {
533 for (i = 0; i < FORE_MAX_VCC + 1; i++) {
534 if (sc->vccs[i] != NULL) {
535 if ((sc->vccs[i]->vflags & (FATM_VCC_OPEN |
536 FATM_VCC_TRY_OPEN)) == 0) {
537 uma_zfree(sc->vcc_zone, sc->vccs[i]);
540 sc->vccs[i]->vflags = 0;
550 * Load the firmware into the board and save the entry point.
553 firmware_load(struct fatm_softc *sc)
555 struct firmware *fw = (struct firmware *)firmware;
557 DBG(sc, INIT, ("loading - entry=%x", fw->entry));
558 bus_space_write_region_4(sc->memt, sc->memh, fw->offset, firmware,
559 sizeof(firmware) / sizeof(firmware[0]));
566 * Read a character from the virtual UART. The availability of a character
567 * is signaled by a non-null value of the 32 bit register. The eating of
568 * the character by us is signalled to the card by setting that register
572 rx_getc(struct fatm_softc *sc)
578 c = READ4(sc, FATMO_UART_TO_HOST);
581 WRITE4(sc, FATMO_UART_TO_HOST, 0);
582 DBGC(sc, UART, ("%c", c & 0xff));
591 * Eat up characters from the board and stuff them in the bit-bucket.
594 rx_flush(struct fatm_softc *sc)
598 while (w-- && rx_getc(sc) >= 0)
603 * Write a character to the card. The UART is available if the register
607 tx_putc(struct fatm_softc *sc, u_char c)
613 c1 = READ4(sc, FATMO_UART_TO_960);
616 WRITE4(sc, FATMO_UART_TO_960, c | CHAR_AVAIL);
617 DBGC(sc, UART, ("%c", c & 0xff));
626 * Start the firmware. This is doing by issuing a 'go' command with
627 * the hex entry address of the firmware. Then we wait for the self-test to
631 fatm_start_firmware(struct fatm_softc *sc, uint32_t start)
633 static char hex[] = "0123456789abcdef";
636 DBG(sc, INIT, ("starting"));
650 tx_putc(sc, hex[(start >> 12) & 0xf]);
652 tx_putc(sc, hex[(start >> 8) & 0xf]);
654 tx_putc(sc, hex[(start >> 4) & 0xf]);
656 tx_putc(sc, hex[(start >> 0) & 0xf]);
662 for (w = 100; w; w--) {
664 val = READ4(sc, FATMO_BOOT_STATUS);
677 * Initialize one card and host queue.
680 init_card_queue(struct fatm_softc *sc, struct fqueue *queue, int qlen,
681 size_t qel_size, size_t desc_size, cardoff_t off,
682 u_char **statpp, uint32_t *cardstat, u_char *descp, uint32_t carddesc)
684 struct fqelem *el = queue->chunk;
688 off += 8; /* size of card entry */
690 el->statp = (uint32_t *)(*statpp);
691 (*statpp) += sizeof(uint32_t);
692 H_SETSTAT(el->statp, FATM_STAT_FREE);
693 H_SYNCSTAT_PREWRITE(sc, el->statp);
695 WRITE4(sc, el->card + FATMOS_STATP, (*cardstat));
696 (*cardstat) += sizeof(uint32_t);
700 el->card_ioblk = carddesc;
701 carddesc += desc_size;
703 el = (struct fqelem *)((u_char *)el + qel_size);
705 queue->tail = queue->head = 0;
709 * Issue the initialize operation to the card, wait for completion and
710 * initialize the on-board and host queue structures with offsets and
714 fatm_init_cmd(struct fatm_softc *sc)
723 DBG(sc, INIT, ("command"));
724 WRITE4(sc, FATMO_ISTAT, 0);
725 WRITE4(sc, FATMO_IMASK, 1);
726 WRITE4(sc, FATMO_HLOGGER, 0);
728 WRITE4(sc, FATMO_INIT + FATMOI_RECEIVE_TRESHOLD, 0);
729 WRITE4(sc, FATMO_INIT + FATMOI_NUM_CONNECT, FORE_MAX_VCC);
730 WRITE4(sc, FATMO_INIT + FATMOI_CQUEUE_LEN, FATM_CMD_QLEN);
731 WRITE4(sc, FATMO_INIT + FATMOI_TQUEUE_LEN, FATM_TX_QLEN);
732 WRITE4(sc, FATMO_INIT + FATMOI_RQUEUE_LEN, FATM_RX_QLEN);
733 WRITE4(sc, FATMO_INIT + FATMOI_RPD_EXTENSION, RPD_EXTENSIONS);
734 WRITE4(sc, FATMO_INIT + FATMOI_TPD_EXTENSION, TPD_EXTENSIONS);
737 * initialize buffer descriptors
739 WRITE4(sc, FATMO_INIT + FATMOI_SMALL_B1 + FATMOB_QUEUE_LENGTH,
741 WRITE4(sc, FATMO_INIT + FATMOI_SMALL_B1 + FATMOB_BUFFER_SIZE,
743 WRITE4(sc, FATMO_INIT + FATMOI_SMALL_B1 + FATMOB_POOL_SIZE,
745 WRITE4(sc, FATMO_INIT + FATMOI_SMALL_B1 + FATMOB_SUPPLY_BLKSIZE,
746 SMALL_SUPPLY_BLKSIZE);
748 WRITE4(sc, FATMO_INIT + FATMOI_LARGE_B1 + FATMOB_QUEUE_LENGTH,
750 WRITE4(sc, FATMO_INIT + FATMOI_LARGE_B1 + FATMOB_BUFFER_SIZE,
752 WRITE4(sc, FATMO_INIT + FATMOI_LARGE_B1 + FATMOB_POOL_SIZE,
754 WRITE4(sc, FATMO_INIT + FATMOI_LARGE_B1 + FATMOB_SUPPLY_BLKSIZE,
755 LARGE_SUPPLY_BLKSIZE);
757 WRITE4(sc, FATMO_INIT + FATMOI_SMALL_B2 + FATMOB_QUEUE_LENGTH, 0);
758 WRITE4(sc, FATMO_INIT + FATMOI_SMALL_B2 + FATMOB_BUFFER_SIZE, 0);
759 WRITE4(sc, FATMO_INIT + FATMOI_SMALL_B2 + FATMOB_POOL_SIZE, 0);
760 WRITE4(sc, FATMO_INIT + FATMOI_SMALL_B2 + FATMOB_SUPPLY_BLKSIZE, 0);
762 WRITE4(sc, FATMO_INIT + FATMOI_LARGE_B2 + FATMOB_QUEUE_LENGTH, 0);
763 WRITE4(sc, FATMO_INIT + FATMOI_LARGE_B2 + FATMOB_BUFFER_SIZE, 0);
764 WRITE4(sc, FATMO_INIT + FATMOI_LARGE_B2 + FATMOB_POOL_SIZE, 0);
765 WRITE4(sc, FATMO_INIT + FATMOI_LARGE_B2 + FATMOB_SUPPLY_BLKSIZE, 0);
771 WRITE4(sc, FATMO_INIT + FATMOI_STATUS, FATM_STAT_PENDING);
773 WRITE4(sc, FATMO_INIT + FATMOI_OP, FATM_OP_INITIALIZE);
777 * Busy wait for completion
781 c = READ4(sc, FATMO_INIT + FATMOI_STATUS);
783 if (c & FATM_STAT_COMPLETE)
788 if (c & FATM_STAT_ERROR)
792 * Initialize the queues
794 statp = sc->stat_mem.mem;
795 card_stat = sc->stat_mem.paddr;
798 * Command queue. This is special in that it's on the card.
800 el = sc->cmdqueue.chunk;
801 off = READ4(sc, FATMO_COMMAND_QUEUE);
802 DBG(sc, INIT, ("cmd queue=%x", off));
803 for (cnt = 0; cnt < FATM_CMD_QLEN; cnt++) {
804 el = &((struct cmdqueue *)sc->cmdqueue.chunk + cnt)->q;
807 off += 32; /* size of card structure */
809 el->statp = (uint32_t *)statp;
810 statp += sizeof(uint32_t);
811 H_SETSTAT(el->statp, FATM_STAT_FREE);
812 H_SYNCSTAT_PREWRITE(sc, el->statp);
814 WRITE4(sc, el->card + FATMOC_STATP, card_stat);
815 card_stat += sizeof(uint32_t);
817 sc->cmdqueue.tail = sc->cmdqueue.head = 0;
820 * Now the other queues. These are in memory
822 init_card_queue(sc, &sc->txqueue, FATM_TX_QLEN,
823 sizeof(struct txqueue), TPD_SIZE,
824 READ4(sc, FATMO_TRANSMIT_QUEUE),
825 &statp, &card_stat, sc->txq_mem.mem, sc->txq_mem.paddr);
827 init_card_queue(sc, &sc->rxqueue, FATM_RX_QLEN,
828 sizeof(struct rxqueue), RPD_SIZE,
829 READ4(sc, FATMO_RECEIVE_QUEUE),
830 &statp, &card_stat, sc->rxq_mem.mem, sc->rxq_mem.paddr);
832 init_card_queue(sc, &sc->s1queue, SMALL_SUPPLY_QLEN,
833 sizeof(struct supqueue), BSUP_BLK2SIZE(SMALL_SUPPLY_BLKSIZE),
834 READ4(sc, FATMO_SMALL_B1_QUEUE),
835 &statp, &card_stat, sc->s1q_mem.mem, sc->s1q_mem.paddr);
837 init_card_queue(sc, &sc->l1queue, LARGE_SUPPLY_QLEN,
838 sizeof(struct supqueue), BSUP_BLK2SIZE(LARGE_SUPPLY_BLKSIZE),
839 READ4(sc, FATMO_LARGE_B1_QUEUE),
840 &statp, &card_stat, sc->l1q_mem.mem, sc->l1q_mem.paddr);
848 * Read PROM. Called only from attach code. Here we spin because the interrupt
849 * handler is not yet set up.
852 fatm_getprom(struct fatm_softc *sc)
858 DBG(sc, INIT, ("reading prom"));
859 q = GET_QUEUE(sc->cmdqueue, struct cmdqueue, sc->cmdqueue.head);
860 NEXT_QUEUE_ENTRY(sc->cmdqueue.head, FATM_CMD_QLEN);
864 H_SETSTAT(q->q.statp, FATM_STAT_PENDING);
865 H_SYNCSTAT_PREWRITE(sc, q->q.statp);
867 bus_dmamap_sync(sc->prom_mem.dmat, sc->prom_mem.map,
868 BUS_DMASYNC_PREREAD);
870 WRITE4(sc, q->q.card + FATMOC_GPROM_BUF, sc->prom_mem.paddr);
872 WRITE4(sc, q->q.card + FATMOC_OP, FATM_OP_GET_PROM_DATA);
875 for (i = 0; i < 1000; i++) {
876 H_SYNCSTAT_POSTREAD(sc, q->q.statp);
877 if (H_GETSTAT(q->q.statp) &
878 (FATM_STAT_COMPLETE | FATM_STAT_ERROR))
883 if_printf(sc->ifp, "getprom timeout\n");
886 H_SYNCSTAT_POSTREAD(sc, q->q.statp);
887 if (H_GETSTAT(q->q.statp) & FATM_STAT_ERROR) {
888 if_printf(sc->ifp, "getprom error\n");
891 H_SETSTAT(q->q.statp, FATM_STAT_FREE);
892 H_SYNCSTAT_PREWRITE(sc, q->q.statp);
893 NEXT_QUEUE_ENTRY(sc->cmdqueue.tail, FATM_CMD_QLEN);
895 bus_dmamap_sync(sc->prom_mem.dmat, sc->prom_mem.map,
896 BUS_DMASYNC_POSTREAD);
904 u_char *ptr = (u_char *)sc->prom_mem.mem;
905 for (i = 0; i < sizeof(struct prom); i++)
906 printf("%02x ", *ptr++);
911 prom = (struct prom *)sc->prom_mem.mem;
913 bcopy(prom->mac + 2, IFP2IFATM(sc->ifp)->mib.esi, 6);
914 IFP2IFATM(sc->ifp)->mib.serial = le32toh(prom->serial);
915 IFP2IFATM(sc->ifp)->mib.hw_version = le32toh(prom->version);
916 IFP2IFATM(sc->ifp)->mib.sw_version = READ4(sc, FATMO_FIRMWARE_RELEASE);
918 if_printf(sc->ifp, "ESI=%02x:%02x:%02x:%02x:%02x:%02x "
919 "serial=%u hw=0x%x sw=0x%x\n", IFP2IFATM(sc->ifp)->mib.esi[0],
920 IFP2IFATM(sc->ifp)->mib.esi[1], IFP2IFATM(sc->ifp)->mib.esi[2], IFP2IFATM(sc->ifp)->mib.esi[3],
921 IFP2IFATM(sc->ifp)->mib.esi[4], IFP2IFATM(sc->ifp)->mib.esi[5], IFP2IFATM(sc->ifp)->mib.serial,
922 IFP2IFATM(sc->ifp)->mib.hw_version, IFP2IFATM(sc->ifp)->mib.sw_version);
928 * This is the callback function for bus_dmamap_load. We assume, that we
929 * have a 32-bit bus and so have always one segment.
932 dmaload_helper(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
934 bus_addr_t *ptr = (bus_addr_t *)arg;
937 printf("%s: error=%d\n", __func__, error);
940 KASSERT(nsegs == 1, ("too many DMA segments"));
941 KASSERT(segs[0].ds_addr <= 0xffffffff, ("DMA address too large %lx",
942 (u_long)segs[0].ds_addr));
944 *ptr = segs[0].ds_addr;
948 * Allocate a chunk of DMA-able memory and map it.
951 alloc_dma_memory(struct fatm_softc *sc, const char *nm, struct fatm_mem *mem)
957 if (bus_dma_tag_create(sc->parent_dmat, mem->align, 0,
958 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR,
959 NULL, NULL, mem->size, 1, BUS_SPACE_MAXSIZE_32BIT,
960 BUS_DMA_ALLOCNOW, NULL, NULL, &mem->dmat)) {
961 if_printf(sc->ifp, "could not allocate %s DMA tag\n",
966 error = bus_dmamem_alloc(mem->dmat, &mem->mem, 0, &mem->map);
968 if_printf(sc->ifp, "could not allocate %s DMA memory: "
970 bus_dma_tag_destroy(mem->dmat);
975 error = bus_dmamap_load(mem->dmat, mem->map, mem->mem, mem->size,
976 dmaload_helper, &mem->paddr, BUS_DMA_NOWAIT);
978 if_printf(sc->ifp, "could not load %s DMA memory: "
980 bus_dmamem_free(mem->dmat, mem->mem, mem->map);
981 bus_dma_tag_destroy(mem->dmat);
986 DBG(sc, DMA, ("DMA %s V/P/S/Z %p/%lx/%x/%x", nm, mem->mem,
987 (u_long)mem->paddr, mem->size, mem->align));
994 alloc_dma_memoryX(struct fatm_softc *sc, const char *nm, struct fatm_mem *mem)
1000 if (bus_dma_tag_create(NULL, mem->align, 0,
1001 BUS_SPACE_MAXADDR_24BIT, BUS_SPACE_MAXADDR,
1002 NULL, NULL, mem->size, 1, mem->size,
1003 BUS_DMA_ALLOCNOW, NULL, NULL, &mem->dmat)) {
1004 if_printf(sc->ifp, "could not allocate %s DMA tag\n",
1009 mem->mem = contigmalloc(mem->size, M_DEVBUF, M_WAITOK,
1010 BUS_SPACE_MAXADDR_24BIT, BUS_SPACE_MAXADDR_32BIT, mem->align, 0);
1012 error = bus_dmamap_create(mem->dmat, 0, &mem->map);
1014 if_printf(sc->ifp, "could not allocate %s DMA map: "
1016 contigfree(mem->mem, mem->size, M_DEVBUF);
1017 bus_dma_tag_destroy(mem->dmat);
1022 error = bus_dmamap_load(mem->dmat, mem->map, mem->mem, mem->size,
1023 dmaload_helper, &mem->paddr, BUS_DMA_NOWAIT);
1025 if_printf(sc->ifp, "could not load %s DMA memory: "
1027 bus_dmamap_destroy(mem->dmat, mem->map);
1028 contigfree(mem->mem, mem->size, M_DEVBUF);
1029 bus_dma_tag_destroy(mem->dmat);
1034 DBG(sc, DMA, ("DMAX %s V/P/S/Z %p/%lx/%x/%x", nm, mem->mem,
1035 (u_long)mem->paddr, mem->size, mem->align));
1037 printf("DMAX: %s V/P/S/Z %p/%lx/%x/%x", nm, mem->mem,
1038 (u_long)mem->paddr, mem->size, mem->align);
1042 #endif /* TEST_DMA_SYNC */
1045 * Destroy all resources of an dma-able memory chunk
1048 destroy_dma_memory(struct fatm_mem *mem)
1050 if (mem->mem != NULL) {
1051 bus_dmamap_unload(mem->dmat, mem->map);
1052 bus_dmamem_free(mem->dmat, mem->mem, mem->map);
1053 bus_dma_tag_destroy(mem->dmat);
1057 #ifdef TEST_DMA_SYNC
1059 destroy_dma_memoryX(struct fatm_mem *mem)
1061 if (mem->mem != NULL) {
1062 bus_dmamap_unload(mem->dmat, mem->map);
1063 bus_dmamap_destroy(mem->dmat, mem->map);
1064 contigfree(mem->mem, mem->size, M_DEVBUF);
1065 bus_dma_tag_destroy(mem->dmat);
1069 #endif /* TEST_DMA_SYNC */
1072 * Try to supply buffers to the card if there are free entries in the queues
1075 fatm_supply_small_buffers(struct fatm_softc *sc)
1080 int i, j, error, cnt;
1085 nbufs = max(4 * sc->open_vccs, 32);
1086 nbufs = min(nbufs, SMALL_POOL_SIZE);
1087 nbufs -= sc->small_cnt;
1089 nblocks = (nbufs + SMALL_SUPPLY_BLKSIZE - 1) / SMALL_SUPPLY_BLKSIZE;
1090 for (cnt = 0; cnt < nblocks; cnt++) {
1091 q = GET_QUEUE(sc->s1queue, struct supqueue, sc->s1queue.head);
1093 H_SYNCSTAT_POSTREAD(sc, q->q.statp);
1094 if (H_GETSTAT(q->q.statp) != FATM_STAT_FREE)
1097 bd = (struct rbd *)q->q.ioblk;
1099 for (i = 0; i < SMALL_SUPPLY_BLKSIZE; i++) {
1100 if ((rb = LIST_FIRST(&sc->rbuf_free)) == NULL) {
1101 if_printf(sc->ifp, "out of rbufs\n");
1104 MGETHDR(m, M_DONTWAIT, MT_DATA);
1106 LIST_INSERT_HEAD(&sc->rbuf_free, rb, link);
1109 MH_ALIGN(m, SMALL_BUFFER_LEN);
1110 error = bus_dmamap_load(sc->rbuf_tag, rb->map,
1111 m->m_data, SMALL_BUFFER_LEN, dmaload_helper,
1112 &phys, BUS_DMA_NOWAIT);
1115 "dmamap_load mbuf failed %d", error);
1117 LIST_INSERT_HEAD(&sc->rbuf_free, rb, link);
1120 bus_dmamap_sync(sc->rbuf_tag, rb->map,
1121 BUS_DMASYNC_PREREAD);
1123 LIST_REMOVE(rb, link);
1124 LIST_INSERT_HEAD(&sc->rbuf_used, rb, link);
1127 bd[i].handle = rb - sc->rbufs;
1128 H_SETDESC(bd[i].buffer, phys);
1131 if (i < SMALL_SUPPLY_BLKSIZE) {
1132 for (j = 0; j < i; j++) {
1133 rb = sc->rbufs + bd[j].handle;
1134 bus_dmamap_unload(sc->rbuf_tag, rb->map);
1138 LIST_REMOVE(rb, link);
1139 LIST_INSERT_HEAD(&sc->rbuf_free, rb, link);
1143 H_SYNCQ_PREWRITE(&sc->s1q_mem, bd,
1144 sizeof(struct rbd) * SMALL_SUPPLY_BLKSIZE);
1146 H_SETSTAT(q->q.statp, FATM_STAT_PENDING);
1147 H_SYNCSTAT_PREWRITE(sc, q->q.statp);
1149 WRITE4(sc, q->q.card, q->q.card_ioblk);
1152 sc->small_cnt += SMALL_SUPPLY_BLKSIZE;
1154 NEXT_QUEUE_ENTRY(sc->s1queue.head, SMALL_SUPPLY_QLEN);
1159 * Try to supply buffers to the card if there are free entries in the queues
1160 * We assume that all buffers are within the address space accessible by the
1161 * card (32-bit), so we don't need bounce buffers.
1164 fatm_supply_large_buffers(struct fatm_softc *sc)
1166 int nbufs, nblocks, cnt;
1174 nbufs = max(4 * sc->open_vccs, 32);
1175 nbufs = min(nbufs, LARGE_POOL_SIZE);
1176 nbufs -= sc->large_cnt;
1178 nblocks = (nbufs + LARGE_SUPPLY_BLKSIZE - 1) / LARGE_SUPPLY_BLKSIZE;
1180 for (cnt = 0; cnt < nblocks; cnt++) {
1181 q = GET_QUEUE(sc->l1queue, struct supqueue, sc->l1queue.head);
1183 H_SYNCSTAT_POSTREAD(sc, q->q.statp);
1184 if (H_GETSTAT(q->q.statp) != FATM_STAT_FREE)
1187 bd = (struct rbd *)q->q.ioblk;
1189 for (i = 0; i < LARGE_SUPPLY_BLKSIZE; i++) {
1190 if ((rb = LIST_FIRST(&sc->rbuf_free)) == NULL) {
1191 if_printf(sc->ifp, "out of rbufs\n");
1194 if ((m = m_getcl(M_DONTWAIT, MT_DATA,
1195 M_PKTHDR)) == NULL) {
1196 LIST_INSERT_HEAD(&sc->rbuf_free, rb, link);
1200 m->m_data += MCLBYTES - LARGE_BUFFER_LEN;
1201 error = bus_dmamap_load(sc->rbuf_tag, rb->map,
1202 m->m_data, LARGE_BUFFER_LEN, dmaload_helper,
1203 &phys, BUS_DMA_NOWAIT);
1206 "dmamap_load mbuf failed %d", error);
1208 LIST_INSERT_HEAD(&sc->rbuf_free, rb, link);
1212 bus_dmamap_sync(sc->rbuf_tag, rb->map,
1213 BUS_DMASYNC_PREREAD);
1215 LIST_REMOVE(rb, link);
1216 LIST_INSERT_HEAD(&sc->rbuf_used, rb, link);
1219 bd[i].handle = rb - sc->rbufs;
1220 H_SETDESC(bd[i].buffer, phys);
1223 if (i < LARGE_SUPPLY_BLKSIZE) {
1224 for (j = 0; j < i; j++) {
1225 rb = sc->rbufs + bd[j].handle;
1226 bus_dmamap_unload(sc->rbuf_tag, rb->map);
1230 LIST_REMOVE(rb, link);
1231 LIST_INSERT_HEAD(&sc->rbuf_free, rb, link);
1235 H_SYNCQ_PREWRITE(&sc->l1q_mem, bd,
1236 sizeof(struct rbd) * LARGE_SUPPLY_BLKSIZE);
1238 H_SETSTAT(q->q.statp, FATM_STAT_PENDING);
1239 H_SYNCSTAT_PREWRITE(sc, q->q.statp);
1240 WRITE4(sc, q->q.card, q->q.card_ioblk);
1243 sc->large_cnt += LARGE_SUPPLY_BLKSIZE;
1245 NEXT_QUEUE_ENTRY(sc->l1queue.head, LARGE_SUPPLY_QLEN);
1251 * Actually start the card. The lock must be held here.
1252 * Reset, load the firmware, start it, initializes queues, read the PROM
1253 * and supply receive buffers to the card.
1256 fatm_init_locked(struct fatm_softc *sc)
1262 DBG(sc, INIT, ("initialize"));
1263 if (sc->ifp->if_drv_flags & IFF_DRV_RUNNING)
1267 * Hard reset the board
1272 start = firmware_load(sc);
1273 if (fatm_start_firmware(sc, start) || fatm_init_cmd(sc) ||
1282 c = READ4(sc, FATMO_MEDIA_TYPE);
1285 case FORE_MT_TAXI_100:
1286 IFP2IFATM(sc->ifp)->mib.media = IFM_ATM_TAXI_100;
1287 IFP2IFATM(sc->ifp)->mib.pcr = 227273;
1290 case FORE_MT_TAXI_140:
1291 IFP2IFATM(sc->ifp)->mib.media = IFM_ATM_TAXI_140;
1292 IFP2IFATM(sc->ifp)->mib.pcr = 318181;
1295 case FORE_MT_UTP_SONET:
1296 IFP2IFATM(sc->ifp)->mib.media = IFM_ATM_UTP_155;
1297 IFP2IFATM(sc->ifp)->mib.pcr = 353207;
1300 case FORE_MT_MM_OC3_ST:
1301 case FORE_MT_MM_OC3_SC:
1302 IFP2IFATM(sc->ifp)->mib.media = IFM_ATM_MM_155;
1303 IFP2IFATM(sc->ifp)->mib.pcr = 353207;
1306 case FORE_MT_SM_OC3_ST:
1307 case FORE_MT_SM_OC3_SC:
1308 IFP2IFATM(sc->ifp)->mib.media = IFM_ATM_SM_155;
1309 IFP2IFATM(sc->ifp)->mib.pcr = 353207;
1313 log(LOG_ERR, "fatm: unknown media type %d\n", c);
1314 IFP2IFATM(sc->ifp)->mib.media = IFM_ATM_UNKNOWN;
1315 IFP2IFATM(sc->ifp)->mib.pcr = 353207;
1318 sc->ifp->if_baudrate = 53 * 8 * IFP2IFATM(sc->ifp)->mib.pcr;
1319 utopia_init_media(&sc->utopia);
1322 * Initialize the RBDs
1324 for (i = 0; i < FATM_RX_QLEN; i++) {
1325 q = GET_QUEUE(sc->rxqueue, struct rxqueue, i);
1326 WRITE4(sc, q->q.card + 0, q->q.card_ioblk);
1331 * Supply buffers to the card
1333 fatm_supply_small_buffers(sc);
1334 fatm_supply_large_buffers(sc);
1337 * Now set flags, that we are ready
1339 sc->ifp->if_drv_flags |= IFF_DRV_RUNNING;
1342 * Start the watchdog timer
1344 sc->ifp->if_timer = 5;
1347 utopia_start(&sc->utopia);
1349 ATMEV_SEND_IFSTATE_CHANGED(IFP2IFATM(sc->ifp),
1350 sc->utopia.carrier == UTP_CARR_OK);
1352 /* start all channels */
1353 for (i = 0; i < FORE_MAX_VCC + 1; i++)
1354 if (sc->vccs[i] != NULL) {
1355 sc->vccs[i]->vflags |= FATM_VCC_REOPEN;
1356 error = fatm_load_vc(sc, sc->vccs[i]);
1358 if_printf(sc->ifp, "reopening %u "
1359 "failed: %d\n", i, error);
1360 sc->vccs[i]->vflags &= ~FATM_VCC_REOPEN;
1364 DBG(sc, INIT, ("done"));
1368 * This is the exported as initialisation function.
1373 struct fatm_softc *sc = p;
1376 fatm_init_locked(sc);
1380 /************************************************************/
1382 * The INTERRUPT handling
1385 * Check the command queue. If a command was completed, call the completion
1386 * function for that command.
1389 fatm_intr_drain_cmd(struct fatm_softc *sc)
1395 * Drain command queue
1398 q = GET_QUEUE(sc->cmdqueue, struct cmdqueue, sc->cmdqueue.tail);
1400 H_SYNCSTAT_POSTREAD(sc, q->q.statp);
1401 stat = H_GETSTAT(q->q.statp);
1403 if (stat != FATM_STAT_COMPLETE &&
1404 stat != (FATM_STAT_COMPLETE | FATM_STAT_ERROR) &&
1405 stat != FATM_STAT_ERROR)
1410 H_SETSTAT(q->q.statp, FATM_STAT_FREE);
1411 H_SYNCSTAT_PREWRITE(sc, q->q.statp);
1413 NEXT_QUEUE_ENTRY(sc->cmdqueue.tail, FATM_CMD_QLEN);
1418 * Drain the small buffer supply queue.
1421 fatm_intr_drain_small_buffers(struct fatm_softc *sc)
1427 q = GET_QUEUE(sc->s1queue, struct supqueue, sc->s1queue.tail);
1429 H_SYNCSTAT_POSTREAD(sc, q->q.statp);
1430 stat = H_GETSTAT(q->q.statp);
1432 if ((stat & FATM_STAT_COMPLETE) == 0)
1434 if (stat & FATM_STAT_ERROR)
1435 log(LOG_ERR, "%s: status %x\n", __func__, stat);
1437 H_SETSTAT(q->q.statp, FATM_STAT_FREE);
1438 H_SYNCSTAT_PREWRITE(sc, q->q.statp);
1440 NEXT_QUEUE_ENTRY(sc->s1queue.tail, SMALL_SUPPLY_QLEN);
1445 * Drain the large buffer supply queue.
1448 fatm_intr_drain_large_buffers(struct fatm_softc *sc)
1454 q = GET_QUEUE(sc->l1queue, struct supqueue, sc->l1queue.tail);
1456 H_SYNCSTAT_POSTREAD(sc, q->q.statp);
1457 stat = H_GETSTAT(q->q.statp);
1459 if ((stat & FATM_STAT_COMPLETE) == 0)
1461 if (stat & FATM_STAT_ERROR)
1462 log(LOG_ERR, "%s status %x\n", __func__, stat);
1464 H_SETSTAT(q->q.statp, FATM_STAT_FREE);
1465 H_SYNCSTAT_PREWRITE(sc, q->q.statp);
1467 NEXT_QUEUE_ENTRY(sc->l1queue.tail, LARGE_SUPPLY_QLEN);
1472 * Check the receive queue. Send any received PDU up the protocol stack
1473 * (except when there was an error or the VCI appears to be closed. In this
1474 * case discard the PDU).
1477 fatm_intr_drain_rx(struct fatm_softc *sc)
1483 struct mbuf *last, *m0;
1487 struct atm_pseudohdr aph;
1489 struct card_vcc *vc;
1492 q = GET_QUEUE(sc->rxqueue, struct rxqueue, sc->rxqueue.tail);
1494 H_SYNCSTAT_POSTREAD(sc, q->q.statp);
1495 stat = H_GETSTAT(q->q.statp);
1497 if ((stat & FATM_STAT_COMPLETE) == 0)
1500 rpd = (struct rpd *)q->q.ioblk;
1501 H_SYNCQ_POSTREAD(&sc->rxq_mem, rpd, RPD_SIZE);
1503 rpd->nseg = le32toh(rpd->nseg);
1506 for (i = 0; i < rpd->nseg; i++) {
1507 rb = sc->rbufs + rpd->segment[i].handle;
1511 last->m_next = rb->m;
1514 last->m_next = NULL;
1515 if (last->m_flags & M_EXT)
1519 bus_dmamap_sync(sc->rbuf_tag, rb->map,
1520 BUS_DMASYNC_POSTREAD);
1521 bus_dmamap_unload(sc->rbuf_tag, rb->map);
1524 LIST_REMOVE(rb, link);
1525 LIST_INSERT_HEAD(&sc->rbuf_free, rb, link);
1527 last->m_len = le32toh(rpd->segment[i].length);
1528 mlen += last->m_len;
1531 m0->m_pkthdr.len = mlen;
1532 m0->m_pkthdr.rcvif = sc->ifp;
1534 h = le32toh(rpd->atm_header);
1535 vpi = (h >> 20) & 0xff;
1536 vci = (h >> 4 ) & 0xffff;
1537 pt = (h >> 1 ) & 0x7;
1540 * Locate the VCC this packet belongs to
1542 if (!VC_OK(sc, vpi, vci))
1544 else if ((vc = sc->vccs[vci]) == NULL ||
1545 !(sc->vccs[vci]->vflags & FATM_VCC_OPEN)) {
1546 sc->istats.rx_closed++;
1550 DBG(sc, RCV, ("RCV: vc=%u.%u pt=%u mlen=%d %s", vpi, vci,
1551 pt, mlen, vc == NULL ? "dropped" : ""));
1557 if (!(vc->param.flags & ATMIO_FLAG_NG) &&
1558 vc->param.aal == ATMIO_AAL_5 &&
1559 (vc->param.flags & ATM_PH_LLCSNAP))
1560 BPF_MTAP(sc->ifp, m0);
1563 ATM_PH_FLAGS(&aph) = vc->param.flags;
1564 ATM_PH_VPI(&aph) = vpi;
1565 ATM_PH_SETVCI(&aph, vci);
1571 vc->ibytes += m0->m_pkthdr.len;
1573 atm_input(ifp, &aph, m0, vc->rxhand);
1576 H_SETSTAT(q->q.statp, FATM_STAT_FREE);
1577 H_SYNCSTAT_PREWRITE(sc, q->q.statp);
1579 WRITE4(sc, q->q.card, q->q.card_ioblk);
1582 NEXT_QUEUE_ENTRY(sc->rxqueue.tail, FATM_RX_QLEN);
1587 * Check the transmit queue. Free the mbuf chains that we were transmitting.
1590 fatm_intr_drain_tx(struct fatm_softc *sc)
1599 q = GET_QUEUE(sc->txqueue, struct txqueue, sc->txqueue.tail);
1601 H_SYNCSTAT_POSTREAD(sc, q->q.statp);
1602 stat = H_GETSTAT(q->q.statp);
1604 if (stat != FATM_STAT_COMPLETE &&
1605 stat != (FATM_STAT_COMPLETE | FATM_STAT_ERROR) &&
1606 stat != FATM_STAT_ERROR)
1609 H_SETSTAT(q->q.statp, FATM_STAT_FREE);
1610 H_SYNCSTAT_PREWRITE(sc, q->q.statp);
1612 bus_dmamap_sync(sc->tx_tag, q->map, BUS_DMASYNC_POSTWRITE);
1613 bus_dmamap_unload(sc->tx_tag, q->map);
1619 NEXT_QUEUE_ENTRY(sc->txqueue.tail, FATM_TX_QLEN);
1629 struct fatm_softc *sc = (struct fatm_softc *)p;
1632 if (!READ4(sc, FATMO_PSR)) {
1636 WRITE4(sc, FATMO_HCR, FATM_HCR_CLRIRQ);
1638 if (!(sc->ifp->if_drv_flags & IFF_DRV_RUNNING)) {
1642 fatm_intr_drain_cmd(sc);
1643 fatm_intr_drain_rx(sc);
1644 fatm_intr_drain_tx(sc);
1645 fatm_intr_drain_small_buffers(sc);
1646 fatm_intr_drain_large_buffers(sc);
1647 fatm_supply_small_buffers(sc);
1648 fatm_supply_large_buffers(sc);
1652 if (sc->retry_tx && _IF_QLEN(&sc->ifp->if_snd))
1653 (*sc->ifp->if_start)(sc->ifp);
1657 * Get device statistics. This must be called with the softc locked.
1658 * We use a preallocated buffer, so we need to protect this buffer.
1659 * We do this by using a condition variable and a flag. If the flag is set
1660 * the buffer is in use by one thread (one thread is executing a GETSTAT
1661 * card command). In this case all other threads that are trying to get
1662 * statistics block on that condition variable. When the thread finishes
1663 * using the buffer it resets the flag and signals the condition variable. This
1664 * will wakeup the next thread that is waiting for the buffer. If the interface
1665 * is stopped the stopping function will broadcast the cv. All threads will
1666 * find that the interface has been stopped and return.
1668 * Aquiring of the buffer is done by the fatm_getstat() function. The freeing
1669 * must be done by the caller when he has finished using the buffer.
1672 fatm_getstat_complete(struct fatm_softc *sc, struct cmdqueue *q)
1675 H_SYNCSTAT_POSTREAD(sc, q->q.statp);
1676 if (H_GETSTAT(q->q.statp) & FATM_STAT_ERROR) {
1677 sc->istats.get_stat_errors++;
1680 wakeup(&sc->sadi_mem);
1683 fatm_getstat(struct fatm_softc *sc)
1689 * Wait until either the interface is stopped or we can get the
1693 if (!(sc->ifp->if_drv_flags & IFF_DRV_RUNNING))
1695 if (!(sc->flags & FATM_STAT_INUSE))
1697 cv_wait(&sc->cv_stat, &sc->mtx);
1699 sc->flags |= FATM_STAT_INUSE;
1701 q = GET_QUEUE(sc->cmdqueue, struct cmdqueue, sc->cmdqueue.head);
1703 H_SYNCSTAT_POSTREAD(sc, q->q.statp);
1704 if (!(H_GETSTAT(q->q.statp) & FATM_STAT_FREE)) {
1705 sc->istats.cmd_queue_full++;
1708 NEXT_QUEUE_ENTRY(sc->cmdqueue.head, FATM_CMD_QLEN);
1711 q->cb = fatm_getstat_complete;
1712 H_SETSTAT(q->q.statp, FATM_STAT_PENDING);
1713 H_SYNCSTAT_PREWRITE(sc, q->q.statp);
1715 bus_dmamap_sync(sc->sadi_mem.dmat, sc->sadi_mem.map,
1716 BUS_DMASYNC_PREREAD);
1718 WRITE4(sc, q->q.card + FATMOC_GSTAT_BUF,
1719 sc->sadi_mem.paddr);
1721 WRITE4(sc, q->q.card + FATMOC_OP,
1722 FATM_OP_REQUEST_STATS | FATM_OP_INTERRUPT_SEL);
1726 * Wait for the command to complete
1728 error = msleep(&sc->sadi_mem, &sc->mtx, PZERO | PCATCH,
1742 bus_dmamap_sync(sc->sadi_mem.dmat, sc->sadi_mem.map,
1743 BUS_DMASYNC_POSTREAD);
1751 if (q->error == 0) {
1753 uint32_t *p = (uint32_t *)sc->sadi_mem.mem;
1755 for (i = 0; i < sizeof(struct fatm_stats) / sizeof(uint32_t);
1764 * Create a copy of a single mbuf. It can have either internal or
1765 * external data, it may have a packet header. External data is really
1766 * copied, so the new buffer is writeable.
1768 static struct mbuf *
1769 copy_mbuf(struct mbuf *m)
1773 MGET(new, M_DONTWAIT, MT_DATA);
1777 if (m->m_flags & M_PKTHDR) {
1778 M_MOVE_PKTHDR(new, m);
1779 if (m->m_len > MHLEN)
1780 MCLGET(new, M_WAIT);
1782 if (m->m_len > MLEN)
1783 MCLGET(new, M_WAIT);
1786 bcopy(m->m_data, new->m_data, m->m_len);
1787 new->m_len = m->m_len;
1788 new->m_flags &= ~M_RDONLY;
1794 * All segments must have a four byte aligned buffer address and a four
1795 * byte aligned length. Step through an mbuf chain and check these conditions.
1796 * If the buffer address is not aligned and this is a normal mbuf, move
1797 * the data down. Else make a copy of the mbuf with aligned data.
1798 * If the buffer length is not aligned steel data from the next mbuf.
1799 * We don't need to check whether this has more than one external reference,
1800 * because steeling data doesn't change the external cluster.
1801 * If the last mbuf is not aligned, fill with zeroes.
1803 * Return packet length (well we should have this in the packet header),
1804 * but be careful not to count the zero fill at the end.
1806 * If fixing fails free the chain and zero the pointer.
1808 * We assume, that aligning the virtual address also aligns the mapped bus
1812 fatm_fix_chain(struct fatm_softc *sc, struct mbuf **mp)
1814 struct mbuf *m = *mp, *prev = NULL, *next, *new;
1815 u_int mlen = 0, fill = 0;
1822 if ((uintptr_t)mtod(m, void *) % 4 != 0 ||
1823 (m->m_len % 4 != 0 && next)) {
1829 d = mtod(m, u_char *);
1830 if ((off = (uintptr_t)(void *)d % 4) != 0) {
1831 if (M_WRITABLE(m)) {
1832 sc->istats.fix_addr_copy++;
1833 bcopy(d, d - off, m->m_len);
1834 m->m_data = (caddr_t)(d - off);
1836 if ((new = copy_mbuf(m)) == NULL) {
1837 sc->istats.fix_addr_noext++;
1840 sc->istats.fix_addr_ext++;
1849 if ((off = m->m_len % 4) != 0) {
1850 if (!M_WRITABLE(m)) {
1851 if ((new = copy_mbuf(m)) == NULL) {
1852 sc->istats.fix_len_noext++;
1855 sc->istats.fix_len_copy++;
1862 sc->istats.fix_len++;
1863 d = mtod(m, u_char *) + m->m_len;
1869 } else if (next->m_len == 0) {
1870 sc->istats.fix_empty++;
1871 next = m_free(next);
1874 cp = mtod(next, u_char *);
1877 next->m_data = (caddr_t)cp;
1890 } while ((m = next) != NULL);
1892 return (mlen - fill);
1901 * The helper function is used to load the computed physical addresses
1902 * into the transmit descriptor.
1905 fatm_tpd_load(void *varg, bus_dma_segment_t *segs, int nsegs,
1906 bus_size_t mapsize, int error)
1908 struct tpd *tpd = varg;
1913 KASSERT(nsegs <= TPD_EXTENSIONS + TXD_FIXED, ("too many segments"));
1917 H_SETDESC(tpd->segment[tpd->spec].buffer, segs->ds_addr);
1918 H_SETDESC(tpd->segment[tpd->spec].length, segs->ds_len);
1927 * Note, that we update the internal statistics without the lock here.
1930 fatm_tx(struct fatm_softc *sc, struct mbuf *m, struct card_vcc *vc, u_int mlen)
1934 int error, aal, nsegs;
1938 * Get a queue element.
1939 * If there isn't one - try to drain the transmit queue
1940 * We used to sleep here if that doesn't help, but we
1941 * should not sleep here, because we are called with locks.
1943 q = GET_QUEUE(sc->txqueue, struct txqueue, sc->txqueue.head);
1945 H_SYNCSTAT_POSTREAD(sc, q->q.statp);
1946 if (H_GETSTAT(q->q.statp) != FATM_STAT_FREE) {
1947 fatm_intr_drain_tx(sc);
1948 H_SYNCSTAT_POSTREAD(sc, q->q.statp);
1949 if (H_GETSTAT(q->q.statp) != FATM_STAT_FREE) {
1951 sc->istats.tx_retry++;
1952 IF_PREPEND(&sc->ifp->if_snd, m);
1955 sc->istats.tx_queue_full++;
1959 sc->istats.tx_queue_almost_full++;
1964 m->m_data += sizeof(struct atm_pseudohdr);
1965 m->m_len -= sizeof(struct atm_pseudohdr);
1968 if (!(vc->param.flags & ATMIO_FLAG_NG) &&
1969 vc->param.aal == ATMIO_AAL_5 &&
1970 (vc->param.flags & ATM_PH_LLCSNAP))
1971 BPF_MTAP(sc->ifp, m);
1975 error = bus_dmamap_load_mbuf(sc->tx_tag, q->map, m,
1976 fatm_tpd_load, tpd, BUS_DMA_NOWAIT);
1978 sc->ifp->if_oerrors++;
1979 if_printf(sc->ifp, "mbuf loaded error=%d\n", error);
1985 bus_dmamap_sync(sc->tx_tag, q->map, BUS_DMASYNC_PREWRITE);
1988 * OK. Now go and do it.
1990 aal = (vc->param.aal == ATMIO_AAL_5) ? 5 : 0;
1992 H_SETSTAT(q->q.statp, FATM_STAT_PENDING);
1993 H_SYNCSTAT_PREWRITE(sc, q->q.statp);
1997 * If the transmit queue is almost full, schedule a
1998 * transmit interrupt so that transmit descriptors can
2001 H_SETDESC(tpd->spec, TDX_MKSPEC((sc->txcnt >=
2002 (4 * FATM_TX_QLEN) / 5), aal, nsegs, mlen));
2003 H_SETDESC(tpd->atm_header, TDX_MKHDR(vc->param.vpi,
2004 vc->param.vci, 0, 0));
2006 if (vc->param.traffic == ATMIO_TRAFFIC_UBR)
2007 H_SETDESC(tpd->stream, 0);
2011 for (i = 0; i < RATE_TABLE_SIZE; i++)
2012 if (rate_table[i].cell_rate < vc->param.tparam.pcr)
2016 H_SETDESC(tpd->stream, rate_table[i].ratio);
2018 H_SYNCQ_PREWRITE(&sc->txq_mem, tpd, TPD_SIZE);
2020 nblks = TDX_SEGS2BLKS(nsegs);
2022 DBG(sc, XMIT, ("XMIT: mlen=%d spec=0x%x nsegs=%d blocks=%d",
2023 mlen, le32toh(tpd->spec), nsegs, nblks));
2025 WRITE4(sc, q->q.card + 0, q->q.card_ioblk | nblks);
2029 sc->ifp->if_opackets++;
2030 vc->obytes += m->m_pkthdr.len;
2033 NEXT_QUEUE_ENTRY(sc->txqueue.head, FATM_TX_QLEN);
2039 fatm_start(struct ifnet *ifp)
2041 struct atm_pseudohdr aph;
2042 struct fatm_softc *sc;
2044 u_int mlen, vpi, vci;
2045 struct card_vcc *vc;
2050 IF_DEQUEUE(&ifp->if_snd, m);
2055 * Loop through the mbuf chain and compute the total length
2056 * of the packet. Check that all data pointer are
2057 * 4 byte aligned. If they are not, call fatm_mfix to
2058 * fix that problem. This comes more or less from the
2061 mlen = fatm_fix_chain(sc, &m);
2065 if (m->m_len < sizeof(struct atm_pseudohdr) &&
2066 (m = m_pullup(m, sizeof(struct atm_pseudohdr))) == NULL)
2069 aph = *mtod(m, struct atm_pseudohdr *);
2070 mlen -= sizeof(struct atm_pseudohdr);
2076 if (mlen > FATM_MAXPDU) {
2077 sc->istats.tx_pdu2big++;
2082 vci = ATM_PH_VCI(&aph);
2083 vpi = ATM_PH_VPI(&aph);
2086 * From here on we need the softc
2089 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) {
2094 if (!VC_OK(sc, vpi, vci) || (vc = sc->vccs[vci]) == NULL ||
2095 !(vc->vflags & FATM_VCC_OPEN)) {
2100 if (fatm_tx(sc, m, vc, mlen)) {
2111 * This may seem complicated. The reason for this is, that we need an
2112 * asynchronuous open/close for the NATM VCCs because our ioctl handler
2113 * is called with the radix node head of the routing table locked. Therefor
2114 * we cannot sleep there and wait for the open/close to succeed. For this
2115 * reason we just initiate the operation from the ioctl.
2119 * Command the card to open/close a VC.
2120 * Return the queue entry for waiting if we are succesful.
2122 static struct cmdqueue *
2123 fatm_start_vcc(struct fatm_softc *sc, u_int vpi, u_int vci, uint32_t cmd,
2124 u_int mtu, void (*func)(struct fatm_softc *, struct cmdqueue *))
2128 q = GET_QUEUE(sc->cmdqueue, struct cmdqueue, sc->cmdqueue.head);
2130 H_SYNCSTAT_POSTREAD(sc, q->q.statp);
2131 if (!(H_GETSTAT(q->q.statp) & FATM_STAT_FREE)) {
2132 sc->istats.cmd_queue_full++;
2135 NEXT_QUEUE_ENTRY(sc->cmdqueue.head, FATM_CMD_QLEN);
2139 H_SETSTAT(q->q.statp, FATM_STAT_PENDING);
2140 H_SYNCSTAT_PREWRITE(sc, q->q.statp);
2142 WRITE4(sc, q->q.card + FATMOC_ACTIN_VPVC, MKVPVC(vpi, vci));
2144 WRITE4(sc, q->q.card + FATMOC_ACTIN_MTU, mtu);
2146 WRITE4(sc, q->q.card + FATMOC_OP, cmd);
2153 * The VC has been opened/closed and somebody has been waiting for this.
2157 fatm_cmd_complete(struct fatm_softc *sc, struct cmdqueue *q)
2160 H_SYNCSTAT_POSTREAD(sc, q->q.statp);
2161 if (H_GETSTAT(q->q.statp) & FATM_STAT_ERROR) {
2162 sc->istats.get_stat_errors++;
2172 fatm_open_finish(struct fatm_softc *sc, struct card_vcc *vc)
2174 vc->vflags &= ~FATM_VCC_TRY_OPEN;
2175 vc->vflags |= FATM_VCC_OPEN;
2177 if (vc->vflags & FATM_VCC_REOPEN) {
2178 vc->vflags &= ~FATM_VCC_REOPEN;
2182 /* inform management if this is not an NG
2183 * VCC or it's an NG PVC. */
2184 if (!(vc->param.flags & ATMIO_FLAG_NG) ||
2185 (vc->param.flags & ATMIO_FLAG_PVC))
2186 ATMEV_SEND_VCC_CHANGED(IFP2IFATM(sc->ifp), 0, vc->param.vci, 1);
2190 * The VC that we have tried to open asynchronuosly has been opened.
2193 fatm_open_complete(struct fatm_softc *sc, struct cmdqueue *q)
2196 struct card_vcc *vc;
2198 vci = GETVCI(READ4(sc, q->q.card + FATMOC_ACTIN_VPVC));
2200 H_SYNCSTAT_POSTREAD(sc, q->q.statp);
2201 if (H_GETSTAT(q->q.statp) & FATM_STAT_ERROR) {
2202 sc->istats.get_stat_errors++;
2203 sc->vccs[vci] = NULL;
2204 uma_zfree(sc->vcc_zone, vc);
2205 if_printf(sc->ifp, "opening VCI %u failed\n", vci);
2208 fatm_open_finish(sc, vc);
2212 * Wait on the queue entry until the VCC is opened/closed.
2215 fatm_waitvcc(struct fatm_softc *sc, struct cmdqueue *q)
2220 * Wait for the command to complete
2222 error = msleep(q, &sc->mtx, PZERO | PCATCH, "fatm_vci", hz);
2230 * Start to open a VCC. This just initiates the operation.
2233 fatm_open_vcc(struct fatm_softc *sc, struct atmio_openvcc *op)
2236 struct card_vcc *vc;
2241 if ((op->param.flags & ATMIO_FLAG_NOTX) &&
2242 (op->param.flags & ATMIO_FLAG_NORX))
2245 if (!VC_OK(sc, op->param.vpi, op->param.vci))
2247 if (op->param.aal != ATMIO_AAL_0 && op->param.aal != ATMIO_AAL_5)
2250 vc = uma_zalloc(sc->vcc_zone, M_NOWAIT | M_ZERO);
2257 if (!(sc->ifp->if_drv_flags & IFF_DRV_RUNNING)) {
2261 if (sc->vccs[op->param.vci] != NULL) {
2265 vc->param = op->param;
2266 vc->rxhand = op->rxhand;
2268 switch (op->param.traffic) {
2270 case ATMIO_TRAFFIC_UBR:
2273 case ATMIO_TRAFFIC_CBR:
2274 if (op->param.tparam.pcr == 0 ||
2275 op->param.tparam.pcr > IFP2IFATM(sc->ifp)->mib.pcr) {
2285 vc->ibytes = vc->obytes = 0;
2286 vc->ipackets = vc->opackets = 0;
2288 vc->vflags = FATM_VCC_TRY_OPEN;
2289 sc->vccs[op->param.vci] = vc;
2292 error = fatm_load_vc(sc, vc);
2294 sc->vccs[op->param.vci] = NULL;
2299 /* don't free below */
2305 uma_zfree(sc->vcc_zone, vc);
2310 * Try to initialize the given VC
2313 fatm_load_vc(struct fatm_softc *sc, struct card_vcc *vc)
2319 /* Command and buffer strategy */
2320 cmd = FATM_OP_ACTIVATE_VCIN | FATM_OP_INTERRUPT_SEL | (0 << 16);
2321 if (vc->param.aal == ATMIO_AAL_0)
2326 q = fatm_start_vcc(sc, vc->param.vpi, vc->param.vci, cmd, 1,
2327 (vc->param.flags & ATMIO_FLAG_ASYNC) ?
2328 fatm_open_complete : fatm_cmd_complete);
2332 if (!(vc->param.flags & ATMIO_FLAG_ASYNC)) {
2333 error = fatm_waitvcc(sc, q);
2336 fatm_open_finish(sc, vc);
2345 fatm_close_finish(struct fatm_softc *sc, struct card_vcc *vc)
2347 /* inform management of this is not an NG
2348 * VCC or it's an NG PVC. */
2349 if (!(vc->param.flags & ATMIO_FLAG_NG) ||
2350 (vc->param.flags & ATMIO_FLAG_PVC))
2351 ATMEV_SEND_VCC_CHANGED(IFP2IFATM(sc->ifp), 0, vc->param.vci, 0);
2353 sc->vccs[vc->param.vci] = NULL;
2356 uma_zfree(sc->vcc_zone, vc);
2360 * The VC has been closed.
2363 fatm_close_complete(struct fatm_softc *sc, struct cmdqueue *q)
2366 struct card_vcc *vc;
2368 vci = GETVCI(READ4(sc, q->q.card + FATMOC_ACTIN_VPVC));
2370 H_SYNCSTAT_POSTREAD(sc, q->q.statp);
2371 if (H_GETSTAT(q->q.statp) & FATM_STAT_ERROR) {
2372 sc->istats.get_stat_errors++;
2373 /* keep the VCC in that state */
2374 if_printf(sc->ifp, "closing VCI %u failed\n", vci);
2378 fatm_close_finish(sc, vc);
2382 * Initiate closing a VCC
2385 fatm_close_vcc(struct fatm_softc *sc, struct atmio_closevcc *cl)
2389 struct card_vcc *vc;
2391 if (!VC_OK(sc, cl->vpi, cl->vci))
2397 if (!(sc->ifp->if_drv_flags & IFF_DRV_RUNNING)) {
2401 vc = sc->vccs[cl->vci];
2402 if (vc == NULL || !(vc->vflags & (FATM_VCC_OPEN | FATM_VCC_TRY_OPEN))) {
2407 q = fatm_start_vcc(sc, cl->vpi, cl->vci,
2408 FATM_OP_DEACTIVATE_VCIN | FATM_OP_INTERRUPT_SEL, 1,
2409 (vc->param.flags & ATMIO_FLAG_ASYNC) ?
2410 fatm_close_complete : fatm_cmd_complete);
2416 vc->vflags &= ~(FATM_VCC_OPEN | FATM_VCC_TRY_OPEN);
2417 vc->vflags |= FATM_VCC_TRY_CLOSE;
2419 if (!(vc->param.flags & ATMIO_FLAG_ASYNC)) {
2420 error = fatm_waitvcc(sc, q);
2424 fatm_close_finish(sc, vc);
2436 fatm_ioctl(struct ifnet *ifp, u_long cmd, caddr_t arg)
2439 struct fatm_softc *sc = ifp->if_softc;
2440 struct ifaddr *ifa = (struct ifaddr *)arg;
2441 struct ifreq *ifr = (struct ifreq *)arg;
2442 struct atmio_closevcc *cl = (struct atmio_closevcc *)arg;
2443 struct atmio_openvcc *op = (struct atmio_openvcc *)arg;
2444 struct atmio_vcctable *vtab;
2449 case SIOCATMOPENVCC: /* kernel internal use */
2450 error = fatm_open_vcc(sc, op);
2453 case SIOCATMCLOSEVCC: /* kernel internal use */
2454 error = fatm_close_vcc(sc, cl);
2459 ifp->if_flags |= IFF_UP;
2460 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING))
2461 fatm_init_locked(sc);
2462 switch (ifa->ifa_addr->sa_family) {
2466 ifa->ifa_rtrequest = atm_rtrequest;
2477 if (ifp->if_flags & IFF_UP) {
2478 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) {
2479 fatm_init_locked(sc);
2482 if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
2491 if (ifp->if_drv_flags & IFF_DRV_RUNNING)
2492 error = ifmedia_ioctl(ifp, ifr, &sc->media, cmd);
2498 /* return vcc table */
2499 vtab = atm_getvccs((struct atmio_vcc **)sc->vccs,
2500 FORE_MAX_VCC + 1, sc->open_vccs, &sc->mtx, 1);
2501 error = copyout(vtab, ifr->ifr_data, sizeof(*vtab) +
2502 vtab->count * sizeof(vtab->vccs[0]));
2503 free(vtab, M_DEVBUF);
2506 case SIOCATMGETVCCS: /* internal netgraph use */
2507 vtab = atm_getvccs((struct atmio_vcc **)sc->vccs,
2508 FORE_MAX_VCC + 1, sc->open_vccs, &sc->mtx, 0);
2513 *(void **)arg = vtab;
2517 DBG(sc, IOCTL, ("+++ cmd=%08lx arg=%p", cmd, arg));
2526 * Detach from the interface and free all resources allocated during
2527 * initialisation and later.
2530 fatm_detach(device_t dev)
2534 struct fatm_softc *sc;
2537 sc = device_get_softc(dev);
2539 if (device_is_alive(dev)) {
2542 utopia_detach(&sc->utopia);
2544 atm_ifdetach(sc->ifp); /* XXX race */
2548 bus_teardown_intr(dev, sc->irqres, sc->ih);
2550 while ((rb = LIST_FIRST(&sc->rbuf_used)) != NULL) {
2551 if_printf(sc->ifp, "rbuf %p still in use!\n", rb);
2552 bus_dmamap_unload(sc->rbuf_tag, rb->map);
2554 LIST_REMOVE(rb, link);
2555 LIST_INSERT_HEAD(&sc->rbuf_free, rb, link);
2558 if (sc->txqueue.chunk != NULL) {
2559 for (i = 0; i < FATM_TX_QLEN; i++) {
2560 tx = GET_QUEUE(sc->txqueue, struct txqueue, i);
2561 bus_dmamap_destroy(sc->tx_tag, tx->map);
2565 while ((rb = LIST_FIRST(&sc->rbuf_free)) != NULL) {
2566 bus_dmamap_destroy(sc->rbuf_tag, rb->map);
2567 LIST_REMOVE(rb, link);
2570 if (sc->rbufs != NULL)
2571 free(sc->rbufs, M_DEVBUF);
2572 if (sc->vccs != NULL) {
2573 for (i = 0; i < FORE_MAX_VCC + 1; i++)
2574 if (sc->vccs[i] != NULL) {
2575 uma_zfree(sc->vcc_zone, sc->vccs[i]);
2578 free(sc->vccs, M_DEVBUF);
2580 if (sc->vcc_zone != NULL)
2581 uma_zdestroy(sc->vcc_zone);
2583 if (sc->l1queue.chunk != NULL)
2584 free(sc->l1queue.chunk, M_DEVBUF);
2585 if (sc->s1queue.chunk != NULL)
2586 free(sc->s1queue.chunk, M_DEVBUF);
2587 if (sc->rxqueue.chunk != NULL)
2588 free(sc->rxqueue.chunk, M_DEVBUF);
2589 if (sc->txqueue.chunk != NULL)
2590 free(sc->txqueue.chunk, M_DEVBUF);
2591 if (sc->cmdqueue.chunk != NULL)
2592 free(sc->cmdqueue.chunk, M_DEVBUF);
2594 destroy_dma_memory(&sc->reg_mem);
2595 destroy_dma_memory(&sc->sadi_mem);
2596 destroy_dma_memory(&sc->prom_mem);
2597 #ifdef TEST_DMA_SYNC
2598 destroy_dma_memoryX(&sc->s1q_mem);
2599 destroy_dma_memoryX(&sc->l1q_mem);
2600 destroy_dma_memoryX(&sc->rxq_mem);
2601 destroy_dma_memoryX(&sc->txq_mem);
2602 destroy_dma_memoryX(&sc->stat_mem);
2605 if (sc->tx_tag != NULL)
2606 if (bus_dma_tag_destroy(sc->tx_tag))
2607 printf("tx DMA tag busy!\n");
2609 if (sc->rbuf_tag != NULL)
2610 if (bus_dma_tag_destroy(sc->rbuf_tag))
2611 printf("rbuf DMA tag busy!\n");
2613 if (sc->parent_dmat != NULL)
2614 if (bus_dma_tag_destroy(sc->parent_dmat))
2615 printf("parent DMA tag busy!\n");
2617 if (sc->irqres != NULL)
2618 bus_release_resource(dev, SYS_RES_IRQ, sc->irqid, sc->irqres);
2620 if (sc->memres != NULL)
2621 bus_release_resource(dev, SYS_RES_MEMORY,
2622 sc->memid, sc->memres);
2624 (void)sysctl_ctx_free(&sc->sysctl_ctx);
2626 cv_destroy(&sc->cv_stat);
2627 cv_destroy(&sc->cv_regs);
2629 mtx_destroy(&sc->mtx);
2640 fatm_sysctl_istats(SYSCTL_HANDLER_ARGS)
2642 struct fatm_softc *sc = arg1;
2646 ret = malloc(sizeof(sc->istats), M_TEMP, M_WAITOK);
2649 bcopy(&sc->istats, ret, sizeof(sc->istats));
2652 error = SYSCTL_OUT(req, ret, sizeof(sc->istats));
2659 * Sysctl handler for card statistics
2660 * This is disable because it destroys the PHY statistics.
2663 fatm_sysctl_stats(SYSCTL_HANDLER_ARGS)
2665 struct fatm_softc *sc = arg1;
2667 const struct fatm_stats *s;
2671 ret = malloc(sizeof(u_long) * FATM_NSTATS, M_TEMP, M_WAITOK);
2675 if ((error = fatm_getstat(sc)) == 0) {
2676 s = sc->sadi_mem.mem;
2678 ret[i++] = s->phy_4b5b.crc_header_errors;
2679 ret[i++] = s->phy_4b5b.framing_errors;
2680 ret[i++] = s->phy_oc3.section_bip8_errors;
2681 ret[i++] = s->phy_oc3.path_bip8_errors;
2682 ret[i++] = s->phy_oc3.line_bip24_errors;
2683 ret[i++] = s->phy_oc3.line_febe_errors;
2684 ret[i++] = s->phy_oc3.path_febe_errors;
2685 ret[i++] = s->phy_oc3.corr_hcs_errors;
2686 ret[i++] = s->phy_oc3.ucorr_hcs_errors;
2687 ret[i++] = s->atm.cells_transmitted;
2688 ret[i++] = s->atm.cells_received;
2689 ret[i++] = s->atm.vpi_bad_range;
2690 ret[i++] = s->atm.vpi_no_conn;
2691 ret[i++] = s->atm.vci_bad_range;
2692 ret[i++] = s->atm.vci_no_conn;
2693 ret[i++] = s->aal0.cells_transmitted;
2694 ret[i++] = s->aal0.cells_received;
2695 ret[i++] = s->aal0.cells_dropped;
2696 ret[i++] = s->aal4.cells_transmitted;
2697 ret[i++] = s->aal4.cells_received;
2698 ret[i++] = s->aal4.cells_crc_errors;
2699 ret[i++] = s->aal4.cels_protocol_errors;
2700 ret[i++] = s->aal4.cells_dropped;
2701 ret[i++] = s->aal4.cspdus_transmitted;
2702 ret[i++] = s->aal4.cspdus_received;
2703 ret[i++] = s->aal4.cspdus_protocol_errors;
2704 ret[i++] = s->aal4.cspdus_dropped;
2705 ret[i++] = s->aal5.cells_transmitted;
2706 ret[i++] = s->aal5.cells_received;
2707 ret[i++] = s->aal5.congestion_experienced;
2708 ret[i++] = s->aal5.cells_dropped;
2709 ret[i++] = s->aal5.cspdus_transmitted;
2710 ret[i++] = s->aal5.cspdus_received;
2711 ret[i++] = s->aal5.cspdus_crc_errors;
2712 ret[i++] = s->aal5.cspdus_protocol_errors;
2713 ret[i++] = s->aal5.cspdus_dropped;
2714 ret[i++] = s->aux.small_b1_failed;
2715 ret[i++] = s->aux.large_b1_failed;
2716 ret[i++] = s->aux.small_b2_failed;
2717 ret[i++] = s->aux.large_b2_failed;
2718 ret[i++] = s->aux.rpd_alloc_failed;
2719 ret[i++] = s->aux.receive_carrier;
2721 /* declare the buffer free */
2722 sc->flags &= ~FATM_STAT_INUSE;
2723 cv_signal(&sc->cv_stat);
2728 error = SYSCTL_OUT(req, ret, sizeof(u_long) * FATM_NSTATS);
2734 #define MAXDMASEGS 32 /* maximum number of receive descriptors */
2737 * Attach to the device.
2739 * We assume, that there is a global lock (Giant in this case) that protects
2740 * multiple threads from entering this function. This makes sense, doesn't it?
2743 fatm_attach(device_t dev)
2746 struct fatm_softc *sc;
2754 sc = device_get_softc(dev);
2755 unit = device_get_unit(dev);
2757 ifp = sc->ifp = if_alloc(IFT_ATM);
2763 IFP2IFATM(sc->ifp)->mib.device = ATM_DEVICE_PCA200E;
2764 IFP2IFATM(sc->ifp)->mib.serial = 0;
2765 IFP2IFATM(sc->ifp)->mib.hw_version = 0;
2766 IFP2IFATM(sc->ifp)->mib.sw_version = 0;
2767 IFP2IFATM(sc->ifp)->mib.vpi_bits = 0;
2768 IFP2IFATM(sc->ifp)->mib.vci_bits = FORE_VCIBITS;
2769 IFP2IFATM(sc->ifp)->mib.max_vpcs = 0;
2770 IFP2IFATM(sc->ifp)->mib.max_vccs = FORE_MAX_VCC;
2771 IFP2IFATM(sc->ifp)->mib.media = IFM_ATM_UNKNOWN;
2772 IFP2IFATM(sc->ifp)->phy = &sc->utopia;
2774 LIST_INIT(&sc->rbuf_free);
2775 LIST_INIT(&sc->rbuf_used);
2778 * Initialize mutex and condition variables.
2780 mtx_init(&sc->mtx, device_get_nameunit(dev),
2781 MTX_NETWORK_LOCK, MTX_DEF);
2783 cv_init(&sc->cv_stat, "fatm_stat");
2784 cv_init(&sc->cv_regs, "fatm_regs");
2786 sysctl_ctx_init(&sc->sysctl_ctx);
2789 * Make the sysctl tree
2791 if ((sc->sysctl_tree = SYSCTL_ADD_NODE(&sc->sysctl_ctx,
2792 SYSCTL_STATIC_CHILDREN(_hw_atm), OID_AUTO,
2793 device_get_nameunit(dev), CTLFLAG_RD, 0, "")) == NULL)
2796 if (SYSCTL_ADD_PROC(&sc->sysctl_ctx, SYSCTL_CHILDREN(sc->sysctl_tree),
2797 OID_AUTO, "istats", CTLFLAG_RD, sc, 0, fatm_sysctl_istats,
2798 "LU", "internal statistics") == NULL)
2801 if (SYSCTL_ADD_PROC(&sc->sysctl_ctx, SYSCTL_CHILDREN(sc->sysctl_tree),
2802 OID_AUTO, "stats", CTLFLAG_RD, sc, 0, fatm_sysctl_stats,
2803 "LU", "card statistics") == NULL)
2806 if (SYSCTL_ADD_INT(&sc->sysctl_ctx, SYSCTL_CHILDREN(sc->sysctl_tree),
2807 OID_AUTO, "retry_tx", CTLFLAG_RW, &sc->retry_tx, 0,
2808 "retry flag") == NULL)
2812 if (SYSCTL_ADD_UINT(&sc->sysctl_ctx, SYSCTL_CHILDREN(sc->sysctl_tree),
2813 OID_AUTO, "debug", CTLFLAG_RW, &sc->debug, 0, "debug flags")
2816 sc->debug = FATM_DEBUG;
2820 * Network subsystem stuff
2823 if_initname(ifp, device_get_name(dev), device_get_unit(dev));
2824 ifp->if_flags = IFF_SIMPLEX;
2825 ifp->if_ioctl = fatm_ioctl;
2826 ifp->if_start = fatm_start;
2827 ifp->if_watchdog = fatm_watchdog;
2828 ifp->if_init = fatm_init;
2829 ifp->if_linkmib = &IFP2IFATM(sc->ifp)->mib;
2830 ifp->if_linkmiblen = sizeof(IFP2IFATM(sc->ifp)->mib);
2833 * Enable memory and bustmaster
2835 cfg = pci_read_config(dev, PCIR_COMMAND, 2);
2836 cfg |= PCIM_CMD_MEMEN | PCIM_CMD_BUSMASTEREN;
2837 pci_write_config(dev, PCIR_COMMAND, cfg, 2);
2842 cfg = pci_read_config(dev, PCIR_COMMAND, 2);
2843 if (!(cfg & PCIM_CMD_MEMEN)) {
2844 if_printf(ifp, "failed to enable memory mapping\n");
2849 sc->memres = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->memid,
2851 if (sc->memres == NULL) {
2852 if_printf(ifp, "could not map memory\n");
2856 sc->memh = rman_get_bushandle(sc->memres);
2857 sc->memt = rman_get_bustag(sc->memres);
2860 * Convert endianess of slave access
2862 cfg = pci_read_config(dev, FATM_PCIR_MCTL, 1);
2863 cfg |= FATM_PCIM_SWAB;
2864 pci_write_config(dev, FATM_PCIR_MCTL, cfg, 1);
2867 * Allocate interrupt (activate at the end)
2870 sc->irqres = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->irqid,
2871 RF_SHAREABLE | RF_ACTIVE);
2872 if (sc->irqres == NULL) {
2873 if_printf(ifp, "could not allocate irq\n");
2879 * Allocate the parent DMA tag. This is used simply to hold overall
2880 * restrictions for the controller (and PCI bus) and is never used
2883 if (bus_dma_tag_create(bus_get_dma_tag(dev), 1, 0,
2884 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR,
2885 NULL, NULL, BUS_SPACE_MAXSIZE_32BIT, MAXDMASEGS,
2886 BUS_SPACE_MAXSIZE_32BIT, 0, NULL, NULL,
2887 &sc->parent_dmat)) {
2888 if_printf(ifp, "could not allocate parent DMA tag\n");
2894 * Allocate the receive buffer DMA tag. This tag must map a maximum of
2897 if (bus_dma_tag_create(sc->parent_dmat, 1, 0,
2898 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR,
2899 NULL, NULL, MCLBYTES, 1, MCLBYTES, 0,
2900 NULL, NULL, &sc->rbuf_tag)) {
2901 if_printf(ifp, "could not allocate rbuf DMA tag\n");
2907 * Allocate the transmission DMA tag. Must add 1, because
2908 * rounded up PDU will be 65536 bytes long.
2910 if (bus_dma_tag_create(sc->parent_dmat, 1, 0,
2911 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR,
2913 FATM_MAXPDU + 1, TPD_EXTENSIONS + TXD_FIXED, MCLBYTES, 0,
2914 NULL, NULL, &sc->tx_tag)) {
2915 if_printf(ifp, "could not allocate tx DMA tag\n");
2921 * Allocate DMAable memory.
2923 sc->stat_mem.size = sizeof(uint32_t) * (FATM_CMD_QLEN + FATM_TX_QLEN
2924 + FATM_RX_QLEN + SMALL_SUPPLY_QLEN + LARGE_SUPPLY_QLEN);
2925 sc->stat_mem.align = 4;
2927 sc->txq_mem.size = FATM_TX_QLEN * TPD_SIZE;
2928 sc->txq_mem.align = 32;
2930 sc->rxq_mem.size = FATM_RX_QLEN * RPD_SIZE;
2931 sc->rxq_mem.align = 32;
2933 sc->s1q_mem.size = SMALL_SUPPLY_QLEN *
2934 BSUP_BLK2SIZE(SMALL_SUPPLY_BLKSIZE);
2935 sc->s1q_mem.align = 32;
2937 sc->l1q_mem.size = LARGE_SUPPLY_QLEN *
2938 BSUP_BLK2SIZE(LARGE_SUPPLY_BLKSIZE);
2939 sc->l1q_mem.align = 32;
2941 #ifdef TEST_DMA_SYNC
2942 if ((error = alloc_dma_memoryX(sc, "STATUS", &sc->stat_mem)) != 0 ||
2943 (error = alloc_dma_memoryX(sc, "TXQ", &sc->txq_mem)) != 0 ||
2944 (error = alloc_dma_memoryX(sc, "RXQ", &sc->rxq_mem)) != 0 ||
2945 (error = alloc_dma_memoryX(sc, "S1Q", &sc->s1q_mem)) != 0 ||
2946 (error = alloc_dma_memoryX(sc, "L1Q", &sc->l1q_mem)) != 0)
2949 if ((error = alloc_dma_memory(sc, "STATUS", &sc->stat_mem)) != 0 ||
2950 (error = alloc_dma_memory(sc, "TXQ", &sc->txq_mem)) != 0 ||
2951 (error = alloc_dma_memory(sc, "RXQ", &sc->rxq_mem)) != 0 ||
2952 (error = alloc_dma_memory(sc, "S1Q", &sc->s1q_mem)) != 0 ||
2953 (error = alloc_dma_memory(sc, "L1Q", &sc->l1q_mem)) != 0)
2957 sc->prom_mem.size = sizeof(struct prom);
2958 sc->prom_mem.align = 32;
2959 if ((error = alloc_dma_memory(sc, "PROM", &sc->prom_mem)) != 0)
2962 sc->sadi_mem.size = sizeof(struct fatm_stats);
2963 sc->sadi_mem.align = 32;
2964 if ((error = alloc_dma_memory(sc, "STATISTICS", &sc->sadi_mem)) != 0)
2967 sc->reg_mem.size = sizeof(uint32_t) * FATM_NREGS;
2968 sc->reg_mem.align = 32;
2969 if ((error = alloc_dma_memory(sc, "REGISTERS", &sc->reg_mem)) != 0)
2975 sc->cmdqueue.chunk = malloc(FATM_CMD_QLEN * sizeof(struct cmdqueue),
2976 M_DEVBUF, M_ZERO | M_WAITOK);
2977 sc->txqueue.chunk = malloc(FATM_TX_QLEN * sizeof(struct txqueue),
2978 M_DEVBUF, M_ZERO | M_WAITOK);
2979 sc->rxqueue.chunk = malloc(FATM_RX_QLEN * sizeof(struct rxqueue),
2980 M_DEVBUF, M_ZERO | M_WAITOK);
2981 sc->s1queue.chunk = malloc(SMALL_SUPPLY_QLEN * sizeof(struct supqueue),
2982 M_DEVBUF, M_ZERO | M_WAITOK);
2983 sc->l1queue.chunk = malloc(LARGE_SUPPLY_QLEN * sizeof(struct supqueue),
2984 M_DEVBUF, M_ZERO | M_WAITOK);
2986 sc->vccs = malloc((FORE_MAX_VCC + 1) * sizeof(sc->vccs[0]),
2987 M_DEVBUF, M_ZERO | M_WAITOK);
2988 sc->vcc_zone = uma_zcreate("FATM vccs", sizeof(struct card_vcc),
2989 NULL, NULL, NULL, NULL, UMA_ALIGN_PTR, 0);
2990 if (sc->vcc_zone == NULL) {
2996 * Allocate memory for the receive buffer headers. The total number
2997 * of headers should probably also include the maximum number of
2998 * buffers on the receive queue.
3000 sc->rbuf_total = SMALL_POOL_SIZE + LARGE_POOL_SIZE;
3001 sc->rbufs = malloc(sc->rbuf_total * sizeof(struct rbuf),
3002 M_DEVBUF, M_ZERO | M_WAITOK);
3005 * Put all rbuf headers on the free list and create DMA maps.
3007 for (rb = sc->rbufs, i = 0; i < sc->rbuf_total; i++, rb++) {
3008 if ((error = bus_dmamap_create(sc->rbuf_tag, 0, &rb->map))) {
3009 if_printf(sc->ifp, "creating rx map: %d\n",
3013 LIST_INSERT_HEAD(&sc->rbuf_free, rb, link);
3017 * Create dma maps for transmission. In case of an error, free the
3018 * allocated DMA maps, because on some architectures maps are NULL
3019 * and we cannot distinguish between a failure and a NULL map in
3020 * the detach routine.
3022 for (i = 0; i < FATM_TX_QLEN; i++) {
3023 tx = GET_QUEUE(sc->txqueue, struct txqueue, i);
3024 if ((error = bus_dmamap_create(sc->tx_tag, 0, &tx->map))) {
3025 if_printf(sc->ifp, "creating tx map: %d\n",
3028 tx = GET_QUEUE(sc->txqueue, struct txqueue,
3030 bus_dmamap_destroy(sc->tx_tag, tx->map);
3037 utopia_attach(&sc->utopia, IFP2IFATM(sc->ifp), &sc->media, &sc->mtx,
3038 &sc->sysctl_ctx, SYSCTL_CHILDREN(sc->sysctl_tree),
3039 &fatm_utopia_methods);
3040 sc->utopia.flags |= UTP_FL_NORESET | UTP_FL_POLL_CARRIER;
3043 * Attach the interface
3046 ifp->if_snd.ifq_maxlen = 512;
3049 bpfattach(ifp, DLT_ATM_RFC1483, sizeof(struct atmllc));
3052 error = bus_setup_intr(dev, sc->irqres, INTR_TYPE_NET | INTR_MPSAFE,
3053 NULL, fatm_intr, sc, &sc->ih);
3055 if_printf(ifp, "couldn't setup irq\n");
3066 #if defined(FATM_DEBUG) && 0
3068 dump_s1_queue(struct fatm_softc *sc)
3073 for(i = 0; i < SMALL_SUPPLY_QLEN; i++) {
3074 q = GET_QUEUE(sc->s1queue, struct supqueue, i);
3075 printf("%2d: card=%x(%x,%x) stat=%x\n", i,
3077 READ4(sc, q->q.card),
3078 READ4(sc, q->q.card + 4),
3085 * Driver infrastructure.
3087 static device_method_t fatm_methods[] = {
3088 DEVMETHOD(device_probe, fatm_probe),
3089 DEVMETHOD(device_attach, fatm_attach),
3090 DEVMETHOD(device_detach, fatm_detach),
3093 static driver_t fatm_driver = {
3096 sizeof(struct fatm_softc),
3099 DRIVER_MODULE(fatm, pci, fatm_driver, fatm_devclass, 0, 0);