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1 /*-
2  * Copyright (C) 2000 David S. Miller (davem@redhat.com)
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a copy
5  * of this software and associated documentation files (the "Software"), to deal
6  * in the Software without restriction, including without limitation the rights
7  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
8  * copies of the Software, and to permit persons to whom the Software is
9  * furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * DAVID MILLER BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
18  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
19  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
20  *
21  *      from: XFree86: ffb_dac.h,v 1.1 2000/05/23 04:47:44 dawes Exp
22  */
23 /*-
24  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
25  *
26  * Copyright (c) 2003 Jake Burkholder.
27  * All rights reserved.
28  *
29  * Redistribution and use in source and binary forms, with or without
30  * modification, are permitted provided that the following conditions
31  * are met:
32  * 1. Redistributions of source code must retain the above copyright
33  *    notice, this list of conditions and the following disclaimer.
34  * 2. Redistributions in binary form must reproduce the above copyright
35  *    notice, this list of conditions and the following disclaimer in the
36  *    documentation and/or other materials provided with the distribution.
37  *
38  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
39  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
40  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
41  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
42  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
43  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
44  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
45  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
46  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
47  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
48  * SUCH DAMAGE.
49  *
50  * $FreeBSD$
51  */
52
53 #ifndef _DEV_FB_CREATORREG_H_
54 #define _DEV_FB_CREATORREG_H_
55
56 #define FFB_NREG                24
57
58 #define FFB_PROM                0
59 #define FFB_DAC                 1
60 #define FFB_FBC                 2
61 #define FFB_DFB8R               3
62 #define FFB_DFB8G               4
63 #define FFB_DFB8B               5
64 #define FFB_DFB8X               6
65 #define FFB_DFB24               7
66 #define FFB_DFB32               8
67 #define FFB_SFB8R               9
68 #define FFB_SFB8G               10
69 #define FFB_SFB8B               11
70 #define FFB_SFB8X               12
71 #define FFB_SFB32               13
72 #define FFB_SFB64               14
73 #define FFB_DFB422A             15
74
75 #define FFB_DAC_TYPE            0x0
76 #define FFB_DAC_VALUE           0x4
77 #define FFB_DAC_TYPE2           0x8
78 #define FFB_DAC_VALUE2          0xc
79
80 /* FFB_DAC_TYPE configuration and palette register addresses */
81 #define FFB_DAC_CFG_UCTRL       0x1001          /* User Control */
82 #define FFB_DAC_CFG_TGEN        0x6000          /* Timing Generator Control */
83 #define FFB_DAC_CFG_DID         0x8000          /* Device Identification */
84
85 /* FFB_DAC_CFG_UCTRL register */
86 #define FFB_DAC_UCTRL_IPDISAB   0x0001          /* Input Pullup Resistor Dis. */
87 #define FFB_DAC_UCTRL_ABLANK    0x0002          /* Asynchronous Blank */
88 #define FFB_DAC_UCTRL_DBENAB    0x0004          /* Double-Buffer Enable */
89 #define FFB_DAC_UCTRL_OVENAB    0x0008          /* Overlay Enable */
90 #define FFB_DAC_UCTRL_WMODE     0x0030          /* Window Mode */
91 #define FFB_DAC_UCTRL_WM_COMB   0x0000          /* Window Mode Combined */
92 #define FFB_DAC_UCTRL_WM_S4     0x0010          /* Window Mode Separate 4 */
93 #define FFB_DAC_UCTRL_WM_S8     0x0020          /* Window Mode Separate 8 */
94 #define FFB_DAC_UCTRL_WM_RESV   0x0030          /* Window Mode Reserved */
95 #define FFB_DAC_UCTRL_MANREV    0x0f00          /* Manufacturing Revision */
96
97 /* FFB_DAC_CFG_TGEN register */
98 #define FFB_DAC_CFG_TGEN_VIDE   0x01            /* Video Enable */
99 #define FFB_DAC_CFG_TGEN_TGE    0x02            /* Timing Generator Enable */
100 #define FFB_DAC_CFG_TGEN_HSD    0x04            /* HSYNC* Disable */
101 #define FFB_DAC_CFG_TGEN_VSD    0x08            /* VSYNC* Disable */
102 #define FFB_DAC_CFG_TGEN_EQD    0x10            /* Equalization Disable */
103 #define FFB_DAC_CFG_TGEN_MM     0x20            /* 0 = Slave, 1 = Master */
104 #define FFB_DAC_CFG_TGEN_IM     0x40            /* 1 = Interlaced Mode */
105
106 /* FFB_DAC_CFG_DID register */
107 #define FFB_DAC_CFG_DID_ONE     0x00000001      /* Always Set */
108 #define FFB_DAC_CFG_DID_MANUF   0x00000ffe      /* DAC Manufacturer ID */
109 #define FFB_DAC_CFG_DID_PNUM    0x0ffff000      /* DAC Part Number */
110 #define FFB_DAC_CFG_DID_REV     0xf0000000      /* DAC Revision */
111
112 /* FFB_DAC_TYPE2 cursor register addresses */
113 #define FFB_DAC_CUR_BITMAP_P0   0x0             /* Plane 0 Cursor Bitmap */
114 #define FFB_DAC_CUR_BITMAP_P1   0x80            /* Plane 1 Cursor Bitmap */
115 #define FFB_DAC_CUR_CTRL        0x100           /* Cursor Control */
116 #define FFB_DAC_CUR_COLOR0      0x101           /* Cursor Color 0 */
117 #define FFB_DAC_CUR_COLOR1      0x102           /* Cursor Color 1 (bg) */
118 #define FFB_DAC_CUR_COLOR2      0x103           /* Cursor Color 2 (fg) */
119 #define FFB_DAC_CUR_POS         0x104           /* Active Cursor Position */
120
121 /* FFB_DAC_CUR_CTRL register (might be inverted on PAC1 DACs) */
122 #define FFB_DAC_CUR_CTRL_P0     0x1             /* Plane0 Display Disable */
123 #define FFB_DAC_CUR_CTRL_P1     0x2             /* Plane1 Display Disable */
124
125 #define FFB_FBC_BY              0x60
126 #define FFB_FBC_BX              0x64
127 #define FFB_FBC_DY              0x68
128 #define FFB_FBC_DX              0x6c
129 #define FFB_FBC_BH              0x70
130 #define FFB_FBC_BW              0x74
131 #define FFB_FBC_PPC             0x200           /* Pixel Processor Control */
132 #define FFB_FBC_FG              0x208           /* Foreground */
133 #define FFB_FBC_BG              0x20c           /* Background */
134 #define FFB_FBC_FBC             0x254           /* Frame Buffer Control */
135 #define FFB_FBC_ROP             0x258           /* Raster Operation */
136 #define FFB_FBC_PMASK           0x290           /* Pixel Mask */
137 #define FFB_FBC_DRAWOP          0x300           /* Draw Operation */
138 #define FFB_FBC_FONTXY          0x314           /* Font X/Y */
139 #define FFB_FBC_FONTW           0x318           /* Font Width */
140 #define FFB_FBC_FONTINC         0x31c           /* Font Increment */
141 #define FFB_FBC_FONT            0x320           /* Font Data */
142 #define FFB_FBC_UCSR            0x900           /* User Control & Status */
143
144 #define FBC_PPC_VCE_DIS         0x00001000
145 #define FBC_PPC_APE_DIS         0x00000800
146 #define FBC_PPC_TBE_OPAQUE      0x00000200
147 #define FBC_PPC_CS_CONST        0x00000003
148
149 #define FFB_FBC_WB_A            0x20000000
150 #define FFB_FBC_RB_A            0x00004000
151 #define FFB_FBC_SB_BOTH         0x00003000
152 #define FFB_FBC_XE_OFF          0x00000040
153 #define FFB_FBC_RGBE_MASK       0x0000003f
154
155 #define FBC_ROP_NEW             0x83
156
157 #define FBC_DRAWOP_RECTANGLE    0x08
158
159 #define FBC_UCSR_FIFO_OVFL      0x80000000
160 #define FBC_UCSR_READ_ERR       0x40000000
161 #define FBC_UCSR_RP_BUSY        0x02000000
162 #define FBC_UCSR_FB_BUSY        0x01000000
163 #define FBC_UCSR_FIFO_MASK      0x00000fff
164
165 #define FFB_VIRT_SFB8R          0x00000000
166 #define FFB_VIRT_SFB8G          0x00400000
167 #define FFB_VIRT_SFB8B          0x00800000
168 #define FFB_VIRT_SFB8X          0x00c00000
169 #define FFB_VIRT_SFB32          0x01000000
170 #define FFB_VIRT_SFB64          0x02000000
171 #define FFB_VIRT_FBC            0x04000000
172 #define FFB_VIRT_FBC_BM         0x04002000
173 #define FFB_VIRT_DFB8R          0x04004000
174 #define FFB_VIRT_DFB8G          0x04404000
175 #define FFB_VIRT_DFB8B          0x04804000
176 #define FFB_VIRT_DFB8X          0x04c04000
177 #define FFB_VIRT_DFB24          0x05004000
178 #define FFB_VIRT_DFB32          0x06004000
179 #define FFB_VIRT_DFB422A        0x07004000
180 #define FFB_VIRT_DFB422AD       0x07804000
181 #define FFB_VIRT_DFB24B         0x08004000
182 #define FFB_VIRT_DFB422B        0x09004000
183 #define FFB_VIRT_DFB422BD       0x09804000
184 #define FFB_VIRT_SFB16Z         0x0a004000
185 #define FFB_VIRT_SFB8Z          0x0a404000
186 #define FFB_VIRT_SFB422         0x0ac04000
187 #define FFB_VIRT_SFB422D        0x0b404000
188 #define FFB_VIRT_FBC_KREG       0x0bc04000
189 #define FFB_VIRT_DAC            0x0bc06000
190 #define FFB_VIRT_PROM           0x0bc08000
191 #define FFB_VIRT_EXP            0x0bc18000
192
193 #define FFB_PHYS_SFB8R          0x04000000
194 #define FFB_PHYS_SFB8G          0x04400000
195 #define FFB_PHYS_SFB8B          0x04800000
196 #define FFB_PHYS_SFB8X          0x04c00000
197 #define FFB_PHYS_SFB32          0x05000000
198 #define FFB_PHYS_SFB64          0x06000000
199 #define FFB_PHYS_FBC            0x00600000
200 #define FFB_PHYS_FBC_BM         0x00600000
201 #define FFB_PHYS_DFB8R          0x01000000
202 #define FFB_PHYS_DFB8G          0x01400000
203 #define FFB_PHYS_DFB8B          0x01800000
204 #define FFB_PHYS_DFB8X          0x01c00000
205 #define FFB_PHYS_DFB24          0x02000000
206 #define FFB_PHYS_DFB32          0x03000000
207 #define FFB_PHYS_DFB422A        0x09000000
208 #define FFB_PHYS_DFB422AD       0x09800000
209 #define FFB_PHYS_DFB24B         0x0a000000
210 #define FFB_PHYS_DFB422B        0x0b000000
211 #define FFB_PHYS_DFB422BD       0x0b800000
212 #define FFB_PHYS_SFB16Z         0x0c800000
213 #define FFB_PHYS_SFB8Z          0x0c000000
214 #define FFB_PHYS_SFB422         0x0d000000
215 #define FFB_PHYS_SFB422D        0x0d800000
216 #define FFB_PHYS_FBC_KREG       0x00610000
217 #define FFB_PHYS_DAC            0x00400000
218 #define FFB_PHYS_PROM           0x00000000
219 #define FFB_PHYS_EXP            0x00200000
220
221 #define FFB_SIZE_SFB8R          0x00400000
222 #define FFB_SIZE_SFB8G          0x00400000
223 #define FFB_SIZE_SFB8B          0x00400000
224 #define FFB_SIZE_SFB8X          0x00400000
225 #define FFB_SIZE_SFB32          0x01000000
226 #define FFB_SIZE_SFB64          0x02000000
227 #define FFB_SIZE_FBC            0x00002000
228 #define FFB_SIZE_FBC_BM         0x00002000
229 #define FFB_SIZE_DFB8R          0x00400000
230 #define FFB_SIZE_DFB8G          0x00400000
231 #define FFB_SIZE_DFB8B          0x00400000
232 #define FFB_SIZE_DFB8X          0x00400000
233 #define FFB_SIZE_DFB24          0x01000000
234 #define FFB_SIZE_DFB32          0x01000000
235 #define FFB_SIZE_DFB422A        0x00800000
236 #define FFB_SIZE_DFB422AD       0x00800000
237 #define FFB_SIZE_DFB24B         0x01000000
238 #define FFB_SIZE_DFB422B        0x00800000
239 #define FFB_SIZE_DFB422BD       0x00800000
240 #define FFB_SIZE_SFB16Z         0x00800000
241 #define FFB_SIZE_SFB8Z          0x00800000
242 #define FFB_SIZE_SFB422         0x00800000
243 #define FFB_SIZE_SFB422D        0x00800000
244 #define FFB_SIZE_FBC_KREG       0x00002000
245 #define FFB_SIZE_DAC            0x00002000
246 #define FFB_SIZE_PROM           0x00010000
247 #define FFB_SIZE_EXP            0x00002000
248
249 #endif /* !_DEV_FB_CREATORREG_H_ */