sys/dev/fb/creatorreg.h

   1 /*-
   2  * Copyright (C) 2000 David S. Miller (davem@redhat.com)
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a copy
   5  * of this software and associated documentation files (the "Software"), to deal
   6  * in the Software without restriction, including without limitation the rights
   7  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
   8  * copies of the Software, and to permit persons to whom the Software is
   9  * furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * DAVID MILLER BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
  18  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  19  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  20  *
  21  *      from: XFree86: ffb_dac.h,v 1.1 2000/05/23 04:47:44 dawes Exp
  22  */
  23 /*-
  24  * Copyright (c) 2003 Jake Burkholder.
  25  * All rights reserved.
  26  *
  27  * Redistribution and use in source and binary forms, with or without
  28  * modification, are permitted provided that the following conditions
  29  * are met:
  30  * 1. Redistributions of source code must retain the above copyright
  31  *    notice, this list of conditions and the following disclaimer.
  32  * 2. Redistributions in binary form must reproduce the above copyright
  33  *    notice, this list of conditions and the following disclaimer in the
  34  *    documentation and/or other materials provided with the distribution.
  35  *
  36  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  37  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  38  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  39  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  40  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  41  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  42  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  43  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  44  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  45  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  46  * SUCH DAMAGE.
  47  *
  48  * $FreeBSD$
  49  */
  50
  51 #ifndef _DEV_FB_CREATOR_H_
  52 #define _DEV_FB_CREATOR_H_
  53
  54 #define FFB_NREG                24
  55
  56 #define FFB_DAC                 1
  57 #define FFB_DAC_TYPE            0x0
  58 #define FFB_DAC_VALUE           0x4
  59 #define FFB_DAC_TYPE2           0x8
  60 #define FFB_DAC_VALUE2          0xc
  61
  62 /* FFB_DAC_TYPE configuration and palette register addresses */
  63 #define FFB_DAC_CFG_UCTRL       0x1001          /* User Control */
  64 #define FFB_DAC_CFG_TGEN        0x6000          /* Timing Generator Control */
  65 #define FFB_DAC_CFG_DID         0x8000          /* Device Identification */
  66
  67 /* FFB_DAC_CFG_UCTRL register */
  68 #define FFB_DAC_UCTRL_IPDISAB   0x0001          /* Input Pullup Resistor Dis. */
  69 #define FFB_DAC_UCTRL_ABLANK    0x0002          /* Asynchronous Blank */
  70 #define FFB_DAC_UCTRL_DBENAB    0x0004          /* Double-Buffer Enable */
  71 #define FFB_DAC_UCTRL_OVENAB    0x0008          /* Overlay Enable */
  72 #define FFB_DAC_UCTRL_WMODE     0x0030          /* Window Mode */
  73 #define FFB_DAC_UCTRL_WM_COMB   0x0000          /* Window Mode Combined */
  74 #define FFB_DAC_UCTRL_WM_S4     0x0010          /* Window Mode Separate 4 */
  75 #define FFB_DAC_UCTRL_WM_S8     0x0020          /* Window Mode Separate 8 */
  76 #define FFB_DAC_UCTRL_WM_RESV   0x0030          /* Window Mode Reserved */
  77 #define FFB_DAC_UCTRL_MANREV    0x0f00          /* Manufacturing Revision */
  78
  79 /* FFB_DAC_CFG_TGEN register */
  80 #define FFB_DAC_CFG_TGEN_VIDE   0x01            /* Video Enable */
  81 #define FFB_DAC_CFG_TGEN_TGE    0x02            /* Timing Generator Enable */
  82 #define FFB_DAC_CFG_TGEN_HSD    0x04            /* HSYNC* Disable */
  83 #define FFB_DAC_CFG_TGEN_VSD    0x08            /* VSYNC* Disable */
  84 #define FFB_DAC_CFG_TGEN_EQD    0x10            /* Equalization Disable */
  85 #define FFB_DAC_CFG_TGEN_MM     0x20            /* 0 = Slave, 1 = Master */
  86 #define FFB_DAC_CFG_TGEN_IM     0x40            /* 1 = Interlaced Mode */
  87
  88 /* FFB_DAC_CFG_DID register */
  89 #define FFB_DAC_CFG_DID_ONE     0x00000001      /* Always Set */
  90 #define FFB_DAC_CFG_DID_MANUF   0x00000ffe      /* DAC Manufacturer ID */
  91 #define FFB_DAC_CFG_DID_PNUM    0x0ffff000      /* DAC Part Number */
  92 #define FFB_DAC_CFG_DID_REV     0xf0000000      /* DAC Revision */
  93
  94 /* FFB_DAC_TYPE2 cursor register addresses */
  95 #define FFB_DAC_CUR_BITMAP_P0   0x0             /* Plane 0 Cursor Bitmap */
  96 #define FFB_DAC_CUR_BITMAP_P1   0x80            /* Plane 1 Cursor Bitmap */
  97 #define FFB_DAC_CUR_CTRL        0x100           /* Cursor Control */
  98 #define FFB_DAC_CUR_COLOR0      0x101           /* Cursor Color 0 */
  99 #define FFB_DAC_CUR_COLOR1      0x102           /* Cursor Color 1 (bg) */
 100 #define FFB_DAC_CUR_COLOR2      0x103           /* Cursor Color 2 (fg) */
 101 #define FFB_DAC_CUR_POS         0x104           /* Active Cursor Position */
 102
 103 /* FFB_DAC_CUR_CTRL register (might be inverted on PAC1 DACs) */
 104 #define FFB_DAC_CUR_CTRL_P0     0x1             /* Plane0 Display Disable */
 105 #define FFB_DAC_CUR_CTRL_P1     0x2             /* Plane1 Display Disable */
 106
 107 #define FFB_FBC                 2
 108 #define FFB_FBC_BY              0x60
 109 #define FFB_FBC_BX              0x64
 110 #define FFB_FBC_DY              0x68
 111 #define FFB_FBC_DX              0x6c
 112 #define FFB_FBC_BH              0x70
 113 #define FFB_FBC_BW              0x74
 114 #define FFB_FBC_PPC             0x200           /* Pixel Processor Control */
 115 #define FFB_FBC_FG              0x208           /* Foreground */
 116 #define FFB_FBC_BG              0x20c           /* Background */
 117 #define FFB_FBC_FBC             0x254           /* Frame Buffer Control */
 118 #define FFB_FBC_ROP             0x258           /* Raster Operation */
 119 #define FFB_FBC_PMASK           0x290           /* Pixel Mask */
 120 #define FFB_FBC_DRAWOP          0x300           /* Draw Operation */
 121 #define FFB_FBC_FONTXY          0x314           /* Font X/Y */
 122 #define FFB_FBC_FONTW           0x318           /* Font Width */
 123 #define FFB_FBC_FONTINC         0x31c           /* Font Increment */
 124 #define FFB_FBC_FONT            0x320           /* Font Data */
 125 #define FFB_FBC_UCSR            0x900           /* User Control & Status */
 126
 127 #define FBC_PPC_VCE_DIS         0x00001000
 128 #define FBC_PPC_APE_DIS         0x00000800
 129 #define FBC_PPC_TBE_OPAQUE      0x00000200
 130 #define FBC_PPC_CS_CONST        0x00000003
 131
 132 #define FFB_FBC_WB_A            0x20000000
 133 #define FFB_FBC_RB_A            0x00004000
 134 #define FFB_FBC_SB_BOTH         0x00003000
 135 #define FFB_FBC_XE_OFF          0x00000040
 136 #define FFB_FBC_RGBE_MASK       0x0000003f
 137
 138 #define FBC_ROP_NEW             0x83
 139
 140 #define FBC_DRAWOP_RECTANGLE    0x08
 141
 142 #define FBC_UCSR_FIFO_OVFL      0x80000000
 143 #define FBC_UCSR_READ_ERR       0x40000000
 144 #define FBC_UCSR_RP_BUSY        0x02000000
 145 #define FBC_UCSR_FB_BUSY        0x01000000
 146 #define FBC_UCSR_FIFO_MASK      0x00000fff
 147
 148 #define FFB_VIRT_SFB8R          0x00000000
 149 #define FFB_VIRT_SFB8G          0x00400000
 150 #define FFB_VIRT_SFB8B          0x00800000
 151 #define FFB_VIRT_SFB8X          0x00c00000
 152 #define FFB_VIRT_SFB32          0x01000000
 153 #define FFB_VIRT_SFB64          0x02000000
 154 #define FFB_VIRT_FBC            0x04000000
 155 #define FFB_VIRT_FBC_BM         0x04002000
 156 #define FFB_VIRT_DFB8R          0x04004000
 157 #define FFB_VIRT_DFB8G          0x04404000
 158 #define FFB_VIRT_DFB8B          0x04804000
 159 #define FFB_VIRT_DFB8X          0x04c04000
 160 #define FFB_VIRT_DFB24          0x05004000
 161 #define FFB_VIRT_DFB32          0x06004000
 162 #define FFB_VIRT_DFB422A        0x07004000
 163 #define FFB_VIRT_DFB422AD       0x07804000
 164 #define FFB_VIRT_DFB24B         0x08004000
 165 #define FFB_VIRT_DFB422B        0x09004000
 166 #define FFB_VIRT_DFB422BD       0x09804000
 167 #define FFB_VIRT_SFB16Z         0x0a004000
 168 #define FFB_VIRT_SFB8Z          0x0a404000
 169 #define FFB_VIRT_SFB422         0x0ac04000
 170 #define FFB_VIRT_SFB422D        0x0b404000
 171 #define FFB_VIRT_FBC_KREG       0x0bc04000
 172 #define FFB_VIRT_DAC            0x0bc06000
 173 #define FFB_VIRT_PROM           0x0bc08000
 174 #define FFB_VIRT_EXP            0x0bc18000
 175
 176 #define FFB_PHYS_SFB8R          0x04000000
 177 #define FFB_PHYS_SFB8G          0x04400000
 178 #define FFB_PHYS_SFB8B          0x04800000
 179 #define FFB_PHYS_SFB8X          0x04c00000
 180 #define FFB_PHYS_SFB32          0x05000000
 181 #define FFB_PHYS_SFB64          0x06000000
 182 #define FFB_PHYS_FBC            0x00600000
 183 #define FFB_PHYS_FBC_BM         0x00600000
 184 #define FFB_PHYS_DFB8R          0x01000000
 185 #define FFB_PHYS_DFB8G          0x01400000
 186 #define FFB_PHYS_DFB8B          0x01800000
 187 #define FFB_PHYS_DFB8X          0x01c00000
 188 #define FFB_PHYS_DFB24          0x02000000
 189 #define FFB_PHYS_DFB32          0x03000000
 190 #define FFB_PHYS_DFB422A        0x09000000
 191 #define FFB_PHYS_DFB422AD       0x09800000
 192 #define FFB_PHYS_DFB24B         0x0a000000
 193 #define FFB_PHYS_DFB422B        0x0b000000
 194 #define FFB_PHYS_DFB422BD       0x0b800000
 195 #define FFB_PHYS_SFB16Z         0x0c800000
 196 #define FFB_PHYS_SFB8Z          0x0c000000
 197 #define FFB_PHYS_SFB422         0x0d000000
 198 #define FFB_PHYS_SFB422D        0x0d800000
 199 #define FFB_PHYS_FBC_KREG       0x00610000
 200 #define FFB_PHYS_DAC            0x00400000
 201 #define FFB_PHYS_PROM           0x00000000
 202 #define FFB_PHYS_EXP            0x00200000
 203
 204 #define FFB_READ(sc, reg, off) \
 205         bus_space_read_4((sc)->sc_bt[(reg)], (sc)->sc_bh[(reg)], (off))
 206 #define FFB_WRITE(sc, reg, off, val) \
 207         bus_space_write_4((sc)->sc_bt[(reg)], (sc)->sc_bh[(reg)], (off), (val))
 208
 209 #define CREATOR_DRIVER_NAME     "creator"
 210
 211 struct creator_softc {
 212         video_adapter_t         sc_va;                  /* XXX must be first */
 213
 214         phandle_t               sc_node;
 215
 216         struct cdev             *sc_si;
 217
 218         int                     sc_rid[FFB_NREG];
 219         struct resource         *sc_reg[FFB_NREG];
 220         bus_space_tag_t         sc_bt[FFB_NREG];
 221         bus_space_handle_t      sc_bh[FFB_NREG];
 222
 223         int                     sc_height;
 224         int                     sc_width;
 225
 226         int                     sc_xmargin;
 227         int                     sc_ymargin;
 228
 229         u_char                  *sc_font;
 230
 231         int                     sc_bg_cache;
 232         int                     sc_fg_cache;
 233         int                     sc_fifo_cache;
 234         int                     sc_fontinc_cache;
 235         int                     sc_fontw_cache;
 236         int                     sc_pmask_cache;
 237
 238         int                     sc_flags;
 239 #define CREATOR_AFB             (1 << 0)
 240 #define CREATOR_CONSOLE         (1 << 1)
 241 #define CREATOR_CUREN           (1 << 2)
 242 #define CREATOR_CURINV          (1 << 3)
 243 #define CREATOR_PAC1            (1 << 4)
 244 };
 245
 246 #endif /* !_DEV_FB_CREATOR_H_ */