2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright (c) 1999 Kazutaka YOKOTA <yokota@zodiac.mech.utsunomiya-u.ac.jp>
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer as
12 * the first lines of this file unmodified.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 #ifndef _DEV_FB_VGAREG_H_
32 #define _DEV_FB_VGAREG_H_
34 /* physical addresses */
35 #define MDA_BUF_BASE 0xb0000
36 #define MDA_BUF_SIZE 0x08000
37 #define MDA_BUF BIOS_PADDRTOVADDR(MDA_BUF_BASE)
38 #define CGA_BUF_BASE 0xb8000
39 #define CGA_BUF_SIZE 0x08000
40 #define CGA_BUF BIOS_PADDRTOVADDR(CGA_BUF_BASE)
41 #define EGA_BUF_BASE 0xa0000
42 #define EGA_BUF_SIZE 0x20000
43 #define EGA_BUF BIOS_PADDRTOVADDR(EGA_BUF_BASE)
44 #define GRAPHICS_BUF_BASE 0xa0000
45 #define GRAPHICS_BUF_SIZE 0x10000
46 #define GRAPHICS_BUF BIOS_PADDRTOVADDR(GRAPHICS_BUF_BASE)
47 #define FONT_BUF BIOS_PADDRTOVADDR(GRAPHICS_BUF_BASE)
48 #define VIDEO_BUF_BASE 0xa0000
49 #define VIDEO_BUF_SIZE 0x20000
51 /* I/O port addresses */
52 #define MONO_CRTC (IO_MDA + 0x04) /* crt controller base mono */
53 #define COLOR_CRTC (IO_CGA + 0x04) /* crt controller base color */
54 #define MISC (IO_VGA + 0x02) /* misc output register */
55 #define ATC (IO_VGA + 0x00) /* attribute controller */
56 #define TSIDX (IO_VGA + 0x04) /* timing sequencer idx */
57 #define TSREG (IO_VGA + 0x05) /* timing sequencer data */
58 #define PIXMASK (IO_VGA + 0x06) /* pixel write mask */
59 #define PALRADR (IO_VGA + 0x07) /* palette read address */
60 #define PALWADR (IO_VGA + 0x08) /* palette write address */
61 #define PALDATA (IO_VGA + 0x09) /* palette data register */
62 #define GDCIDX (IO_VGA + 0x0E) /* graph data controller idx */
63 #define GDCREG (IO_VGA + 0x0F) /* graph data controller data */
65 #define VGA_DRIVER_NAME "vga"
66 #define VGA_UNIT(dev) dev2unit(dev)
67 #define VGA_MKMINOR(unit) (unit)
72 typedef struct vga_softc {
73 struct video_adapter *adp;
76 #ifdef FB_INSTALL_CDEV
81 int vga_probe_unit(int unit, struct video_adapter *adp, int flags);
82 int vga_attach_unit(int unit, vga_softc_t *sc, int flags);
84 #ifdef FB_INSTALL_CDEV
85 int vga_open(struct cdev *dev, vga_softc_t *sc, int flag, int mode,
87 int vga_close(struct cdev *dev, vga_softc_t *sc, int flag, int mode,
89 int vga_read(struct cdev *dev, vga_softc_t *sc, struct uio *uio, int flag);
90 int vga_write(struct cdev *dev, vga_softc_t *sc, struct uio *uio, int flag);
91 int vga_ioctl(struct cdev *dev, vga_softc_t *sc, u_long cmd, caddr_t arg,
92 int flag, struct thread *td);
93 int vga_mmap(struct cdev *dev, vga_softc_t *sc, vm_ooffset_t offset,
94 vm_offset_t *paddr, int prot, vm_memattr_t *memattr);
97 extern int (*vga_sub_configure)(int flags);
101 #endif /* _DEV_FB_VGAREG_H_ */