2 * Copyright (c) 1999 Kazutaka YOKOTA <yokota@zodiac.mech.utsunomiya-u.ac.jp>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer as
10 * the first lines of this file unmodified.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29 #ifndef _DEV_FB_VGAREG_H_
30 #define _DEV_FB_VGAREG_H_
32 /* physical addresses */
33 #define MDA_BUF_BASE 0xb0000
34 #define MDA_BUF_SIZE 0x08000
35 #define MDA_BUF BIOS_PADDRTOVADDR(MDA_BUF_BASE)
36 #define CGA_BUF_BASE 0xb8000
37 #define CGA_BUF_SIZE 0x08000
38 #define CGA_BUF BIOS_PADDRTOVADDR(CGA_BUF_BASE)
39 #define EGA_BUF_BASE 0xa0000
40 #define EGA_BUF_SIZE 0x20000
41 #define EGA_BUF BIOS_PADDRTOVADDR(EGA_BUF_BASE)
42 #define GRAPHICS_BUF_BASE 0xa0000
43 #define GRAPHICS_BUF_SIZE 0x10000
44 #define GRAPHICS_BUF BIOS_PADDRTOVADDR(GRAPHICS_BUF_BASE)
45 #define FONT_BUF BIOS_PADDRTOVADDR(GRAPHICS_BUF_BASE)
46 #define VIDEO_BUF_BASE 0xa0000
47 #define VIDEO_BUF_SIZE 0x20000
49 /* I/O port addresses */
50 #define MONO_CRTC (IO_MDA + 0x04) /* crt controller base mono */
51 #define COLOR_CRTC (IO_CGA + 0x04) /* crt controller base color */
52 #define MISC (IO_VGA + 0x02) /* misc output register */
53 #define ATC (IO_VGA + 0x00) /* attribute controller */
54 #define TSIDX (IO_VGA + 0x04) /* timing sequencer idx */
55 #define TSREG (IO_VGA + 0x05) /* timing sequencer data */
56 #define PIXMASK (IO_VGA + 0x06) /* pixel write mask */
57 #define PALRADR (IO_VGA + 0x07) /* palette read address */
58 #define PALWADR (IO_VGA + 0x08) /* palette write address */
59 #define PALDATA (IO_VGA + 0x09) /* palette data register */
60 #define GDCIDX (IO_VGA + 0x0E) /* graph data controller idx */
61 #define GDCREG (IO_VGA + 0x0F) /* graph data controller data */
63 #define VGA_DRIVER_NAME "vga"
64 #define VGA_UNIT(dev) minor(dev)
65 #define VGA_MKMINOR(unit) (unit)
70 typedef struct vga_softc {
71 struct video_adapter *adp;
72 #ifdef FB_INSTALL_CDEV
77 int vga_probe_unit(int unit, struct video_adapter *adp, int flags);
78 int vga_attach_unit(int unit, vga_softc_t *sc, int flags);
80 #ifdef FB_INSTALL_CDEV
81 int vga_open(dev_t dev, vga_softc_t *sc, int flag, int mode,
83 int vga_close(dev_t dev, vga_softc_t *sc, int flag, int mode,
85 int vga_read(dev_t dev, vga_softc_t *sc, struct uio *uio, int flag);
86 int vga_write(dev_t dev, vga_softc_t *sc, struct uio *uio, int flag);
87 int vga_ioctl(dev_t dev, vga_softc_t *sc, u_long cmd, caddr_t arg,
88 int flag, struct thread *td);
89 int vga_mmap(dev_t dev, vga_softc_t *sc, vm_offset_t offset,
93 extern int (*vga_sub_configure)(int flags);
97 #endif /* _DEV_FB_VGAREG_H_ */