2 * All Rights Reserved, Copyright (C) Fujitsu Limited 1995
4 * This software may be used, modified, copied, distributed, and sold, in
5 * both source and binary form provided that the above copyright, these
6 * terms and the following disclaimer are retained. The name of the author
7 * and/or the contributor may not be used to endorse or promote products
8 * derived from this software without specific prior written permission.
10 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND THE CONTRIBUTOR ``AS IS'' AND
11 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
12 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
13 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR THE CONTRIBUTOR BE LIABLE
14 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
15 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
16 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION.
17 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
18 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
19 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
23 #include <sys/cdefs.h>
24 __FBSDID("$FreeBSD$");
28 * Device driver for Fujitsu MB86960A/MB86965A based Ethernet cards.
29 * Contributed by M. Sekiguchi. <seki@sysrap.cs.fujitsu.co.jp>
31 * This version is intended to be a generic template for various
32 * MB86960A/MB86965A based Ethernet cards. It currently supports
33 * Fujitsu FMV-180 series for ISA and Allied-Telesis AT1700/RE2000
34 * series for ISA, as well as Fujitsu MBH10302 PC Card.
35 * There are some currently-
36 * unused hooks embedded, which are primarily intended to support
37 * other types of Ethernet cards, but the author is not sure whether
40 * This software is a derivative work of if_ed.c version 1.56 by David
41 * Greenman available as a part of FreeBSD 2.0 RELEASE source distribution.
43 * The following lines are retained from the original if_ed.c:
45 * Copyright (C) 1993, David Greenman. This software may be used, modified,
46 * copied, distributed, and sold, in both source and binary form provided
47 * that the above copyright and these terms are retained. Under no
48 * circumstances is the author responsible for the proper functioning
49 * of this software, nor does the author assume any responsibility
50 * for damages incurred with its use.
55 * o To support ISA PnP auto configuration for FMV-183/184.
56 * o To reconsider mbuf usage.
57 * o To reconsider transmission buffer usage, including
58 * transmission buffer size (currently 4KB x 2) and pros-and-
59 * cons of multiple frame transmission.
60 * o To test IPX codes.
61 * o To test new-bus frontend.
64 #include <sys/param.h>
65 #include <sys/kernel.h>
66 #include <sys/malloc.h>
67 #include <sys/systm.h>
68 #include <sys/socket.h>
69 #include <sys/sockio.h>
73 #include <machine/bus.h>
76 #include <net/ethernet.h>
78 #include <net/if_var.h>
79 #include <net/if_dl.h>
80 #include <net/if_mib.h>
81 #include <net/if_media.h>
82 #include <net/if_types.h>
84 #include <netinet/in.h>
85 #include <netinet/if_ether.h>
89 #include <dev/fe/mb86960.h>
90 #include <dev/fe/if_fereg.h>
91 #include <dev/fe/if_fevar.h>
94 * Transmit just one packet per a "send" command to 86960.
95 * This option is intended for performance test. An EXPERIMENTAL option.
97 #ifndef FE_SINGLE_TRANSMISSION
98 #define FE_SINGLE_TRANSMISSION 0
102 * Maximum loops when interrupt.
103 * This option prevents an infinite loop due to hardware failure.
104 * (Some laptops make an infinite loop after PC Card is ejected.)
107 #define FE_MAX_LOOP 0x800
111 * Device configuration flags.
114 /* DLCR6 settings. */
115 #define FE_FLAGS_DLCR6_VALUE 0x007F
117 /* Force DLCR6 override. */
118 #define FE_FLAGS_OVERRIDE_DLCR6 0x0080
121 devclass_t fe_devclass;
124 * Special filter values.
126 static struct fe_filter const fe_filter_nothing = { FE_FILTER_NOTHING };
127 static struct fe_filter const fe_filter_all = { FE_FILTER_ALL };
129 /* Standard driver entry points. These can be static. */
130 static void fe_init (void *);
131 static void fe_init_locked (struct fe_softc *);
132 static driver_intr_t fe_intr;
133 static int fe_ioctl (struct ifnet *, u_long, caddr_t);
134 static void fe_start (struct ifnet *);
135 static void fe_start_locked (struct ifnet *);
136 static void fe_watchdog (void *);
137 static int fe_medchange (struct ifnet *);
138 static void fe_medstat (struct ifnet *, struct ifmediareq *);
140 /* Local functions. Order of declaration is confused. FIXME. */
141 static int fe_get_packet ( struct fe_softc *, u_short );
142 static void fe_tint ( struct fe_softc *, u_char );
143 static void fe_rint ( struct fe_softc *, u_char );
144 static void fe_xmit ( struct fe_softc * );
145 static void fe_write_mbufs ( struct fe_softc *, struct mbuf * );
146 static void fe_setmode ( struct fe_softc * );
147 static void fe_loadmar ( struct fe_softc * );
150 static void fe_emptybuffer ( struct fe_softc * );
154 * Fe driver specific constants which relate to 86960/86965.
157 /* Interrupt masks */
158 #define FE_TMASK ( FE_D2_COLL16 | FE_D2_TXDONE )
159 #define FE_RMASK ( FE_D3_OVRFLO | FE_D3_CRCERR \
160 | FE_D3_ALGERR | FE_D3_SRTPKT | FE_D3_PKTRDY )
162 /* Maximum number of iterations for a receive interrupt. */
163 #define FE_MAX_RECV_COUNT ( ( 65536 - 2048 * 2 ) / 64 )
165 * Maximum size of SRAM is 65536,
166 * minimum size of transmission buffer in fe is 2x2KB,
167 * and minimum amount of received packet including headers
168 * added by the chip is 64 bytes.
169 * Hence FE_MAX_RECV_COUNT is the upper limit for number
170 * of packets in the receive buffer.
174 * Miscellaneous definitions not directly related to hardware.
177 /* The following line must be delete when "net/if_media.h" support it. */
179 #define IFM_10_FL /* 13 */ IFM_10_5
183 /* Mapping between media bitmap (in fe_softc.mbitmap) and ifm_media. */
184 static int const bit2media [] = {
185 IFM_HDX | IFM_ETHER | IFM_AUTO,
186 IFM_HDX | IFM_ETHER | IFM_MANUAL,
187 IFM_HDX | IFM_ETHER | IFM_10_T,
188 IFM_HDX | IFM_ETHER | IFM_10_2,
189 IFM_HDX | IFM_ETHER | IFM_10_5,
190 IFM_HDX | IFM_ETHER | IFM_10_FL,
191 IFM_FDX | IFM_ETHER | IFM_10_T,
192 /* More can be come here... */
196 /* Mapping between media bitmap (in fe_softc.mbitmap) and ifm_media. */
197 static int const bit2media [] = {
198 IFM_ETHER | IFM_AUTO,
199 IFM_ETHER | IFM_MANUAL,
200 IFM_ETHER | IFM_10_T,
201 IFM_ETHER | IFM_10_2,
202 IFM_ETHER | IFM_10_5,
203 IFM_ETHER | IFM_10_FL,
204 IFM_ETHER | IFM_10_T,
205 /* More can be come here... */
211 * Check for specific bits in specific registers have specific values.
212 * A common utility function called from various sub-probe routines.
215 fe_simple_probe (struct fe_softc const * sc,
216 struct fe_simple_probe_struct const * sp)
218 struct fe_simple_probe_struct const *p;
221 for (p = sp; p->mask != 0; p++) {
222 bits = fe_inb(sc, p->port);
223 printf("port %d, mask %x, bits %x read %x\n", p->port,
224 p->mask, p->bits, bits);
225 if ((bits & p->mask) != p->bits)
231 /* Test if a given 6 byte value is a valid Ethernet station (MAC)
232 address. "Vendor" is an expected vendor code (first three bytes,)
233 or a zero when nothing expected. */
235 fe_valid_Ether_p (u_char const * addr, unsigned vendor)
238 printf("fe?: validating %6D against %06x\n", addr, ":", vendor);
241 /* All zero is not allowed as a vendor code. */
242 if (addr[0] == 0 && addr[1] == 0 && addr[2] == 0) return 0;
246 /* Legal Ethernet address (stored in ROM) must have
247 its Group and Local bits cleared. */
248 if ((addr[0] & 0x03) != 0) return 0;
251 /* Same as above, but a local address is allowed in
253 if (ETHER_IS_MULTICAST(addr)) return 0;
256 /* Make sure the vendor part matches if one is given. */
257 if ( addr[0] != ((vendor >> 16) & 0xFF)
258 || addr[1] != ((vendor >> 8) & 0xFF)
259 || addr[2] != ((vendor ) & 0xFF)) return 0;
263 /* Host part must not be all-zeros nor all-ones. */
264 if (addr[3] == 0xFF && addr[4] == 0xFF && addr[5] == 0xFF) return 0;
265 if (addr[3] == 0x00 && addr[4] == 0x00 && addr[5] == 0x00) return 0;
267 /* Given addr looks like an Ethernet address. */
271 /* Fill our softc struct with default value. */
273 fe_softc_defaults (struct fe_softc *sc)
275 /* Prepare for typical register prototypes. We assume a
276 "typical" board has <32KB> of <fast> SRAM connected with a
277 <byte-wide> data lines. */
278 sc->proto_dlcr4 = FE_D4_LBC_DISABLE | FE_D4_CNTRL;
280 sc->proto_dlcr6 = FE_D6_BUFSIZ_32KB | FE_D6_TXBSIZ_2x4KB
281 | FE_D6_BBW_BYTE | FE_D6_SBW_WORD | FE_D6_SRAM_100ns;
282 sc->proto_dlcr7 = FE_D7_BYTSWP_LH;
283 sc->proto_bmpr13 = 0;
285 /* Assume the probe process (to be done later) is stable. */
288 /* A typical board needs no hooks. */
292 /* Assume the board has no software-controllable media selection. */
294 sc->defmedia = MB_HM;
298 /* Common error reporting routine used in probe routines for
299 "soft configured IRQ"-type boards. */
301 fe_irq_failure (char const *name, int unit, int irq, char const *list)
303 printf("fe%d: %s board is detected, but %s IRQ was given\n",
304 unit, name, (irq == NO_IRQ ? "no" : "invalid"));
306 printf("fe%d: specify an IRQ from %s in kernel config\n",
312 * Hardware (vendor) specific hooks.
316 * Generic media selection scheme for MB86965 based boards.
319 fe_msel_965 (struct fe_softc *sc)
323 /* Find the appropriate bits for BMPR13 tranceiver control. */
324 switch (IFM_SUBTYPE(sc->media.ifm_media)) {
325 case IFM_AUTO: b13 = FE_B13_PORT_AUTO | FE_B13_TPTYPE_UTP; break;
326 case IFM_10_T: b13 = FE_B13_PORT_TP | FE_B13_TPTYPE_UTP; break;
327 default: b13 = FE_B13_PORT_AUI; break;
330 /* Write it into the register. It takes effect immediately. */
331 fe_outb(sc, FE_BMPR13, sc->proto_bmpr13 | b13);
336 * Fujitsu MB86965 JLI mode support routines.
340 * Routines to read all bytes from the config EEPROM through MB86965A.
341 * It is a MicroWire (3-wire) serial EEPROM with 6-bit address.
345 fe_strobe_eeprom_jli (struct fe_softc *sc, u_short bmpr16)
348 * We must guarantee 1us (or more) interval to access slow
349 * EEPROMs. The following redundant code provides enough
350 * delay with ISA timing. (Even if the bus clock is "tuned.")
351 * Some modification will be needed on faster busses.
353 fe_outb(sc, bmpr16, FE_B16_SELECT);
354 fe_outb(sc, bmpr16, FE_B16_SELECT | FE_B16_CLOCK);
355 fe_outb(sc, bmpr16, FE_B16_SELECT | FE_B16_CLOCK);
356 fe_outb(sc, bmpr16, FE_B16_SELECT);
360 fe_read_eeprom_jli (struct fe_softc * sc, u_char * data)
363 u_char save16, save17;
365 /* Save the current value of the EEPROM interface registers. */
366 save16 = fe_inb(sc, FE_BMPR16);
367 save17 = fe_inb(sc, FE_BMPR17);
369 /* Read bytes from EEPROM; two bytes per an iteration. */
370 for (n = 0; n < JLI_EEPROM_SIZE / 2; n++) {
372 /* Reset the EEPROM interface. */
373 fe_outb(sc, FE_BMPR16, 0x00);
374 fe_outb(sc, FE_BMPR17, 0x00);
376 /* Start EEPROM access. */
377 fe_outb(sc, FE_BMPR16, FE_B16_SELECT);
378 fe_outb(sc, FE_BMPR17, FE_B17_DATA);
379 fe_strobe_eeprom_jli(sc, FE_BMPR16);
381 /* Pass the iteration count as well as a READ command. */
383 for (bit = 0x80; bit != 0x00; bit >>= 1) {
384 fe_outb(sc, FE_BMPR17, (val & bit) ? FE_B17_DATA : 0);
385 fe_strobe_eeprom_jli(sc, FE_BMPR16);
387 fe_outb(sc, FE_BMPR17, 0x00);
391 for (bit = 0x80; bit != 0x00; bit >>= 1) {
392 fe_strobe_eeprom_jli(sc, FE_BMPR16);
393 if (fe_inb(sc, FE_BMPR17) & FE_B17_DATA)
398 /* Read one more byte. */
400 for (bit = 0x80; bit != 0x00; bit >>= 1) {
401 fe_strobe_eeprom_jli(sc, FE_BMPR16);
402 if (fe_inb(sc, FE_BMPR17) & FE_B17_DATA)
409 /* Reset the EEPROM interface, again. */
410 fe_outb(sc, FE_BMPR16, 0x00);
411 fe_outb(sc, FE_BMPR17, 0x00);
413 /* Make sure to restore the original value of EEPROM interface
414 registers, since we are not yet sure we have MB86965A on
416 fe_outb(sc, FE_BMPR17, save17);
417 fe_outb(sc, FE_BMPR16, save16);
421 /* Report what we got. */
424 data -= JLI_EEPROM_SIZE;
425 for (i = 0; i < JLI_EEPROM_SIZE; i += 16) {
427 "EEPROM(JLI):%3x: %16D\n", i, data + i, " ");
434 fe_init_jli (struct fe_softc * sc)
436 /* "Reset" by writing into a magic location. */
438 fe_outb(sc, 0x1E, fe_inb(sc, 0x1E));
444 * SSi 78Q8377A support routines.
448 * Routines to read all bytes from the config EEPROM through 78Q8377A.
449 * It is a MicroWire (3-wire) serial EEPROM with 8-bit address. (I.e.,
452 * As I don't have SSi manuals, (hmm, an old song again!) I'm not exactly
453 * sure the following code is correct... It is just stolen from the
454 * C-NET(98)P2 support routine in FreeBSD(98).
458 fe_read_eeprom_ssi (struct fe_softc *sc, u_char *data)
462 u_char save6, save7, save12;
464 /* Save the current value for the DLCR registers we are about
466 save6 = fe_inb(sc, FE_DLCR6);
467 save7 = fe_inb(sc, FE_DLCR7);
469 /* Put the 78Q8377A into a state that we can access the EEPROM. */
470 fe_outb(sc, FE_DLCR6,
471 FE_D6_BBW_WORD | FE_D6_SBW_WORD | FE_D6_DLC_DISABLE);
472 fe_outb(sc, FE_DLCR7,
473 FE_D7_BYTSWP_LH | FE_D7_RBS_BMPR | FE_D7_RDYPNS | FE_D7_POWER_UP);
475 /* Save the current value for the BMPR12 register, too. */
476 save12 = fe_inb(sc, FE_DLCR12);
478 /* Read bytes from EEPROM; two bytes per an iteration. */
479 for (n = 0; n < SSI_EEPROM_SIZE / 2; n++) {
481 /* Start EEPROM access */
482 fe_outb(sc, FE_DLCR12, SSI_EEP);
483 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL);
485 /* Send the following four bits to the EEPROM in the
486 specified order: a dummy bit, a start bit, and
487 command bits (10) for READ. */
488 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL );
489 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL | SSI_CLK ); /* 0 */
490 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL | SSI_DAT);
491 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL | SSI_CLK | SSI_DAT); /* 1 */
492 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL | SSI_DAT);
493 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL | SSI_CLK | SSI_DAT); /* 1 */
494 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL );
495 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL | SSI_CLK ); /* 0 */
497 /* Pass the iteration count to the chip. */
498 for (bit = 0x80; bit != 0x00; bit >>= 1) {
499 val = ( n & bit ) ? SSI_DAT : 0;
500 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL | val);
501 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL | SSI_CLK | val);
506 for (bit = 0x80; bit != 0x00; bit >>= 1) {
507 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL);
508 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL | SSI_CLK);
509 if (fe_inb(sc, FE_DLCR12) & SSI_DIN)
514 /* Read one more byte. */
516 for (bit = 0x80; bit != 0x00; bit >>= 1) {
517 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL);
518 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL | SSI_CLK);
519 if (fe_inb(sc, FE_DLCR12) & SSI_DIN)
524 fe_outb(sc, FE_DLCR12, SSI_EEP);
527 /* Reset the EEPROM interface. (For now.) */
528 fe_outb(sc, FE_DLCR12, 0x00);
530 /* Restore the saved register values, for the case that we
531 didn't have 78Q8377A at the given address. */
532 fe_outb(sc, FE_DLCR12, save12);
533 fe_outb(sc, FE_DLCR7, save7);
534 fe_outb(sc, FE_DLCR6, save6);
537 /* Report what we got. */
540 data -= SSI_EEPROM_SIZE;
541 for (i = 0; i < SSI_EEPROM_SIZE; i += 16) {
543 "EEPROM(SSI):%3x: %16D\n", i, data + i, " ");
550 * TDK/LANX boards support routines.
553 /* It is assumed that the CLK line is low and SDA is high (float) upon entry. */
554 #define LNX_PH(D,K,N) \
555 ((LNX_SDA_##D | LNX_CLK_##K) << N)
556 #define LNX_CYCLE(D1,D2,D3,D4,K1,K2,K3,K4) \
557 (LNX_PH(D1,K1,0)|LNX_PH(D2,K2,8)|LNX_PH(D3,K3,16)|LNX_PH(D4,K4,24))
559 #define LNX_CYCLE_START LNX_CYCLE(HI,LO,LO,HI, HI,HI,LO,LO)
560 #define LNX_CYCLE_STOP LNX_CYCLE(LO,LO,HI,HI, LO,HI,HI,LO)
561 #define LNX_CYCLE_HI LNX_CYCLE(HI,HI,HI,HI, LO,HI,LO,LO)
562 #define LNX_CYCLE_LO LNX_CYCLE(LO,LO,LO,HI, LO,HI,LO,LO)
563 #define LNX_CYCLE_INIT LNX_CYCLE(LO,HI,HI,HI, LO,LO,LO,LO)
566 fe_eeprom_cycle_lnx (struct fe_softc *sc, u_short reg20, u_long cycle)
568 fe_outb(sc, reg20, (cycle ) & 0xFF);
570 fe_outb(sc, reg20, (cycle >> 8) & 0xFF);
572 fe_outb(sc, reg20, (cycle >> 16) & 0xFF);
574 fe_outb(sc, reg20, (cycle >> 24) & 0xFF);
579 fe_eeprom_receive_lnx (struct fe_softc *sc, u_short reg20)
583 fe_outb(sc, reg20, LNX_CLK_HI | LNX_SDA_FL);
585 dat = fe_inb(sc, reg20);
586 fe_outb(sc, reg20, LNX_CLK_LO | LNX_SDA_FL);
588 return (dat & LNX_SDA_IN);
592 fe_read_eeprom_lnx (struct fe_softc *sc, u_char *data)
597 u_short reg20 = 0x14;
599 save20 = fe_inb(sc, reg20);
601 /* NOTE: DELAY() timing constants are approximately three
602 times longer (slower) than the required minimum. This is
603 to guarantee a reliable operation under some tough
604 conditions... Fortunately, this routine is only called
605 during the boot phase, so the speed is less important than
609 /* Reset the X24C01's internal state machine and put it into
610 the IDLE state. We usually don't need this, but *if*
611 someone (e.g., probe routine of other driver) write some
612 garbage into the register at 0x14, synchronization will be
613 lost, and the normal EEPROM access protocol won't work.
614 Moreover, as there are no easy way to reset, we need a
615 _manoeuvre_ here. (It even lacks a reset pin, so pushing
616 the RESET button on the PC doesn't help!) */
617 fe_eeprom_cycle_lnx(sc, reg20, LNX_CYCLE_INIT);
618 for (i = 0; i < 10; i++)
619 fe_eeprom_cycle_lnx(sc, reg20, LNX_CYCLE_START);
620 fe_eeprom_cycle_lnx(sc, reg20, LNX_CYCLE_STOP);
624 /* Issue a start condition. */
625 fe_eeprom_cycle_lnx(sc, reg20, LNX_CYCLE_START);
627 /* Send seven bits of the starting address (zero, in this
628 case) and a command bit for READ. */
630 for (bit = 0x80; bit != 0x00; bit >>= 1) {
632 fe_eeprom_cycle_lnx(sc, reg20, LNX_CYCLE_HI);
634 fe_eeprom_cycle_lnx(sc, reg20, LNX_CYCLE_LO);
638 /* Receive an ACK bit. */
639 if (fe_eeprom_receive_lnx(sc, reg20)) {
640 /* ACK was not received. EEPROM is not present (i.e.,
641 this board was not a TDK/LANX) or not working
645 "no ACK received from EEPROM(LNX)\n");
647 /* Clear the given buffer to indicate we could not get
648 any info. and return. */
649 bzero(data, LNX_EEPROM_SIZE);
653 /* Read bytes from EEPROM. */
654 for (n = 0; n < LNX_EEPROM_SIZE; n++) {
656 /* Read a byte and store it into the buffer. */
658 for (bit = 0x80; bit != 0x00; bit >>= 1) {
659 if (fe_eeprom_receive_lnx(sc, reg20))
664 /* Acknowledge if we have to read more. */
665 if (n < LNX_EEPROM_SIZE - 1) {
666 fe_eeprom_cycle_lnx(sc, reg20, LNX_CYCLE_LO);
670 /* Issue a STOP condition, de-activating the clock line.
671 It will be safer to keep the clock line low than to leave
673 fe_eeprom_cycle_lnx(sc, reg20, LNX_CYCLE_STOP);
676 fe_outb(sc, reg20, save20);
679 /* Report what we got. */
681 data -= LNX_EEPROM_SIZE;
682 for (i = 0; i < LNX_EEPROM_SIZE; i += 16) {
684 "EEPROM(LNX):%3x: %16D\n", i, data + i, " ");
691 fe_init_lnx (struct fe_softc * sc)
693 /* Reset the 86960. Do we need this? FIXME. */
694 fe_outb(sc, 0x12, 0x06);
696 fe_outb(sc, 0x12, 0x07);
699 /* Setup IRQ control register on the ASIC. */
700 fe_outb(sc, 0x14, sc->priv_info);
705 * Ungermann-Bass boards support routine.
708 fe_init_ubn (struct fe_softc * sc)
710 /* Do we need this? FIXME. */
711 fe_outb(sc, FE_DLCR7,
712 sc->proto_dlcr7 | FE_D7_RBS_BMPR | FE_D7_POWER_UP);
713 fe_outb(sc, 0x18, 0x00);
716 /* Setup IRQ control register on the ASIC. */
717 fe_outb(sc, 0x14, sc->priv_info);
722 * Install interface into kernel networking data structures
725 fe_attach (device_t dev)
727 struct fe_softc *sc = device_get_softc(dev);
729 int flags = device_get_flags(dev);
732 ifp = sc->ifp = if_alloc(IFT_ETHER);
734 device_printf(dev, "can not ifalloc\n");
735 fe_release_resource(dev);
739 mtx_init(&sc->lock, device_get_nameunit(dev), MTX_NETWORK_LOCK,
741 callout_init_mtx(&sc->timer, &sc->lock, 0);
744 * Initialize ifnet structure
747 if_initname(sc->ifp, device_get_name(dev), device_get_unit(dev));
748 ifp->if_start = fe_start;
749 ifp->if_ioctl = fe_ioctl;
750 ifp->if_init = fe_init;
751 ifp->if_linkmib = &sc->mibdata;
752 ifp->if_linkmiblen = sizeof (sc->mibdata);
754 #if 0 /* I'm not sure... */
755 sc->mibdata.dot3Compliance = DOT3COMPLIANCE_COLLS;
759 * Set fixed interface flags.
761 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
762 IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen);
764 #if FE_SINGLE_TRANSMISSION
765 /* Override txb config to allocate minimum. */
766 sc->proto_dlcr6 &= ~FE_D6_TXBSIZ
767 sc->proto_dlcr6 |= FE_D6_TXBSIZ_2x2KB;
770 /* Modify hardware config if it is requested. */
771 if (flags & FE_FLAGS_OVERRIDE_DLCR6)
772 sc->proto_dlcr6 = flags & FE_FLAGS_DLCR6_VALUE;
774 /* Find TX buffer size, based on the hardware dependent proto. */
775 switch (sc->proto_dlcr6 & FE_D6_TXBSIZ) {
776 case FE_D6_TXBSIZ_2x2KB: sc->txb_size = 2048; break;
777 case FE_D6_TXBSIZ_2x4KB: sc->txb_size = 4096; break;
778 case FE_D6_TXBSIZ_2x8KB: sc->txb_size = 8192; break;
780 /* Oops, we can't work with single buffer configuration. */
783 "strange TXBSIZ config; fixing\n");
785 sc->proto_dlcr6 &= ~FE_D6_TXBSIZ;
786 sc->proto_dlcr6 |= FE_D6_TXBSIZ_2x2KB;
791 /* Initialize the if_media interface. */
792 ifmedia_init(&sc->media, 0, fe_medchange, fe_medstat);
793 for (b = 0; bit2media[b] != 0; b++) {
794 if (sc->mbitmap & (1 << b)) {
795 ifmedia_add(&sc->media, bit2media[b], 0, NULL);
798 for (b = 0; bit2media[b] != 0; b++) {
799 if (sc->defmedia & (1 << b)) {
800 ifmedia_set(&sc->media, bit2media[b]);
804 #if 0 /* Turned off; this is called later, when the interface UPs. */
808 /* Attach and stop the interface. */
812 ether_ifattach(sc->ifp, sc->enaddr);
814 error = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_NET | INTR_MPSAFE,
815 NULL, fe_intr, sc, &sc->irq_handle);
818 mtx_destroy(&sc->lock);
820 fe_release_resource(dev);
824 /* Print additional info when attached. */
825 device_printf(dev, "type %s%s\n", sc->typestr,
826 (sc->proto_dlcr4 & FE_D4_DSC) ? ", full duplex" : "");
828 int buf, txb, bbw, sbw, ram;
830 buf = txb = bbw = sbw = ram = -1;
831 switch ( sc->proto_dlcr6 & FE_D6_BUFSIZ ) {
832 case FE_D6_BUFSIZ_8KB: buf = 8; break;
833 case FE_D6_BUFSIZ_16KB: buf = 16; break;
834 case FE_D6_BUFSIZ_32KB: buf = 32; break;
835 case FE_D6_BUFSIZ_64KB: buf = 64; break;
837 switch ( sc->proto_dlcr6 & FE_D6_TXBSIZ ) {
838 case FE_D6_TXBSIZ_2x2KB: txb = 2; break;
839 case FE_D6_TXBSIZ_2x4KB: txb = 4; break;
840 case FE_D6_TXBSIZ_2x8KB: txb = 8; break;
842 switch ( sc->proto_dlcr6 & FE_D6_BBW ) {
843 case FE_D6_BBW_BYTE: bbw = 8; break;
844 case FE_D6_BBW_WORD: bbw = 16; break;
846 switch ( sc->proto_dlcr6 & FE_D6_SBW ) {
847 case FE_D6_SBW_BYTE: sbw = 8; break;
848 case FE_D6_SBW_WORD: sbw = 16; break;
850 switch ( sc->proto_dlcr6 & FE_D6_SRAM ) {
851 case FE_D6_SRAM_100ns: ram = 100; break;
852 case FE_D6_SRAM_150ns: ram = 150; break;
854 device_printf(dev, "SRAM %dKB %dbit %dns, TXB %dKBx2, %dbit I/O\n",
855 buf, bbw, ram, txb, sbw);
857 if (sc->stability & UNSTABLE_IRQ)
858 device_printf(dev, "warning: IRQ number may be incorrect\n");
859 if (sc->stability & UNSTABLE_MAC)
860 device_printf(dev, "warning: above MAC address may be incorrect\n");
861 if (sc->stability & UNSTABLE_TYPE)
862 device_printf(dev, "warning: hardware type was not validated\n");
864 gone_by_fcp101_dev(dev);
870 fe_alloc_port(device_t dev, int size)
872 struct fe_softc *sc = device_get_softc(dev);
873 struct resource *res;
877 res = bus_alloc_resource_anywhere(dev, SYS_RES_IOPORT, &rid,
880 sc->port_used = size;
889 fe_alloc_irq(device_t dev, int flags)
891 struct fe_softc *sc = device_get_softc(dev);
892 struct resource *res;
896 res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE | flags);
906 fe_release_resource(device_t dev)
908 struct fe_softc *sc = device_get_softc(dev);
911 bus_release_resource(dev, SYS_RES_IOPORT, 0, sc->port_res);
915 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq_res);
921 * Reset interface, after some (hardware) trouble is deteced.
924 fe_reset (struct fe_softc *sc)
926 /* Record how many packets are lost by this accident. */
927 if_inc_counter(sc->ifp, IFCOUNTER_OERRORS, sc->txb_sched + sc->txb_count);
928 sc->mibdata.dot3StatsInternalMacTransmitErrors++;
930 /* Put the interface into known initial state. */
932 if (sc->ifp->if_flags & IFF_UP)
937 * Stop everything on the interface.
939 * All buffered packets, both transmitting and receiving,
940 * if any, will be lost by stopping the interface.
943 fe_stop (struct fe_softc *sc)
946 FE_ASSERT_LOCKED(sc);
948 /* Disable interrupts. */
949 fe_outb(sc, FE_DLCR2, 0x00);
950 fe_outb(sc, FE_DLCR3, 0x00);
952 /* Stop interface hardware. */
954 fe_outb(sc, FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_DISABLE);
957 /* Clear all interrupt status. */
958 fe_outb(sc, FE_DLCR0, 0xFF);
959 fe_outb(sc, FE_DLCR1, 0xFF);
961 /* Put the chip in stand-by mode. */
963 fe_outb(sc, FE_DLCR7, sc->proto_dlcr7 | FE_D7_POWER_DOWN);
966 /* Reset transmitter variables and interface flags. */
967 sc->ifp->if_drv_flags &= ~(IFF_DRV_OACTIVE | IFF_DRV_RUNNING);
969 callout_stop(&sc->timer);
970 sc->txb_free = sc->txb_size;
974 /* MAR loading can be delayed. */
975 sc->filter_change = 0;
977 /* Call a device-specific hook. */
983 * Device timeout/watchdog routine. Entered if the device neglects to
984 * generate an interrupt after a transmit has been started on it.
987 fe_watchdog (void *arg)
989 struct fe_softc *sc = arg;
991 FE_ASSERT_LOCKED(sc);
993 if (sc->tx_timeout && --sc->tx_timeout == 0) {
994 struct ifnet *ifp = sc->ifp;
996 /* A "debug" message. */
997 if_printf(ifp, "transmission timeout (%d+%d)%s\n",
998 sc->txb_sched, sc->txb_count,
999 (ifp->if_flags & IFF_UP) ? "" : " when down");
1000 if (ifp->if_get_counter(ifp, IFCOUNTER_OPACKETS) == 0 &&
1001 ifp->if_get_counter(ifp, IFCOUNTER_IPACKETS) == 0)
1002 if_printf(ifp, "wrong IRQ setting in config?\n");
1005 callout_reset(&sc->timer, hz, fe_watchdog, sc);
1009 * Initialize device.
1012 fe_init (void * xsc)
1014 struct fe_softc *sc = xsc;
1022 fe_init_locked (struct fe_softc *sc)
1025 /* Start initializing 86960. */
1027 /* Call a hook before we start initializing the chip. */
1032 * Make sure to disable the chip, also.
1033 * This may also help re-programming the chip after
1034 * hot insertion of PCMCIAs.
1037 fe_outb(sc, FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_DISABLE);
1040 /* Power up the chip and select register bank for DLCRs. */
1042 fe_outb(sc, FE_DLCR7,
1043 sc->proto_dlcr7 | FE_D7_RBS_DLCR | FE_D7_POWER_UP);
1046 /* Feed the station address. */
1047 fe_outblk(sc, FE_DLCR8, IF_LLADDR(sc->ifp), ETHER_ADDR_LEN);
1049 /* Clear multicast address filter to receive nothing. */
1050 fe_outb(sc, FE_DLCR7,
1051 sc->proto_dlcr7 | FE_D7_RBS_MAR | FE_D7_POWER_UP);
1052 fe_outblk(sc, FE_MAR8, fe_filter_nothing.data, FE_FILTER_LEN);
1054 /* Select the BMPR bank for runtime register access. */
1055 fe_outb(sc, FE_DLCR7,
1056 sc->proto_dlcr7 | FE_D7_RBS_BMPR | FE_D7_POWER_UP);
1058 /* Initialize registers. */
1059 fe_outb(sc, FE_DLCR0, 0xFF); /* Clear all bits. */
1060 fe_outb(sc, FE_DLCR1, 0xFF); /* ditto. */
1061 fe_outb(sc, FE_DLCR2, 0x00);
1062 fe_outb(sc, FE_DLCR3, 0x00);
1063 fe_outb(sc, FE_DLCR4, sc->proto_dlcr4);
1064 fe_outb(sc, FE_DLCR5, sc->proto_dlcr5);
1065 fe_outb(sc, FE_BMPR10, 0x00);
1066 fe_outb(sc, FE_BMPR11, FE_B11_CTRL_SKIP | FE_B11_MODE1);
1067 fe_outb(sc, FE_BMPR12, 0x00);
1068 fe_outb(sc, FE_BMPR13, sc->proto_bmpr13);
1069 fe_outb(sc, FE_BMPR14, 0x00);
1070 fe_outb(sc, FE_BMPR15, 0x00);
1072 /* Enable interrupts. */
1073 fe_outb(sc, FE_DLCR2, FE_TMASK);
1074 fe_outb(sc, FE_DLCR3, FE_RMASK);
1076 /* Select requested media, just before enabling DLC. */
1080 /* Enable transmitter and receiver. */
1082 fe_outb(sc, FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_ENABLE);
1087 * Make sure to empty the receive buffer.
1089 * This may be redundant, but *if* the receive buffer were full
1090 * at this point, then the driver would hang. I have experienced
1091 * some strange hang-up just after UP. I hope the following
1092 * code solve the problem.
1094 * I have changed the order of hardware initialization.
1095 * I think the receive buffer cannot have any packets at this
1096 * point in this version. The following code *must* be
1097 * redundant now. FIXME.
1099 * I've heard a rumore that on some PC Card implementation of
1100 * 8696x, the receive buffer can have some data at this point.
1101 * The following message helps discovering the fact. FIXME.
1103 if (!(fe_inb(sc, FE_DLCR5) & FE_D5_BUFEMP)) {
1105 "receive buffer has some data after reset\n");
1109 /* Do we need this here? Actually, no. I must be paranoia. */
1110 fe_outb(sc, FE_DLCR0, 0xFF); /* Clear all bits. */
1111 fe_outb(sc, FE_DLCR1, 0xFF); /* ditto. */
1114 /* Set 'running' flag, because we are now running. */
1115 sc->ifp->if_drv_flags |= IFF_DRV_RUNNING;
1116 callout_reset(&sc->timer, hz, fe_watchdog, sc);
1119 * At this point, the interface is running properly,
1120 * except that it receives *no* packets. we then call
1121 * fe_setmode() to tell the chip what packets to be
1122 * received, based on the if_flags and multicast group
1123 * list. It completes the initialization process.
1128 /* ...and attempt to start output queued packets. */
1129 /* TURNED OFF, because the semi-auto media prober wants to UP
1130 the interface keeping it idle. The upper layer will soon
1131 start the interface anyway, and there are no significant
1133 fe_start_locked(sc->ifp);
1138 * This routine actually starts the transmission on the interface
1141 fe_xmit (struct fe_softc *sc)
1144 * Set a timer just in case we never hear from the board again.
1145 * We use longer timeout for multiple packet transmission.
1146 * I'm not sure this timer value is appropriate. FIXME.
1148 sc->tx_timeout = 1 + sc->txb_count;
1150 /* Update txb variables. */
1151 sc->txb_sched = sc->txb_count;
1153 sc->txb_free = sc->txb_size;
1156 /* Start transmitter, passing packets in TX buffer. */
1157 fe_outb(sc, FE_BMPR10, sc->txb_sched | FE_B10_START);
1161 * Start output on interface.
1162 * We make one assumption here:
1163 * 1) that the IFF_DRV_OACTIVE flag is checked before this code is called
1164 * (i.e. that the output part of the interface is idle)
1167 fe_start (struct ifnet *ifp)
1169 struct fe_softc *sc = ifp->if_softc;
1172 fe_start_locked(ifp);
1177 fe_start_locked (struct ifnet *ifp)
1179 struct fe_softc *sc = ifp->if_softc;
1183 /* Just a sanity check. */
1184 if ((sc->txb_count == 0) != (sc->txb_free == sc->txb_size)) {
1186 * Txb_count and txb_free co-works to manage the
1187 * transmission buffer. Txb_count keeps track of the
1188 * used potion of the buffer, while txb_free does unused
1189 * potion. So, as long as the driver runs properly,
1190 * txb_count is zero if and only if txb_free is same
1191 * as txb_size (which represents whole buffer.)
1193 if_printf(ifp, "inconsistent txb variables (%d, %d)\n",
1194 sc->txb_count, sc->txb_free);
1196 * So, what should I do, then?
1198 * We now know txb_count and txb_free contradicts. We
1199 * cannot, however, tell which is wrong. More
1200 * over, we cannot peek 86960 transmission buffer or
1201 * reset the transmission buffer. (In fact, we can
1202 * reset the entire interface. I don't want to do it.)
1204 * If txb_count is incorrect, leaving it as-is will cause
1205 * sending of garbage after next interrupt. We have to
1206 * avoid it. Hence, we reset the txb_count here. If
1207 * txb_free was incorrect, resetting txb_count just loses
1208 * some packets. We can live with it.
1215 * First, see if there are buffered packets and an idle
1216 * transmitter - should never happen at this point.
1218 if ((sc->txb_count > 0) && (sc->txb_sched == 0)) {
1219 if_printf(ifp, "transmitter idle with %d buffered packets\n",
1225 * Stop accepting more transmission packets temporarily, when
1226 * a filter change request is delayed. Updating the MARs on
1227 * 86960 flushes the transmission buffer, so it is delayed
1228 * until all buffered transmission packets have been sent
1231 if (sc->filter_change) {
1233 * Filter change request is delayed only when the DLC is
1234 * working. DLC soon raise an interrupt after finishing
1237 goto indicate_active;
1243 * See if there is room to put another packet in the buffer.
1244 * We *could* do better job by peeking the send queue to
1245 * know the length of the next packet. Current version just
1246 * tests against the worst case (i.e., longest packet). FIXME.
1248 * When adding the packet-peek feature, don't forget adding a
1249 * test on txb_count against QUEUEING_MAX.
1250 * There is a little chance the packet count exceeds
1251 * the limit. Assume transmission buffer is 8KB (2x8KB
1252 * configuration) and an application sends a bunch of small
1253 * (i.e., minimum packet sized) packets rapidly. An 8KB
1254 * buffer can hold 130 blocks of 62 bytes long...
1257 < ETHER_MAX_LEN - ETHER_CRC_LEN + FE_DATA_LEN_LEN) {
1259 goto indicate_active;
1262 #if FE_SINGLE_TRANSMISSION
1263 if (sc->txb_count > 0) {
1264 /* Just one packet per a transmission buffer. */
1265 goto indicate_active;
1270 * Get the next mbuf chain for a packet to send.
1272 IF_DEQUEUE(&sc->ifp->if_snd, m);
1274 /* No more packets to send. */
1275 goto indicate_inactive;
1279 * Copy the mbuf chain into the transmission buffer.
1280 * txb_* variables are updated as necessary.
1282 fe_write_mbufs(sc, m);
1284 /* Start transmitter if it's idle. */
1285 if ((sc->txb_count > 0) && (sc->txb_sched == 0))
1289 * Tap off here if there is a bpf listener,
1290 * and the device is *not* in promiscuous mode.
1291 * (86960 receives self-generated packets if
1292 * and only if it is in "receive everything"
1295 if (!(sc->ifp->if_flags & IFF_PROMISC))
1296 BPF_MTAP(sc->ifp, m);
1303 * We are using the !OACTIVE flag to indicate to
1304 * the outside world that we can accept an
1305 * additional packet rather than that the
1306 * transmitter is _actually_ active. Indeed, the
1307 * transmitter may be active, but if we haven't
1308 * filled all the buffers with data then we still
1309 * want to accept more.
1311 sc->ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
1316 * The transmitter is active, and there are no room for
1317 * more outgoing packets in the transmission buffer.
1319 sc->ifp->if_drv_flags |= IFF_DRV_OACTIVE;
1324 * Drop (skip) a packet from receive buffer in 86960 memory.
1327 fe_droppacket (struct fe_softc * sc, int len)
1332 * 86960 manual says that we have to read 8 bytes from the buffer
1333 * before skip the packets and that there must be more than 8 bytes
1334 * remaining in the buffer when issue a skip command.
1335 * Remember, we have already read 4 bytes before come here.
1338 /* Read 4 more bytes, and skip the rest of the packet. */
1339 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE)
1341 (void) fe_inb(sc, FE_BMPR8);
1342 (void) fe_inb(sc, FE_BMPR8);
1343 (void) fe_inb(sc, FE_BMPR8);
1344 (void) fe_inb(sc, FE_BMPR8);
1348 (void) fe_inw(sc, FE_BMPR8);
1349 (void) fe_inw(sc, FE_BMPR8);
1351 fe_outb(sc, FE_BMPR14, FE_B14_SKIP);
1353 /* We should not come here unless receiving RUNTs. */
1354 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE)
1356 for (i = 0; i < len; i++)
1357 (void) fe_inb(sc, FE_BMPR8);
1361 for (i = 0; i < len; i += 2)
1362 (void) fe_inw(sc, FE_BMPR8);
1369 * Empty receiving buffer.
1372 fe_emptybuffer (struct fe_softc * sc)
1378 if_printf(sc->ifp, "emptying receive buffer\n");
1382 * Stop receiving packets, temporarily.
1384 saved_dlcr5 = fe_inb(sc, FE_DLCR5);
1385 fe_outb(sc, FE_DLCR5, sc->proto_dlcr5);
1389 * When we come here, the receive buffer management may
1390 * have been broken. So, we cannot use skip operation.
1391 * Just discard everything in the buffer.
1393 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE)
1395 for (i = 0; i < 65536; i++) {
1396 if (fe_inb(sc, FE_DLCR5) & FE_D5_BUFEMP)
1398 (void) fe_inb(sc, FE_BMPR8);
1403 for (i = 0; i < 65536; i += 2) {
1404 if (fe_inb(sc, FE_DLCR5) & FE_D5_BUFEMP)
1406 (void) fe_inw(sc, FE_BMPR8);
1413 if (fe_inb(sc, FE_DLCR5) & FE_D5_BUFEMP) {
1415 "could not empty receive buffer\n");
1416 /* Hmm. What should I do if this happens? FIXME. */
1420 * Restart receiving packets.
1422 fe_outb(sc, FE_DLCR5, saved_dlcr5);
1427 * Transmission interrupt handler
1428 * The control flow of this function looks silly. FIXME.
1431 fe_tint (struct fe_softc * sc, u_char tstat)
1437 * Handle "excessive collision" interrupt.
1439 if (tstat & FE_D0_COLL16) {
1442 * Find how many packets (including this collided one)
1443 * are left unsent in transmission buffer.
1445 left = fe_inb(sc, FE_BMPR10);
1446 if_printf(sc->ifp, "excessive collision (%d/%d)\n",
1447 left, sc->txb_sched);
1450 * Clear the collision flag (in 86960) here
1451 * to avoid confusing statistics.
1453 fe_outb(sc, FE_DLCR0, FE_D0_COLLID);
1456 * Restart transmitter, skipping the
1459 * We *must* skip the packet to keep network running
1460 * properly. Excessive collision error is an
1461 * indication of the network overload. If we
1462 * tried sending the same packet after excessive
1463 * collision, the network would be filled with
1464 * out-of-time packets. Packets belonging
1465 * to reliable transport (such as TCP) are resent
1466 * by some upper layer.
1468 fe_outb(sc, FE_BMPR11, FE_B11_CTRL_SKIP | FE_B11_MODE1);
1470 /* Update statistics. */
1475 * Handle "transmission complete" interrupt.
1477 if (tstat & FE_D0_TXDONE) {
1480 * Add in total number of collisions on last
1481 * transmission. We also clear "collision occurred" flag
1484 * 86960 has a design flaw on collision count on multiple
1485 * packet transmission. When we send two or more packets
1486 * with one start command (that's what we do when the
1487 * transmission queue is crowded), 86960 informs us number
1488 * of collisions occurred on the last packet on the
1489 * transmission only. Number of collisions on previous
1490 * packets are lost. I have told that the fact is clearly
1491 * stated in the Fujitsu document.
1493 * I considered not to mind it seriously. Collision
1494 * count is not so important, anyway. Any comments? FIXME.
1497 if (fe_inb(sc, FE_DLCR0) & FE_D0_COLLID) {
1499 /* Clear collision flag. */
1500 fe_outb(sc, FE_DLCR0, FE_D0_COLLID);
1502 /* Extract collision count from 86960. */
1503 col = fe_inb(sc, FE_DLCR4);
1504 col = (col & FE_D4_COL) >> FE_D4_COL_SHIFT;
1507 * Status register indicates collisions,
1508 * while the collision count is zero.
1509 * This can happen after multiple packet
1510 * transmission, indicating that one or more
1511 * previous packet(s) had been collided.
1513 * Since the accurate number of collisions
1514 * has been lost, we just guess it as 1;
1515 * Am I too optimistic? FIXME.
1519 if_inc_counter(sc->ifp, IFCOUNTER_COLLISIONS, col);
1521 sc->mibdata.dot3StatsSingleCollisionFrames++;
1523 sc->mibdata.dot3StatsMultipleCollisionFrames++;
1524 sc->mibdata.dot3StatsCollFrequencies[col-1]++;
1528 * Update transmission statistics.
1529 * Be sure to reflect number of excessive collisions.
1531 col = sc->tx_excolls;
1532 if_inc_counter(sc->ifp, IFCOUNTER_OPACKETS, sc->txb_sched - col);
1533 if_inc_counter(sc->ifp, IFCOUNTER_OERRORS, col);
1534 if_inc_counter(sc->ifp, IFCOUNTER_COLLISIONS, col * 16);
1535 sc->mibdata.dot3StatsExcessiveCollisions += col;
1536 sc->mibdata.dot3StatsCollFrequencies[15] += col;
1540 * The transmitter is no more active.
1541 * Reset output active flag and watchdog timer.
1543 sc->ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
1547 * If more data is ready to transmit in the buffer, start
1548 * transmitting them. Otherwise keep transmitter idle,
1549 * even if more data is queued. This gives receive
1550 * process a slight priority.
1552 if (sc->txb_count > 0)
1558 * Ethernet interface receiver interrupt.
1561 fe_rint (struct fe_softc * sc, u_char rstat)
1568 * Update statistics if this interrupt is caused by an error.
1569 * Note that, when the system was not sufficiently fast, the
1570 * receive interrupt might not be acknowledged immediately. If
1571 * one or more errornous frames were received before this routine
1572 * was scheduled, they are ignored, and the following error stats
1573 * give less than real values.
1575 if (rstat & (FE_D1_OVRFLO | FE_D1_CRCERR | FE_D1_ALGERR | FE_D1_SRTPKT)) {
1576 if (rstat & FE_D1_OVRFLO)
1577 sc->mibdata.dot3StatsInternalMacReceiveErrors++;
1578 if (rstat & FE_D1_CRCERR)
1579 sc->mibdata.dot3StatsFCSErrors++;
1580 if (rstat & FE_D1_ALGERR)
1581 sc->mibdata.dot3StatsAlignmentErrors++;
1583 /* The reference MAC receiver defined in 802.3
1584 silently ignores short frames (RUNTs) without
1585 notifying upper layer. RFC 1650 (dot3 MIB) is
1586 based on the 802.3, and it has no stats entry for
1588 if (rstat & FE_D1_SRTPKT)
1589 sc->mibdata.dot3StatsFrameTooShorts++; /* :-) */
1591 if_inc_counter(sc->ifp, IFCOUNTER_IERRORS, 1);
1595 * MB86960 has a flag indicating "receive queue empty."
1596 * We just loop, checking the flag, to pull out all received
1599 * We limit the number of iterations to avoid infinite-loop.
1600 * The upper bound is set to unrealistic high value.
1602 for (i = 0; i < FE_MAX_RECV_COUNT * 2; i++) {
1604 /* Stop the iteration if 86960 indicates no packets. */
1605 if (fe_inb(sc, FE_DLCR5) & FE_D5_BUFEMP)
1609 * Extract a receive status byte.
1610 * As our 86960 is in 16 bit bus access mode, we have to
1611 * use inw() to get the status byte. The significant
1612 * value is returned in lower 8 bits.
1614 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE)
1616 status = fe_inb(sc, FE_BMPR8);
1617 (void) fe_inb(sc, FE_BMPR8);
1621 status = (u_char) fe_inw(sc, FE_BMPR8);
1625 * Extract the packet length.
1626 * It is a sum of a header (14 bytes) and a payload.
1627 * CRC has been stripped off by the 86960.
1629 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE)
1631 len = fe_inb(sc, FE_BMPR8);
1632 len |= (fe_inb(sc, FE_BMPR8) << 8);
1636 len = fe_inw(sc, FE_BMPR8);
1640 * AS our 86960 is programed to ignore errored frame,
1641 * we must not see any error indication in the
1642 * receive buffer. So, any error condition is a
1643 * serious error, e.g., out-of-sync of the receive
1646 if ((status & 0xF0) != 0x20 ||
1647 len > ETHER_MAX_LEN - ETHER_CRC_LEN ||
1648 len < ETHER_MIN_LEN - ETHER_CRC_LEN) {
1650 "RX buffer out-of-sync\n");
1651 if_inc_counter(sc->ifp, IFCOUNTER_IERRORS, 1);
1652 sc->mibdata.dot3StatsInternalMacReceiveErrors++;
1660 if (fe_get_packet(sc, len) < 0) {
1662 * Negative return from fe_get_packet()
1663 * indicates no available mbuf. We stop
1664 * receiving packets, even if there are more
1665 * in the buffer. We hope we can get more
1668 if_inc_counter(sc->ifp, IFCOUNTER_IERRORS, 1);
1669 sc->mibdata.dot3StatsMissedFrames++;
1670 fe_droppacket(sc, len);
1674 /* Successfully received a packet. Update stat. */
1675 if_inc_counter(sc->ifp, IFCOUNTER_IPACKETS, 1);
1678 /* Maximum number of frames has been received. Something
1679 strange is happening here... */
1680 if_printf(sc->ifp, "unusual receive flood\n");
1681 sc->mibdata.dot3StatsInternalMacReceiveErrors++;
1686 * Ethernet interface interrupt processor
1691 struct fe_softc *sc = arg;
1692 u_char tstat, rstat;
1693 int loop_count = FE_MAX_LOOP;
1697 /* Loop until there are no more new interrupt conditions. */
1698 while (loop_count-- > 0) {
1700 * Get interrupt conditions, masking unneeded flags.
1702 tstat = fe_inb(sc, FE_DLCR0) & FE_TMASK;
1703 rstat = fe_inb(sc, FE_DLCR1) & FE_RMASK;
1704 if (tstat == 0 && rstat == 0) {
1710 * Reset the conditions we are acknowledging.
1712 fe_outb(sc, FE_DLCR0, tstat);
1713 fe_outb(sc, FE_DLCR1, rstat);
1716 * Handle transmitter interrupts.
1722 * Handle receiver interrupts
1728 * Update the multicast address filter if it is
1729 * needed and possible. We do it now, because
1730 * we can make sure the transmission buffer is empty,
1731 * and there is a good chance that the receive queue
1732 * is empty. It will minimize the possibility of
1735 if (sc->filter_change &&
1736 sc->txb_count == 0 && sc->txb_sched == 0) {
1738 sc->ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
1742 * If it looks like the transmitter can take more data,
1743 * attempt to start output on the interface. This is done
1744 * after handling the receiver interrupt to give the
1745 * receive operation priority.
1747 * BTW, I'm not sure in what case the OACTIVE is on at
1748 * this point. Is the following test redundant?
1750 * No. This routine polls for both transmitter and
1751 * receiver interrupts. 86960 can raise a receiver
1752 * interrupt when the transmission buffer is full.
1754 if ((sc->ifp->if_drv_flags & IFF_DRV_OACTIVE) == 0)
1755 fe_start_locked(sc->ifp);
1759 if_printf(sc->ifp, "too many loops\n");
1763 * Process an ioctl request. This code needs some work - it looks
1767 fe_ioctl (struct ifnet * ifp, u_long command, caddr_t data)
1769 struct fe_softc *sc = ifp->if_softc;
1770 struct ifreq *ifr = (struct ifreq *)data;
1777 * Switch interface state between "running" and
1778 * "stopped", reflecting the UP flag.
1781 if (sc->ifp->if_flags & IFF_UP) {
1782 if ((sc->ifp->if_drv_flags & IFF_DRV_RUNNING) == 0)
1785 if ((sc->ifp->if_drv_flags & IFF_DRV_RUNNING) != 0)
1790 * Promiscuous and/or multicast flags may have changed,
1791 * so reprogram the multicast filter and/or receive mode.
1802 * Multicast list has changed; set the hardware filter
1812 /* Let if_media to handle these commands and to call
1814 error = ifmedia_ioctl(ifp, ifr, &sc->media, command);
1818 error = ether_ioctl(ifp, command, data);
1826 * Retrieve packet from receive buffer and send to the next level up via
1828 * Returns 0 if success, -1 if error (i.e., mbuf allocation failure).
1831 fe_get_packet (struct fe_softc * sc, u_short len)
1833 struct ifnet *ifp = sc->ifp;
1834 struct ether_header *eh;
1837 FE_ASSERT_LOCKED(sc);
1840 * NFS wants the data be aligned to the word (4 byte)
1841 * boundary. Ethernet header has 14 bytes. There is a
1844 #define NFS_MAGIC_OFFSET 2
1847 * This function assumes that an Ethernet packet fits in an
1848 * mbuf (with a cluster attached when necessary.) On FreeBSD
1849 * 2.0 for x86, which is the primary target of this driver, an
1850 * mbuf cluster has 4096 bytes, and we are happy. On ancient
1851 * BSDs, such as vanilla 4.3 for 386, a cluster size was 1024,
1852 * however. If the following #error message were printed upon
1853 * compile, you need to rewrite this function.
1855 #if ( MCLBYTES < ETHER_MAX_LEN - ETHER_CRC_LEN + NFS_MAGIC_OFFSET )
1856 #error "Too small MCLBYTES to use fe driver."
1860 * Our strategy has one more problem. There is a policy on
1861 * mbuf cluster allocation. It says that we must have at
1862 * least MINCLSIZE (208 bytes on FreeBSD 2.0 for x86) to
1863 * allocate a cluster. For a packet of a size between
1864 * (MHLEN - 2) to (MINCLSIZE - 2), our code violates the rule...
1865 * On the other hand, the current code is short, simple,
1866 * and fast, however. It does no harmful thing, just waists
1867 * some memory. Any comments? FIXME.
1870 /* Allocate an mbuf with packet header info. */
1871 MGETHDR(m, M_NOWAIT, MT_DATA);
1875 /* Attach a cluster if this packet doesn't fit in a normal mbuf. */
1876 if (len > MHLEN - NFS_MAGIC_OFFSET) {
1877 if (!(MCLGET(m, M_NOWAIT))) {
1883 /* Initialize packet header info. */
1884 m->m_pkthdr.rcvif = ifp;
1885 m->m_pkthdr.len = len;
1887 /* Set the length of this packet. */
1890 /* The following silliness is to make NFS happy */
1891 m->m_data += NFS_MAGIC_OFFSET;
1893 /* Get (actually just point to) the header part. */
1894 eh = mtod(m, struct ether_header *);
1897 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE)
1899 fe_insb(sc, FE_BMPR8, (u_int8_t *)eh, len);
1903 fe_insw(sc, FE_BMPR8, (u_int16_t *)eh, (len + 1) >> 1);
1906 /* Feed the packet to upper layer. */
1908 (*ifp->if_input)(ifp, m);
1914 * Write an mbuf chain to the transmission buffer memory using 16 bit PIO.
1915 * Returns number of bytes actually written, including length word.
1917 * If an mbuf chain is too long for an Ethernet frame, it is not sent.
1918 * Packets shorter than Ethernet minimum are legal, and we pad them
1919 * before sending out. An exception is "partial" packets which are
1920 * shorter than mandatory Ethernet header.
1923 fe_write_mbufs (struct fe_softc *sc, struct mbuf *m)
1925 u_short length, len;
1928 u_short savebyte; /* WARNING: Architecture dependent! */
1929 #define NO_PENDING_BYTE 0xFFFF
1931 static u_char padding [ETHER_MIN_LEN - ETHER_CRC_LEN - ETHER_HDR_LEN];
1934 /* First, count up the total number of bytes to copy */
1936 for (mp = m; mp != NULL; mp = mp->m_next)
1937 length += mp->m_len;
1939 /* Check if this matches the one in the packet header. */
1940 if (length != m->m_pkthdr.len) {
1942 "packet length mismatch? (%d/%d)\n",
1943 length, m->m_pkthdr.len);
1946 /* Just use the length value in the packet header. */
1947 length = m->m_pkthdr.len;
1952 * Should never send big packets. If such a packet is passed,
1953 * it should be a bug of upper layer. We just ignore it.
1954 * ... Partial (too short) packets, neither.
1956 if (length < ETHER_HDR_LEN ||
1957 length > ETHER_MAX_LEN - ETHER_CRC_LEN) {
1959 "got an out-of-spec packet (%u bytes) to send\n", length);
1960 if_inc_counter(sc->ifp, IFCOUNTER_OERRORS, 1);
1961 sc->mibdata.dot3StatsInternalMacTransmitErrors++;
1967 * Put the length word for this frame.
1968 * Does 86960 accept odd length? -- Yes.
1969 * Do we need to pad the length to minimum size by ourselves?
1970 * -- Generally yes. But for (or will be) the last
1971 * packet in the transmission buffer, we can skip the
1972 * padding process. It may gain performance slightly. FIXME.
1974 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE)
1976 len = max(length, ETHER_MIN_LEN - ETHER_CRC_LEN);
1977 fe_outb(sc, FE_BMPR8, len & 0x00ff);
1978 fe_outb(sc, FE_BMPR8, (len & 0xff00) >> 8);
1982 fe_outw(sc, FE_BMPR8,
1983 max(length, ETHER_MIN_LEN - ETHER_CRC_LEN));
1987 * Update buffer status now.
1988 * Truncate the length up to an even number, since we use outw().
1990 if ((sc->proto_dlcr6 & FE_D6_SBW) != FE_D6_SBW_BYTE)
1992 length = (length + 1) & ~1;
1994 sc->txb_free -= FE_DATA_LEN_LEN +
1995 max(length, ETHER_MIN_LEN - ETHER_CRC_LEN);
1999 * Transfer the data from mbuf chain to the transmission buffer.
2000 * MB86960 seems to require that data be transferred as words, and
2001 * only words. So that we require some extra code to patch
2002 * over odd-length mbufs.
2004 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE)
2006 /* 8-bit cards are easy. */
2007 for (mp = m; mp != NULL; mp = mp->m_next) {
2009 fe_outsb(sc, FE_BMPR8, mtod(mp, caddr_t),
2015 /* 16-bit cards are a pain. */
2016 savebyte = NO_PENDING_BYTE;
2017 for (mp = m; mp != NULL; mp = mp->m_next) {
2019 /* Ignore empty mbuf. */
2024 /* Find the actual data to send. */
2025 data = mtod(mp, caddr_t);
2027 /* Finish the last byte. */
2028 if (savebyte != NO_PENDING_BYTE) {
2029 fe_outw(sc, FE_BMPR8, savebyte | (*data << 8));
2032 savebyte = NO_PENDING_BYTE;
2035 /* output contiguous words */
2037 fe_outsw(sc, FE_BMPR8, (u_int16_t *)data,
2043 /* Save a remaining byte, if there is one. */
2048 /* Spit the last byte, if the length is odd. */
2049 if (savebyte != NO_PENDING_BYTE)
2050 fe_outw(sc, FE_BMPR8, savebyte);
2053 /* Pad to the Ethernet minimum length, if the packet is too short. */
2054 if (length < ETHER_MIN_LEN - ETHER_CRC_LEN) {
2055 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE)
2057 fe_outsb(sc, FE_BMPR8, padding,
2058 ETHER_MIN_LEN - ETHER_CRC_LEN - length);
2062 fe_outsw(sc, FE_BMPR8, (u_int16_t *)padding,
2063 (ETHER_MIN_LEN - ETHER_CRC_LEN - length) >> 1);
2069 * Compute the multicast address filter from the
2070 * list of multicast addresses we need to listen to.
2072 static struct fe_filter
2073 fe_mcaf ( struct fe_softc *sc )
2076 struct fe_filter filter;
2077 struct ifmultiaddr *ifma;
2079 filter = fe_filter_nothing;
2080 if_maddr_rlock(sc->ifp);
2081 CK_STAILQ_FOREACH(ifma, &sc->ifp->if_multiaddrs, ifma_link) {
2082 if (ifma->ifma_addr->sa_family != AF_LINK)
2084 index = ether_crc32_le(LLADDR((struct sockaddr_dl *)
2085 ifma->ifma_addr), ETHER_ADDR_LEN) >> 26;
2087 if_printf(sc->ifp, "hash(%6D) == %d\n",
2088 enm->enm_addrlo , ":", index);
2091 filter.data[index >> 3] |= 1 << (index & 7);
2093 if_maddr_runlock(sc->ifp);
2098 * Calculate a new "multicast packet filter" and put the 86960
2099 * receiver in appropriate mode.
2102 fe_setmode (struct fe_softc *sc)
2106 * If the interface is not running, we postpone the update
2107 * process for receive modes and multicast address filter
2108 * until the interface is restarted. It reduces some
2109 * complicated job on maintaining chip states. (Earlier versions
2110 * of this driver had a bug on that point...)
2112 * To complete the trick, fe_init() calls fe_setmode() after
2113 * restarting the interface.
2115 if (!(sc->ifp->if_drv_flags & IFF_DRV_RUNNING))
2119 * Promiscuous mode is handled separately.
2121 if (sc->ifp->if_flags & IFF_PROMISC) {
2123 * Program 86960 to receive all packets on the segment
2124 * including those directed to other stations.
2125 * Multicast filter stored in MARs are ignored
2126 * under this setting, so we don't need to update it.
2128 * Promiscuous mode in FreeBSD 2 is used solely by
2129 * BPF, and BPF only listens to valid (no error) packets.
2130 * So, we ignore erroneous ones even in this mode.
2131 * (Older versions of fe driver mistook the point.)
2133 fe_outb(sc, FE_DLCR5,
2134 sc->proto_dlcr5 | FE_D5_AFM0 | FE_D5_AFM1);
2135 sc->filter_change = 0;
2140 * Turn the chip to the normal (non-promiscuous) mode.
2142 fe_outb(sc, FE_DLCR5, sc->proto_dlcr5 | FE_D5_AFM1);
2145 * Find the new multicast filter value.
2147 if (sc->ifp->if_flags & IFF_ALLMULTI)
2148 sc->filter = fe_filter_all;
2150 sc->filter = fe_mcaf(sc);
2151 sc->filter_change = 1;
2154 * We have to update the multicast filter in the 86960, A.S.A.P.
2156 * Note that the DLC (Data Link Control unit, i.e. transmitter
2157 * and receiver) must be stopped when feeding the filter, and
2158 * DLC trashes all packets in both transmission and receive
2159 * buffers when stopped.
2161 * To reduce the packet loss, we delay the filter update
2162 * process until buffers are empty.
2164 if (sc->txb_sched == 0 && sc->txb_count == 0 &&
2165 !(fe_inb(sc, FE_DLCR1) & FE_D1_PKTRDY)) {
2167 * Buffers are (apparently) empty. Load
2168 * the new filter value into MARs now.
2173 * Buffers are not empty. Mark that we have to update
2174 * the MARs. The new filter will be loaded by feintr()
2181 * Load a new multicast address filter into MARs.
2183 * The caller must have acquired the softc lock before fe_loadmar.
2184 * This function starts the DLC upon return. So it can be called only
2185 * when the chip is working, i.e., from the driver's point of view, when
2186 * a device is RUNNING. (I mistook the point in previous versions.)
2189 fe_loadmar (struct fe_softc * sc)
2191 /* Stop the DLC (transmitter and receiver). */
2193 fe_outb(sc, FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_DISABLE);
2196 /* Select register bank 1 for MARs. */
2197 fe_outb(sc, FE_DLCR7, sc->proto_dlcr7 | FE_D7_RBS_MAR | FE_D7_POWER_UP);
2199 /* Copy filter value into the registers. */
2200 fe_outblk(sc, FE_MAR8, sc->filter.data, FE_FILTER_LEN);
2202 /* Restore the bank selection for BMPRs (i.e., runtime registers). */
2203 fe_outb(sc, FE_DLCR7,
2204 sc->proto_dlcr7 | FE_D7_RBS_BMPR | FE_D7_POWER_UP);
2206 /* Restart the DLC. */
2208 fe_outb(sc, FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_ENABLE);
2211 /* We have just updated the filter. */
2212 sc->filter_change = 0;
2215 /* Change the media selection. */
2217 fe_medchange (struct ifnet *ifp)
2219 struct fe_softc *sc = (struct fe_softc *)ifp->if_softc;
2222 /* If_media should not pass any request for a media which this
2223 interface doesn't support. */
2226 for (b = 0; bit2media[b] != 0; b++) {
2227 if (bit2media[b] == sc->media.ifm_media) break;
2229 if (((1 << b) & sc->mbitmap) == 0) {
2231 "got an unsupported media request (0x%x)\n",
2232 sc->media.ifm_media);
2237 /* We don't actually change media when the interface is down.
2238 fe_init() will do the job, instead. Should we also wait
2239 until the transmission buffer being empty? Changing the
2240 media when we are sending a frame will cause two garbages
2241 on wires, one on old media and another on new. FIXME */
2243 if (sc->ifp->if_flags & IFF_UP) {
2244 if (sc->msel) sc->msel(sc);
2251 /* I don't know how I can support media status callback... FIXME. */
2253 fe_medstat (struct ifnet *ifp, struct ifmediareq *ifmr)
2255 struct fe_softc *sc = ifp->if_softc;
2257 ifmr->ifm_active = sc->media.ifm_media;