2 * All Rights Reserved, Copyright (C) Fujitsu Limited 1995
4 * This software may be used, modified, copied, distributed, and sold, in
5 * both source and binary form provided that the above copyright, these
6 * terms and the following disclaimer are retained. The name of the author
7 * and/or the contributor may not be used to endorse or promote products
8 * derived from this software without specific prior written permission.
10 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND THE CONTRIBUTOR ``AS IS'' AND
11 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
12 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
13 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR THE CONTRIBUTOR BE LIABLE
14 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
15 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
16 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION.
17 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
18 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
19 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
23 #include <sys/cdefs.h>
24 __FBSDID("$FreeBSD$");
28 * Device driver for Fujitsu MB86960A/MB86965A based Ethernet cards.
29 * Contributed by M. Sekiguchi. <seki@sysrap.cs.fujitsu.co.jp>
31 * This version is intended to be a generic template for various
32 * MB86960A/MB86965A based Ethernet cards. It currently supports
33 * Fujitsu FMV-180 series for ISA and Allied-Telesis AT1700/RE2000
34 * series for ISA, as well as Fujitsu MBH10302 PC Card.
35 * There are some currently-
36 * unused hooks embedded, which are primarily intended to support
37 * other types of Ethernet cards, but the author is not sure whether
40 * This version also includes some alignments to support RE1000,
41 * C-NET(98)P2 and so on. These cards are not for AT-compatibles,
42 * but for NEC PC-98 bus -- a proprietary bus architecture available
43 * only in Japan. Confusingly, it is different from the Microsoft's
44 * PC98 architecture. :-{
45 * Further work for PC-98 version will be available as a part of
46 * FreeBSD(98) project.
48 * This software is a derivative work of if_ed.c version 1.56 by David
49 * Greenman available as a part of FreeBSD 2.0 RELEASE source distribution.
51 * The following lines are retained from the original if_ed.c:
53 * Copyright (C) 1993, David Greenman. This software may be used, modified,
54 * copied, distributed, and sold, in both source and binary form provided
55 * that the above copyright and these terms are retained. Under no
56 * circumstances is the author responsible for the proper functioning
57 * of this software, nor does the author assume any responsibility
58 * for damages incurred with its use.
63 * o To support ISA PnP auto configuration for FMV-183/184.
64 * o To support REX-9886/87(PC-98 only).
65 * o To reconsider mbuf usage.
66 * o To reconsider transmission buffer usage, including
67 * transmission buffer size (currently 4KB x 2) and pros-and-
68 * cons of multiple frame transmission.
69 * o To test IPX codes.
70 * o To test new-bus frontend.
73 #include <sys/param.h>
74 #include <sys/kernel.h>
75 #include <sys/systm.h>
76 #include <sys/socket.h>
77 #include <sys/sockio.h>
81 #include <machine/bus.h>
84 #include <net/ethernet.h>
86 #include <net/if_var.h>
87 #include <net/if_dl.h>
88 #include <net/if_mib.h>
89 #include <net/if_media.h>
90 #include <net/if_types.h>
92 #include <netinet/in.h>
93 #include <netinet/if_ether.h>
97 #include <dev/fe/mb86960.h>
98 #include <dev/fe/if_fereg.h>
99 #include <dev/fe/if_fevar.h>
102 * Transmit just one packet per a "send" command to 86960.
103 * This option is intended for performance test. An EXPERIMENTAL option.
105 #ifndef FE_SINGLE_TRANSMISSION
106 #define FE_SINGLE_TRANSMISSION 0
110 * Maximum loops when interrupt.
111 * This option prevents an infinite loop due to hardware failure.
112 * (Some laptops make an infinite loop after PC Card is ejected.)
115 #define FE_MAX_LOOP 0x800
119 * Device configuration flags.
122 /* DLCR6 settings. */
123 #define FE_FLAGS_DLCR6_VALUE 0x007F
125 /* Force DLCR6 override. */
126 #define FE_FLAGS_OVERRIDE_DLCR6 0x0080
129 devclass_t fe_devclass;
132 * Special filter values.
134 static struct fe_filter const fe_filter_nothing = { FE_FILTER_NOTHING };
135 static struct fe_filter const fe_filter_all = { FE_FILTER_ALL };
137 /* Standard driver entry points. These can be static. */
138 static void fe_init (void *);
139 static void fe_init_locked (struct fe_softc *);
140 static driver_intr_t fe_intr;
141 static int fe_ioctl (struct ifnet *, u_long, caddr_t);
142 static void fe_start (struct ifnet *);
143 static void fe_start_locked (struct ifnet *);
144 static void fe_watchdog (void *);
145 static int fe_medchange (struct ifnet *);
146 static void fe_medstat (struct ifnet *, struct ifmediareq *);
148 /* Local functions. Order of declaration is confused. FIXME. */
149 static int fe_get_packet ( struct fe_softc *, u_short );
150 static void fe_tint ( struct fe_softc *, u_char );
151 static void fe_rint ( struct fe_softc *, u_char );
152 static void fe_xmit ( struct fe_softc * );
153 static void fe_write_mbufs ( struct fe_softc *, struct mbuf * );
154 static void fe_setmode ( struct fe_softc * );
155 static void fe_loadmar ( struct fe_softc * );
158 static void fe_emptybuffer ( struct fe_softc * );
162 * Fe driver specific constants which relate to 86960/86965.
165 /* Interrupt masks */
166 #define FE_TMASK ( FE_D2_COLL16 | FE_D2_TXDONE )
167 #define FE_RMASK ( FE_D3_OVRFLO | FE_D3_CRCERR \
168 | FE_D3_ALGERR | FE_D3_SRTPKT | FE_D3_PKTRDY )
170 /* Maximum number of iterations for a receive interrupt. */
171 #define FE_MAX_RECV_COUNT ( ( 65536 - 2048 * 2 ) / 64 )
173 * Maximum size of SRAM is 65536,
174 * minimum size of transmission buffer in fe is 2x2KB,
175 * and minimum amount of received packet including headers
176 * added by the chip is 64 bytes.
177 * Hence FE_MAX_RECV_COUNT is the upper limit for number
178 * of packets in the receive buffer.
182 * Miscellaneous definitions not directly related to hardware.
185 /* The following line must be delete when "net/if_media.h" support it. */
187 #define IFM_10_FL /* 13 */ IFM_10_5
191 /* Mapping between media bitmap (in fe_softc.mbitmap) and ifm_media. */
192 static int const bit2media [] = {
193 IFM_HDX | IFM_ETHER | IFM_AUTO,
194 IFM_HDX | IFM_ETHER | IFM_MANUAL,
195 IFM_HDX | IFM_ETHER | IFM_10_T,
196 IFM_HDX | IFM_ETHER | IFM_10_2,
197 IFM_HDX | IFM_ETHER | IFM_10_5,
198 IFM_HDX | IFM_ETHER | IFM_10_FL,
199 IFM_FDX | IFM_ETHER | IFM_10_T,
200 /* More can be come here... */
204 /* Mapping between media bitmap (in fe_softc.mbitmap) and ifm_media. */
205 static int const bit2media [] = {
206 IFM_ETHER | IFM_AUTO,
207 IFM_ETHER | IFM_MANUAL,
208 IFM_ETHER | IFM_10_T,
209 IFM_ETHER | IFM_10_2,
210 IFM_ETHER | IFM_10_5,
211 IFM_ETHER | IFM_10_FL,
212 IFM_ETHER | IFM_10_T,
213 /* More can be come here... */
219 * Check for specific bits in specific registers have specific values.
220 * A common utility function called from various sub-probe routines.
223 fe_simple_probe (struct fe_softc const * sc,
224 struct fe_simple_probe_struct const * sp)
226 struct fe_simple_probe_struct const *p;
229 for (p = sp; p->mask != 0; p++) {
230 bits = fe_inb(sc, p->port);
231 printf("port %d, mask %x, bits %x read %x\n", p->port,
232 p->mask, p->bits, bits);
233 if ((bits & p->mask) != p->bits)
239 /* Test if a given 6 byte value is a valid Ethernet station (MAC)
240 address. "Vendor" is an expected vendor code (first three bytes,)
241 or a zero when nothing expected. */
243 fe_valid_Ether_p (u_char const * addr, unsigned vendor)
246 printf("fe?: validating %6D against %06x\n", addr, ":", vendor);
249 /* All zero is not allowed as a vendor code. */
250 if (addr[0] == 0 && addr[1] == 0 && addr[2] == 0) return 0;
254 /* Legal Ethernet address (stored in ROM) must have
255 its Group and Local bits cleared. */
256 if ((addr[0] & 0x03) != 0) return 0;
259 /* Same as above, but a local address is allowed in
261 if (ETHER_IS_MULTICAST(addr)) return 0;
264 /* Make sure the vendor part matches if one is given. */
265 if ( addr[0] != ((vendor >> 16) & 0xFF)
266 || addr[1] != ((vendor >> 8) & 0xFF)
267 || addr[2] != ((vendor ) & 0xFF)) return 0;
271 /* Host part must not be all-zeros nor all-ones. */
272 if (addr[3] == 0xFF && addr[4] == 0xFF && addr[5] == 0xFF) return 0;
273 if (addr[3] == 0x00 && addr[4] == 0x00 && addr[5] == 0x00) return 0;
275 /* Given addr looks like an Ethernet address. */
279 /* Fill our softc struct with default value. */
281 fe_softc_defaults (struct fe_softc *sc)
283 /* Prepare for typical register prototypes. We assume a
284 "typical" board has <32KB> of <fast> SRAM connected with a
285 <byte-wide> data lines. */
286 sc->proto_dlcr4 = FE_D4_LBC_DISABLE | FE_D4_CNTRL;
288 sc->proto_dlcr6 = FE_D6_BUFSIZ_32KB | FE_D6_TXBSIZ_2x4KB
289 | FE_D6_BBW_BYTE | FE_D6_SBW_WORD | FE_D6_SRAM_100ns;
290 sc->proto_dlcr7 = FE_D7_BYTSWP_LH;
291 sc->proto_bmpr13 = 0;
293 /* Assume the probe process (to be done later) is stable. */
296 /* A typical board needs no hooks. */
300 /* Assume the board has no software-controllable media selection. */
302 sc->defmedia = MB_HM;
306 /* Common error reporting routine used in probe routines for
307 "soft configured IRQ"-type boards. */
309 fe_irq_failure (char const *name, int unit, int irq, char const *list)
311 printf("fe%d: %s board is detected, but %s IRQ was given\n",
312 unit, name, (irq == NO_IRQ ? "no" : "invalid"));
314 printf("fe%d: specify an IRQ from %s in kernel config\n",
320 * Hardware (vendor) specific hooks.
324 * Generic media selection scheme for MB86965 based boards.
327 fe_msel_965 (struct fe_softc *sc)
331 /* Find the appropriate bits for BMPR13 tranceiver control. */
332 switch (IFM_SUBTYPE(sc->media.ifm_media)) {
333 case IFM_AUTO: b13 = FE_B13_PORT_AUTO | FE_B13_TPTYPE_UTP; break;
334 case IFM_10_T: b13 = FE_B13_PORT_TP | FE_B13_TPTYPE_UTP; break;
335 default: b13 = FE_B13_PORT_AUI; break;
338 /* Write it into the register. It takes effect immediately. */
339 fe_outb(sc, FE_BMPR13, sc->proto_bmpr13 | b13);
344 * Fujitsu MB86965 JLI mode support routines.
348 * Routines to read all bytes from the config EEPROM through MB86965A.
349 * It is a MicroWire (3-wire) serial EEPROM with 6-bit address.
353 fe_strobe_eeprom_jli (struct fe_softc *sc, u_short bmpr16)
356 * We must guarantee 1us (or more) interval to access slow
357 * EEPROMs. The following redundant code provides enough
358 * delay with ISA timing. (Even if the bus clock is "tuned.")
359 * Some modification will be needed on faster busses.
361 fe_outb(sc, bmpr16, FE_B16_SELECT);
362 fe_outb(sc, bmpr16, FE_B16_SELECT | FE_B16_CLOCK);
363 fe_outb(sc, bmpr16, FE_B16_SELECT | FE_B16_CLOCK);
364 fe_outb(sc, bmpr16, FE_B16_SELECT);
368 fe_read_eeprom_jli (struct fe_softc * sc, u_char * data)
371 u_char save16, save17;
373 /* Save the current value of the EEPROM interface registers. */
374 save16 = fe_inb(sc, FE_BMPR16);
375 save17 = fe_inb(sc, FE_BMPR17);
377 /* Read bytes from EEPROM; two bytes per an iteration. */
378 for (n = 0; n < JLI_EEPROM_SIZE / 2; n++) {
380 /* Reset the EEPROM interface. */
381 fe_outb(sc, FE_BMPR16, 0x00);
382 fe_outb(sc, FE_BMPR17, 0x00);
384 /* Start EEPROM access. */
385 fe_outb(sc, FE_BMPR16, FE_B16_SELECT);
386 fe_outb(sc, FE_BMPR17, FE_B17_DATA);
387 fe_strobe_eeprom_jli(sc, FE_BMPR16);
389 /* Pass the iteration count as well as a READ command. */
391 for (bit = 0x80; bit != 0x00; bit >>= 1) {
392 fe_outb(sc, FE_BMPR17, (val & bit) ? FE_B17_DATA : 0);
393 fe_strobe_eeprom_jli(sc, FE_BMPR16);
395 fe_outb(sc, FE_BMPR17, 0x00);
399 for (bit = 0x80; bit != 0x00; bit >>= 1) {
400 fe_strobe_eeprom_jli(sc, FE_BMPR16);
401 if (fe_inb(sc, FE_BMPR17) & FE_B17_DATA)
406 /* Read one more byte. */
408 for (bit = 0x80; bit != 0x00; bit >>= 1) {
409 fe_strobe_eeprom_jli(sc, FE_BMPR16);
410 if (fe_inb(sc, FE_BMPR17) & FE_B17_DATA)
417 /* Reset the EEPROM interface, again. */
418 fe_outb(sc, FE_BMPR16, 0x00);
419 fe_outb(sc, FE_BMPR17, 0x00);
421 /* Make sure to restore the original value of EEPROM interface
422 registers, since we are not yet sure we have MB86965A on
424 fe_outb(sc, FE_BMPR17, save17);
425 fe_outb(sc, FE_BMPR16, save16);
429 /* Report what we got. */
432 data -= JLI_EEPROM_SIZE;
433 for (i = 0; i < JLI_EEPROM_SIZE; i += 16) {
435 "EEPROM(JLI):%3x: %16D\n", i, data + i, " ");
442 fe_init_jli (struct fe_softc * sc)
444 /* "Reset" by writing into a magic location. */
446 fe_outb(sc, 0x1E, fe_inb(sc, 0x1E));
452 * SSi 78Q8377A support routines.
456 * Routines to read all bytes from the config EEPROM through 78Q8377A.
457 * It is a MicroWire (3-wire) serial EEPROM with 8-bit address. (I.e.,
460 * As I don't have SSi manuals, (hmm, an old song again!) I'm not exactly
461 * sure the following code is correct... It is just stolen from the
462 * C-NET(98)P2 support routine in FreeBSD(98).
466 fe_read_eeprom_ssi (struct fe_softc *sc, u_char *data)
470 u_char save6, save7, save12;
472 /* Save the current value for the DLCR registers we are about
474 save6 = fe_inb(sc, FE_DLCR6);
475 save7 = fe_inb(sc, FE_DLCR7);
477 /* Put the 78Q8377A into a state that we can access the EEPROM. */
478 fe_outb(sc, FE_DLCR6,
479 FE_D6_BBW_WORD | FE_D6_SBW_WORD | FE_D6_DLC_DISABLE);
480 fe_outb(sc, FE_DLCR7,
481 FE_D7_BYTSWP_LH | FE_D7_RBS_BMPR | FE_D7_RDYPNS | FE_D7_POWER_UP);
483 /* Save the current value for the BMPR12 register, too. */
484 save12 = fe_inb(sc, FE_DLCR12);
486 /* Read bytes from EEPROM; two bytes per an iteration. */
487 for (n = 0; n < SSI_EEPROM_SIZE / 2; n++) {
489 /* Start EEPROM access */
490 fe_outb(sc, FE_DLCR12, SSI_EEP);
491 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL);
493 /* Send the following four bits to the EEPROM in the
494 specified order: a dummy bit, a start bit, and
495 command bits (10) for READ. */
496 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL );
497 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL | SSI_CLK ); /* 0 */
498 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL | SSI_DAT);
499 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL | SSI_CLK | SSI_DAT); /* 1 */
500 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL | SSI_DAT);
501 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL | SSI_CLK | SSI_DAT); /* 1 */
502 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL );
503 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL | SSI_CLK ); /* 0 */
505 /* Pass the iteration count to the chip. */
506 for (bit = 0x80; bit != 0x00; bit >>= 1) {
507 val = ( n & bit ) ? SSI_DAT : 0;
508 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL | val);
509 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL | SSI_CLK | val);
514 for (bit = 0x80; bit != 0x00; bit >>= 1) {
515 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL);
516 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL | SSI_CLK);
517 if (fe_inb(sc, FE_DLCR12) & SSI_DIN)
522 /* Read one more byte. */
524 for (bit = 0x80; bit != 0x00; bit >>= 1) {
525 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL);
526 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL | SSI_CLK);
527 if (fe_inb(sc, FE_DLCR12) & SSI_DIN)
532 fe_outb(sc, FE_DLCR12, SSI_EEP);
535 /* Reset the EEPROM interface. (For now.) */
536 fe_outb(sc, FE_DLCR12, 0x00);
538 /* Restore the saved register values, for the case that we
539 didn't have 78Q8377A at the given address. */
540 fe_outb(sc, FE_DLCR12, save12);
541 fe_outb(sc, FE_DLCR7, save7);
542 fe_outb(sc, FE_DLCR6, save6);
545 /* Report what we got. */
548 data -= SSI_EEPROM_SIZE;
549 for (i = 0; i < SSI_EEPROM_SIZE; i += 16) {
551 "EEPROM(SSI):%3x: %16D\n", i, data + i, " ");
558 * TDK/LANX boards support routines.
561 /* It is assumed that the CLK line is low and SDA is high (float) upon entry. */
562 #define LNX_PH(D,K,N) \
563 ((LNX_SDA_##D | LNX_CLK_##K) << N)
564 #define LNX_CYCLE(D1,D2,D3,D4,K1,K2,K3,K4) \
565 (LNX_PH(D1,K1,0)|LNX_PH(D2,K2,8)|LNX_PH(D3,K3,16)|LNX_PH(D4,K4,24))
567 #define LNX_CYCLE_START LNX_CYCLE(HI,LO,LO,HI, HI,HI,LO,LO)
568 #define LNX_CYCLE_STOP LNX_CYCLE(LO,LO,HI,HI, LO,HI,HI,LO)
569 #define LNX_CYCLE_HI LNX_CYCLE(HI,HI,HI,HI, LO,HI,LO,LO)
570 #define LNX_CYCLE_LO LNX_CYCLE(LO,LO,LO,HI, LO,HI,LO,LO)
571 #define LNX_CYCLE_INIT LNX_CYCLE(LO,HI,HI,HI, LO,LO,LO,LO)
574 fe_eeprom_cycle_lnx (struct fe_softc *sc, u_short reg20, u_long cycle)
576 fe_outb(sc, reg20, (cycle ) & 0xFF);
578 fe_outb(sc, reg20, (cycle >> 8) & 0xFF);
580 fe_outb(sc, reg20, (cycle >> 16) & 0xFF);
582 fe_outb(sc, reg20, (cycle >> 24) & 0xFF);
587 fe_eeprom_receive_lnx (struct fe_softc *sc, u_short reg20)
591 fe_outb(sc, reg20, LNX_CLK_HI | LNX_SDA_FL);
593 dat = fe_inb(sc, reg20);
594 fe_outb(sc, reg20, LNX_CLK_LO | LNX_SDA_FL);
596 return (dat & LNX_SDA_IN);
600 fe_read_eeprom_lnx (struct fe_softc *sc, u_char *data)
605 u_short reg20 = 0x14;
607 save20 = fe_inb(sc, reg20);
609 /* NOTE: DELAY() timing constants are approximately three
610 times longer (slower) than the required minimum. This is
611 to guarantee a reliable operation under some tough
612 conditions... Fortunately, this routine is only called
613 during the boot phase, so the speed is less important than
617 /* Reset the X24C01's internal state machine and put it into
618 the IDLE state. We usually don't need this, but *if*
619 someone (e.g., probe routine of other driver) write some
620 garbage into the register at 0x14, synchronization will be
621 lost, and the normal EEPROM access protocol won't work.
622 Moreover, as there are no easy way to reset, we need a
623 _manoeuvre_ here. (It even lacks a reset pin, so pushing
624 the RESET button on the PC doesn't help!) */
625 fe_eeprom_cycle_lnx(sc, reg20, LNX_CYCLE_INIT);
626 for (i = 0; i < 10; i++)
627 fe_eeprom_cycle_lnx(sc, reg20, LNX_CYCLE_START);
628 fe_eeprom_cycle_lnx(sc, reg20, LNX_CYCLE_STOP);
632 /* Issue a start condition. */
633 fe_eeprom_cycle_lnx(sc, reg20, LNX_CYCLE_START);
635 /* Send seven bits of the starting address (zero, in this
636 case) and a command bit for READ. */
638 for (bit = 0x80; bit != 0x00; bit >>= 1) {
640 fe_eeprom_cycle_lnx(sc, reg20, LNX_CYCLE_HI);
642 fe_eeprom_cycle_lnx(sc, reg20, LNX_CYCLE_LO);
646 /* Receive an ACK bit. */
647 if (fe_eeprom_receive_lnx(sc, reg20)) {
648 /* ACK was not received. EEPROM is not present (i.e.,
649 this board was not a TDK/LANX) or not working
653 "no ACK received from EEPROM(LNX)\n");
655 /* Clear the given buffer to indicate we could not get
656 any info. and return. */
657 bzero(data, LNX_EEPROM_SIZE);
661 /* Read bytes from EEPROM. */
662 for (n = 0; n < LNX_EEPROM_SIZE; n++) {
664 /* Read a byte and store it into the buffer. */
666 for (bit = 0x80; bit != 0x00; bit >>= 1) {
667 if (fe_eeprom_receive_lnx(sc, reg20))
672 /* Acknowledge if we have to read more. */
673 if (n < LNX_EEPROM_SIZE - 1) {
674 fe_eeprom_cycle_lnx(sc, reg20, LNX_CYCLE_LO);
678 /* Issue a STOP condition, de-activating the clock line.
679 It will be safer to keep the clock line low than to leave
681 fe_eeprom_cycle_lnx(sc, reg20, LNX_CYCLE_STOP);
684 fe_outb(sc, reg20, save20);
687 /* Report what we got. */
689 data -= LNX_EEPROM_SIZE;
690 for (i = 0; i < LNX_EEPROM_SIZE; i += 16) {
692 "EEPROM(LNX):%3x: %16D\n", i, data + i, " ");
699 fe_init_lnx (struct fe_softc * sc)
701 /* Reset the 86960. Do we need this? FIXME. */
702 fe_outb(sc, 0x12, 0x06);
704 fe_outb(sc, 0x12, 0x07);
707 /* Setup IRQ control register on the ASIC. */
708 fe_outb(sc, 0x14, sc->priv_info);
713 * Ungermann-Bass boards support routine.
716 fe_init_ubn (struct fe_softc * sc)
718 /* Do we need this? FIXME. */
719 fe_outb(sc, FE_DLCR7,
720 sc->proto_dlcr7 | FE_D7_RBS_BMPR | FE_D7_POWER_UP);
721 fe_outb(sc, 0x18, 0x00);
724 /* Setup IRQ control register on the ASIC. */
725 fe_outb(sc, 0x14, sc->priv_info);
730 * Install interface into kernel networking data structures
733 fe_attach (device_t dev)
735 struct fe_softc *sc = device_get_softc(dev);
737 int flags = device_get_flags(dev);
740 ifp = sc->ifp = if_alloc(IFT_ETHER);
742 device_printf(dev, "can not ifalloc\n");
743 fe_release_resource(dev);
747 mtx_init(&sc->lock, device_get_nameunit(dev), MTX_NETWORK_LOCK,
749 callout_init_mtx(&sc->timer, &sc->lock, 0);
752 * Initialize ifnet structure
755 if_initname(sc->ifp, device_get_name(dev), device_get_unit(dev));
756 ifp->if_start = fe_start;
757 ifp->if_ioctl = fe_ioctl;
758 ifp->if_init = fe_init;
759 ifp->if_linkmib = &sc->mibdata;
760 ifp->if_linkmiblen = sizeof (sc->mibdata);
762 #if 0 /* I'm not sure... */
763 sc->mibdata.dot3Compliance = DOT3COMPLIANCE_COLLS;
767 * Set fixed interface flags.
769 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
770 IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen);
772 #if FE_SINGLE_TRANSMISSION
773 /* Override txb config to allocate minimum. */
774 sc->proto_dlcr6 &= ~FE_D6_TXBSIZ
775 sc->proto_dlcr6 |= FE_D6_TXBSIZ_2x2KB;
778 /* Modify hardware config if it is requested. */
779 if (flags & FE_FLAGS_OVERRIDE_DLCR6)
780 sc->proto_dlcr6 = flags & FE_FLAGS_DLCR6_VALUE;
782 /* Find TX buffer size, based on the hardware dependent proto. */
783 switch (sc->proto_dlcr6 & FE_D6_TXBSIZ) {
784 case FE_D6_TXBSIZ_2x2KB: sc->txb_size = 2048; break;
785 case FE_D6_TXBSIZ_2x4KB: sc->txb_size = 4096; break;
786 case FE_D6_TXBSIZ_2x8KB: sc->txb_size = 8192; break;
788 /* Oops, we can't work with single buffer configuration. */
791 "strange TXBSIZ config; fixing\n");
793 sc->proto_dlcr6 &= ~FE_D6_TXBSIZ;
794 sc->proto_dlcr6 |= FE_D6_TXBSIZ_2x2KB;
799 /* Initialize the if_media interface. */
800 ifmedia_init(&sc->media, 0, fe_medchange, fe_medstat);
801 for (b = 0; bit2media[b] != 0; b++) {
802 if (sc->mbitmap & (1 << b)) {
803 ifmedia_add(&sc->media, bit2media[b], 0, NULL);
806 for (b = 0; bit2media[b] != 0; b++) {
807 if (sc->defmedia & (1 << b)) {
808 ifmedia_set(&sc->media, bit2media[b]);
812 #if 0 /* Turned off; this is called later, when the interface UPs. */
816 /* Attach and stop the interface. */
820 ether_ifattach(sc->ifp, sc->enaddr);
822 error = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_NET | INTR_MPSAFE,
823 NULL, fe_intr, sc, &sc->irq_handle);
826 mtx_destroy(&sc->lock);
828 fe_release_resource(dev);
832 /* Print additional info when attached. */
833 device_printf(dev, "type %s%s\n", sc->typestr,
834 (sc->proto_dlcr4 & FE_D4_DSC) ? ", full duplex" : "");
836 int buf, txb, bbw, sbw, ram;
838 buf = txb = bbw = sbw = ram = -1;
839 switch ( sc->proto_dlcr6 & FE_D6_BUFSIZ ) {
840 case FE_D6_BUFSIZ_8KB: buf = 8; break;
841 case FE_D6_BUFSIZ_16KB: buf = 16; break;
842 case FE_D6_BUFSIZ_32KB: buf = 32; break;
843 case FE_D6_BUFSIZ_64KB: buf = 64; break;
845 switch ( sc->proto_dlcr6 & FE_D6_TXBSIZ ) {
846 case FE_D6_TXBSIZ_2x2KB: txb = 2; break;
847 case FE_D6_TXBSIZ_2x4KB: txb = 4; break;
848 case FE_D6_TXBSIZ_2x8KB: txb = 8; break;
850 switch ( sc->proto_dlcr6 & FE_D6_BBW ) {
851 case FE_D6_BBW_BYTE: bbw = 8; break;
852 case FE_D6_BBW_WORD: bbw = 16; break;
854 switch ( sc->proto_dlcr6 & FE_D6_SBW ) {
855 case FE_D6_SBW_BYTE: sbw = 8; break;
856 case FE_D6_SBW_WORD: sbw = 16; break;
858 switch ( sc->proto_dlcr6 & FE_D6_SRAM ) {
859 case FE_D6_SRAM_100ns: ram = 100; break;
860 case FE_D6_SRAM_150ns: ram = 150; break;
862 device_printf(dev, "SRAM %dKB %dbit %dns, TXB %dKBx2, %dbit I/O\n",
863 buf, bbw, ram, txb, sbw);
865 if (sc->stability & UNSTABLE_IRQ)
866 device_printf(dev, "warning: IRQ number may be incorrect\n");
867 if (sc->stability & UNSTABLE_MAC)
868 device_printf(dev, "warning: above MAC address may be incorrect\n");
869 if (sc->stability & UNSTABLE_TYPE)
870 device_printf(dev, "warning: hardware type was not validated\n");
876 fe_alloc_port(device_t dev, int size)
878 struct fe_softc *sc = device_get_softc(dev);
879 struct resource *res;
883 res = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid,
884 0ul, ~0ul, size, RF_ACTIVE);
886 sc->port_used = size;
895 fe_alloc_irq(device_t dev, int flags)
897 struct fe_softc *sc = device_get_softc(dev);
898 struct resource *res;
902 res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE | flags);
912 fe_release_resource(device_t dev)
914 struct fe_softc *sc = device_get_softc(dev);
917 bus_release_resource(dev, SYS_RES_IOPORT, 0, sc->port_res);
921 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq_res);
927 * Reset interface, after some (hardware) trouble is deteced.
930 fe_reset (struct fe_softc *sc)
932 /* Record how many packets are lost by this accident. */
933 sc->ifp->if_oerrors += sc->txb_sched + sc->txb_count;
934 sc->mibdata.dot3StatsInternalMacTransmitErrors++;
936 /* Put the interface into known initial state. */
938 if (sc->ifp->if_flags & IFF_UP)
943 * Stop everything on the interface.
945 * All buffered packets, both transmitting and receiving,
946 * if any, will be lost by stopping the interface.
949 fe_stop (struct fe_softc *sc)
952 FE_ASSERT_LOCKED(sc);
954 /* Disable interrupts. */
955 fe_outb(sc, FE_DLCR2, 0x00);
956 fe_outb(sc, FE_DLCR3, 0x00);
958 /* Stop interface hardware. */
960 fe_outb(sc, FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_DISABLE);
963 /* Clear all interrupt status. */
964 fe_outb(sc, FE_DLCR0, 0xFF);
965 fe_outb(sc, FE_DLCR1, 0xFF);
967 /* Put the chip in stand-by mode. */
969 fe_outb(sc, FE_DLCR7, sc->proto_dlcr7 | FE_D7_POWER_DOWN);
972 /* Reset transmitter variables and interface flags. */
973 sc->ifp->if_drv_flags &= ~(IFF_DRV_OACTIVE | IFF_DRV_RUNNING);
975 callout_stop(&sc->timer);
976 sc->txb_free = sc->txb_size;
980 /* MAR loading can be delayed. */
981 sc->filter_change = 0;
983 /* Call a device-specific hook. */
989 * Device timeout/watchdog routine. Entered if the device neglects to
990 * generate an interrupt after a transmit has been started on it.
993 fe_watchdog (void *arg)
995 struct fe_softc *sc = arg;
997 FE_ASSERT_LOCKED(sc);
999 if (sc->tx_timeout && --sc->tx_timeout == 0) {
1000 /* A "debug" message. */
1001 if_printf(sc->ifp, "transmission timeout (%d+%d)%s\n",
1002 sc->txb_sched, sc->txb_count,
1003 (sc->ifp->if_flags & IFF_UP) ? "" : " when down");
1004 if (sc->ifp->if_opackets == 0 && sc->ifp->if_ipackets == 0)
1005 if_printf(sc->ifp, "wrong IRQ setting in config?\n");
1008 callout_reset(&sc->timer, hz, fe_watchdog, sc);
1012 * Initialize device.
1015 fe_init (void * xsc)
1017 struct fe_softc *sc = xsc;
1025 fe_init_locked (struct fe_softc *sc)
1028 /* Start initializing 86960. */
1030 /* Call a hook before we start initializing the chip. */
1035 * Make sure to disable the chip, also.
1036 * This may also help re-programming the chip after
1037 * hot insertion of PCMCIAs.
1040 fe_outb(sc, FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_DISABLE);
1043 /* Power up the chip and select register bank for DLCRs. */
1045 fe_outb(sc, FE_DLCR7,
1046 sc->proto_dlcr7 | FE_D7_RBS_DLCR | FE_D7_POWER_UP);
1049 /* Feed the station address. */
1050 fe_outblk(sc, FE_DLCR8, IF_LLADDR(sc->ifp), ETHER_ADDR_LEN);
1052 /* Clear multicast address filter to receive nothing. */
1053 fe_outb(sc, FE_DLCR7,
1054 sc->proto_dlcr7 | FE_D7_RBS_MAR | FE_D7_POWER_UP);
1055 fe_outblk(sc, FE_MAR8, fe_filter_nothing.data, FE_FILTER_LEN);
1057 /* Select the BMPR bank for runtime register access. */
1058 fe_outb(sc, FE_DLCR7,
1059 sc->proto_dlcr7 | FE_D7_RBS_BMPR | FE_D7_POWER_UP);
1061 /* Initialize registers. */
1062 fe_outb(sc, FE_DLCR0, 0xFF); /* Clear all bits. */
1063 fe_outb(sc, FE_DLCR1, 0xFF); /* ditto. */
1064 fe_outb(sc, FE_DLCR2, 0x00);
1065 fe_outb(sc, FE_DLCR3, 0x00);
1066 fe_outb(sc, FE_DLCR4, sc->proto_dlcr4);
1067 fe_outb(sc, FE_DLCR5, sc->proto_dlcr5);
1068 fe_outb(sc, FE_BMPR10, 0x00);
1069 fe_outb(sc, FE_BMPR11, FE_B11_CTRL_SKIP | FE_B11_MODE1);
1070 fe_outb(sc, FE_BMPR12, 0x00);
1071 fe_outb(sc, FE_BMPR13, sc->proto_bmpr13);
1072 fe_outb(sc, FE_BMPR14, 0x00);
1073 fe_outb(sc, FE_BMPR15, 0x00);
1075 /* Enable interrupts. */
1076 fe_outb(sc, FE_DLCR2, FE_TMASK);
1077 fe_outb(sc, FE_DLCR3, FE_RMASK);
1079 /* Select requested media, just before enabling DLC. */
1083 /* Enable transmitter and receiver. */
1085 fe_outb(sc, FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_ENABLE);
1090 * Make sure to empty the receive buffer.
1092 * This may be redundant, but *if* the receive buffer were full
1093 * at this point, then the driver would hang. I have experienced
1094 * some strange hang-up just after UP. I hope the following
1095 * code solve the problem.
1097 * I have changed the order of hardware initialization.
1098 * I think the receive buffer cannot have any packets at this
1099 * point in this version. The following code *must* be
1100 * redundant now. FIXME.
1102 * I've heard a rumore that on some PC Card implementation of
1103 * 8696x, the receive buffer can have some data at this point.
1104 * The following message helps discovering the fact. FIXME.
1106 if (!(fe_inb(sc, FE_DLCR5) & FE_D5_BUFEMP)) {
1108 "receive buffer has some data after reset\n");
1112 /* Do we need this here? Actually, no. I must be paranoia. */
1113 fe_outb(sc, FE_DLCR0, 0xFF); /* Clear all bits. */
1114 fe_outb(sc, FE_DLCR1, 0xFF); /* ditto. */
1117 /* Set 'running' flag, because we are now running. */
1118 sc->ifp->if_drv_flags |= IFF_DRV_RUNNING;
1119 callout_reset(&sc->timer, hz, fe_watchdog, sc);
1122 * At this point, the interface is running properly,
1123 * except that it receives *no* packets. we then call
1124 * fe_setmode() to tell the chip what packets to be
1125 * received, based on the if_flags and multicast group
1126 * list. It completes the initialization process.
1131 /* ...and attempt to start output queued packets. */
1132 /* TURNED OFF, because the semi-auto media prober wants to UP
1133 the interface keeping it idle. The upper layer will soon
1134 start the interface anyway, and there are no significant
1136 fe_start_locked(sc->ifp);
1141 * This routine actually starts the transmission on the interface
1144 fe_xmit (struct fe_softc *sc)
1147 * Set a timer just in case we never hear from the board again.
1148 * We use longer timeout for multiple packet transmission.
1149 * I'm not sure this timer value is appropriate. FIXME.
1151 sc->tx_timeout = 1 + sc->txb_count;
1153 /* Update txb variables. */
1154 sc->txb_sched = sc->txb_count;
1156 sc->txb_free = sc->txb_size;
1159 /* Start transmitter, passing packets in TX buffer. */
1160 fe_outb(sc, FE_BMPR10, sc->txb_sched | FE_B10_START);
1164 * Start output on interface.
1165 * We make one assumption here:
1166 * 1) that the IFF_DRV_OACTIVE flag is checked before this code is called
1167 * (i.e. that the output part of the interface is idle)
1170 fe_start (struct ifnet *ifp)
1172 struct fe_softc *sc = ifp->if_softc;
1175 fe_start_locked(ifp);
1180 fe_start_locked (struct ifnet *ifp)
1182 struct fe_softc *sc = ifp->if_softc;
1186 /* Just a sanity check. */
1187 if ((sc->txb_count == 0) != (sc->txb_free == sc->txb_size)) {
1189 * Txb_count and txb_free co-works to manage the
1190 * transmission buffer. Txb_count keeps track of the
1191 * used potion of the buffer, while txb_free does unused
1192 * potion. So, as long as the driver runs properly,
1193 * txb_count is zero if and only if txb_free is same
1194 * as txb_size (which represents whole buffer.)
1196 if_printf(ifp, "inconsistent txb variables (%d, %d)\n",
1197 sc->txb_count, sc->txb_free);
1199 * So, what should I do, then?
1201 * We now know txb_count and txb_free contradicts. We
1202 * cannot, however, tell which is wrong. More
1203 * over, we cannot peek 86960 transmission buffer or
1204 * reset the transmission buffer. (In fact, we can
1205 * reset the entire interface. I don't want to do it.)
1207 * If txb_count is incorrect, leaving it as-is will cause
1208 * sending of garbage after next interrupt. We have to
1209 * avoid it. Hence, we reset the txb_count here. If
1210 * txb_free was incorrect, resetting txb_count just loses
1211 * some packets. We can live with it.
1218 * First, see if there are buffered packets and an idle
1219 * transmitter - should never happen at this point.
1221 if ((sc->txb_count > 0) && (sc->txb_sched == 0)) {
1222 if_printf(ifp, "transmitter idle with %d buffered packets\n",
1228 * Stop accepting more transmission packets temporarily, when
1229 * a filter change request is delayed. Updating the MARs on
1230 * 86960 flushes the transmission buffer, so it is delayed
1231 * until all buffered transmission packets have been sent
1234 if (sc->filter_change) {
1236 * Filter change request is delayed only when the DLC is
1237 * working. DLC soon raise an interrupt after finishing
1240 goto indicate_active;
1246 * See if there is room to put another packet in the buffer.
1247 * We *could* do better job by peeking the send queue to
1248 * know the length of the next packet. Current version just
1249 * tests against the worst case (i.e., longest packet). FIXME.
1251 * When adding the packet-peek feature, don't forget adding a
1252 * test on txb_count against QUEUEING_MAX.
1253 * There is a little chance the packet count exceeds
1254 * the limit. Assume transmission buffer is 8KB (2x8KB
1255 * configuration) and an application sends a bunch of small
1256 * (i.e., minimum packet sized) packets rapidly. An 8KB
1257 * buffer can hold 130 blocks of 62 bytes long...
1260 < ETHER_MAX_LEN - ETHER_CRC_LEN + FE_DATA_LEN_LEN) {
1262 goto indicate_active;
1265 #if FE_SINGLE_TRANSMISSION
1266 if (sc->txb_count > 0) {
1267 /* Just one packet per a transmission buffer. */
1268 goto indicate_active;
1273 * Get the next mbuf chain for a packet to send.
1275 IF_DEQUEUE(&sc->ifp->if_snd, m);
1277 /* No more packets to send. */
1278 goto indicate_inactive;
1282 * Copy the mbuf chain into the transmission buffer.
1283 * txb_* variables are updated as necessary.
1285 fe_write_mbufs(sc, m);
1287 /* Start transmitter if it's idle. */
1288 if ((sc->txb_count > 0) && (sc->txb_sched == 0))
1292 * Tap off here if there is a bpf listener,
1293 * and the device is *not* in promiscuous mode.
1294 * (86960 receives self-generated packets if
1295 * and only if it is in "receive everything"
1298 if (!(sc->ifp->if_flags & IFF_PROMISC))
1299 BPF_MTAP(sc->ifp, m);
1306 * We are using the !OACTIVE flag to indicate to
1307 * the outside world that we can accept an
1308 * additional packet rather than that the
1309 * transmitter is _actually_ active. Indeed, the
1310 * transmitter may be active, but if we haven't
1311 * filled all the buffers with data then we still
1312 * want to accept more.
1314 sc->ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
1319 * The transmitter is active, and there are no room for
1320 * more outgoing packets in the transmission buffer.
1322 sc->ifp->if_drv_flags |= IFF_DRV_OACTIVE;
1327 * Drop (skip) a packet from receive buffer in 86960 memory.
1330 fe_droppacket (struct fe_softc * sc, int len)
1335 * 86960 manual says that we have to read 8 bytes from the buffer
1336 * before skip the packets and that there must be more than 8 bytes
1337 * remaining in the buffer when issue a skip command.
1338 * Remember, we have already read 4 bytes before come here.
1341 /* Read 4 more bytes, and skip the rest of the packet. */
1342 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE)
1344 (void) fe_inb(sc, FE_BMPR8);
1345 (void) fe_inb(sc, FE_BMPR8);
1346 (void) fe_inb(sc, FE_BMPR8);
1347 (void) fe_inb(sc, FE_BMPR8);
1351 (void) fe_inw(sc, FE_BMPR8);
1352 (void) fe_inw(sc, FE_BMPR8);
1354 fe_outb(sc, FE_BMPR14, FE_B14_SKIP);
1356 /* We should not come here unless receiving RUNTs. */
1357 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE)
1359 for (i = 0; i < len; i++)
1360 (void) fe_inb(sc, FE_BMPR8);
1364 for (i = 0; i < len; i += 2)
1365 (void) fe_inw(sc, FE_BMPR8);
1372 * Empty receiving buffer.
1375 fe_emptybuffer (struct fe_softc * sc)
1381 if_printf(sc->ifp, "emptying receive buffer\n");
1385 * Stop receiving packets, temporarily.
1387 saved_dlcr5 = fe_inb(sc, FE_DLCR5);
1388 fe_outb(sc, FE_DLCR5, sc->proto_dlcr5);
1392 * When we come here, the receive buffer management may
1393 * have been broken. So, we cannot use skip operation.
1394 * Just discard everything in the buffer.
1396 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE)
1398 for (i = 0; i < 65536; i++) {
1399 if (fe_inb(sc, FE_DLCR5) & FE_D5_BUFEMP)
1401 (void) fe_inb(sc, FE_BMPR8);
1406 for (i = 0; i < 65536; i += 2) {
1407 if (fe_inb(sc, FE_DLCR5) & FE_D5_BUFEMP)
1409 (void) fe_inw(sc, FE_BMPR8);
1416 if (fe_inb(sc, FE_DLCR5) & FE_D5_BUFEMP) {
1418 "could not empty receive buffer\n");
1419 /* Hmm. What should I do if this happens? FIXME. */
1423 * Restart receiving packets.
1425 fe_outb(sc, FE_DLCR5, saved_dlcr5);
1430 * Transmission interrupt handler
1431 * The control flow of this function looks silly. FIXME.
1434 fe_tint (struct fe_softc * sc, u_char tstat)
1440 * Handle "excessive collision" interrupt.
1442 if (tstat & FE_D0_COLL16) {
1445 * Find how many packets (including this collided one)
1446 * are left unsent in transmission buffer.
1448 left = fe_inb(sc, FE_BMPR10);
1449 if_printf(sc->ifp, "excessive collision (%d/%d)\n",
1450 left, sc->txb_sched);
1453 * Clear the collision flag (in 86960) here
1454 * to avoid confusing statistics.
1456 fe_outb(sc, FE_DLCR0, FE_D0_COLLID);
1459 * Restart transmitter, skipping the
1462 * We *must* skip the packet to keep network running
1463 * properly. Excessive collision error is an
1464 * indication of the network overload. If we
1465 * tried sending the same packet after excessive
1466 * collision, the network would be filled with
1467 * out-of-time packets. Packets belonging
1468 * to reliable transport (such as TCP) are resent
1469 * by some upper layer.
1471 fe_outb(sc, FE_BMPR11, FE_B11_CTRL_SKIP | FE_B11_MODE1);
1473 /* Update statistics. */
1478 * Handle "transmission complete" interrupt.
1480 if (tstat & FE_D0_TXDONE) {
1483 * Add in total number of collisions on last
1484 * transmission. We also clear "collision occurred" flag
1487 * 86960 has a design flaw on collision count on multiple
1488 * packet transmission. When we send two or more packets
1489 * with one start command (that's what we do when the
1490 * transmission queue is crowded), 86960 informs us number
1491 * of collisions occurred on the last packet on the
1492 * transmission only. Number of collisions on previous
1493 * packets are lost. I have told that the fact is clearly
1494 * stated in the Fujitsu document.
1496 * I considered not to mind it seriously. Collision
1497 * count is not so important, anyway. Any comments? FIXME.
1500 if (fe_inb(sc, FE_DLCR0) & FE_D0_COLLID) {
1502 /* Clear collision flag. */
1503 fe_outb(sc, FE_DLCR0, FE_D0_COLLID);
1505 /* Extract collision count from 86960. */
1506 col = fe_inb(sc, FE_DLCR4);
1507 col = (col & FE_D4_COL) >> FE_D4_COL_SHIFT;
1510 * Status register indicates collisions,
1511 * while the collision count is zero.
1512 * This can happen after multiple packet
1513 * transmission, indicating that one or more
1514 * previous packet(s) had been collided.
1516 * Since the accurate number of collisions
1517 * has been lost, we just guess it as 1;
1518 * Am I too optimistic? FIXME.
1522 sc->ifp->if_collisions += col;
1524 sc->mibdata.dot3StatsSingleCollisionFrames++;
1526 sc->mibdata.dot3StatsMultipleCollisionFrames++;
1527 sc->mibdata.dot3StatsCollFrequencies[col-1]++;
1531 * Update transmission statistics.
1532 * Be sure to reflect number of excessive collisions.
1534 col = sc->tx_excolls;
1535 sc->ifp->if_opackets += sc->txb_sched - col;
1536 sc->ifp->if_oerrors += col;
1537 sc->ifp->if_collisions += col * 16;
1538 sc->mibdata.dot3StatsExcessiveCollisions += col;
1539 sc->mibdata.dot3StatsCollFrequencies[15] += col;
1543 * The transmitter is no more active.
1544 * Reset output active flag and watchdog timer.
1546 sc->ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
1550 * If more data is ready to transmit in the buffer, start
1551 * transmitting them. Otherwise keep transmitter idle,
1552 * even if more data is queued. This gives receive
1553 * process a slight priority.
1555 if (sc->txb_count > 0)
1561 * Ethernet interface receiver interrupt.
1564 fe_rint (struct fe_softc * sc, u_char rstat)
1571 * Update statistics if this interrupt is caused by an error.
1572 * Note that, when the system was not sufficiently fast, the
1573 * receive interrupt might not be acknowledged immediately. If
1574 * one or more errornous frames were received before this routine
1575 * was scheduled, they are ignored, and the following error stats
1576 * give less than real values.
1578 if (rstat & (FE_D1_OVRFLO | FE_D1_CRCERR | FE_D1_ALGERR | FE_D1_SRTPKT)) {
1579 if (rstat & FE_D1_OVRFLO)
1580 sc->mibdata.dot3StatsInternalMacReceiveErrors++;
1581 if (rstat & FE_D1_CRCERR)
1582 sc->mibdata.dot3StatsFCSErrors++;
1583 if (rstat & FE_D1_ALGERR)
1584 sc->mibdata.dot3StatsAlignmentErrors++;
1586 /* The reference MAC receiver defined in 802.3
1587 silently ignores short frames (RUNTs) without
1588 notifying upper layer. RFC 1650 (dot3 MIB) is
1589 based on the 802.3, and it has no stats entry for
1591 if (rstat & FE_D1_SRTPKT)
1592 sc->mibdata.dot3StatsFrameTooShorts++; /* :-) */
1594 sc->ifp->if_ierrors++;
1598 * MB86960 has a flag indicating "receive queue empty."
1599 * We just loop, checking the flag, to pull out all received
1602 * We limit the number of iterations to avoid infinite-loop.
1603 * The upper bound is set to unrealistic high value.
1605 for (i = 0; i < FE_MAX_RECV_COUNT * 2; i++) {
1607 /* Stop the iteration if 86960 indicates no packets. */
1608 if (fe_inb(sc, FE_DLCR5) & FE_D5_BUFEMP)
1612 * Extract a receive status byte.
1613 * As our 86960 is in 16 bit bus access mode, we have to
1614 * use inw() to get the status byte. The significant
1615 * value is returned in lower 8 bits.
1617 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE)
1619 status = fe_inb(sc, FE_BMPR8);
1620 (void) fe_inb(sc, FE_BMPR8);
1624 status = (u_char) fe_inw(sc, FE_BMPR8);
1628 * Extract the packet length.
1629 * It is a sum of a header (14 bytes) and a payload.
1630 * CRC has been stripped off by the 86960.
1632 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE)
1634 len = fe_inb(sc, FE_BMPR8);
1635 len |= (fe_inb(sc, FE_BMPR8) << 8);
1639 len = fe_inw(sc, FE_BMPR8);
1643 * AS our 86960 is programed to ignore errored frame,
1644 * we must not see any error indication in the
1645 * receive buffer. So, any error condition is a
1646 * serious error, e.g., out-of-sync of the receive
1649 if ((status & 0xF0) != 0x20 ||
1650 len > ETHER_MAX_LEN - ETHER_CRC_LEN ||
1651 len < ETHER_MIN_LEN - ETHER_CRC_LEN) {
1653 "RX buffer out-of-sync\n");
1654 sc->ifp->if_ierrors++;
1655 sc->mibdata.dot3StatsInternalMacReceiveErrors++;
1663 if (fe_get_packet(sc, len) < 0) {
1665 * Negative return from fe_get_packet()
1666 * indicates no available mbuf. We stop
1667 * receiving packets, even if there are more
1668 * in the buffer. We hope we can get more
1671 sc->ifp->if_ierrors++;
1672 sc->mibdata.dot3StatsMissedFrames++;
1673 fe_droppacket(sc, len);
1677 /* Successfully received a packet. Update stat. */
1678 sc->ifp->if_ipackets++;
1681 /* Maximum number of frames has been received. Something
1682 strange is happening here... */
1683 if_printf(sc->ifp, "unusual receive flood\n");
1684 sc->mibdata.dot3StatsInternalMacReceiveErrors++;
1689 * Ethernet interface interrupt processor
1694 struct fe_softc *sc = arg;
1695 u_char tstat, rstat;
1696 int loop_count = FE_MAX_LOOP;
1700 /* Loop until there are no more new interrupt conditions. */
1701 while (loop_count-- > 0) {
1703 * Get interrupt conditions, masking unneeded flags.
1705 tstat = fe_inb(sc, FE_DLCR0) & FE_TMASK;
1706 rstat = fe_inb(sc, FE_DLCR1) & FE_RMASK;
1707 if (tstat == 0 && rstat == 0) {
1713 * Reset the conditions we are acknowledging.
1715 fe_outb(sc, FE_DLCR0, tstat);
1716 fe_outb(sc, FE_DLCR1, rstat);
1719 * Handle transmitter interrupts.
1725 * Handle receiver interrupts
1731 * Update the multicast address filter if it is
1732 * needed and possible. We do it now, because
1733 * we can make sure the transmission buffer is empty,
1734 * and there is a good chance that the receive queue
1735 * is empty. It will minimize the possibility of
1738 if (sc->filter_change &&
1739 sc->txb_count == 0 && sc->txb_sched == 0) {
1741 sc->ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
1745 * If it looks like the transmitter can take more data,
1746 * attempt to start output on the interface. This is done
1747 * after handling the receiver interrupt to give the
1748 * receive operation priority.
1750 * BTW, I'm not sure in what case the OACTIVE is on at
1751 * this point. Is the following test redundant?
1753 * No. This routine polls for both transmitter and
1754 * receiver interrupts. 86960 can raise a receiver
1755 * interrupt when the transmission buffer is full.
1757 if ((sc->ifp->if_drv_flags & IFF_DRV_OACTIVE) == 0)
1758 fe_start_locked(sc->ifp);
1762 if_printf(sc->ifp, "too many loops\n");
1766 * Process an ioctl request. This code needs some work - it looks
1770 fe_ioctl (struct ifnet * ifp, u_long command, caddr_t data)
1772 struct fe_softc *sc = ifp->if_softc;
1773 struct ifreq *ifr = (struct ifreq *)data;
1780 * Switch interface state between "running" and
1781 * "stopped", reflecting the UP flag.
1784 if (sc->ifp->if_flags & IFF_UP) {
1785 if ((sc->ifp->if_drv_flags & IFF_DRV_RUNNING) == 0)
1788 if ((sc->ifp->if_drv_flags & IFF_DRV_RUNNING) != 0)
1793 * Promiscuous and/or multicast flags may have changed,
1794 * so reprogram the multicast filter and/or receive mode.
1805 * Multicast list has changed; set the hardware filter
1815 /* Let if_media to handle these commands and to call
1817 error = ifmedia_ioctl(ifp, ifr, &sc->media, command);
1821 error = ether_ioctl(ifp, command, data);
1829 * Retrieve packet from receive buffer and send to the next level up via
1831 * Returns 0 if success, -1 if error (i.e., mbuf allocation failure).
1834 fe_get_packet (struct fe_softc * sc, u_short len)
1836 struct ifnet *ifp = sc->ifp;
1837 struct ether_header *eh;
1840 FE_ASSERT_LOCKED(sc);
1843 * NFS wants the data be aligned to the word (4 byte)
1844 * boundary. Ethernet header has 14 bytes. There is a
1847 #define NFS_MAGIC_OFFSET 2
1850 * This function assumes that an Ethernet packet fits in an
1851 * mbuf (with a cluster attached when necessary.) On FreeBSD
1852 * 2.0 for x86, which is the primary target of this driver, an
1853 * mbuf cluster has 4096 bytes, and we are happy. On ancient
1854 * BSDs, such as vanilla 4.3 for 386, a cluster size was 1024,
1855 * however. If the following #error message were printed upon
1856 * compile, you need to rewrite this function.
1858 #if ( MCLBYTES < ETHER_MAX_LEN - ETHER_CRC_LEN + NFS_MAGIC_OFFSET )
1859 #error "Too small MCLBYTES to use fe driver."
1863 * Our strategy has one more problem. There is a policy on
1864 * mbuf cluster allocation. It says that we must have at
1865 * least MINCLSIZE (208 bytes on FreeBSD 2.0 for x86) to
1866 * allocate a cluster. For a packet of a size between
1867 * (MHLEN - 2) to (MINCLSIZE - 2), our code violates the rule...
1868 * On the other hand, the current code is short, simple,
1869 * and fast, however. It does no harmful thing, just waists
1870 * some memory. Any comments? FIXME.
1873 /* Allocate an mbuf with packet header info. */
1874 MGETHDR(m, M_NOWAIT, MT_DATA);
1878 /* Attach a cluster if this packet doesn't fit in a normal mbuf. */
1879 if (len > MHLEN - NFS_MAGIC_OFFSET) {
1880 MCLGET(m, M_NOWAIT);
1881 if (!(m->m_flags & M_EXT)) {
1887 /* Initialize packet header info. */
1888 m->m_pkthdr.rcvif = ifp;
1889 m->m_pkthdr.len = len;
1891 /* Set the length of this packet. */
1894 /* The following silliness is to make NFS happy */
1895 m->m_data += NFS_MAGIC_OFFSET;
1897 /* Get (actually just point to) the header part. */
1898 eh = mtod(m, struct ether_header *);
1901 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE)
1903 fe_insb(sc, FE_BMPR8, (u_int8_t *)eh, len);
1907 fe_insw(sc, FE_BMPR8, (u_int16_t *)eh, (len + 1) >> 1);
1910 /* Feed the packet to upper layer. */
1912 (*ifp->if_input)(ifp, m);
1918 * Write an mbuf chain to the transmission buffer memory using 16 bit PIO.
1919 * Returns number of bytes actually written, including length word.
1921 * If an mbuf chain is too long for an Ethernet frame, it is not sent.
1922 * Packets shorter than Ethernet minimum are legal, and we pad them
1923 * before sending out. An exception is "partial" packets which are
1924 * shorter than mandatory Ethernet header.
1927 fe_write_mbufs (struct fe_softc *sc, struct mbuf *m)
1929 u_short length, len;
1932 u_short savebyte; /* WARNING: Architecture dependent! */
1933 #define NO_PENDING_BYTE 0xFFFF
1935 static u_char padding [ETHER_MIN_LEN - ETHER_CRC_LEN - ETHER_HDR_LEN];
1938 /* First, count up the total number of bytes to copy */
1940 for (mp = m; mp != NULL; mp = mp->m_next)
1941 length += mp->m_len;
1943 /* Check if this matches the one in the packet header. */
1944 if (length != m->m_pkthdr.len) {
1946 "packet length mismatch? (%d/%d)\n",
1947 length, m->m_pkthdr.len);
1950 /* Just use the length value in the packet header. */
1951 length = m->m_pkthdr.len;
1956 * Should never send big packets. If such a packet is passed,
1957 * it should be a bug of upper layer. We just ignore it.
1958 * ... Partial (too short) packets, neither.
1960 if (length < ETHER_HDR_LEN ||
1961 length > ETHER_MAX_LEN - ETHER_CRC_LEN) {
1963 "got an out-of-spec packet (%u bytes) to send\n", length);
1964 sc->ifp->if_oerrors++;
1965 sc->mibdata.dot3StatsInternalMacTransmitErrors++;
1971 * Put the length word for this frame.
1972 * Does 86960 accept odd length? -- Yes.
1973 * Do we need to pad the length to minimum size by ourselves?
1974 * -- Generally yes. But for (or will be) the last
1975 * packet in the transmission buffer, we can skip the
1976 * padding process. It may gain performance slightly. FIXME.
1978 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE)
1980 len = max(length, ETHER_MIN_LEN - ETHER_CRC_LEN);
1981 fe_outb(sc, FE_BMPR8, len & 0x00ff);
1982 fe_outb(sc, FE_BMPR8, (len & 0xff00) >> 8);
1986 fe_outw(sc, FE_BMPR8,
1987 max(length, ETHER_MIN_LEN - ETHER_CRC_LEN));
1991 * Update buffer status now.
1992 * Truncate the length up to an even number, since we use outw().
1994 if ((sc->proto_dlcr6 & FE_D6_SBW) != FE_D6_SBW_BYTE)
1996 length = (length + 1) & ~1;
1998 sc->txb_free -= FE_DATA_LEN_LEN +
1999 max(length, ETHER_MIN_LEN - ETHER_CRC_LEN);
2003 * Transfer the data from mbuf chain to the transmission buffer.
2004 * MB86960 seems to require that data be transferred as words, and
2005 * only words. So that we require some extra code to patch
2006 * over odd-length mbufs.
2008 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE)
2010 /* 8-bit cards are easy. */
2011 for (mp = m; mp != 0; mp = mp->m_next) {
2013 fe_outsb(sc, FE_BMPR8, mtod(mp, caddr_t),
2019 /* 16-bit cards are a pain. */
2020 savebyte = NO_PENDING_BYTE;
2021 for (mp = m; mp != 0; mp = mp->m_next) {
2023 /* Ignore empty mbuf. */
2028 /* Find the actual data to send. */
2029 data = mtod(mp, caddr_t);
2031 /* Finish the last byte. */
2032 if (savebyte != NO_PENDING_BYTE) {
2033 fe_outw(sc, FE_BMPR8, savebyte | (*data << 8));
2036 savebyte = NO_PENDING_BYTE;
2039 /* output contiguous words */
2041 fe_outsw(sc, FE_BMPR8, (u_int16_t *)data,
2047 /* Save a remaining byte, if there is one. */
2052 /* Spit the last byte, if the length is odd. */
2053 if (savebyte != NO_PENDING_BYTE)
2054 fe_outw(sc, FE_BMPR8, savebyte);
2057 /* Pad to the Ethernet minimum length, if the packet is too short. */
2058 if (length < ETHER_MIN_LEN - ETHER_CRC_LEN) {
2059 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE)
2061 fe_outsb(sc, FE_BMPR8, padding,
2062 ETHER_MIN_LEN - ETHER_CRC_LEN - length);
2066 fe_outsw(sc, FE_BMPR8, (u_int16_t *)padding,
2067 (ETHER_MIN_LEN - ETHER_CRC_LEN - length) >> 1);
2073 * Compute the multicast address filter from the
2074 * list of multicast addresses we need to listen to.
2076 static struct fe_filter
2077 fe_mcaf ( struct fe_softc *sc )
2080 struct fe_filter filter;
2081 struct ifmultiaddr *ifma;
2083 filter = fe_filter_nothing;
2084 if_maddr_rlock(sc->ifp);
2085 TAILQ_FOREACH(ifma, &sc->ifp->if_multiaddrs, ifma_link) {
2086 if (ifma->ifma_addr->sa_family != AF_LINK)
2088 index = ether_crc32_le(LLADDR((struct sockaddr_dl *)
2089 ifma->ifma_addr), ETHER_ADDR_LEN) >> 26;
2091 if_printf(sc->ifp, "hash(%6D) == %d\n",
2092 enm->enm_addrlo , ":", index);
2095 filter.data[index >> 3] |= 1 << (index & 7);
2097 if_maddr_runlock(sc->ifp);
2102 * Calculate a new "multicast packet filter" and put the 86960
2103 * receiver in appropriate mode.
2106 fe_setmode (struct fe_softc *sc)
2110 * If the interface is not running, we postpone the update
2111 * process for receive modes and multicast address filter
2112 * until the interface is restarted. It reduces some
2113 * complicated job on maintaining chip states. (Earlier versions
2114 * of this driver had a bug on that point...)
2116 * To complete the trick, fe_init() calls fe_setmode() after
2117 * restarting the interface.
2119 if (!(sc->ifp->if_drv_flags & IFF_DRV_RUNNING))
2123 * Promiscuous mode is handled separately.
2125 if (sc->ifp->if_flags & IFF_PROMISC) {
2127 * Program 86960 to receive all packets on the segment
2128 * including those directed to other stations.
2129 * Multicast filter stored in MARs are ignored
2130 * under this setting, so we don't need to update it.
2132 * Promiscuous mode in FreeBSD 2 is used solely by
2133 * BPF, and BPF only listens to valid (no error) packets.
2134 * So, we ignore erroneous ones even in this mode.
2135 * (Older versions of fe driver mistook the point.)
2137 fe_outb(sc, FE_DLCR5,
2138 sc->proto_dlcr5 | FE_D5_AFM0 | FE_D5_AFM1);
2139 sc->filter_change = 0;
2144 * Turn the chip to the normal (non-promiscuous) mode.
2146 fe_outb(sc, FE_DLCR5, sc->proto_dlcr5 | FE_D5_AFM1);
2149 * Find the new multicast filter value.
2151 if (sc->ifp->if_flags & IFF_ALLMULTI)
2152 sc->filter = fe_filter_all;
2154 sc->filter = fe_mcaf(sc);
2155 sc->filter_change = 1;
2158 * We have to update the multicast filter in the 86960, A.S.A.P.
2160 * Note that the DLC (Data Link Control unit, i.e. transmitter
2161 * and receiver) must be stopped when feeding the filter, and
2162 * DLC trashes all packets in both transmission and receive
2163 * buffers when stopped.
2165 * To reduce the packet loss, we delay the filter update
2166 * process until buffers are empty.
2168 if (sc->txb_sched == 0 && sc->txb_count == 0 &&
2169 !(fe_inb(sc, FE_DLCR1) & FE_D1_PKTRDY)) {
2171 * Buffers are (apparently) empty. Load
2172 * the new filter value into MARs now.
2177 * Buffers are not empty. Mark that we have to update
2178 * the MARs. The new filter will be loaded by feintr()
2185 * Load a new multicast address filter into MARs.
2187 * The caller must have acquired the softc lock before fe_loadmar.
2188 * This function starts the DLC upon return. So it can be called only
2189 * when the chip is working, i.e., from the driver's point of view, when
2190 * a device is RUNNING. (I mistook the point in previous versions.)
2193 fe_loadmar (struct fe_softc * sc)
2195 /* Stop the DLC (transmitter and receiver). */
2197 fe_outb(sc, FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_DISABLE);
2200 /* Select register bank 1 for MARs. */
2201 fe_outb(sc, FE_DLCR7, sc->proto_dlcr7 | FE_D7_RBS_MAR | FE_D7_POWER_UP);
2203 /* Copy filter value into the registers. */
2204 fe_outblk(sc, FE_MAR8, sc->filter.data, FE_FILTER_LEN);
2206 /* Restore the bank selection for BMPRs (i.e., runtime registers). */
2207 fe_outb(sc, FE_DLCR7,
2208 sc->proto_dlcr7 | FE_D7_RBS_BMPR | FE_D7_POWER_UP);
2210 /* Restart the DLC. */
2212 fe_outb(sc, FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_ENABLE);
2215 /* We have just updated the filter. */
2216 sc->filter_change = 0;
2219 /* Change the media selection. */
2221 fe_medchange (struct ifnet *ifp)
2223 struct fe_softc *sc = (struct fe_softc *)ifp->if_softc;
2226 /* If_media should not pass any request for a media which this
2227 interface doesn't support. */
2230 for (b = 0; bit2media[b] != 0; b++) {
2231 if (bit2media[b] == sc->media.ifm_media) break;
2233 if (((1 << b) & sc->mbitmap) == 0) {
2235 "got an unsupported media request (0x%x)\n",
2236 sc->media.ifm_media);
2241 /* We don't actually change media when the interface is down.
2242 fe_init() will do the job, instead. Should we also wait
2243 until the transmission buffer being empty? Changing the
2244 media when we are sending a frame will cause two garbages
2245 on wires, one on old media and another on new. FIXME */
2247 if (sc->ifp->if_flags & IFF_UP) {
2248 if (sc->msel) sc->msel(sc);
2255 /* I don't know how I can support media status callback... FIXME. */
2257 fe_medstat (struct ifnet *ifp, struct ifmediareq *ifmr)
2259 struct fe_softc *sc = ifp->if_softc;
2261 ifmr->ifm_active = sc->media.ifm_media;