2 * SPDX-License-Identifier: BSD-4-Clause
4 * Copyright (c) 2003 Hidetoshi Shimokawa
5 * Copyright (c) 1998-2002 Katsushi Kobayashi and Hidetoshi Shimokawa
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. All advertising materials mentioning features or use of this software
17 * must display the acknowledgement as bellow:
19 * This product includes software developed by K. Kobayashi and H. Shimokawa
21 * 4. The name of the author may not be used to endorse or promote products
22 * derived from this software without specific prior written permission.
24 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
25 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
26 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
28 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
29 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
32 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
33 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 * POSSIBILITY OF SUCH DAMAGE.
40 #define STATE_CLEAR 0x0000
41 #define STATE_SET 0x0004
42 #define NODE_IDS 0x0008
43 #define RESET_START 0x000c
44 #define SPLIT_TIMEOUT_HI 0x0018
45 #define SPLIT_TIMEOUT_LO 0x001c
46 #define CYCLE_TIME 0x0200
47 #define BUS_TIME 0x0204
48 #define BUSY_TIMEOUT 0x0210
49 #define PRIORITY_BUDGET 0x0218
50 #define BUS_MGR_ID 0x021c
51 #define BANDWIDTH_AV 0x0220
52 #define CHANNELS_AV_HI 0x0224
53 #define CHANNELS_AV_LO 0x0228
54 #define IP_CHANNELS 0x0234
56 #define CONF_ROM 0x0400
58 #define TOPO_MAP 0x1000
59 #define SPED_MAP 0x2000
61 #define CSRTYPE_SHIFT 6
62 #define CSRTYPE_MASK (3 << CSRTYPE_SHIFT)
63 #define CSRTYPE_I (0 << CSRTYPE_SHIFT) /* Immediate */
64 #define CSRTYPE_C (1 << CSRTYPE_SHIFT) /* CSR offset */
65 #define CSRTYPE_L (2 << CSRTYPE_SHIFT) /* Leaf */
66 #define CSRTYPE_D (3 << CSRTYPE_SHIFT) /* Directory */
70 * 00 - 2F: defined by CSR architecture standards.
71 * 30 - 37: defined by BUS starndards
72 * 38 - 3F: defined by Vendor/Specifier
74 #define CSRKEY_MASK 0x3f
75 #define CSRKEY_DESC 0x01 /* Descriptor */
76 #define CSRKEY_BDINFO 0x02 /* Bus_Dependent_Info */
77 #define CSRKEY_VENDOR 0x03 /* Vendor */
78 #define CSRKEY_HW 0x04 /* Hardware_Version */
79 #define CSRKEY_MODULE 0x07 /* Module */
80 #define CSRKEY_NCAP 0x0c /* Node_Capabilities */
81 #define CSRKEY_EUI64 0x0d /* EUI_64 */
82 #define CSRKEY_UNIT 0x11 /* Unit */
83 #define CSRKEY_SPEC 0x12 /* Specifier_ID */
84 #define CSRKEY_VER 0x13 /* Version */
85 #define CSRKEY_DINFO 0x14 /* Dependent_Info */
86 #define CSRKEY_ULOC 0x15 /* Unit_Location */
87 #define CSRKEY_MODEL 0x17 /* Model */
88 #define CSRKEY_INST 0x18 /* Instance */
89 #define CSRKEY_KEYW 0x19 /* Keyword */
90 #define CSRKEY_FEAT 0x1a /* Feature */
91 #define CSRKEY_EROM 0x1b /* Extended_ROM */
92 #define CSRKEY_EKSID 0x1c /* Extended_Key_Specifier_ID */
93 #define CSRKEY_EKEY 0x1d /* Extended_Key */
94 #define CSRKEY_EDATA 0x1e /* Extended_Data */
95 #define CSRKEY_MDESC 0x1f /* Modifiable_Descriptor */
96 #define CSRKEY_DID 0x20 /* Directory_ID */
97 #define CSRKEY_REV 0x21 /* Revision */
99 #define CSRKEY_FIRM_VER 0x3c /* Firmware version */
100 #define CSRKEY_UNIT_CH 0x3a /* Unit characteristics */
101 #define CSRKEY_COM_SPEC 0x38 /* Command set revision */
102 #define CSRKEY_COM_SET 0x39 /* Command set */
104 #define CROM_UDIR (CSRTYPE_D | CSRKEY_UNIT) /* 0x81 Unit directory */
105 #define CROM_TEXTLEAF (CSRTYPE_L | CSRKEY_DESC) /* 0x81 Text leaf */
106 #define CROM_LUN (CSRTYPE_I | CSRKEY_DINFO) /* 0x14 Logical unit num. */
107 #define CROM_MGM (CSRTYPE_C | CSRKEY_DINFO) /* 0x54 Management agent */
109 #define CSRVAL_VENDOR_PRIVATE 0xacde48
110 #define CSRVAL_1394TA 0x00a02d
111 #define CSRVAL_ANSIT10 0x00609e
112 #define CSRVAL_IETF 0x00005e
114 #define CSR_PROTAVC 0x010001
115 #define CSR_PROTCAL 0x010002
116 #define CSR_PROTEHS 0x010004
117 #define CSR_PROTHAVI 0x010008
118 #define CSR_PROTCAM104 0x000100
119 #define CSR_PROTCAM120 0x000101
120 #define CSR_PROTCAM130 0x000102
121 #define CSR_PROTDPP 0x0a6be2
122 #define CSR_PROTIICP 0x4b661f
124 #define CSRVAL_T10SBP2 0x010483
125 #define CSRVAL_SCSI 0x0104d8
128 #if BYTE_ORDER == BIG_ENDIAN
137 #if BYTE_ORDER == BIG_ENDIAN
147 struct csrdirectory {
148 BIT16x2(crc_len, crc);
149 struct csrreg entry[0];
152 BIT16x2(crc_len, crc);
153 #if BYTE_ORDER == BIG_ENDIAN
154 uint32_t spec_type:8,
165 #define CSR_BUS_NAME_IEEE1394 0x31333934
167 #if BYTE_ORDER == BIG_ENDIAN
168 uint32_t irmc:1, /* iso. resource manager capable */
169 cmc:1, /* cycle master capable */
170 isc:1, /* iso. operation support */
171 bmc:1, /* bus manager capable */
172 pmc:1, /* power manager capable */
174 cyc_clk_acc:8, /* 0 <= ppm <= 100 */
175 max_rec:4, /* (2 << max_rec) bytes */
187 max_rec:4, /* (2 << max_rec) bytes */
188 cyc_clk_acc:8, /* 0 <= ppm <= 100 */
190 pmc:1, /* power manager capable */
191 bmc:1, /* bus manager capable */
192 isc:1, /* iso. operation support */
193 cmc:1, /* cycle master capable */
194 irmc:1; /* iso. resource manager capable */
196 struct fw_eui64 eui64;
201 #define MAXROM_1024 2
203 #define CROM_MAX_DEPTH 10
205 struct csrdirectory *dir;
209 struct crom_context {
211 struct crom_ptr stack[CROM_MAX_DEPTH];
214 void crom_init_context(struct crom_context *, uint32_t *);
215 struct csrreg *crom_get(struct crom_context *);
216 void crom_next(struct crom_context *);
217 void crom_parse_text(struct crom_context *, char *, int);
218 uint16_t crom_crc(uint32_t *r, int);
219 struct csrreg *crom_search_key(struct crom_context *, uint8_t);
220 int crom_has_specver(uint32_t *, uint32_t, uint32_t);
222 #if !defined(_KERNEL) && !defined(_BOOT)
223 char *crom_desc(struct crom_context *, char *, int);
227 #if defined(_KERNEL) || defined(_BOOT) || defined(TEST)
228 #define CROM_MAX_CHUNK_LEN 20
231 struct bus_info businfo;
232 STAILQ_HEAD(, crom_chunk) chunk_list;
236 STAILQ_ENTRY(crom_chunk) link;
237 struct crom_chunk *ref_chunk;
241 BIT16x2(crc_len, crc);
242 uint32_t buf[CROM_MAX_CHUNK_LEN];
246 extern int crom_add_quad(struct crom_chunk *, uint32_t);
247 extern int crom_add_entry(struct crom_chunk *, int, int);
248 extern int crom_add_chunk(struct crom_src *src, struct crom_chunk *,
249 struct crom_chunk *, int);
250 extern int crom_add_simple_text(struct crom_src *src, struct crom_chunk *,
251 struct crom_chunk *, char *);
252 extern int crom_load(struct crom_src *, uint32_t *, int);