2 * SPDX-License-Identifier: BSD-2-Clause-NetBSD
4 * Copyright (C) 2001 Eduardo Horvath.
5 * Copyright (c) 2007 Marius Strobl <marius@FreeBSD.org>
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE
22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 * from: NetBSD: if_gem_pci.c,v 1.7 2001/10/18 15:09:15 thorpej Exp
33 #include <sys/cdefs.h>
34 __FBSDID("$FreeBSD$");
37 * PCI bindings for Apple GMAC, Sun ERI and Sun GEM Ethernet controllers
40 #include <sys/param.h>
41 #include <sys/systm.h>
43 #include <sys/kernel.h>
45 #include <sys/malloc.h>
46 #include <sys/module.h>
47 #include <sys/mutex.h>
48 #include <sys/resource.h>
50 #include <sys/socket.h>
52 #include <net/ethernet.h>
55 #include <machine/bus.h>
56 #if defined(__powerpc__) || defined(__sparc64__)
57 #include <dev/ofw/ofw_bus.h>
58 #include <dev/ofw/openfirm.h>
59 #include <machine/ofw_machdep.h>
61 #include <machine/resource.h>
63 #include <dev/gem/if_gemreg.h>
64 #include <dev/gem/if_gemvar.h>
66 #include <dev/pci/pcireg.h>
67 #include <dev/pci/pcivar.h>
69 #include "miibus_if.h"
71 static int gem_pci_attach(device_t dev);
72 static int gem_pci_detach(device_t dev);
73 static int gem_pci_probe(device_t dev);
74 static int gem_pci_resume(device_t dev);
75 static int gem_pci_suspend(device_t dev);
77 static device_method_t gem_pci_methods[] = {
78 /* Device interface */
79 DEVMETHOD(device_probe, gem_pci_probe),
80 DEVMETHOD(device_attach, gem_pci_attach),
81 DEVMETHOD(device_detach, gem_pci_detach),
82 DEVMETHOD(device_suspend, gem_pci_suspend),
83 DEVMETHOD(device_resume, gem_pci_resume),
84 /* Use the suspend handler here, it is all that is required. */
85 DEVMETHOD(device_shutdown, gem_pci_suspend),
88 DEVMETHOD(miibus_readreg, gem_mii_readreg),
89 DEVMETHOD(miibus_writereg, gem_mii_writereg),
90 DEVMETHOD(miibus_statchg, gem_mii_statchg),
95 static driver_t gem_pci_driver = {
98 sizeof(struct gem_softc)
101 DRIVER_MODULE(gem, pci, gem_pci_driver, gem_devclass, 0, 0);
102 MODULE_DEPEND(gem, pci, 1, 1, 1);
103 MODULE_DEPEND(gem, ether, 1, 1, 1);
105 static const struct gem_pci_dev {
108 const char *gpd_desc;
109 } gem_pci_devlist[] = {
110 { 0x1101108e, GEM_SUN_ERI, "Sun ERI 10/100 Ethernet" },
111 { 0x2bad108e, GEM_SUN_GEM, "Sun GEM Gigabit Ethernet" },
112 { 0x0021106b, GEM_APPLE_GMAC, "Apple UniNorth GMAC Ethernet" },
113 { 0x0024106b, GEM_APPLE_GMAC, "Apple Pangea GMAC Ethernet" },
114 { 0x0032106b, GEM_APPLE_GMAC, "Apple UniNorth2 GMAC Ethernet" },
115 { 0x004c106b, GEM_APPLE_K2_GMAC,"Apple K2 GMAC Ethernet" },
116 { 0x0051106b, GEM_APPLE_GMAC, "Apple Shasta GMAC Ethernet" },
117 { 0x006b106b, GEM_APPLE_GMAC, "Apple Intrepid 2 GMAC Ethernet" },
122 gem_pci_probe(device_t dev)
126 for (i = 0; gem_pci_devlist[i].gpd_desc != NULL; i++) {
127 if (pci_get_devid(dev) == gem_pci_devlist[i].gpd_devid) {
128 device_set_desc(dev, gem_pci_devlist[i].gpd_desc);
129 return (BUS_PROBE_DEFAULT);
136 static struct resource_spec gem_pci_res_spec[] = {
137 { SYS_RES_IRQ, 0, RF_SHAREABLE | RF_ACTIVE }, /* GEM_RES_INTR */
138 { SYS_RES_MEMORY, PCIR_BAR(0), RF_ACTIVE }, /* GEM_RES_BANK1 */
142 #define GEM_SHARED_PINS "shared-pins"
143 #define GEM_SHARED_PINS_SERDES "serdes"
146 gem_pci_attach(device_t dev)
148 struct gem_softc *sc;
150 #if defined(__powerpc__) || defined(__sparc64__)
151 char buf[sizeof(GEM_SHARED_PINS)];
156 sc = device_get_softc(dev);
157 sc->sc_variant = GEM_UNKNOWN;
158 for (i = 0; gem_pci_devlist[i].gpd_desc != NULL; i++) {
159 if (pci_get_devid(dev) == gem_pci_devlist[i].gpd_devid) {
160 sc->sc_variant = gem_pci_devlist[i].gpd_variant;
164 if (sc->sc_variant == GEM_UNKNOWN) {
165 device_printf(dev, "unknown adaptor\n");
169 pci_enable_busmaster(dev);
172 * Some Sun GEMs/ERIs do have their intpin register bogusly set to 0,
173 * although it should be 1. Correct that.
175 if (pci_get_intpin(dev) == 0)
176 pci_set_intpin(dev, 1);
178 /* Set the PCI latency timer for Sun ERIs. */
179 if (sc->sc_variant == GEM_SUN_ERI)
180 pci_write_config(dev, PCIR_LATTIMER, GEM_ERI_LATENCY_TIMER, 1);
183 sc->sc_flags |= GEM_PCI;
185 if (bus_alloc_resources(dev, gem_pci_res_spec, sc->sc_res)) {
186 device_printf(dev, "failed to allocate resources\n");
187 bus_release_resources(dev, gem_pci_res_spec, sc->sc_res);
191 GEM_LOCK_INIT(sc, device_get_nameunit(dev));
194 * Derive GEM_RES_BANK2 from GEM_RES_BANK1. This seemed cleaner
195 * with the old way of using copies of the bus tag and handle in
196 * the softc along with bus_space_*()...
198 sc->sc_res[GEM_RES_BANK2] = malloc(sizeof(*sc->sc_res[GEM_RES_BANK2]),
199 M_DEVBUF, M_NOWAIT | M_ZERO);
200 if (sc->sc_res[GEM_RES_BANK2] == NULL) {
201 device_printf(dev, "failed to allocate bank2 resource\n");
204 rman_set_bustag(sc->sc_res[GEM_RES_BANK2],
205 rman_get_bustag(sc->sc_res[GEM_RES_BANK1]));
206 bus_space_subregion(rman_get_bustag(sc->sc_res[GEM_RES_BANK1]),
207 rman_get_bushandle(sc->sc_res[GEM_RES_BANK1]),
208 GEM_PCI_BANK2_OFFSET, GEM_PCI_BANK2_SIZE,
209 &sc->sc_res[GEM_RES_BANK2]->r_bushandle);
211 /* Determine whether we're running at 66MHz. */
212 if ((GEM_BANK2_READ_4(sc, GEM_PCI_BIF_CONFIG) &
213 GEM_PCI_BIF_CNF_M66EN) != 0)
214 sc->sc_flags |= GEM_PCI66;
216 #if defined(__powerpc__) || defined(__sparc64__)
217 OF_getetheraddr(dev, sc->sc_enaddr);
218 if (OF_getprop(ofw_bus_get_node(dev), GEM_SHARED_PINS, buf,
220 buf[sizeof(buf) - 1] = '\0';
221 if (strcmp(buf, GEM_SHARED_PINS_SERDES) == 0)
222 sc->sc_flags |= GEM_SERDES;
226 * Dig out VPD (vital product data) and read NA (network address).
227 * The VPD resides in the PCI Expansion ROM (PCI FCode) and can't
228 * be accessed via the PCI capability pointer.
229 * ``Writing FCode 3.x Programs'' (newer ones, dated 1997 and later)
230 * chapter 2 describes the data structure.
233 #define PCI_ROMHDR_SIZE 0x1c
234 #define PCI_ROMHDR_SIG 0x00
235 #define PCI_ROMHDR_SIG_MAGIC 0xaa55 /* little endian */
236 #define PCI_ROMHDR_PTR_DATA 0x18
237 #define PCI_ROM_SIZE 0x18
238 #define PCI_ROM_SIG 0x00
239 #define PCI_ROM_SIG_MAGIC 0x52494350 /* "PCIR", endian */
241 #define PCI_ROM_VENDOR 0x04
242 #define PCI_ROM_DEVICE 0x06
243 #define PCI_ROM_PTR_VPD 0x08
244 #define PCI_VPDRES_BYTE0 0x00
245 #define PCI_VPDRES_ISLARGE(x) ((x) & 0x80)
246 #define PCI_VPDRES_LARGE_NAME(x) ((x) & 0x7f)
247 #define PCI_VPDRES_LARGE_LEN_LSB 0x01
248 #define PCI_VPDRES_LARGE_LEN_MSB 0x02
249 #define PCI_VPDRES_LARGE_SIZE 0x03
250 #define PCI_VPDRES_TYPE_VPD 0x10 /* large */
251 #define PCI_VPD_KEY0 0x00
252 #define PCI_VPD_KEY1 0x01
253 #define PCI_VPD_LEN 0x02
254 #define PCI_VPD_SIZE 0x03
256 #define GEM_ROM_READ_1(sc, offs) \
257 GEM_BANK1_READ_1((sc), GEM_PCI_ROM_OFFSET + (offs))
258 #define GEM_ROM_READ_2(sc, offs) \
259 GEM_BANK1_READ_2((sc), GEM_PCI_ROM_OFFSET + (offs))
260 #define GEM_ROM_READ_4(sc, offs) \
261 GEM_BANK1_READ_4((sc), GEM_PCI_ROM_OFFSET + (offs))
263 /* Read PCI Expansion ROM header. */
264 if (GEM_ROM_READ_2(sc, PCI_ROMHDR_SIG) != PCI_ROMHDR_SIG_MAGIC ||
265 (i = GEM_ROM_READ_2(sc, PCI_ROMHDR_PTR_DATA)) <
267 device_printf(dev, "unexpected PCI Expansion ROM header\n");
271 /* Read PCI Expansion ROM data. */
272 if (GEM_ROM_READ_4(sc, i + PCI_ROM_SIG) != PCI_ROM_SIG_MAGIC ||
273 GEM_ROM_READ_2(sc, i + PCI_ROM_VENDOR) != pci_get_vendor(dev) ||
274 GEM_ROM_READ_2(sc, i + PCI_ROM_DEVICE) != pci_get_device(dev) ||
275 (j = GEM_ROM_READ_2(sc, i + PCI_ROM_PTR_VPD)) <
277 device_printf(dev, "unexpected PCI Expansion ROM data\n");
283 * SUNW,pci-gem cards have a single large resource VPD-R tag
284 * containing one NA. The VPD used is not in PCI 2.2 standard
285 * format however. The length in the resource header is in big
286 * endian and the end tag is non-standard (0x79) and followed
287 * by an all-zero "checksum" byte. Sun calls this a "Fresh
288 * Choice Ethernet" VPD...
290 if (PCI_VPDRES_ISLARGE(GEM_ROM_READ_1(sc,
291 j + PCI_VPDRES_BYTE0)) == 0 ||
292 PCI_VPDRES_LARGE_NAME(GEM_ROM_READ_1(sc,
293 j + PCI_VPDRES_BYTE0)) != PCI_VPDRES_TYPE_VPD ||
294 ((GEM_ROM_READ_1(sc, j + PCI_VPDRES_LARGE_LEN_LSB) << 8) |
295 GEM_ROM_READ_1(sc, j + PCI_VPDRES_LARGE_LEN_MSB)) !=
296 PCI_VPD_SIZE + ETHER_ADDR_LEN ||
297 GEM_ROM_READ_1(sc, j + PCI_VPDRES_LARGE_SIZE + PCI_VPD_KEY0) !=
299 GEM_ROM_READ_1(sc, j + PCI_VPDRES_LARGE_SIZE + PCI_VPD_KEY1) !=
301 GEM_ROM_READ_1(sc, j + PCI_VPDRES_LARGE_SIZE + PCI_VPD_LEN) !=
303 GEM_ROM_READ_1(sc, j + PCI_VPDRES_LARGE_SIZE + PCI_VPD_SIZE +
304 ETHER_ADDR_LEN) != 0x79) {
305 device_printf(dev, "unexpected PCI VPD\n");
308 bus_read_region_1(sc->sc_res[GEM_RES_BANK1],
309 GEM_PCI_ROM_OFFSET + j + PCI_VPDRES_LARGE_SIZE + PCI_VPD_SIZE,
310 sc->sc_enaddr, ETHER_ADDR_LEN);
313 * The Xserve G5 has a fake GMAC with an all-zero MAC address.
314 * Check for this, and don't attach in this case.
317 for (i = 0; i < ETHER_ADDR_LEN && sc->sc_enaddr[i] == 0; i++) {}
318 if (i == ETHER_ADDR_LEN) {
319 device_printf(dev, "invalid MAC address\n");
323 if (gem_attach(sc) != 0) {
324 device_printf(dev, "could not be attached\n");
328 if (bus_setup_intr(dev, sc->sc_res[GEM_RES_INTR], INTR_TYPE_NET |
329 INTR_MPSAFE, NULL, gem_intr, sc, &sc->sc_ih) != 0) {
330 device_printf(dev, "failed to set up interrupt\n");
337 if (sc->sc_res[GEM_RES_BANK2] != NULL)
338 free(sc->sc_res[GEM_RES_BANK2], M_DEVBUF);
339 GEM_LOCK_DESTROY(sc);
340 bus_release_resources(dev, gem_pci_res_spec, sc->sc_res);
345 gem_pci_detach(device_t dev)
347 struct gem_softc *sc;
349 sc = device_get_softc(dev);
350 bus_teardown_intr(dev, sc->sc_res[GEM_RES_INTR], sc->sc_ih);
352 free(sc->sc_res[GEM_RES_BANK2], M_DEVBUF);
353 GEM_LOCK_DESTROY(sc);
354 bus_release_resources(dev, gem_pci_res_spec, sc->sc_res);
359 gem_pci_suspend(device_t dev)
362 gem_suspend(device_get_softc(dev));
367 gem_pci_resume(device_t dev)
370 gem_resume(device_get_softc(dev));