2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright (c) 2017 Tom Jones <tj@enoti.me>
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 * Copyright (c) 2016 Mark Kettenis
34 * Permission to use, copy, modify, and distribute this software for any
35 * purpose with or without fee is hereby granted, provided that the above
36 * copyright notice and this permission notice appear in all copies.
38 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
39 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
40 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
41 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
42 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
43 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
44 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
49 #define CHVGPIO_INTERRUPT_STATUS 0x0300
50 #define CHVGPIO_INTERRUPT_MASK 0x0380
51 #define CHVGPIO_PAD_CFG0 0x4400
52 #define CHVGPIO_PAD_CFG1 0x4404
54 #define CHVGPIO_PAD_CFG0_GPIORXSTATE 0x00000001
55 #define CHVGPIO_PAD_CFG0_GPIOTXSTATE 0x00000002
56 #define CHVGPIO_PAD_CFG0_INTSEL_MASK 0xf0000000
57 #define CHVGPIO_PAD_CFG0_INTSEL_SHIFT 28
59 #define CHVGPIO_PAD_CFG0_GPIOCFG_SHIFT 8
60 #define CHVGPIO_PAD_CFG0_GPIOCFG_MASK (7 << CHVGPIO_PAD_CFG0_GPIOCFG_SHIFT)
61 #define CHVGPIO_PAD_CFG0_GPIOCFG_GPIO 0
62 #define CHVGPIO_PAD_CFG0_GPIOCFG_GPO 1
63 #define CHVGPIO_PAD_CFG0_GPIOCFG_GPI 2
64 #define CHVGPIO_PAD_CFG0_GPIOCFG_HIZ 3
66 #define CHVGPIO_PAD_CFG1_INTWAKECFG_MASK 0x00000007
67 #define CHVGPIO_PAD_CFG1_INTWAKECFG_FALLING 0x00000001
68 #define CHVGPIO_PAD_CFG1_INTWAKECFG_RISING 0x00000002
69 #define CHVGPIO_PAD_CFG1_INTWAKECFG_BOTH 0x00000003
70 #define CHVGPIO_PAD_CFG1_INTWAKECFG_LEVEL 0x00000004
71 #define CHVGPIO_PAD_CFG1_INVRXTX_MASK 0x000000f0
72 #define CHVGPIO_PAD_CFG1_INVRXTX_RXDATA 0x00000040
75 * The pads for the pins are arranged in groups of maximal 15 pins.
76 * The arrays below give the number of pins per group, such that we
77 * can validate the (untrusted) pin numbers from ACPI.
80 #define E_BANK_PREFIX "eastbank"
82 const int chv_east_pins[] = {
86 const char *chv_east_pin_names[] = {
115 #define N_BANK_PREFIX "northbank"
117 const int chv_north_pins[] = {
118 9, 13, 12, 12, 13, -1
121 const char *chv_north_pin_names[] = {
133 "SEC_GPIO_SUS10_PAD",
138 "SEC_GPIO_SUS11_PAD",
174 "HV_DDI2_DDC_SDA_PAD",
175 "PANEL1_BKLTCTL_PAD",
177 "PANEL0_BKLTCTL_PAD",
178 "HV_DDI0_DDC_SDA_PAD",
179 "HV_DDI2_DDC_SCL_PAD",
183 "HV_DDI0_DDC_SCL_PAD",
189 #define SE_BANK_PREFIX "southeastbank"
191 const int chv_southeast_pins[] = {
192 8, 12, 6, 8, 10, 11, -1
195 const char *chv_southeast_pin_names[] = {
205 "SDMMC2_D3_CD_B_PAD",
216 "SDMMC1_D3_CD_B_PAD",
229 "MF_LPC_CLKOUT1_PAD",
231 "MF_LPC_CLKOUT0_PAD",
246 "PMU_RESETBUTTON_B_PAD",
248 "SDMMC3_PWR_EN_B_PAD",
259 #define SW_BANK_PREFIX "southwestbank"
261 const int chv_southwest_pins[] = {
262 8, 8, 8, 8, 8, 8, 8, -1
265 const char *chv_southwest_pin_names[] = {
330 const char *virtualgpio[] = {