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39 * Base addresses encoded in seg_addr are not assumed to be physical
40 * addresses. The ring format assumes these come from some linear address
41 * space. This could be physical memory, kernel virtual memory, user virtual
44 * Each queue is assumed to be associated with a single such linear
45 * address space to ensure a consistent meaning for seg_addrs posted to its
48 struct gve_tx_pkt_desc {
49 uint8_t type_flags; /* desc type is lower 4 bits, flags upper */
50 uint8_t l4_csum_offset; /* relative offset of L4 csum word */
51 uint8_t l4_hdr_offset; /* Offset of start of L4 headers in packet */
52 uint8_t desc_cnt; /* Total descriptors for this packet */
53 __be16 len; /* Total length of this packet (in bytes) */
54 __be16 seg_len; /* Length of this descriptor's segment */
55 __be64 seg_addr; /* Base address (see note) of this segment */
58 struct gve_tx_mtd_desc {
59 uint8_t type_flags; /* type is lower 4 bits, subtype upper */
60 uint8_t path_state; /* state is lower 4 bits, hash type upper */
66 struct gve_tx_seg_desc {
67 uint8_t type_flags; /* type is lower 4 bits, flags upper */
68 uint8_t l3_offset; /* TSO: 2 byte units to start of IPH */
70 __be16 mss; /* TSO MSS */
75 /* GVE Transmit Descriptor Types */
76 #define GVE_TXD_STD (0x0 << 4) /* Std with Host Address */
77 #define GVE_TXD_TSO (0x1 << 4) /* TSO with Host Address */
78 #define GVE_TXD_SEG (0x2 << 4) /* Seg with Host Address */
79 #define GVE_TXD_MTD (0x3 << 4) /* Metadata */
81 /* GVE Transmit Descriptor Flags for Std Pkts */
82 #define GVE_TXF_L4CSUM BIT(0) /* Need csum offload */
83 #define GVE_TXF_TSTAMP BIT(2) /* Timestamp required */
85 /* GVE Transmit Descriptor Flags for TSO Segs */
86 #define GVE_TXSF_IPV6 BIT(1) /* IPv6 TSO */
88 /* GVE Transmit Descriptor Options for MTD Segs */
89 #define GVE_MTD_SUBTYPE_PATH 0
91 #define GVE_MTD_PATH_STATE_DEFAULT 0
92 #define GVE_MTD_PATH_STATE_TIMEOUT 1
93 #define GVE_MTD_PATH_STATE_CONGESTION 2
94 #define GVE_MTD_PATH_STATE_RETRANSMIT 3
96 #define GVE_MTD_PATH_HASH_NONE (0x0 << 4)
97 #define GVE_MTD_PATH_HASH_L4 (0x1 << 4)
100 * GVE Receive Packet Descriptor
102 * The start of an ethernet packet comes 2 bytes into the rx buffer.
103 * gVNIC adds this padding so that both the DMA and the L3/4 protocol header
110 __be32 rss_hash; /* Receive-side scaling hash (Toeplitz for gVNIC) */
112 __be16 reserved; /* Reserved to zero */
113 uint8_t hdr_len; /* Header length (L2-L4) including padding */
114 uint8_t hdr_off; /* 64-byte-scaled offset into RX_DATA entry */
115 uint16_t csum; /* 1's-complement partial checksum of L3+ bytes */
116 __be16 len; /* Length of the received packet */
117 __be16 flags_seq; /* Flags [15:3] and sequence number [2:0] (1-7) */
119 _Static_assert(sizeof(struct gve_rx_desc) == 64, "gve: bad desc struct length");
122 * If the device supports raw dma addressing then the addr in data slot is
123 * the dma address of the buffer.
124 * If the device only supports registered segments then the addr is a byte
125 * offset into the registered segment (an ordered list of pages) where the
128 union gve_rx_data_slot {
133 /* GVE Recive Packet Descriptor Seq No */
134 #define GVE_SEQNO(x) (be16toh(x) & 0x7)
136 /* GVE Recive Packet Descriptor Flags */
137 #define GVE_RXFLG(x) htobe16(1 << (3 + (x)))
138 #define GVE_RXF_FRAG GVE_RXFLG(3) /* IP Fragment */
139 #define GVE_RXF_IPV4 GVE_RXFLG(4) /* IPv4 */
140 #define GVE_RXF_IPV6 GVE_RXFLG(5) /* IPv6 */
141 #define GVE_RXF_TCP GVE_RXFLG(6) /* TCP Packet */
142 #define GVE_RXF_UDP GVE_RXFLG(7) /* UDP Packet */
143 #define GVE_RXF_ERR GVE_RXFLG(8) /* Packet Error Detected */
144 #define GVE_RXF_PKT_CONT GVE_RXFLG(10) /* Multi Fragment RX packet */
147 #define GVE_IRQ_ACK BIT(31)
148 #define GVE_IRQ_MASK BIT(30)
149 #define GVE_IRQ_EVENT BIT(29)
151 #endif /* _GVE_DESC_H_ */