2 * Copyright (c) 2011 HighPoint Technologies, Inc.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 #include <dev/hpt27xx/hpt27xx_config.h>
35 #if defined(__BIG_ENDIAN__)&&!defined(__BIG_ENDIAN_BITFIELD)
36 #define __BIG_ENDIAN_BITFIELD
44 #define __attribute__(x)
50 * Version of this interface.
51 * The user mode application must first issue a hpt_get_version() call to
52 * check HPT_INTERFACE_VERSION. When an utility using newer version interface
53 * is used with old version drivers, it must call only the functions that
55 * A new version interface should only add ioctl functions; it should implement
56 * all old version functions without change their definition.
58 #define __this_HPT_INTERFACE_VERSION 0x02010000
60 #ifndef HPT_INTERFACE_VERSION
61 #error "You must define HPT_INTERFACE_VERSION you implemented"
64 #if HPT_INTERFACE_VERSION > __this_HPT_INTERFACE_VERSION
65 #error "HPT_INTERFACE_VERSION is invalid"
70 * Logical device --- a device that can be accessed by OS.
71 * Physical device --- device attached to the controller.
72 * A logical device can be simply a physical device.
74 * Each logical and physical device has a 32bit ID. GUI will use this ID
75 * to identify devices.
76 * 1. The ID must be unique.
77 * 2. The ID must be immutable. Once an ID is assigned to a device, it
78 * must not change when system is running and the device exists.
79 * 3. The ID of logical device must be NOT reusable. If a device is
80 * removed, other newly created logical device must not use the same ID.
81 * 4. The ID must not be zero or 0xFFFFFFFF.
83 typedef HPT_U32 DEVICEID;
86 * logical device type.
87 * Identify array (logical device) and physical device.
94 * GUI will treat all array as 1-level RAID. No RAID0/1 or RAID1/0.
95 * A RAID0/1 device is type AT_RAID1. A RAID1/0 device is type AT_RAID0.
96 * Their members may be another array of type RAID0 or RAID1.
109 * physical device type
111 #define PDT_UNKNOWN 0
112 #define PDT_HARDDISK 1
115 #define PDT_CHANGER 4
120 #define MAX_NAME_LENGTH 36
121 #define MAX_ARRAYNAME_LEN 16
123 #define MAX_ARRAY_MEMBERS_V1 8
125 #ifndef MAX_ARRAY_MEMBERS_V2
126 #define MAX_ARRAY_MEMBERS_V2 16
129 #ifndef MAX_ARRAY_MEMBERS_V3
130 #define MAX_ARRAY_MEMBERS_V3 64
133 /* keep definition for source code compatiblity */
134 #define MAX_ARRAY_MEMBERS MAX_ARRAY_MEMBERS_V1
138 * GUI use these commands to do IO on logical/physical devices.
140 #define IO_COMMAND_READ 1
141 #define IO_COMMAND_WRITE 2
148 #define ARRAY_FLAG_DISABLED 0x00000001 /* The array is disabled */
149 #define ARRAY_FLAG_NEEDBUILDING 0x00000002 /* array data need to be rebuilt */
150 #define ARRAY_FLAG_REBUILDING 0x00000004 /* array is in rebuilding process */
151 #define ARRAY_FLAG_BROKEN 0x00000008 /* broken but may still working */
152 #define ARRAY_FLAG_BOOTDISK 0x00000010 /* array has a active partition */
154 #define ARRAY_FLAG_BOOTMARK 0x00000040 /* array has boot mark set */
155 #define ARRAY_FLAG_NEED_AUTOREBUILD 0x00000080 /* auto-rebuild should start */
156 #define ARRAY_FLAG_VERIFYING 0x00000100 /* is being verified */
157 #define ARRAY_FLAG_INITIALIZING 0x00000200 /* is being initialized */
158 #define ARRAY_FLAG_TRANSFORMING 0x00000400 /* tranform in progress */
159 #define ARRAY_FLAG_NEEDTRANSFORM 0x00000800 /* array need tranform */
160 #define ARRAY_FLAG_NEEDINITIALIZING 0x00001000 /* the array's initialization hasn't finished*/
161 #define ARRAY_FLAG_BROKEN_REDUNDANT 0x00002000 /* broken but redundant (raid6) */
162 #define ARRAY_FLAG_RAID15PLUS 0x80000000 /* display this RAID 1 as RAID 1.5 */
164 #define ARRAY_FLAG_ZERO_STARTING 0x40000000 /* start lba of all members of this array is 0 */
169 #define DEVICE_FLAG_DISABLED 0x00000001 /* device is disabled */
170 #define DEVICE_FLAG_BOOTDISK 0x00000002 /* disk has a active partition */
171 #define DEVICE_FLAG_BOOTMARK 0x00000004 /* disk has boot mark set */
172 #define DEVICE_FLAG_WITH_601 0x00000008 /* has HPT601 connected */
173 #define DEVICE_FLAG_SATA 0x00000010 /* SATA or SAS device */
174 #define DEVICE_FLAG_ON_PM_PORT 0x00000020 /* PM port */
175 #define DEVICE_FLAG_SAS 0x00000040 /* SAS device */
176 #define DEVICE_FLAG_IN_ENCLOSURE 0x00000080 /* PathId is enclosure# */
177 #define DEVICE_FLAG_TAPE 0x00000200 /* SAS Tape device */
178 #define DEVICE_FLAG_CHANGER 0x00000400 /* SAS Changer device */
179 #define DEVICE_FLAG_UNINITIALIZED 0x00010000 /* device is not initialized, can't be used to create array */
180 #define DEVICE_FLAG_LEGACY 0x00020000 /* single disk & mbr contains at least one partition */
181 #define DEVICE_FLAG_BAD_SECTOR_FOUND 0x00040000 /* found bad sector on target disk, set and clear by GUI */
183 #define DEVICE_FLAG_IS_SPARE 0x80000000 /* is a spare disk */
186 #define DEVICE_FLAG_SSD 0x00000100 /* SSD device */
187 #define DEVICE_FLAG_3G 0x10000000
188 #define DEVICE_FLAG_6G 0x20000000
192 * array states used by hpt_set_array_state()
195 #define MIRROR_REBUILD_START 1
196 #define MIRROR_REBUILD_ABORT 2
197 #define MIRROR_REBUILD_COMPLETE 3
199 #define AS_REBUILD_START 1
200 #define AS_REBUILD_ABORT 2
201 #define AS_REBUILD_PAUSE AS_REBUILD_ABORT
202 #define AS_REBUILD_COMPLETE 3
203 #define AS_VERIFY_START 4
204 #define AS_VERIFY_ABORT 5
205 #define AS_VERIFY_COMPLETE 6
206 #define AS_INITIALIZE_START 7
207 #define AS_INITIALIZE_ABORT 8
208 #define AS_INITIALIZE_COMPLETE 9
209 #define AS_VERIFY_FAILED 10
210 #define AS_REBUILD_STOP 11
211 #define AS_SAVE_STATE 12
212 #define AS_TRANSFORM_START 13
213 #define AS_TRANSFORM_ABORT 14
215 /************************************************************************
217 * It would be better if ioctl code are the same on different platforms,
218 * but we must not conflict with system defined ioctl code.
219 ************************************************************************/
220 #if defined(LINUX) || defined(__FreeBSD_version) || defined(linux)
221 #define HPT_CTL_CODE(x) (x+0xFF00)
222 #define HPT_CTL_CODE_LINUX_TO_IOP(x) ((x)-0xff00)
223 #elif defined(_MS_WIN32_) || defined(WIN32)
226 #define CTL_CODE( DeviceType, Function, Method, Access ) \
227 (((DeviceType) << 16) | ((Access) << 14) | ((Function) << 2) | (Method))
229 #define HPT_CTL_CODE(x) CTL_CODE(0x370, 0x900+(x), 0, 0)
230 #define HPT_CTL_CODE_WIN32_TO_IOP(x) ((((x) & 0xffff)>>2)-0x900)
233 #define HPT_CTL_CODE(x) (x)
236 #define HPT_IOCTL_GET_VERSION HPT_CTL_CODE(0)
237 #define HPT_IOCTL_GET_CONTROLLER_COUNT HPT_CTL_CODE(1)
238 #define HPT_IOCTL_GET_CONTROLLER_INFO HPT_CTL_CODE(2)
239 #define HPT_IOCTL_GET_CHANNEL_INFO HPT_CTL_CODE(3)
240 #define HPT_IOCTL_GET_LOGICAL_DEVICES HPT_CTL_CODE(4)
241 #define HPT_IOCTL_GET_DEVICE_INFO HPT_CTL_CODE(5)
242 #define HPT_IOCTL_CREATE_ARRAY HPT_CTL_CODE(6)
243 #define HPT_IOCTL_DELETE_ARRAY HPT_CTL_CODE(7)
244 #define HPT_IOCTL_ARRAY_IO HPT_CTL_CODE(8)
245 #define HPT_IOCTL_DEVICE_IO HPT_CTL_CODE(9)
246 #define HPT_IOCTL_GET_EVENT HPT_CTL_CODE(10)
247 #define HPT_IOCTL_REBUILD_MIRROR HPT_CTL_CODE(11)
248 /* use HPT_IOCTL_REBUILD_DATA_BLOCK from now on */
249 #define HPT_IOCTL_REBUILD_DATA_BLOCK HPT_IOCTL_REBUILD_MIRROR
250 #define HPT_IOCTL_ADD_SPARE_DISK HPT_CTL_CODE(12)
251 #define HPT_IOCTL_REMOVE_SPARE_DISK HPT_CTL_CODE(13)
252 #define HPT_IOCTL_ADD_DISK_TO_ARRAY HPT_CTL_CODE(14)
253 #define HPT_IOCTL_SET_ARRAY_STATE HPT_CTL_CODE(15)
254 #define HPT_IOCTL_SET_ARRAY_INFO HPT_CTL_CODE(16)
255 #define HPT_IOCTL_SET_DEVICE_INFO HPT_CTL_CODE(17)
256 #define HPT_IOCTL_RESCAN_DEVICES HPT_CTL_CODE(18)
257 #define HPT_IOCTL_GET_DRIVER_CAPABILITIES HPT_CTL_CODE(19)
258 #define HPT_IOCTL_GET_601_INFO HPT_CTL_CODE(20)
259 #define HPT_IOCTL_SET_601_INFO HPT_CTL_CODE(21)
260 #define HPT_IOCTL_LOCK_DEVICE HPT_CTL_CODE(22)
261 #define HPT_IOCTL_UNLOCK_DEVICE HPT_CTL_CODE(23)
262 #define HPT_IOCTL_IDE_PASS_THROUGH HPT_CTL_CODE(24)
263 #define HPT_IOCTL_VERIFY_DATA_BLOCK HPT_CTL_CODE(25)
264 #define HPT_IOCTL_INITIALIZE_DATA_BLOCK HPT_CTL_CODE(26)
265 #define HPT_IOCTL_ADD_DEDICATED_SPARE HPT_CTL_CODE(27)
266 #define HPT_IOCTL_DEVICE_IO_EX HPT_CTL_CODE(28)
267 #define HPT_IOCTL_SET_BOOT_MARK HPT_CTL_CODE(29)
268 #define HPT_IOCTL_QUERY_REMOVE HPT_CTL_CODE(30)
269 #define HPT_IOCTL_REMOVE_DEVICES HPT_CTL_CODE(31)
270 #define HPT_IOCTL_CREATE_ARRAY_V2 HPT_CTL_CODE(32)
271 #define HPT_IOCTL_GET_DEVICE_INFO_V2 HPT_CTL_CODE(33)
272 #define HPT_IOCTL_SET_DEVICE_INFO_V2 HPT_CTL_CODE(34)
273 #define HPT_IOCTL_REBUILD_DATA_BLOCK_V2 HPT_CTL_CODE(35)
274 #define HPT_IOCTL_VERIFY_DATA_BLOCK_V2 HPT_CTL_CODE(36)
275 #define HPT_IOCTL_INITIALIZE_DATA_BLOCK_V2 HPT_CTL_CODE(37)
276 #define HPT_IOCTL_LOCK_DEVICE_V2 HPT_CTL_CODE(38)
277 #define HPT_IOCTL_DEVICE_IO_V2 HPT_CTL_CODE(39)
278 #define HPT_IOCTL_DEVICE_IO_EX_V2 HPT_CTL_CODE(40)
279 #define HPT_IOCTL_CREATE_TRANSFORM HPT_CTL_CODE(41)
280 #define HPT_IOCTL_STEP_TRANSFORM HPT_CTL_CODE(42)
281 #define HPT_IOCTL_SET_VDEV_INFO HPT_CTL_CODE(43)
282 #define HPT_IOCTL_CALC_MAX_CAPACITY HPT_CTL_CODE(44)
283 #define HPT_IOCTL_INIT_DISKS HPT_CTL_CODE(45)
284 #define HPT_IOCTL_GET_DEVICE_INFO_V3 HPT_CTL_CODE(46)
285 #define HPT_IOCTL_GET_CONTROLLER_INFO_V2 HPT_CTL_CODE(47)
286 #define HPT_IOCTL_I2C_TRANSACTION HPT_CTL_CODE(48)
287 #define HPT_IOCTL_GET_PARAMETER_LIST HPT_CTL_CODE(49)
288 #define HPT_IOCTL_GET_PARAMETER HPT_CTL_CODE(50)
289 #define HPT_IOCTL_SET_PARAMETER HPT_CTL_CODE(51)
290 #define HPT_IOCTL_GET_DRIVER_CAPABILITIES_V2 HPT_CTL_CODE(52)
291 #define HPT_IOCTL_GET_CHANNEL_INFO_V2 HPT_CTL_CODE(53)
292 #define HPT_IOCTL_GET_CONTROLLER_INFO_V3 HPT_CTL_CODE(54)
293 #define HPT_IOCTL_GET_DEVICE_INFO_V4 HPT_CTL_CODE(55)
294 #define HPT_IOCTL_CREATE_ARRAY_V3 HPT_CTL_CODE(56)
295 #define HPT_IOCTL_CREATE_TRANSFORM_V2 HPT_CTL_CODE(57)
296 #define HPT_IOCTL_CALC_MAX_CAPACITY_V2 HPT_CTL_CODE(58)
297 #define HPT_IOCTL_SCSI_PASSTHROUGH HPT_CTL_CODE(59)
298 #define HPT_IOCTL_GET_PHYSICAL_DEVICES HPT_CTL_CODE(60)
299 #define HPT_IOCTL_GET_ENCLOSURE_COUNT HPT_CTL_CODE(61)
300 #define HPT_IOCTL_GET_ENCLOSURE_INFO HPT_CTL_CODE(62)
301 #define HPT_IOCTL_GET_PERFMON_STATUS HPT_CTL_CODE(63)
302 #define HPT_IOCTL_SET_PERFMON_STATUS HPT_CTL_CODE(64)
303 #define HPT_IOCTL_GET_PERFMON_DATA HPT_CTL_CODE(65)
304 #define HPT_IOCTL_IDE_PASS_THROUGH_V2 HPT_CTL_CODE(66)
305 #define HPT_IOCTL_GET_ENCLOSURE_INFO_V2 HPT_CTL_CODE(67)
306 #define HPT_IOCTL_GET_ENCLOSURE_INFO_V3 HPT_CTL_CODE(68)
307 #define HPT_IOCTL_ACCESS_CONFIG_REG HPT_CTL_CODE(69)
309 #define HPT_IOCTL_GET_ENCLOSURE_INFO_V4 HPT_CTL_CODE(70)
310 #define HPT_IOCTL_GET_ENCLOSURE_ELEMENT_INFO HPT_CTL_CODE(71)
311 #define HPT_IOCTL_DUMP_METADATA HPT_CTL_CODE(72)
312 #define HPT_IOCTL_GET_CONTROLLER_INFO_V2_EXT HPT_CTL_CODE(73)
315 #define HPT_IOCTL_GET_CONTROLLER_IDS HPT_CTL_CODE(100)
316 #define HPT_IOCTL_GET_DCB HPT_CTL_CODE(101)
318 #define HPT_IOCTL_EPROM_IO HPT_CTL_CODE(102)
319 #define HPT_IOCTL_GET_CONTROLLER_VENID HPT_CTL_CODE(103)
322 #define HPT_IOCTL_GET_DRIVER_CAPABILITIES_CC HPT_CTL_CODE(200)
323 #define HPT_IOCTL_GET_CCS_INFO HPT_CTL_CODE(201)
324 #define HPT_IOCTL_CREATE_CC HPT_CTL_CODE(202)
325 #define HPT_IOCTL_DELETE_CC HPT_CTL_CODE(203)
326 #define HPT_IOCTL_REENABLE_ARRAY HPT_CTL_CODE(204)
328 /************************************************************************
329 * shared data structures
330 ************************************************************************/
335 #define CHIP_TYPE_HPT366 1
336 #define CHIP_TYPE_HPT368 2
337 #define CHIP_TYPE_HPT370 3
338 #define CHIP_TYPE_HPT370A 4
339 #define CHIP_TYPE_HPT370B 5
340 #define CHIP_TYPE_HPT374 6
341 #define CHIP_TYPE_HPT372 7
342 #define CHIP_TYPE_HPT372A 8
343 #define CHIP_TYPE_HPT302 9
344 #define CHIP_TYPE_HPT371 10
345 #define CHIP_TYPE_HPT372N 11
346 #define CHIP_TYPE_HPT302N 12
347 #define CHIP_TYPE_HPT371N 13
348 #define CHIP_TYPE_SI3112A 14
349 #define CHIP_TYPE_ICH5 15
350 #define CHIP_TYPE_ICH5R 16
351 #define CHIP_TYPE_MV50XX 20
352 #define CHIP_TYPE_MV60X1 21
353 #define CHIP_TYPE_MV60X2 22
354 #define CHIP_TYPE_MV70X2 23
355 #define CHIP_TYPE_MV5182 24
356 #define CHIP_TYPE_IOP331 31
357 #define CHIP_TYPE_IOP333 32
358 #define CHIP_TYPE_IOP341 33
359 #define CHIP_TYPE_IOP348 34
364 #define CHIP_SUPPORT_ULTRA_66 0x20
365 #define CHIP_SUPPORT_ULTRA_100 0x40
366 #define CHIP_HPT3XX_DPLL_MODE 0x80
367 #define CHIP_SUPPORT_ULTRA_133 0x01
368 #define CHIP_SUPPORT_ULTRA_150 0x02
369 #define CHIP_MASTER 0x04
370 #define CHIP_SUPPORT_SATA_300 0x08
372 #define HPT_SPIN_UP_MODE_NOSUPPORT 0
373 #define HPT_SPIN_UP_MODE_FULL 1
374 #define HPT_SPIN_UP_MODE_STANDBY 2
376 #define HPT_CAP_DUMP_METADATA 0x1
377 #define HPT_CAP_DISK_CHECKING 0x2
378 #define HPT_CAP_REPORT_SECTOR_SIZE 0x10
380 typedef struct _DRIVER_CAPABILITIES {
383 HPT_U8 MaximumControllers; /* maximum controllers the driver can support */
384 HPT_U8 SupportCrossControllerRAID; /* 1-support, 0-not support */
385 HPT_U8 MinimumBlockSizeShift; /* minimum block size shift */
386 HPT_U8 MaximumBlockSizeShift; /* maximum block size shift */
388 HPT_U8 SupportDiskModeSetting;
389 HPT_U8 SupportSparePool;
390 HPT_U8 MaximumArrayNameLength;
391 /* only one HPT_U8 left here! */
392 #ifdef __BIG_ENDIAN_BITFIELD
394 HPT_U8 SupportPerformanceMonitor: 1;
395 HPT_U8 SupportVariableSectorSize: 1;
396 HPT_U8 SupportHotSwap: 1;
397 HPT_U8 HighPerformanceRAID1: 1;
398 HPT_U8 RebuildProcessInDriver: 1;
399 HPT_U8 SupportDedicatedSpare: 1;
401 HPT_U8 SupportDedicatedSpare: 1; /* call hpt_add_dedicated_spare() for dedicated spare. */
402 HPT_U8 RebuildProcessInDriver: 1; /* Windows only. used by mid layer for rebuild control. */
403 HPT_U8 HighPerformanceRAID1: 1;
404 HPT_U8 SupportHotSwap: 1;
405 HPT_U8 SupportVariableSectorSize: 1;
406 HPT_U8 SupportPerformanceMonitor: 1;
411 HPT_U8 SupportedRAIDTypes[16];
412 /* maximum members in an array corresponding to SupportedRAIDTypes */
413 HPT_U8 MaximumArrayMembers[16];
415 DRIVER_CAPABILITIES, *PDRIVER_CAPABILITIES;
417 typedef struct _DRIVER_CAPABILITIES_V2 {
418 DRIVER_CAPABILITIES v1;
419 HPT_U8 SupportedCachePolicies[16];
420 HPT_U32 ConfigRegSize; /* max sectors */
421 HPT_U32 SupportDiskCachePolicy; /* disable/enable disk cache policy */
423 HPT_U32 reserved[14];
425 DRIVER_CAPABILITIES_V2, *PDRIVER_CAPABILITIES_V2;
428 * Controller information.
430 typedef struct _CONTROLLER_INFO {
431 HPT_U8 ChipType; /* chip type */
432 HPT_U8 InterruptLevel; /* IRQ level */
433 HPT_U8 NumBuses; /* bus count */
436 HPT_U8 szProductID[MAX_NAME_LENGTH];/* product name */
437 HPT_U8 szVendorID[MAX_NAME_LENGTH]; /* vender name */
439 } CONTROLLER_INFO, *PCONTROLLER_INFO;
441 #if HPT_INTERFACE_VERSION>=0x01020000
442 typedef struct _CONTROLLER_INFO_V2 {
443 HPT_U8 ChipType; /* chip type */
444 HPT_U8 InterruptLevel; /* IRQ level */
445 HPT_U8 NumBuses; /* bus count */
448 HPT_U8 szProductID[MAX_NAME_LENGTH];/* product name */
449 HPT_U8 szVendorID[MAX_NAME_LENGTH]; /* vender name */
451 HPT_U32 GroupId; /* low 32bit of vbus pointer the controller belongs
452 * the master controller has CHIP_MASTER flag set*/
459 } CONTROLLER_INFO_V2, *PCONTROLLER_INFO_V2;
461 typedef struct _CONTROLLER_INFO_V2_EXT {
467 } CONTROLLER_INFO_V2_EXT, *PCONTROLLER_INFO_V2_EXT;
470 #define CEXF_IOPModel 1
471 #define CEXF_SDRAMSize 2
472 #define CEXF_BatteryInstalled 4
473 #define CEXF_BatteryStatus 8
474 #define CEXF_BatteryVoltage 0x10
475 #define CEXF_BatteryBackupTime 0x20
476 #define CEXF_FirmwareVersion 0x40
477 #define CEXF_SerialNumber 0x80
478 #define CEXF_BatteryTemperature 0x100
479 #define CEXF_Power12v 0x200
480 #define CEXF_Power5v 0x400
481 #define CEXF_Power3p3v 0x800
482 #define CEXF_Power2p5v 0x1000
483 #define CEXF_Power1p8v 0x2000
484 #define CEXF_Core1p8v 0x4000
485 #define CEXF_Core1p2v 0x8000
486 #define CEXF_DDR1p8v 0x10000
487 #define CEXF_DDR1p8vRef 0x20000
488 #define CEXF_CPUTemperature 0x40000
489 #define CEXF_BoardTemperature 0x80000
490 #define CEXF_FanSpeed 0x100000
491 #define CEXF_Core1p0v 0x200000
492 #define CEXF_Fan2Speed 0x400000
493 #define CEXF_Power1p0v 0x800000
494 #define CEXF_Power1p5v 0x1000000
495 #define CEXF_SASAddress 0x2000000
497 typedef struct _CONTROLLER_INFO_V3 {
499 HPT_U8 InterruptLevel;
502 HPT_U8 szProductID[MAX_NAME_LENGTH];
503 HPT_U8 szVendorID[MAX_NAME_LENGTH];
512 HPT_U8 BatteryInstalled;
513 HPT_U8 BatteryStatus;
514 HPT_U16 BatteryVoltage;
515 HPT_U32 BatteryBackupTime;
516 HPT_U32 FirmwareVersion;
517 HPT_U8 SerialNumber[32];
518 HPT_U8 BatteryMBInstalled;
519 HPT_U8 BatteryTemperature;
520 signed char CPUTemperature;
521 signed char BoardTemperature;
536 HPT_U8 SASAddress[8];
539 CONTROLLER_INFO_V3, *PCONTROLLER_INFO_V3;
540 typedef char check_CONTROLLER_INFO_V3[sizeof(CONTROLLER_INFO_V3)==256? 1:-1];
543 * Channel information.
545 typedef struct _CHANNEL_INFO {
546 HPT_U32 IoPort; /* IDE Base Port Address */
547 HPT_U32 ControlPort; /* IDE Control Port Address */
549 DEVICEID Devices[2]; /* device connected to this channel */
551 } CHANNEL_INFO, *PCHANNEL_INFO;
553 typedef struct _CHANNEL_INFO_V2 {
554 HPT_U32 IoPort; /* IDE Base Port Address */
555 HPT_U32 ControlPort; /* IDE Control Port Address */
557 DEVICEID Devices[2+13]; /* device connected to this channel, PMPort max=15 */
558 } CHANNEL_INFO_V2, *PCHANNEL_INFO_V2;
560 typedef struct _ENCLOSURE_INFO {
561 HPT_U8 EnclosureType;
566 HPT_U8 ProductId[16];
567 HPT_U8 ProductRevisionLevel[4];
570 } ENCLOSURE_INFO, *PENCLOSURE_INFO;
573 typedef struct _SES_ELEMENT_STATUS {
575 HPT_U8 ElementOverallIndex;
576 HPT_U8 ElementStatus;
578 HPT_U32 ElementValue;
579 HPT_U8 ElementDescriptor[32];
580 }SES_ELEMENT_STATUS,*PSES_ELEMENT_STATUS;
582 #define MAX_ELEMENT_COUNT 80
584 #define SES_TYPE_UNSPECIFIED 0x00
585 #define SES_TYPE_DEVICE 0x01
586 #define SES_TYPE_POWER_SUPPLY 0x02
587 #define SES_TYPE_FAN 0x03
588 #define SES_TYPE_TEMPERATURE_SENSOR 0x04
589 #define SES_TYPE_DOOR_LOCK 0x05
590 #define SES_TYPE_SPEAKER 0x06
591 #define SES_TYPE_ES_CONTROLLER 0x07
592 #define SES_TYPE_SCC_CONTROLLER 0x08
593 #define SES_TYPE_NONVOLATILE_CACHE 0x09
594 #define SES_TYPE_UPS 0x0B
595 #define SES_TYPE_DISPLAY 0x0C
596 #define SES_TYPE_KEYPAD 0x0D
597 #define SES_TYPE_ENCLOSURE 0x0E
598 #define SES_TYPE_SCSI_TRANSCEIVER 0x0F
599 #define SES_TYPE_LANGUAGE 0x10
600 #define SES_TYPE_COMM_PORT 0x11
601 #define SES_TYPE_VOLTAGE_SENSOR 0x12
602 #define SES_TYPE_CURRENT_SENSOR 0x13
603 #define SES_TYPE_SCSI_TARGET_PORT 0x14
604 #define SES_TYPE_SCSI_INITIATOR_PORT 0x15
605 #define SES_TYPE_SIMPLE_SUBENCLOSURE 0x16
606 #define SES_TYPE_ARRAY_DEVICE 0x17
607 #define SES_TYPE_VENDOR_SPECIFIC 0x80
611 #define SES_STATUS_UNSUPPORTED 0x00
612 #define SES_STATUS_OK 0x01
613 #define SES_STATUS_CRITICAL 0x02
614 #define SES_STATUS_NONCRITICAL 0x03
615 #define SES_STATUS_UNRECOVERABLE 0x04
616 #define SES_STATUS_NOTINSTALLED 0x05
617 #define SES_STATUS_UNKNOWN 0x06
618 #define SES_STATUS_NOTAVAILABLE 0x07
619 #define SES_STATUS_RESERVED 0x08
622 typedef struct _ENCLOSURE_INFO_V2 {
623 HPT_U8 EnclosureType;
628 HPT_U8 ProductId[16];
629 HPT_U8 ProductRevisionLevel[4];
631 SES_ELEMENT_STATUS ElementStatus[MAX_ELEMENT_COUNT];
632 } ENCLOSURE_INFO_V2, *PENCLOSURE_INFO_V2;
634 typedef struct _ENCLOSURE_INFO_V3 {
635 HPT_U8 EnclosureType;
640 HPT_U8 ProductId[16];
641 HPT_U8 ProductRevisionLevel[4];
643 HPT_U32 UnitId; /*272x card has two Cores, unitId is used to distinguish them */
644 HPT_U32 reserved[32];
645 SES_ELEMENT_STATUS ElementStatus[MAX_ELEMENT_COUNT];
646 } ENCLOSURE_INFO_V3, *PENCLOSURE_INFO_V3;
648 typedef struct _ENCLOSURE_INFO_V4 {
649 HPT_U8 EnclosureType;
654 HPT_U8 ProductId[16];
655 HPT_U8 ProductRevisionLevel[4];
657 HPT_U32 UnitId; /*272x card has two Cores, unitId is used to distinguish them */
658 HPT_U32 ElementCount;
659 HPT_U32 reserved[32];
660 } ENCLOSURE_INFO_V4, *PENCLOSURE_INFO_V4;
662 #define ENCLOSURE_STATUS_OFFLINE 1
664 #define ENCLOSURE_TYPE_INTERNAL 0
665 #define ENCLOSURE_TYPE_SMP 1
666 #define ENCLOSURE_TYPE_PM 2
670 * time represented in HPT_U32 format
672 typedef struct _TIME_RECORD {
673 HPT_U32 seconds:6; /* 0 - 59 */
674 HPT_U32 minutes:6; /* 0 - 59 */
675 HPT_U32 month:4; /* 1 - 12 */
676 HPT_U32 hours:6; /* 0 - 59 */
677 HPT_U32 day:5; /* 1 - 31 */
678 HPT_U32 year:5; /* 0=2000, 31=2031 */
685 typedef struct _HPT_ARRAY_INFO {
686 HPT_U8 Name[MAX_ARRAYNAME_LEN];/* array name */
687 HPT_U8 Description[64]; /* array description */
688 HPT_U8 CreateManager[16]; /* who created it */
689 TIME_RECORD CreateTime; /* when created it */
691 HPT_U8 ArrayType; /* array type */
692 HPT_U8 BlockSizeShift; /* stripe size */
693 HPT_U8 nDisk; /* member count: Number of ID in Members[] */
696 HPT_U32 Flags; /* working flags, see ARRAY_FLAG_XXX */
697 HPT_U32 Members[MAX_ARRAY_MEMBERS_V1]; /* member array/disks */
700 * rebuilding progress, xx.xx% = sprintf(s, "%.2f%%", RebuildingProgress/100.0);
701 * only valid if rebuilding is done by driver code.
702 * Member Flags will have ARRAY_FLAG_REBUILDING set at this case.
703 * Verify operation use same fields below, the only difference is
704 * ARRAY_FLAG_VERIFYING is set.
706 HPT_U32 RebuildingProgress;
707 HPT_U32 RebuiltSectors; /* rebuilding point (LBA) for single member */
709 } HPT_ARRAY_INFO, *PHPT_ARRAY_INFO;
711 #if HPT_INTERFACE_VERSION>=0x01010000
712 typedef struct _HPT_ARRAY_INFO_V2 {
713 HPT_U8 Name[MAX_ARRAYNAME_LEN];/* array name */
714 HPT_U8 Description[64]; /* array description */
715 HPT_U8 CreateManager[16]; /* who created it */
716 TIME_RECORD CreateTime; /* when created it */
718 HPT_U8 ArrayType; /* array type */
719 HPT_U8 BlockSizeShift; /* stripe size */
720 HPT_U8 nDisk; /* member count: Number of ID in Members[] */
723 HPT_U32 Flags; /* working flags, see ARRAY_FLAG_XXX */
724 HPT_U32 Members[MAX_ARRAY_MEMBERS_V2]; /* member array/disks */
726 HPT_U32 RebuildingProgress;
727 HPT_U64 RebuiltSectors; /* rebuilding point (LBA) for single member */
730 } HPT_ARRAY_INFO_V2, *PHPT_ARRAY_INFO_V2;
733 #if HPT_INTERFACE_VERSION>=0x01020000
734 typedef struct _HPT_ARRAY_INFO_V3 {
735 HPT_U8 Name[MAX_ARRAYNAME_LEN];/* array name */
736 HPT_U8 Description[64]; /* array description */
737 HPT_U8 CreateManager[16]; /* who created it */
738 TIME_RECORD CreateTime; /* when created it */
740 HPT_U8 ArrayType; /* array type */
741 HPT_U8 BlockSizeShift; /* stripe size */
742 HPT_U8 nDisk; /* member count: Number of ID in Members[] */
745 HPT_U32 Flags; /* working flags, see ARRAY_FLAG_XXX */
746 HPT_U32 Members[MAX_ARRAY_MEMBERS_V2]; /* member array/disks */
748 HPT_U32 RebuildingProgress;
749 HPT_U64 RebuiltSectors; /* rebuilding point (LBA) for single member */
751 DEVICEID TransformSource;
752 DEVICEID TransformTarget; /* destination device ID */
753 HPT_U32 TransformingProgress;
754 HPT_U32 Signature; /* persistent identification*/
755 #if MAX_ARRAY_MEMBERS_V2==16
756 HPT_U16 Critical_Members; /* bit mask of critical members */
760 HPT_U32 Critical_Members;
763 } HPT_ARRAY_INFO_V3, *PHPT_ARRAY_INFO_V3;
766 #if HPT_INTERFACE_VERSION>=0x02000001
767 typedef struct _HPT_ARRAY_INFO_V4 {
768 HPT_U8 Name[MAX_ARRAYNAME_LEN];/* array name */
769 HPT_U8 Description[64]; /* array description */
770 HPT_U8 CreateManager[16]; /* who created it */
771 TIME_RECORD CreateTime; /* when created it */
773 HPT_U8 ArrayType; /* array type */
774 HPT_U8 BlockSizeShift; /* stripe size */
775 HPT_U8 nDisk; /* member count: Number of ID in Members[] */
778 HPT_U32 Flags; /* working flags, see ARRAY_FLAG_XXX */
780 HPT_U32 RebuildingProgress;
781 HPT_U64 RebuiltSectors; /* rebuilding point (LBA) for single member */
783 DEVICEID TransformSource;
784 DEVICEID TransformTarget; /* destination device ID */
785 HPT_U32 TransformingProgress;
786 HPT_U32 Signature; /* persistent identification*/
787 HPT_U8 SectorSizeShift; /*sector size = 512B<<SectorSizeShift*/
789 HPT_U64 Critical_Members;
790 HPT_U32 Members[MAX_ARRAY_MEMBERS_V3]; /* member array/disks */
791 } HPT_ARRAY_INFO_V4, *PHPT_ARRAY_INFO_V4;
796 * ATA/ATAPI Device identify data without the Reserved4.
798 typedef struct _IDENTIFY_DATA2 {
799 HPT_U16 GeneralConfiguration;
800 HPT_U16 NumberOfCylinders;
802 HPT_U16 NumberOfHeads;
803 HPT_U16 UnformattedBytesPerTrack;
804 HPT_U16 UnformattedBytesPerSector;
805 HPT_U8 SasAddress[8];
806 HPT_U16 SerialNumber[10];
808 HPT_U16 BufferSectorSize;
809 HPT_U16 NumberOfEccBytes;
810 HPT_U16 FirmwareRevision[4];
811 HPT_U16 ModelNumber[20];
812 HPT_U8 MaximumBlockTransfer;
813 HPT_U8 VendorUnique2;
814 HPT_U16 DoubleWordIo;
815 HPT_U16 Capabilities;
817 HPT_U8 VendorUnique3;
818 HPT_U8 PioCycleTimingMode;
819 HPT_U8 VendorUnique4;
820 HPT_U8 DmaCycleTimingMode;
821 HPT_U16 TranslationFieldsValid;
822 HPT_U16 NumberOfCurrentCylinders;
823 HPT_U16 NumberOfCurrentHeads;
824 HPT_U16 CurrentSectorsPerTrack;
825 HPT_U32 CurrentSectorCapacity; /*word58,59 the value indecate the logical sector size. */
826 HPT_U16 CurrentMultiSectorSetting;
827 HPT_U32 UserAddressableSectors;
828 HPT_U8 SingleWordDMASupport;
829 HPT_U8 SingleWordDMAActive;
830 HPT_U8 MultiWordDMASupport;
831 HPT_U8 MultiWordDMAActive;
832 HPT_U8 AdvancedPIOModes;
834 HPT_U16 MinimumMWXferCycleTime;
835 HPT_U16 RecommendedMWXferCycleTime;
836 HPT_U16 MinimumPIOCycleTime;
837 HPT_U16 MinimumPIOCycleTimeIORDY;
838 HPT_U16 Reserved5[2];
839 HPT_U16 ReleaseTimeOverlapped;
840 HPT_U16 ReleaseTimeServiceCommand;
841 HPT_U16 MajorRevision;
842 HPT_U16 MinorRevision;
843 } __attribute__((packed)) IDENTIFY_DATA2, *PIDENTIFY_DATA2;
846 * physical device information.
847 * IdentifyData.ModelNumber[] is HPT_U8-swapped from the original identify data.
849 typedef struct _DEVICE_INFO {
850 HPT_U8 ControllerId; /* controller id */
851 HPT_U8 PathId; /* bus */
852 HPT_U8 TargetId; /* id */
853 HPT_U8 DeviceModeSetting; /* Current Data Transfer mode: 0-4 PIO 0-4 */
854 /* 5-7 MW DMA0-2, 8-13 UDMA0-5 */
855 HPT_U8 DeviceType; /* device type */
856 HPT_U8 UsableMode; /* highest usable mode */
858 #ifdef __BIG_ENDIAN_BITFIELD
859 HPT_U8 NCQEnabled: 1;
860 HPT_U8 NCQSupported: 1;
861 HPT_U8 TCQEnabled: 1;
862 HPT_U8 TCQSupported: 1;
863 HPT_U8 WriteCacheEnabled: 1;
864 HPT_U8 WriteCacheSupported: 1;
865 HPT_U8 ReadAheadEnabled: 1;
866 HPT_U8 ReadAheadSupported: 1;
868 HPT_U8 SpinUpMode: 2;
870 HPT_U8 ReadAheadSupported: 1;
871 HPT_U8 ReadAheadEnabled: 1;
872 HPT_U8 WriteCacheSupported: 1;
873 HPT_U8 WriteCacheEnabled: 1;
874 HPT_U8 TCQSupported: 1;
875 HPT_U8 TCQEnabled: 1;
876 HPT_U8 NCQSupported: 1;
877 HPT_U8 NCQEnabled: 1;
878 HPT_U8 SpinUpMode: 2;
882 HPT_U32 Flags; /* working flags, see DEVICE_FLAG_XXX */
884 IDENTIFY_DATA2 IdentifyData; /* Identify Data of this device */
887 __attribute__((packed)) DEVICE_INFO, *PDEVICE_INFO;
889 #if HPT_INTERFACE_VERSION>=0x01020000
890 #define MAX_PARENTS_PER_DISK 8
892 * physical device information.
893 * IdentifyData.ModelNumber[] is HPT_U8-swapped from the original identify data.
895 typedef struct _DEVICE_INFO_V2 {
896 HPT_U8 ControllerId; /* controller id */
897 HPT_U8 PathId; /* bus */
898 HPT_U8 TargetId; /* id */
899 HPT_U8 DeviceModeSetting; /* Current Data Transfer mode: 0-4 PIO 0-4 */
900 /* 5-7 MW DMA0-2, 8-13 UDMA0-5 */
901 HPT_U8 DeviceType; /* device type */
902 HPT_U8 UsableMode; /* highest usable mode */
904 #ifdef __BIG_ENDIAN_BITFIELD
905 HPT_U8 NCQEnabled: 1;
906 HPT_U8 NCQSupported: 1;
907 HPT_U8 TCQEnabled: 1;
908 HPT_U8 TCQSupported: 1;
909 HPT_U8 WriteCacheEnabled: 1;
910 HPT_U8 WriteCacheSupported: 1;
911 HPT_U8 ReadAheadEnabled: 1;
912 HPT_U8 ReadAheadSupported: 1;
914 HPT_U8 SpinUpMode: 2;
916 HPT_U8 ReadAheadSupported: 1;
917 HPT_U8 ReadAheadEnabled: 1;
918 HPT_U8 WriteCacheSupported: 1;
919 HPT_U8 WriteCacheEnabled: 1;
920 HPT_U8 TCQSupported: 1;
921 HPT_U8 TCQEnabled: 1;
922 HPT_U8 NCQSupported: 1;
923 HPT_U8 NCQEnabled: 1;
924 HPT_U8 SpinUpMode: 2;
928 HPT_U32 Flags; /* working flags, see DEVICE_FLAG_XXX */
930 IDENTIFY_DATA2 IdentifyData; /* Identify Data of this device */
935 DEVICEID ParentArrays[MAX_PARENTS_PER_DISK];
938 __attribute__((packed)) DEVICE_INFO_V2, *PDEVICE_INFO_V2, DEVICE_INFO_V3, *PDEVICE_INFO_V3;
947 #define HPT601_INFO_DEVICEID 1
948 #define HPT601_INFO_TEMPERATURE 2
949 #define HPT601_INFO_FANSTATUS 4
950 #define HPT601_INFO_BEEPERCONTROL 8
951 #define HPT601_INFO_LED1CONTROL 0x10
952 #define HPT601_INFO_LED2CONTROL 0x20
953 #define HPT601_INFO_POWERSTATUS 0x40
955 typedef struct _HPT601_INFO_ {
956 HPT_U16 ValidFields; /* mark valid fields below */
957 HPT_U16 DeviceId; /* 0x5A3E */
958 HPT_U16 Temperature; /* Read: temperature sensor value. Write: temperature limit */
959 HPT_U16 FanStatus; /* Fan status */
960 HPT_U16 BeeperControl; /* bit4: beeper control bit. bit0-3: frequency bits */
961 HPT_U16 LED1Control; /* bit4: twinkling control bit. bit0-3: frequency bits */
962 HPT_U16 LED2Control; /* bit4: twinkling control bit. bit0-3: frequency bits */
963 HPT_U16 PowerStatus; /* 1: has power 2: no power */
964 } HPT601_INFO, *PHPT601_INFO;
966 #if HPT_INTERFACE_VERSION>=0x01010000
968 /* cache policy for each vdev, copied from ldm.h */
969 #define CACHE_POLICY_NONE 0
970 #define CACHE_POLICY_WRITE_THROUGH 1
971 #define CACHE_POLICY_WRITE_BACK 2
976 * Logical device information.
977 * Union of ArrayInfo and DeviceInfo.
978 * Common properties will be put in logical device information.
980 typedef struct _LOGICAL_DEVICE_INFO {
981 HPT_U8 Type; /* LDT_ARRAY or LDT_DEVICE */
984 HPT_U32 Capacity; /* array capacity */
985 DEVICEID ParentArray;
988 HPT_ARRAY_INFO array;
990 } __attribute__((packed)) u;
992 } __attribute__((packed)) LOGICAL_DEVICE_INFO, *PLOGICAL_DEVICE_INFO;
994 #if HPT_INTERFACE_VERSION>=0x01010000
995 typedef struct _LOGICAL_DEVICE_INFO_V2 {
996 HPT_U8 Type; /* LDT_ARRAY or LDT_DEVICE */
999 HPT_U64 Capacity; /* array capacity */
1000 DEVICEID ParentArray; /* for physical device, Please don't use this field.
1001 * use ParentArrays field in DEVICE_INFO_V2
1005 HPT_ARRAY_INFO_V2 array;
1007 } __attribute__((packed)) u;
1009 } __attribute__((packed)) LOGICAL_DEVICE_INFO_V2, *PLOGICAL_DEVICE_INFO_V2;
1012 #if HPT_INTERFACE_VERSION>=0x01020000
1013 #define INVALID_TARGET_ID 0xFF
1014 #define INVALID_BUS_ID 0xFF
1015 typedef struct _LOGICAL_DEVICE_INFO_V3 {
1016 HPT_U8 Type; /* LDT_ARRAY or LDT_DEVICE */
1017 HPT_U8 CachePolicy; /* refer to CACHE_POLICY_xxx */
1018 HPT_U8 VBusId; /* vbus sequence in vbus_list */
1019 HPT_U8 TargetId; /* OS target id. Value 0xFF is invalid */
1020 /* OS disk name: HPT DISK $VBusId_$TargetId */
1021 HPT_U64 Capacity; /* array capacity */
1022 DEVICEID ParentArray; /* for physical device, don't use this field.
1023 * use ParentArrays field in DEVICE_INFO_V2 instead.
1031 HPT_ARRAY_INFO_V3 array;
1032 DEVICE_INFO_V2 device;
1033 } __attribute__((packed)) u;
1036 __attribute__((packed)) LOGICAL_DEVICE_INFO_V3, *PLOGICAL_DEVICE_INFO_V3;
1039 #if HPT_INTERFACE_VERSION>=0x02000001
1040 typedef struct _LOGICAL_DEVICE_INFO_V4 {
1045 HPT_U8 Type; /* LDT_ARRAY or LDT_DEVICE */
1046 HPT_U8 CachePolicy; /* refer to CACHE_POLICY_xxx */
1047 HPT_U8 VBusId; /* vbus sequence in vbus_list */
1048 HPT_U8 TargetId; /* OS target id. Value 0xFF is invalid */
1049 /* OS disk name: HPT DISK $VBusId_$TargetId */
1050 HPT_U64 Capacity; /* array capacity */
1051 DEVICEID ParentArray; /* for physical device, don't use this field.
1052 * use ParentArrays field in DEVICE_INFO_V2 instead.
1060 HPT_ARRAY_INFO_V4 array;
1061 DEVICE_INFO_V3 device;
1062 } __attribute__((packed)) u;
1064 __attribute__((packed)) LOGICAL_DEVICE_INFO_V4, *PLOGICAL_DEVICE_INFO_V4;
1066 /*LOGICAL_DEVICE_INFO_V4 max revision number*/
1067 #define LOGICAL_DEVICE_INFO_V4_REVISION 0
1068 /*If new revision was defined please check evey revision size*/
1069 #define LOGICAL_DEVICE_INFO_V4_R0_SIZE (sizeof(LOGICAL_DEVICE_INFO_V4))
1073 * ALTERABLE_ARRAY_INFO and ALTERABLE_DEVICE_INFO, used in set_array_info()
1074 * and set_device_info().
1075 * When set_xxx_info() is called, the ValidFields member indicates which
1076 * fields in the structure are valid.
1080 #define AAIF_DESCRIPTION 2
1085 #define ADIF_WRITE_CACHE 8
1086 #define ADIF_READ_AHEAD 0x10
1087 #define ADIF_SPIN_UP_MODE 0x20
1088 #define ADIF_SET_BAD 0x40
1090 typedef struct _ALTERABLE_ARRAY_INFO {
1091 HPT_U32 ValidFields; /* mark valid fields below */
1092 HPT_U8 Name[MAX_ARRAYNAME_LEN]; /* array name */
1093 HPT_U8 Description[64]; /* array description */
1094 }__attribute__((packed))ALTERABLE_ARRAY_INFO, *PALTERABLE_ARRAY_INFO;
1096 typedef struct _ALTERABLE_DEVICE_INFO {
1097 HPT_U32 ValidFields; /* mark valid fields below */
1098 HPT_U8 DeviceModeSetting; /* 0-4 PIO 0-4, 5-7 MW DMA0-2, 8-13 UDMA0-5 */
1099 }__attribute__((packed))ALTERABLE_DEVICE_INFO, *PALTERABLE_DEVICE_INFO;
1101 typedef struct _ALTERABLE_DEVICE_INFO_V2 {
1102 HPT_U32 ValidFields; /* mark valid fields below */
1103 HPT_U8 DeviceModeSetting; /* 0-4 PIO 0-4, 5-7 MW DMA0-2, 8-13 UDMA0-5 */
1106 HPT_U8 WriteCacheEnabled;
1107 HPT_U8 ReadAheadEnabled;
1109 HPT_U8 SetBadSector;
1111 HPT_U32 reserve2[13]; /* pad to 64 bytes */
1112 }__attribute__((packed))ALTERABLE_DEVICE_INFO_V2, *PALTERABLE_DEVICE_INFO_V2;
1114 #if HPT_INTERFACE_VERSION>=0x01020000
1116 #define TARGET_TYPE_DEVICE 0
1117 #define TARGET_TYPE_ARRAY 1
1121 #define AIT_DESCRIPTION 1
1122 #define AIT_CACHE_POLICY 2
1126 #define DIT_READ_AHEAD 1
1127 #define DIT_WRITE_CACHE 2
1130 #define DIT_IDENTIFY 5
1132 #define DISK_CACHE_POLICY_UNCHANGE 0
1133 #define DISK_CACHE_POLICY_ENABLE 1
1134 #define DISK_CACHE_POLICY_DISABLE 2
1136 /* param type is determined by target_type and info_type*/
1137 typedef struct _SET_DEV_INFO
1141 HPT_U16 param_length;
1142 #define SET_VDEV_INFO_param(p) ((HPT_U8 *)(p)+sizeof(SET_VDEV_INFO))
1143 /* HPT_U8 param[0]; */
1144 } SET_VDEV_INFO, * PSET_VDEV_INFO;
1146 typedef HPT_U8 PARAM_ARRAY_NAME[MAX_ARRAYNAME_LEN] ;
1147 typedef HPT_U8 PARAM_ARRAY_DES[64];
1148 typedef HPT_U8 PARAM_DEVICE_MODE, PARAM_TCQ, PARAM_NCQ, PARAM_READ_AHEAD, PARAM_WRITE_CACHE, PARAM_CACHE_POLICY;
1153 * CREATE_ARRAY_PARAMS
1154 * Param structure used to create an array.
1156 typedef struct _CREATE_ARRAY_PARAMS {
1157 HPT_U8 ArrayType; /* 1-level array type */
1158 HPT_U8 nDisk; /* number of elements in Members[] array */
1159 HPT_U8 BlockSizeShift; /* Stripe size if ArrayType==AT_RAID0 / AT_RAID5 */
1160 HPT_U8 CreateFlags; /* See CAF_xxx */
1162 HPT_U8 ArrayName[MAX_ARRAYNAME_LEN];/* Array name */
1163 HPT_U8 Description[64]; /* array description */
1164 HPT_U8 CreateManager[16]; /* who created it */
1165 TIME_RECORD CreateTime; /* when created it */
1167 HPT_U32 Members[MAX_ARRAY_MEMBERS_V1];/* ID of array members, a member can be an array */
1169 } CREATE_ARRAY_PARAMS, *PCREATE_ARRAY_PARAMS;
1171 #if HPT_INTERFACE_VERSION>=0x01010000
1172 typedef struct _CREATE_ARRAY_PARAMS_V2 {
1173 HPT_U8 ArrayType; /* 1-level array type */
1174 HPT_U8 nDisk; /* number of elements in Members[] array */
1175 HPT_U8 BlockSizeShift; /* Stripe size if ArrayType==AT_RAID0 / AT_RAID5 */
1176 HPT_U8 CreateFlags; /* See CAF_xxx */
1178 HPT_U8 ArrayName[MAX_ARRAYNAME_LEN];/* Array name */
1179 HPT_U8 Description[64]; /* array description */
1180 HPT_U8 CreateManager[16]; /* who created it */
1181 TIME_RECORD CreateTime; /* when created it */
1184 HPT_U32 Members[MAX_ARRAY_MEMBERS_V2];/* ID of array members, a member can be an array */
1186 } CREATE_ARRAY_PARAMS_V2, *PCREATE_ARRAY_PARAMS_V2;
1189 #if HPT_INTERFACE_VERSION>=0x02000001
1190 typedef struct _CREATE_ARRAY_PARAMS_V3 {
1192 HPT_U8 revision; /*CREATE_ARRAY_PARAMS_V3_REVISION*/
1193 HPT_U8 diskCachePolicy; /*unchange:0 enable:1 disable:2*/
1195 HPT_U8 subDisks; /* RAIDn0 sub array */
1196 HPT_U8 SectorSizeShift; /*sector size = 512B<<SectorSizeShift*/
1197 HPT_U8 ArrayType; /* 1-level array type */
1198 HPT_U8 nDisk; /* number of elements in Members[] array */
1199 HPT_U8 BlockSizeShift; /* Stripe size if ArrayType==AT_RAID0 / AT_RAID5 */
1200 HPT_U8 CreateFlags; /* See CAF_xxx */
1202 HPT_U8 ArrayName[MAX_ARRAYNAME_LEN];/* Array name */
1203 HPT_U8 Description[64]; /* array description */
1204 HPT_U8 CreateManager[16]; /* who created it */
1205 TIME_RECORD CreateTime; /* when created it */
1208 HPT_U32 Members[MAX_ARRAY_MEMBERS_V3];/* ID of array members, a member can be an array */
1209 } CREATE_ARRAY_PARAMS_V3, *PCREATE_ARRAY_PARAMS_V3;
1211 /*CREATE_ARRAY_PARAMS_V3 current max revision*/
1212 #define CREATE_ARRAY_PARAMS_V3_REVISION 0
1213 /*If new revision defined please check evey revision size*/
1214 #define CREATE_ARRAY_PARAMS_V3_R0_SIZE (sizeof(CREATE_ARRAY_PARAMS_V3))
1217 #if HPT_INTERFACE_VERSION < 0x01020000
1219 * Flags used for creating an RAID 1 array
1221 * CAF_CREATE_AND_DUPLICATE
1222 * Copy source disk contents to target for RAID 1. If user choose "create and duplicate"
1223 * to create an array, GUI will call CreateArray() with this flag set. Then GUI should
1224 * call hpt_get_device_info() with the returned array ID and check returned flags to
1225 * see if ARRAY_FLAG_REBUILDING is set. If not set, driver does not support rebuilding
1226 * and GUI must do duplication itself.
1227 * CAF_DUPLICATE_MUST_DONE
1228 * If the duplication is aborted or fails, do not create the array.
1230 #define CAF_CREATE_AND_DUPLICATE 1
1231 #define CAF_DUPLICATE_MUST_DONE 2
1232 #define CAF_CREATE_AS_RAID15 4
1234 * Flags used for creating an RAID 5 array
1236 #define CAF_CREATE_R5_NO_BUILD 1
1237 #define CAF_CREATE_R5_ZERO_INIT 2
1238 #define CAF_CREATE_R5_BUILD_PARITY 4
1242 * Flags used for creating
1244 #define CAF_FOREGROUND_INITIALIZE 1
1245 #define CAF_BACKGROUND_INITIALIZE 2
1246 #define CAF_CREATE_R5_WRITE_BACK (CACHE_POLICY_WRITE_BACK<<CAF_CACHE_POLICY_SHIFT)
1249 #define CAF_CACHE_POLICY_MASK 0x1C
1250 #define CAF_CACHE_POLICY_SHIFT 2
1254 #define CAF_KEEP_DATA_ALWAYS 0x80
1256 /* Flags used for deleting an array
1258 * DAF_KEEP_DATA_IF_POSSIBLE
1259 * If this flag is set, deleting a RAID 1 array will not destroy the data on both disks.
1260 * Deleting a JBOD should keep partitions on first disk ( not implement now ).
1261 * Deleting a RAID 0/1 should result as two RAID 0 array ( not implement now ).
1263 #define DAF_KEEP_DATA_IF_POSSIBLE 1
1264 #define DAF_KEEP_DATA_ALWAYS 2
1269 #define ET_DEVICE_REMOVED 1 /* device removed */
1270 #define ET_DEVICE_PLUGGED 2 /* device plugged */
1271 #define ET_DEVICE_ERROR 3 /* device I/O error */
1272 #define ET_REBUILD_STARTED 4
1273 #define ET_REBUILD_ABORTED 5
1274 #define ET_REBUILD_FINISHED 6
1275 #define ET_SPARE_TOOK_OVER 7
1276 #define ET_REBUILD_FAILED 8
1277 #define ET_VERIFY_STARTED 9
1278 #define ET_VERIFY_ABORTED 10
1279 #define ET_VERIFY_FAILED 11
1280 #define ET_VERIFY_FINISHED 12
1281 #define ET_INITIALIZE_STARTED 13
1282 #define ET_INITIALIZE_ABORTED 14
1283 #define ET_INITIALIZE_FAILED 15
1284 #define ET_INITIALIZE_FINISHED 16
1285 #define ET_VERIFY_DATA_ERROR 17
1286 #define ET_TRANSFORM_STARTED 18
1287 #define ET_TRANSFORM_ABORTED 19
1288 #define ET_TRANSFORM_FAILED 20
1289 #define ET_TRANSFORM_FINISHED 21
1290 #define ET_SMART_FAILED 22
1291 #define ET_SMART_PASSED 23
1292 #define ET_SECTOR_REPAIR_FAIL 24
1293 #define ET_SECTOR_REPAIR_SUCCESS 25
1294 #define ET_ERASE_FAIL 26
1295 #define ET_ERASE_SUCCESS 27
1296 #define ET_CONTINUE_REBUILD_ON_ERROR 28
1302 typedef struct _HPT_EVENT {
1308 HPT_U8 Data[32]; /* various data depend on EventType */
1309 } HPT_EVENT, *PHPT_EVENT;
1312 * IDE pass-through command. Use it at your own risk!
1314 typedef struct _IDE_PASS_THROUGH_HEADER {
1315 DEVICEID idDisk; /* disk ID */
1316 HPT_U8 bFeaturesReg; /* feature register */
1317 HPT_U8 bSectorCountReg; /* IDE sector count register. */
1318 HPT_U8 bLbaLowReg; /* IDE LBA low value. */
1319 HPT_U8 bLbaMidReg; /* IDE LBA mid register. */
1320 HPT_U8 bLbaHighReg; /* IDE LBA high value. */
1321 HPT_U8 bDriveHeadReg; /* IDE drive/head register. */
1322 HPT_U8 bCommandReg; /* Actual IDE command. Checked for validity by driver. */
1323 HPT_U8 nSectors; /* data size in sectors, if the command has data transfer */
1324 HPT_U8 protocol; /* IO_COMMAND_(READ,WRITE) or zero for non-DATA */
1326 #define IDE_PASS_THROUGH_buffer(p) ((HPT_U8 *)(p) + sizeof(IDE_PASS_THROUGH_HEADER))
1327 /* HPT_U8 DataBuffer[0]; */
1329 IDE_PASS_THROUGH_HEADER, *PIDE_PASS_THROUGH_HEADER;
1331 typedef struct _IDE_PASS_THROUGH_HEADER_V2 {
1332 DEVICEID idDisk; /* disk ID */
1333 HPT_U16 bFeaturesReg; /* feature register */
1334 HPT_U16 bSectorCountReg; /* IDE sector count register. */
1335 HPT_U16 bLbaLowReg; /* IDE LBA low value. */
1336 HPT_U16 bLbaMidReg; /* IDE LBA mid register. */
1337 HPT_U16 bLbaHighReg; /* IDE LBA high value. */
1338 HPT_U8 bDriveHeadReg; /* IDE drive/head register. */
1339 HPT_U8 bCommandReg; /* Actual IDE command. Checked for validity by driver. */
1340 HPT_U16 nSectors; /* data size in sectors, if the command has data transfer */
1341 HPT_U8 protocol; /* IO_COMMAND_(READ,WRITE) or zero for non-DATA */
1343 #define IDE_PASS_THROUGH_V2_buffer(p) ((HPT_U8 *)(p) + sizeof(IDE_PASS_THROUGH_HEADER_V2))
1344 /* HPT_U8 DataBuffer[0]; */
1346 IDE_PASS_THROUGH_HEADER_V2, *PIDE_PASS_THROUGH_HEADER_V2;
1348 typedef struct _HPT_SCSI_PASSTHROUGH_IN {
1356 /* data follows, if any */
1358 HPT_SCSI_PASSTHROUGH_IN, *PHPT_SCSI_PASSTHROUGH_IN;
1360 typedef struct _HPT_SCSI_PASSTHROUGH_OUT {
1366 /* data/sense follows if any */
1368 HPT_SCSI_PASSTHROUGH_OUT, *PHPT_SCSI_PASSTHROUGH_OUT;
1371 * device io packet format
1373 typedef struct _DEVICE_IO_EX_PARAMS {
1377 HPT_U8 Command; /* IO_COMMAD_xxx */
1378 HPT_U8 BufferType; /* BUFFER_TYPE_xxx, see below */
1381 DEVICE_IO_EX_PARAMS, *PDEVICE_IO_EX_PARAMS;
1383 #define BUFFER_TYPE_LOGICAL 1 /* logical pointer to buffer */
1384 #define BUFFER_TYPE_PHYSICAL 2 /* physical address of buffer */
1385 #define BUFFER_TYPE_LOGICAL_LOGICAL_SG 3 /* logical pointer to logical S/G table */
1386 #define BUFFER_TYPE_LOGICAL_PHYSICAL_SG 4 /* logical pointer to physical S/G table */
1387 #define BUFFER_TYPE_PHYSICAL_LOGICAL_SG 5 /* physical address to logical S/G table */
1388 #define BUFFER_TYPE_PHYSICAL_PHYSICAL_SG 6 /* physical address of physical S/G table */
1389 #define BUFFER_TYPE_PHYSICAL_PHYSICAL_SG_PIO 7 /* non DMA capable physical address of physical S/G table */
1391 typedef struct _HPT_DRIVER_PARAMETER {
1394 HPT_U8 type; /* HPT_DRIVER_PARAMETER_TYPE_* */
1397 HPT_U8 location; /* 0 - system */
1403 HPT_DRIVER_PARAMETER, *PHPT_DRIVER_PARAMETER;
1405 #define HPT_DRIVER_PARAMETER_TYPE_INT 1
1406 #define HPT_DRIVER_PARAMETER_TYPE_BOOL 2
1408 typedef struct _HPT_PM_CMDSTAT {
1415 HPT_PM_CMDSTAT, *PHPT_PM_CMDSTAT;
1417 #define HIGHEST_RSPTIME_CMD_SAVE 10
1418 #define RSPTIME_HISTOGRAM_SEGMENT_COUNT 38
1420 typedef struct _HPT_PM_IOSTAT {
1421 HPT_PM_CMDSTAT highestRspCmdStatData[HIGHEST_RSPTIME_CMD_SAVE];
1422 HPT_U32 rspTimeHistogram[RSPTIME_HISTOGRAM_SEGMENT_COUNT];
1425 HPT_U32 instantKBPs;
1426 HPT_U32 averageKBPs;
1427 HPT_U32 instantIOPs;
1428 HPT_U32 averageIOPs;
1430 HPT_PM_IOSTAT, *PHPT_PM_IOSTAT;
1433 * disk config region
1435 typedef struct _ACCESS_CONFIG_REG {
1441 #define ACCESS_CONFIG_REG_buffer(p) ((HPT_U8 *)(p) + sizeof(ACCESS_CONFIG_REG_PARAMS))
1442 } __attribute__((packed))ACCESS_CONFIG_REG_PARAMS, *PACCESS_CONFIG_REG_PARAMS;
1447 typedef struct _DUMP_METADATA {
1453 } __attribute__((packed))DUMP_METADATA_PARAMS, *PDUMP_METADATA_PARAMS;
1460 #define HPT_IOCTL_MAGIC32 0x1A2B3C4D
1461 #define HPT_IOCTL_MAGIC 0xA1B2C3D4
1463 typedef struct _HPT_IOCTL_PARAM {
1464 HPT_U32 Magic; /* used to check if it's a valid ioctl packet */
1465 HPT_U32 dwIoControlCode; /* operation control code */
1466 HPT_PTR lpInBuffer; /* input data buffer */
1467 HPT_U32 nInBufferSize; /* size of input data buffer */
1468 HPT_PTR lpOutBuffer; /* output data buffer */
1469 HPT_U32 nOutBufferSize; /* size of output data buffer */
1470 HPT_PTR lpBytesReturned; /* count of HPT_U8s returned */
1472 HPT_IOCTL_PARAM, *PHPT_IOCTL_PARAM;
1474 /* for 32-bit app running on 64-bit system */
1475 typedef struct _HPT_IOCTL_PARAM32 {
1477 HPT_U32 dwIoControlCode;
1479 HPT_U32 nInBufferSize;
1480 HPT_U32 lpOutBuffer;
1481 HPT_U32 nOutBufferSize;
1482 HPT_U32 lpBytesReturned;
1484 HPT_IOCTL_PARAM32, *PHPT_IOCTL_PARAM32;
1486 #if !defined(__KERNEL__) || defined(SIMULATE)
1488 * User-mode ioctl parameter passing conventions:
1489 * The ioctl function implementation is platform specific, so we don't
1490 * have forced rules for it. However, it's suggested to use a parameter
1491 * passing method as below
1492 * 1) Put all input data continuously in an input buffer.
1493 * 2) Prepare an output buffer with enough size if needed.
1494 * 3) Fill a HPT_IOCTL_PARAM structure.
1495 * 4) Pass the structure to driver through a platform-specific method.
1496 * This is implemented in the mid-layer user-mode library. The UI
1497 * programmer needn't care about it.
1500 /************************************************************************
1501 * User mode functions
1502 ************************************************************************/
1505 * Version compatibility: all versions
1509 * interface version. 0 when fail.
1511 HPT_U32 hpt_get_version(void);
1514 * hpt_get_driver_capabilities
1515 * Version compatibility: v1.0.0.2 or later
1517 * Pointer to receive a DRIVE_CAPABILITIES structure. The caller must set
1518 * dwSize member to sizeof(DRIVER_CAPABILITIES). The callee must check this
1519 * member to see if it's correct.
1523 int hpt_get_driver_capabilities(PDRIVER_CAPABILITIES cap);
1524 int hpt_get_driver_capabilities_v2(PDRIVER_CAPABILITIES_V2 cap);
1527 * hpt_get_controller_count
1528 * Version compatibility: v1.0.0.1 or later
1532 * number of controllers
1534 int hpt_get_controller_count(void);
1536 /* hpt_get_controller_info
1537 * Version compatibility: v1.0.0.1 or later
1540 * pInfo pointer to CONTROLLER_INFO buffer
1542 * 0 Success, controller info is put into (*pInfo ).
1544 int hpt_get_controller_info(int id, PCONTROLLER_INFO pInfo);
1546 #if HPT_INTERFACE_VERSION>=0x01020000
1547 /* hpt_get_controller_info_v2
1548 * Version compatibility: v2.0.0.0 or later
1551 * pInfo pointer to CONTROLLER_INFO_V2 buffer
1553 * 0 Success, controller info is put into (*pInfo ).
1555 int hpt_get_controller_info_v2(int id, PCONTROLLER_INFO_V2 pInfo);
1557 /* hpt_get_controller_info_v2_ext
1558 * Version compatibility: v2.0.0.0 or later
1561 * pInfo pointer to CONTROLLER_INFO_V2_EXT buffer
1563 * 0 Success, controller info is put into (*pInfo ).
1565 int hpt_get_controller_info_v2_ext(int id, PCONTROLLER_INFO_V2_EXT pInfo);
1567 /* hpt_get_controller_info_v3
1568 * Version compatibility: v2.0.0.0 or later
1571 * pInfo pointer to CONTROLLER_INFO_V3 buffer
1573 * 0 Success, controller info is put into (*pInfo ).
1575 int hpt_get_controller_info_v3(int id, PCONTROLLER_INFO_V3 pInfo);
1578 /* hpt_get_channel_info
1579 * Version compatibility: v1.0.0.1 or later
1583 * pInfo pointer to CHANNEL_INFO buffer
1585 * 0 Success, channel info is put into (*pInfo ).
1587 int hpt_get_channel_info(int id, int bus, PCHANNEL_INFO pInfo);
1589 /* hpt_get_channel_info_v2
1590 * Version compatibility: v1.0.0.1 or later
1594 * pInfo pointer to CHANNEL_INFO buffer
1596 * 0 Success, channel info is put into (*pInfo ).
1598 int hpt_get_channel_info_v2(int id, int bus, PCHANNEL_INFO_V2 pInfo);
1600 /* hpt_get_logical_devices
1601 * Version compatibility: v1.0.0.1 or later
1603 * pIds pointer to a DEVICEID array
1604 * nMaxCount array size
1606 * Number of ID returned. All logical device IDs are put into pIds array.
1607 * Note: A spare disk is not a logical device.
1609 int hpt_get_logical_devices(DEVICEID * pIds, int nMaxCount);
1611 /* hpt_get_physical_devices
1612 * Version compatibility: v2.1.0.0 or later
1614 * pIds pointer to a DEVICEID array
1615 * nMaxCount array size
1617 * Number of ID returned. All physical device IDs are put into pIds array.
1619 int hpt_get_physical_devices(DEVICEID * pIds, int nMaxCount);
1621 /* hpt_get_device_info
1622 * Version compatibility: v1.0.0.1 or later
1624 * id logical device id
1625 * pInfo pointer to LOGICAL_DEVICE_INFO structure
1629 int hpt_get_device_info(DEVICEID id, PLOGICAL_DEVICE_INFO pInfo);
1632 * Version compatibility: v1.0.0.1 or later
1634 * pParam pointer to CREATE_ARRAY_PARAMS structure
1637 * else return array id
1639 DEVICEID hpt_create_array(PCREATE_ARRAY_PARAMS pParam);
1642 * Version compatibility: v1.0.0.1 or later
1648 int hpt_delete_array(DEVICEID id, HPT_U32 options);
1651 * Read/write data on array and physcal device.
1652 * Version compatibility: v1.0.0.1 or later
1654 * id device id. If it's an array ID, IO will be performed on the array.
1655 * If it's a physical device ID, IO will be performed on the device.
1656 * cmd IO_COMMAND_READ or IO_COMMAND_WRITE
1657 * buffer data buffer
1662 int hpt_device_io(DEVICEID id, int cmd, HPT_U32 lba, HPT_U32 nSector, void * buffer);
1664 /* hpt_add_disk_to_array
1665 * Used to dynamicly add a disk to an RAID1, RAID0/1, RAID1/0 or RAID5 array.
1666 * Auto-rebuild will start.
1667 * Version compatibility: v1.0.0.1 or later
1674 int hpt_add_disk_to_array(DEVICEID idArray, DEVICEID idDisk);
1676 /* hpt_add_spare_disk
1677 * Version compatibility: v1.0.0.1 or later
1678 * Add a disk to spare pool.
1684 int hpt_add_spare_disk(DEVICEID idDisk);
1686 /* hpt_add_dedicated_spare
1687 * Version compatibility: v1.0.0.3 or later
1688 * Add a spare disk to an array
1695 int hpt_add_dedicated_spare(DEVICEID idDisk, DEVICEID idArray);
1697 /* hpt_remove_spare_disk
1698 * remove a disk from spare pool.
1699 * Version compatibility: v1.0.0.1 or later
1705 int hpt_remove_spare_disk(DEVICEID idDisk);
1708 * Used to poll events from driver.
1709 * Version compatibility: v1.0.0.1 or later
1711 * pEvent pointer to HPT_EVENT structure
1713 * 0 Success, event info is filled in *pEvent
1715 int hpt_get_event(PHPT_EVENT pEvent);
1717 /* hpt_rebuild_data_block
1718 * Used to copy data from source disk and mirror disk.
1719 * Version compatibility: v1.0.0.1 or later
1721 * idArray Array ID (RAID1, 0/1 or RAID5)
1722 * Lba Start LBA for each array member
1723 * nSector Number of sectors for each array member (RAID 5 will ignore this parameter)
1726 * 0 Success, event info is filled in *pEvent
1728 int hpt_rebuild_data_block(DEVICEID idMirror, HPT_U32 Lba, HPT_U8 nSector);
1729 #define hpt_rebuild_mirror(p1, p2, p3) hpt_rebuild_data_block(p1, p2, p3)
1731 /* hpt_set_array_state
1733 * Version compatibility: v1.0.0.1 or later
1736 * state See above 'array states' constants, possible values are:
1737 * MIRROR_REBUILD_START
1738 * Indicate that GUI wants to rebuild a mirror array
1739 * MIRROR_REBUILD_ABORT
1740 * GUI wants to abort rebuilding an array
1741 * MIRROR_REBUILD_COMPLETE
1742 * GUI finished to rebuild an array. If rebuild is done by driver this
1748 int hpt_set_array_state(DEVICEID idArray, HPT_U32 state);
1750 /* hpt_set_array_info
1752 * Version compatibility: v1.0.0.1 or later
1755 * pInfo pointer to new info
1760 int hpt_set_array_info(DEVICEID idArray, PALTERABLE_ARRAY_INFO pInfo);
1762 /* hpt_set_device_info
1764 * Version compatibility: v1.0.0.1 or later
1767 * pInfo pointer to new info
1772 * If idDisk==0, call to this function will stop buzzer on the adapter
1773 * (if supported by driver).
1775 int hpt_set_device_info(DEVICEID idDisk, PALTERABLE_DEVICE_INFO pInfo);
1777 #if HPT_INTERFACE_VERSION >= 0x01000004
1778 int hpt_set_device_info_v2(DEVICEID idDisk, PALTERABLE_DEVICE_INFO_V2 pInfo);
1781 /* hpt_rescan_devices
1783 * Version compatibility: v1.0.0.1 or later
1789 int hpt_rescan_devices(void);
1793 * Version compatibiilty: v1.0.0.3 or later
1795 * idDisk - Disk handle
1796 * PHPT601_INFO - pointer to HPT601 info buffer
1800 int hpt_get_601_info(DEVICEID idDisk, PHPT601_INFO pInfo);
1803 * HPT601 function control
1804 * Version compatibiilty: v1.0.0.3 or later
1806 * idDisk - Disk handle
1807 * PHPT601_INFO - pointer to HPT601 info buffer
1811 int hpt_set_601_info(DEVICEID idDisk, PHPT601_INFO pInfo);
1814 * Lock a block on a device (prevent OS accessing it)
1815 * Version compatibiilty: v1.0.0.3 or later
1817 * idDisk - Disk handle
1819 * nSectors - number of sectors
1823 int hpt_lock_device(DEVICEID idDisk, HPT_U32 Lba, HPT_U8 nSectors);
1827 * Version compatibiilty: v1.0.0.3 or later
1829 * idDisk - Disk handle
1833 int hpt_unlock_device(DEVICEID idDisk);
1835 /* hpt_ide_pass_through
1836 * send a ATA passthrough command to a device.
1837 * Version compatibility: v1.0.0.3 or later
1839 * p - IDE_PASS_THROUGH header pointer
1843 int hpt_ide_pass_through(PIDE_PASS_THROUGH_HEADER p);
1844 int hpt_ide_pass_through_v2(PIDE_PASS_THROUGH_HEADER_V2 p);
1846 /* hpt_scsi_passthrough
1847 * send a SCSI passthrough command to a device.
1848 * Version compatibility: v2.0.0.0 or later
1850 * in - HPT_SCSI_PASSTHROUGH_IN header pointer
1851 * out - PHPT_SCSI_PASSTHROUGH_OUT header pointer
1852 * insize, outsize - in/out buffer size
1856 int hpt_scsi_passthrough(PHPT_SCSI_PASSTHROUGH_IN in, HPT_U32 insize,
1857 PHPT_SCSI_PASSTHROUGH_OUT out, HPT_U32 outsize);
1859 /* hpt_verify_data_block
1860 * verify data block on RAID1 or RAID5.
1861 * Version compatibility: v1.0.0.3 or later
1863 * idArray - Array ID
1864 * Lba - block number (on each array member, not logical block!)
1865 * nSectors - Sectors for each member (RAID 5 will ignore this parameter)
1868 * 1 Data compare error
1871 int hpt_verify_data_block(DEVICEID idArray, HPT_U32 Lba, HPT_U8 nSectors);
1873 /* hpt_initialize_data_block
1874 * initialize data block (fill with zero) on RAID5
1875 * Version compatibility: v1.0.0.3 or later
1877 * idArray - Array ID
1878 * Lba - block number (on each array member, not logical block!)
1879 * nSectors - Sectors for each member (RAID 5 will ignore this parameter)
1883 int hpt_initialize_data_block(DEVICEID idArray, HPT_U32 Lba, HPT_U8 nSectors);
1886 * extended device I/O function
1887 * Version compatibility: v1.0.0.3 or later
1889 * idArray - Array ID
1890 * Lba - block number (on each array member, not logical block!)
1891 * nSectors - Sectors for each member
1892 * buffer - I/O buffer or s/g address
1896 int hpt_device_io_ex(PDEVICE_IO_EX_PARAMS param);
1898 /* hpt_set_boot_mark
1899 * select boot device
1900 * Version compatibility: v1.0.0.3 or later
1902 * id - logical device ID. If id is 0 the boot mark will be removed.
1906 int hpt_set_boot_mark(DEVICEID id);
1909 * check if device can be removed safely
1910 * Version compatibility: v1.0.0.4 or later
1912 * ndev - number of devices
1913 * pIds - device ID list
1916 * -1 - unknown error
1917 * n - the n-th device that can't be removed
1919 int hpt_query_remove(HPT_U32 ndev, DEVICEID *pIds);
1921 /* hpt_remove_devices
1922 * remove a list of devices
1923 * Version compatibility: v1.0.0.4 or later
1925 * ndev - number of devices
1926 * pIds - device ID list
1929 * -1 - unknown error
1930 * n - the n-th device that can't be removed
1932 int hpt_remove_devices(HPT_U32 ndev, DEVICEID *pIds);
1934 /* hpt_create_array_v2
1935 * Version compatibility: v1.1.0.0 or later
1937 * pParam pointer to CREATE_ARRAY_PARAMS_V2 structure
1940 * else return array id
1942 #if HPT_INTERFACE_VERSION>=0x01010000
1943 DEVICEID hpt_create_array_v2(PCREATE_ARRAY_PARAMS_V2 pParam);
1946 /* hpt_create_array_v3
1947 * Version compatibility: v2.0.0.1 or later
1949 * pParam pointer to CREATE_ARRAY_PARAMS_V3 structure
1952 * else return array id
1954 #if HPT_INTERFACE_VERSION>=0x02000001
1955 DEVICEID hpt_create_array_v3(PCREATE_ARRAY_PARAMS_V3 pParam);
1958 /* hpt_get_device_info_v2
1959 * Version compatibility: v1.1.0.0 or later
1961 * id logical device id
1962 * pInfo pointer to LOGICAL_DEVICE_INFO_V2 structure
1966 #if HPT_INTERFACE_VERSION>=0x01010000
1967 int hpt_get_device_info_v2(DEVICEID id, PLOGICAL_DEVICE_INFO_V2 pInfo);
1970 /* hpt_get_device_info_v3
1971 * Version compatibility: v1.2.0.0 or later
1973 * id logical device id
1974 * pInfo pointer to LOGICAL_DEVICE_INFO_V3 structure
1978 #if HPT_INTERFACE_VERSION>=0x01020000
1979 int hpt_get_device_info_v3(DEVICEID id, PLOGICAL_DEVICE_INFO_V3 pInfo);
1982 /* hpt_get_device_info_v4
1983 * Version compatibility: v2.0.0.1 or later
1985 * id logical device id
1986 * pInfo pointer to LOGICAL_DEVICE_INFO_V4 structure
1990 #if HPT_INTERFACE_VERSION>=0x02000001
1991 int hpt_get_device_info_v4(DEVICEID id, PLOGICAL_DEVICE_INFO_V4 pInfo);
1994 /* hpt_create_transform
1995 * create a transform instance.
1996 * Version compatibility: v2.0.0.0 or later
1998 * idArray - source array
1999 * destInfo - destination array info
2001 * destination array id
2003 #if HPT_INTERFACE_VERSION>=0x02000000
2004 DEVICEID hpt_create_transform(DEVICEID idArray, PCREATE_ARRAY_PARAMS_V2 destInfo);
2007 /* hpt_create_transform_v2
2008 * create a transform instance.
2009 * Version compatibility: v2.0.0.1 or later
2011 * idArray - source array
2012 * destInfo - destination array info
2014 * destination array id
2016 #if HPT_INTERFACE_VERSION>=0x02000001
2017 DEVICEID hpt_create_transform_v2(DEVICEID idArray, PCREATE_ARRAY_PARAMS_V3 destInfo);
2020 /* hpt_step_transform
2021 * move a block in a tranform progress.
2022 * This function is called by mid-layer, not GUI (which uses set_array_state instead).
2023 * Version compatibility: v2.0.0.0 or later
2025 * idArray - destination array ID
2026 * the source ID will be invalid when transform complete.
2030 #if HPT_INTERFACE_VERSION>=0x02000000
2031 int hpt_step_transform(DEVICEID idArray);
2034 /* hpt_set_vdev_info
2035 * set information for disk or array
2036 * Version compatibility: v1.2.0.0 or later
2038 * dev - destination device
2043 #if HPT_INTERFACE_VERSION>=0x01020000
2044 int hpt_set_vdev_info(DEVICEID dev, PSET_VDEV_INFO pInfo);
2048 * initialize disks for use
2049 * Version compatibility: v2.0.0.0 or later
2051 * ndev - number of disks to initialize
2052 * pIds - array of DEVICEID
2057 #if HPT_INTERFACE_VERSION>=0x02000000
2058 int hpt_init_disks(HPT_U32 ndev, DEVICEID * pIds);
2061 /* hpt_calc_max_array_capacity
2062 * cap max capacity of the array user want to create or transform
2063 * Version compatibility: v1.2.0.0 or later
2065 * source - if transform, this is the source array, otherwise, it should be zero
2066 * destInfo - target array params
2069 * cap - max capacity of the target array
2071 #if HPT_INTERFACE_VERSION>=0x01020000
2072 int hpt_calc_max_array_capacity(DEVICEID source, PCREATE_ARRAY_PARAMS_V2 destInfo, HPT_U64 * cap);
2075 /* hpt_calc_max_array_capacity_v2
2076 * cap max capacity of the array user want to create or transform
2077 * Version compatibility: v2.0.0.1 or later
2079 * source - if transform, this is the source array, otherwise, it should be zero
2080 * destInfo - target array params
2083 * cap - max capacity of the target array
2085 #if HPT_INTERFACE_VERSION>=0x02000001
2086 int hpt_calc_max_array_capacity_v2(DEVICEID source, PCREATE_ARRAY_PARAMS_V3 destInfo, HPT_U64 * cap);
2089 /* hpt_rebuild_data_block2
2090 * Used to copy data from source disk and mirror disk.
2091 * Version compatibility: v1.1.0.0 or later
2093 * idArray Array ID (RAID1, 0/1 or RAID5)
2094 * Lba Start LBA for each array member
2095 * nSector Number of sectors for each array member (RAID 5 will ignore this parameter)
2098 * 0 Success, event info is filled in *pEvent
2100 #if HPT_INTERFACE_VERSION>=0x01010000
2101 int hpt_rebuild_data_block_v2(DEVICEID idMirror, HPT_U64 Lba, HPT_U16 nSector);
2104 /* hpt_verify_data_block2
2105 * verify data block on RAID1 or RAID5.
2106 * Version compatibility: v1.1.0.0 or later
2108 * idArray - Array ID
2109 * Lba - block number (on each array member, not logical block!)
2110 * nSectors - Sectors for each member (RAID 5 will ignore this parameter)
2113 * 1 Data compare error
2116 #if HPT_INTERFACE_VERSION>=0x01010000
2117 int hpt_verify_data_block_v2(DEVICEID idArray, HPT_U64 Lba, HPT_U16 nSectors);
2120 /* hpt_initialize_data_block2
2121 * initialize data block (fill with zero) on RAID5
2122 * Version compatibility: v1.1.0.0 or later
2124 * idArray - Array ID
2125 * Lba - block number (on each array member, not logical block!)
2126 * nSectors - Sectors for each member (RAID 5 will ignore this parameter)
2130 #if HPT_INTERFACE_VERSION>=0x01010000
2131 int hpt_initialize_data_block_v2(DEVICEID idArray, HPT_U64 Lba, HPT_U16 nSectors);
2134 /* hpt_i2c_transaction
2135 * perform an transaction on i2c bus
2136 * Version compatibility: v2.0.0.0 or later
2138 * indata[0] - controller ID
2142 #if HPT_INTERFACE_VERSION>=0x01020000
2143 int hpt_i2c_transaction(HPT_U8 *indata, HPT_U32 inlen, HPT_U8 *outdata, HPT_U32 outlen, HPT_U32 *poutlen);
2146 /* hpt_get_parameter_list
2147 * get a list of driver parameters.
2148 * Version compatibility: v1.0.0.0 or later
2150 * location - parameter location
2151 * outBuffer - a buffer to hold the output
2152 * outBufferSize - size of outBuffer
2155 * put in outBuffer a list of zero terminated parameter names. the whole list
2156 * is terminated with an additional zero byte.
2158 int hpt_get_parameter_list(HPT_U32 location, char *outBuffer, HPT_U32 outBufferSize);
2160 /* hpt_{get,set}_parameter
2161 * get/set a parameter value.
2162 * Version compatibility: v1.0.0.0 or later
2164 * pParam - a pointer to HPT_DRIVER_PARAMETER.
2168 int hpt_get_parameter(PHPT_DRIVER_PARAMETER pParam);
2169 int hpt_set_parameter(PHPT_DRIVER_PARAMETER pParam);
2170 int hpt_reenumerate_device(DEVICEID id);
2173 * hpt_get_enclosure_count
2174 * Version compatibility: v2.1.0.0 or later
2178 * number of enclosurers
2180 int hpt_get_enclosure_count(int ctlr_id);
2182 /* hpt_get_enclosure_info
2183 * Version compatibility: v2.1.0.0 or later
2186 * pInfo pointer to ENCLOSURE_INFO buffer
2188 * 0 Success, enclosure info is put into (*pInfo ).
2190 int hpt_get_enclosure_info(int ctlr_id, int enc_id, PENCLOSURE_INFO pInfo);
2192 int hpt_get_enclosure_info_v2(int ctlr_id, int enc_id, PENCLOSURE_INFO_V2 pInfo);
2194 int hpt_get_enclosure_info_v3(int ctlr_id, int enc_id, PENCLOSURE_INFO_V3 pInfo);
2196 int hpt_get_enclosure_info_v4(int ctlr_id, int enc_id, PENCLOSURE_INFO_V4 pInfo);
2197 int hpt_get_enclosure_element_info(int ctlr_id, int enc_id, int ele_id, PSES_ELEMENT_STATUS pInfo);
2199 /* performance monitor interface
2200 * Version compatibility: v2.1.0.0 or later
2202 int hpt_get_perfmon_status(int ctlr_id, int *p_status);
2203 int hpt_set_perfmon_status(int ctlr_id, int enable);
2204 int hpt_get_perfmon_data(DEVICEID id, PHPT_PM_IOSTAT iostat);
2206 /* hpt_get_controller_venid
2207 * Version compatibility: v1.0.0.0 or later
2209 int hpt_get_controller_venid(int ctlr_id, HPT_U32 *venid);
2211 /* hpt_access_config_reg
2212 * access the reserved config space on disk
2214 * p - ACCESS_CONFIG_REG_PARAMS header pointer
2218 int hpt_access_config_reg(PACCESS_CONFIG_REG_PARAMS p);
2220 /* hpt_dump_metadata
2221 * dump internal metadata
2223 * p - PDUMP_METADATA_PARAMS header pointer
2227 int hpt_dump_metadata(PDUMP_METADATA_PARAMS p);