2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright (c) 2004-2005 HighPoint Technologies, Inc.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 #include <sys/cdefs.h>
30 __FBSDID("$FreeBSD$");
32 #include <sys/param.h>
33 #include <sys/systm.h>
34 #include <sys/kernel.h>
36 #include <sys/malloc.h>
37 #include <sys/resource.h>
39 #include <sys/callout.h>
40 #include <sys/signalvar.h>
41 #include <sys/eventhandler.h>
43 #include <sys/kthread.h>
45 #include <sys/mutex.h>
46 #include <sys/module.h>
49 #include <dev/pci/pcireg.h>
50 #include <dev/pci/pcivar.h>
56 #include <dev/hptmv/global.h>
57 #include <dev/hptmv/hptintf.h>
58 #include <dev/hptmv/osbsd.h>
59 #include <dev/hptmv/access601.h>
64 int hpt_dbg_level = DEBUG_LEVEL;
66 int hpt_dbg_level = 0;
70 #define MV_ERROR printf
73 * CAM SIM entry points
75 static int hpt_probe (device_t dev);
76 static void launch_worker_thread(void);
77 static int hpt_attach(device_t dev);
78 static int hpt_detach(device_t dev);
79 static int hpt_shutdown(device_t dev);
80 static void hpt_poll(struct cam_sim *sim);
81 static void hpt_intr(void *arg);
82 static void hpt_async(void *callback_arg, u_int32_t code, struct cam_path *path, void *arg);
83 static void hpt_action(struct cam_sim *sim, union ccb *ccb);
85 static device_method_t driver_methods[] = {
86 /* Device interface */
87 DEVMETHOD(device_probe, hpt_probe),
88 DEVMETHOD(device_attach, hpt_attach),
89 DEVMETHOD(device_detach, hpt_detach),
91 DEVMETHOD(device_shutdown, hpt_shutdown),
95 static driver_t hpt_pci_driver = {
101 static devclass_t hpt_devclass;
103 #define __DRIVER_MODULE(p1, p2, p3, p4, p5, p6) DRIVER_MODULE(p1, p2, p3, p4, p5, p6)
104 __DRIVER_MODULE(PROC_DIR_NAME, pci, hpt_pci_driver, hpt_devclass, 0, 0);
105 MODULE_DEPEND(PROC_DIR_NAME, cam, 1, 1, 1);
107 #define ccb_ccb_ptr spriv_ptr0
108 #define ccb_adapter ccb_h.spriv_ptr1
110 static void SetInquiryData(PINQUIRYDATA inquiryData, PVDevice pVDev);
111 static void HPTLIBAPI OsSendCommand (_VBUS_ARG union ccb * ccb);
112 static void HPTLIBAPI fOsCommandDone(_VBUS_ARG PCommand pCmd);
113 static void ccb_done(union ccb *ccb);
114 static void hpt_queue_ccb(union ccb **ccb_Q, union ccb *ccb);
115 static void hpt_free_ccb(union ccb **ccb_Q, union ccb *ccb);
116 static void hpt_intr_locked(IAL_ADAPTER_T *pAdapter);
117 static void hptmv_free_edma_queues(IAL_ADAPTER_T *pAdapter);
118 static void hptmv_free_channel(IAL_ADAPTER_T *pAdapter, MV_U8 channelNum);
119 static void handleEdmaError(_VBUS_ARG PCommand pCmd);
120 static int hptmv_init_channel(IAL_ADAPTER_T *pAdapter, MV_U8 channelNum);
121 static int fResetActiveCommands(PVBus _vbus_p);
122 static void fRegisterVdevice(IAL_ADAPTER_T *pAdapter);
123 static int hptmv_allocate_edma_queues(IAL_ADAPTER_T *pAdapter);
124 static void hptmv_handle_event_disconnect(void *data);
125 static void hptmv_handle_event_connect(void *data);
126 static int start_channel(IAL_ADAPTER_T *pAdapter, MV_U8 channelNum);
127 static void init_vdev_params(IAL_ADAPTER_T *pAdapter, MV_U8 channel);
128 static int hptmv_parse_identify_results(MV_SATA_CHANNEL *pMvSataChannel);
129 static int HPTLIBAPI fOsBuildSgl(_VBUS_ARG PCommand pCmd, FPSCAT_GATH pSg,
131 static MV_BOOLEAN CommandCompletionCB(MV_SATA_ADAPTER *pMvSataAdapter,
132 MV_U8 channelNum, MV_COMPLETION_TYPE comp_type, MV_VOID_PTR commandId,
133 MV_U16 responseFlags, MV_U32 timeStamp,
134 MV_STORAGE_DEVICE_REGISTERS *registerStruct);
135 static MV_BOOLEAN hptmv_event_notify(MV_SATA_ADAPTER *pMvSataAdapter,
136 MV_EVENT_TYPE eventType, MV_U32 param1, MV_U32 param2);
138 #define ccb_ccb_ptr spriv_ptr0
139 #define ccb_adapter ccb_h.spriv_ptr1
141 static struct sx hptmv_list_lock;
142 SX_SYSINIT(hptmv_list_lock, &hptmv_list_lock, "hptmv list");
143 IAL_ADAPTER_T *gIal_Adapter = NULL;
144 IAL_ADAPTER_T *pCurAdapter = NULL;
145 static MV_SATA_CHANNEL gMvSataChannels[MAX_VBUS][MV_SATA_CHANNELS_NUM];
147 typedef struct st_HPT_DPC {
148 IAL_ADAPTER_T *pAdapter;
149 void (*dpc)(IAL_ADAPTER_T *, void *, UCHAR);
155 UCHAR DPC_Request_Nums = 0;
156 static ST_HPT_DPC DpcQueue[MAX_DPC];
157 static int DpcQueue_First=0;
158 static int DpcQueue_Last = 0;
159 static struct mtx DpcQueue_Lock;
160 MTX_SYSINIT(hpmtv_dpc_lock, &DpcQueue_Lock, "hptmv dpc", MTX_DEF);
162 char DRIVER_VERSION[] = "v1.16";
164 /*******************************************************************************
165 * Name: hptmv_free_channel
167 * Description: free allocated queues for the given channel
169 * Parameters: pMvSataAdapter - pointer to the RR18xx controller this
170 * channel connected to.
171 * channelNum - channel number.
173 ******************************************************************************/
175 hptmv_free_channel(IAL_ADAPTER_T *pAdapter, MV_U8 channelNum)
177 HPT_ASSERT(channelNum < MV_SATA_CHANNELS_NUM);
178 pAdapter->mvSataAdapter.sataChannel[channelNum] = NULL;
181 static void failDevice(PVDevice pVDev)
183 PVBus _vbus_p = pVDev->pVBus;
184 IAL_ADAPTER_T *pAdapter = (IAL_ADAPTER_T *)_vbus_p->OsExt;
186 pVDev->u.disk.df_on_line = 0;
187 pVDev->vf_online = 0;
188 if (pVDev->pfnDeviceFailed)
189 CallWhenIdle(_VBUS_P (DPC_PROC)pVDev->pfnDeviceFailed, pVDev);
191 fNotifyGUI(ET_DEVICE_REMOVED, pVDev);
194 if (pAdapter->ver_601==2 && !pAdapter->beeping) {
195 pAdapter->beeping = 1;
196 BeepOn(pAdapter->mvSataAdapter.adapterIoBaseAddress);
197 set_fail_led(&pAdapter->mvSataAdapter, pVDev->u.disk.mv->channelNumber, 1);
202 int MvSataResetChannel(MV_SATA_ADAPTER *pMvSataAdapter, MV_U8 channel);
205 handleEdmaError(_VBUS_ARG PCommand pCmd)
207 PDevice pDevice = &pCmd->pVDevice->u.disk;
208 MV_SATA_ADAPTER * pSataAdapter = pDevice->mv->mvSataAdapter;
210 if (!pDevice->df_on_line) {
211 KdPrint(("Device is offline"));
212 pCmd->Result = RETURN_BAD_DEVICE;
213 CallAfterReturn(_VBUS_P (DPC_PROC)pCmd->pfnCompletion, pCmd);
217 if (pCmd->RetryCount++>5) {
218 hpt_printk(("too many retries on channel(%d)\n", pDevice->mv->channelNumber));
220 failDevice(pCmd->pVDevice);
221 pCmd->Result = RETURN_IDE_ERROR;
222 CallAfterReturn(_VBUS_P (DPC_PROC)pCmd->pfnCompletion, pCmd);
226 /* reset the channel and retry the command */
227 if (MvSataResetChannel(pSataAdapter, pDevice->mv->channelNumber))
230 fNotifyGUI(ET_DEVICE_ERROR, Map2pVDevice(pDevice));
232 hpt_printk(("Retry on channel(%d)\n", pDevice->mv->channelNumber));
233 fDeviceSendCommand(_VBUS_P pCmd);
236 /****************************************************************
237 * Name: hptmv_init_channel
239 * Description: allocate request and response queues for the EDMA of the
240 * given channel and sets other fields.
243 * pAdapter - pointer to the emulated adapter data structure
244 * channelNum - channel number.
245 * Return: 0 on success, otherwise on failure
246 ****************************************************************/
248 hptmv_init_channel(IAL_ADAPTER_T *pAdapter, MV_U8 channelNum)
250 MV_SATA_CHANNEL *pMvSataChannel;
251 dma_addr_t req_dma_addr;
252 dma_addr_t rsp_dma_addr;
254 if (channelNum >= MV_SATA_CHANNELS_NUM)
256 MV_ERROR("RR18xx[%d]: Bad channelNum=%d",
257 pAdapter->mvSataAdapter.adapterId, channelNum);
261 pMvSataChannel = &gMvSataChannels[pAdapter->mvSataAdapter.adapterId][channelNum];
262 pAdapter->mvSataAdapter.sataChannel[channelNum] = pMvSataChannel;
263 pMvSataChannel->channelNumber = channelNum;
264 pMvSataChannel->lba48Address = MV_FALSE;
265 pMvSataChannel->maxReadTransfer = MV_FALSE;
267 pMvSataChannel->requestQueue = (struct mvDmaRequestQueueEntry *)
268 (pAdapter->requestsArrayBaseAlignedAddr + (channelNum * MV_EDMA_REQUEST_QUEUE_SIZE));
269 req_dma_addr = pAdapter->requestsArrayBaseDmaAlignedAddr + (channelNum * MV_EDMA_REQUEST_QUEUE_SIZE);
272 KdPrint(("requestQueue addr is 0x%llX", (HPT_U64)(ULONG_PTR)req_dma_addr));
274 /* check the 1K alignment of the request queue*/
275 if (req_dma_addr & 0x3ff)
277 MV_ERROR("RR18xx[%d]: request queue allocated isn't 1 K aligned,"
278 " dma_addr=%llx channel=%d\n", pAdapter->mvSataAdapter.adapterId,
279 (HPT_U64)(ULONG_PTR)req_dma_addr, channelNum);
282 pMvSataChannel->requestQueuePciLowAddress = req_dma_addr;
283 pMvSataChannel->requestQueuePciHiAddress = 0;
284 KdPrint(("RR18xx[%d,%d]: request queue allocated: 0x%p",
285 pAdapter->mvSataAdapter.adapterId, channelNum,
286 pMvSataChannel->requestQueue));
287 pMvSataChannel->responseQueue = (struct mvDmaResponseQueueEntry *)
288 (pAdapter->responsesArrayBaseAlignedAddr + (channelNum * MV_EDMA_RESPONSE_QUEUE_SIZE));
289 rsp_dma_addr = pAdapter->responsesArrayBaseDmaAlignedAddr + (channelNum * MV_EDMA_RESPONSE_QUEUE_SIZE);
291 /* check the 256 alignment of the response queue*/
292 if (rsp_dma_addr & 0xff)
294 MV_ERROR("RR18xx[%d,%d]: response queue allocated isn't 256 byte "
295 "aligned, dma_addr=%llx\n",
296 pAdapter->mvSataAdapter.adapterId, channelNum, (HPT_U64)(ULONG_PTR)rsp_dma_addr);
299 pMvSataChannel->responseQueuePciLowAddress = rsp_dma_addr;
300 pMvSataChannel->responseQueuePciHiAddress = 0;
301 KdPrint(("RR18xx[%d,%d]: response queue allocated: 0x%p",
302 pAdapter->mvSataAdapter.adapterId, channelNum,
303 pMvSataChannel->responseQueue));
305 pAdapter->mvChannel[channelNum].online = MV_TRUE;
309 /******************************************************************************
310 * Name: hptmv_parse_identify_results
312 * Description: this functions parses the identify command results, checks
313 * that the connected deives can be accesed by RR18xx EDMA,
314 * and updates the channel structure accordingly.
316 * Parameters: pMvSataChannel, pointer to the channel data structure.
318 * Returns: =0 ->success, < 0 ->failure.
320 ******************************************************************************/
322 hptmv_parse_identify_results(MV_SATA_CHANNEL *pMvSataChannel)
324 MV_U16 *iden = pMvSataChannel->identifyDevice;
327 if (! (iden[IDEN_CAPACITY_1_OFFSET] & 0x200))
329 KdPrint(("IAL Error in IDENTIFY info: LBA not supported\n"));
334 KdPrint(("%25s - %s\n", "Capabilities", "LBA supported"));
337 if (! (iden[IDEN_CAPACITY_1_OFFSET] & 0x100))
339 KdPrint(("IAL Error in IDENTIFY info: DMA not supported\n"));
344 KdPrint(("%25s - %s\n", "Capabilities", "DMA supported"));
347 if ((iden[IDEN_VALID] & 2) == 0)
349 KdPrint(("IAL Error in IDENTIFY info: not able to find PIO mode\n"));
352 KdPrint(("%25s - 0x%02x\n", "PIO modes supported",
353 iden[IDEN_PIO_MODE_SPPORTED] & 0xff));
356 if ((iden[IDEN_VALID] & 4) == 0)
358 KdPrint(("IAL Error in IDENTIFY info: not able to find UDMA mode\n"));
363 if ((iden[IDEN_SUPPORTED_COMMANDS2] & 0x400))
365 KdPrint(("%25s - %s\n", "LBA48 addressing", "supported"));
366 pMvSataChannel->lba48Address = MV_TRUE;
370 KdPrint(("%25s - %s\n", "LBA48 addressing", "Not supported"));
371 pMvSataChannel->lba48Address = MV_FALSE;
377 init_vdev_params(IAL_ADAPTER_T *pAdapter, MV_U8 channel)
379 PVDevice pVDev = &pAdapter->VDevices[channel];
380 MV_SATA_CHANNEL *pMvSataChannel = pAdapter->mvSataAdapter.sataChannel[channel];
381 MV_U16_PTR IdentifyData = pMvSataChannel->identifyDevice;
383 pMvSataChannel->outstandingCommands = 0;
385 pVDev->u.disk.mv = pMvSataChannel;
386 pVDev->u.disk.df_on_line = 1;
387 pVDev->u.disk.pVBus = &pAdapter->VBus;
388 pVDev->pVBus = &pAdapter->VBus;
390 #ifdef SUPPORT_48BIT_LBA
391 if (pMvSataChannel->lba48Address == MV_TRUE)
392 pVDev->u.disk.dDeRealCapacity = ((IdentifyData[101]<<16) | IdentifyData[100]) - 1;
395 if(IdentifyData[53] & 1) {
396 pVDev->u.disk.dDeRealCapacity =
397 (((IdentifyData[58]<<16 | IdentifyData[57]) < (IdentifyData[61]<<16 | IdentifyData[60])) ?
398 (IdentifyData[61]<<16 | IdentifyData[60]) :
399 (IdentifyData[58]<<16 | IdentifyData[57])) - 1;
401 pVDev->u.disk.dDeRealCapacity =
402 (IdentifyData[61]<<16 | IdentifyData[60]) - 1;
404 pVDev->u.disk.bDeUsable_Mode = pVDev->u.disk.bDeModeSetting =
405 pAdapter->mvChannel[channel].maxPioModeSupported - MV_ATA_TRANSFER_PIO_0;
407 if (pAdapter->mvChannel[channel].maxUltraDmaModeSupported!=0xFF) {
408 pVDev->u.disk.bDeUsable_Mode = pVDev->u.disk.bDeModeSetting =
409 pAdapter->mvChannel[channel].maxUltraDmaModeSupported - MV_ATA_TRANSFER_UDMA_0 + 8;
413 static void device_change(IAL_ADAPTER_T *pAdapter , MV_U8 channelIndex, int plugged)
416 MV_SATA_ADAPTER *pMvSataAdapter = &pAdapter->mvSataAdapter;
417 MV_SATA_CHANNEL *pMvSataChannel = pMvSataAdapter->sataChannel[channelIndex];
419 if (!pMvSataChannel) return;
423 pVDev = &(pAdapter->VDevices[channelIndex]);
424 init_vdev_params(pAdapter, channelIndex);
426 pVDev->VDeviceType = pVDev->u.disk.df_atapi? VD_ATAPI :
427 pVDev->u.disk.df_removable_drive? VD_REMOVABLE : VD_SINGLE_DISK;
429 pVDev->VDeviceCapacity = pVDev->u.disk.dDeRealCapacity-SAVE_FOR_RAID_INFO;
430 pVDev->pfnSendCommand = pfnSendCommand[pVDev->VDeviceType];
431 pVDev->pfnDeviceFailed = pfnDeviceFailed[pVDev->VDeviceType];
432 pVDev->vf_online = 1;
438 for(iMember = 0; iMember < pVDev->pParent->u.array.bArnMember; iMember++)
439 if((PVDevice)pVDev->pParent->u.array.pMember[iMember] == pVDev)
440 pVDev->pParent->u.array.pMember[iMember] = NULL;
441 pVDev->pParent = NULL;
444 fNotifyGUI(ET_DEVICE_PLUGGED,pVDev);
445 fCheckBootable(pVDev);
446 RegisterVDevice(pVDev);
449 if (pAdapter->beeping) {
450 pAdapter->beeping = 0;
451 BeepOff(pAdapter->mvSataAdapter.adapterIoBaseAddress);
458 pVDev = &(pAdapter->VDevices[channelIndex]);
464 start_channel(IAL_ADAPTER_T *pAdapter, MV_U8 channelNum)
466 MV_SATA_ADAPTER *pMvSataAdapter = &pAdapter->mvSataAdapter;
467 MV_SATA_CHANNEL *pMvSataChannel = pMvSataAdapter->sataChannel[channelNum];
468 MV_CHANNEL *pChannelInfo = &(pAdapter->mvChannel[channelNum]);
469 MV_U32 udmaMode,pioMode;
471 KdPrint(("RR18xx [%d]: start channel (%d)", pMvSataAdapter->adapterId,
475 /* Software reset channel */
476 if (mvStorageDevATASoftResetDevice(pMvSataAdapter, channelNum) == MV_FALSE)
478 MV_ERROR("RR18xx [%d,%d]: failed to perform Software reset\n",
479 pMvSataAdapter->adapterId, channelNum);
483 /* Hardware reset channel */
484 if (mvSataChannelHardReset(pMvSataAdapter, channelNum) == MV_FALSE)
486 /* If failed, try again - this is when trying to hardreset a channel */
487 /* when drive is just spinning up */
488 StallExec(5000000); /* wait 5 sec before trying again */
489 if (mvSataChannelHardReset(pMvSataAdapter, channelNum) == MV_FALSE)
491 MV_ERROR("RR18xx [%d,%d]: failed to perform Hard reset\n",
492 pMvSataAdapter->adapterId, channelNum);
498 if (mvStorageDevATAIdentifyDevice(pMvSataAdapter, channelNum) == MV_FALSE)
500 MV_ERROR("RR18xx [%d,%d]: failed to perform ATA Identify command\n"
501 , pMvSataAdapter->adapterId, channelNum);
504 if (hptmv_parse_identify_results(pMvSataChannel))
506 MV_ERROR("RR18xx [%d,%d]: Error in parsing ATA Identify message\n"
507 , pMvSataAdapter->adapterId, channelNum);
511 /* mvStorageDevATASetFeatures */
512 /* Disable 8 bit PIO in case CFA enabled */
513 if (pMvSataChannel->identifyDevice[86] & 4)
515 KdPrint(("RR18xx [%d]: Disable 8 bit PIO (CFA enabled) \n",
516 pMvSataAdapter->adapterId));
517 if (mvStorageDevATASetFeatures(pMvSataAdapter, channelNum,
518 MV_ATA_SET_FEATURES_DISABLE_8_BIT_PIO, 0,
519 0, 0, 0) == MV_FALSE)
521 MV_ERROR("RR18xx [%d]: channel %d: mvStorageDevATASetFeatures"
522 " failed\n", pMvSataAdapter->adapterId, channelNum);
527 #ifdef ENABLE_WRITE_CACHE
528 if (pMvSataChannel->identifyDevice[82] & 0x20)
530 if (!(pMvSataChannel->identifyDevice[85] & 0x20)) /* if not enabled by default */
532 if (mvStorageDevATASetFeatures(pMvSataAdapter, channelNum,
533 MV_ATA_SET_FEATURES_ENABLE_WCACHE, 0,
534 0, 0, 0) == MV_FALSE)
536 MV_ERROR("RR18xx [%d]: channel %d: mvStorageDevATASetFeatures failed\n",
537 pMvSataAdapter->adapterId, channelNum);
541 KdPrint(("RR18xx [%d]: channel %d, write cache enabled\n",
542 pMvSataAdapter->adapterId, channelNum));
546 KdPrint(("RR18xx [%d]: channel %d, write cache not supported\n",
547 pMvSataAdapter->adapterId, channelNum));
549 #else /* disable write cache */
551 if (pMvSataChannel->identifyDevice[85] & 0x20)
553 KdPrint(("RR18xx [%d]: channel =%d, disable write cache\n",
554 pMvSataAdapter->adapterId, channelNum));
555 if (mvStorageDevATASetFeatures(pMvSataAdapter, channelNum,
556 MV_ATA_SET_FEATURES_DISABLE_WCACHE, 0,
557 0, 0, 0) == MV_FALSE)
559 MV_ERROR("RR18xx [%d]: channel %d: mvStorageDevATASetFeatures failed\n",
560 pMvSataAdapter->adapterId, channelNum);
564 KdPrint(("RR18xx [%d]: channel=%d, write cache disabled\n",
565 pMvSataAdapter->adapterId, channelNum));
569 /* Set transfer mode */
570 KdPrint(("RR18xx [%d] Set transfer mode XFER_PIO_SLOW\n",
571 pMvSataAdapter->adapterId));
572 if (mvStorageDevATASetFeatures(pMvSataAdapter, channelNum,
573 MV_ATA_SET_FEATURES_TRANSFER,
574 MV_ATA_TRANSFER_PIO_SLOW, 0, 0, 0) ==
577 MV_ERROR("RR18xx [%d] channel %d: Set Features failed\n",
578 pMvSataAdapter->adapterId, channelNum);
582 if (pMvSataChannel->identifyDevice[IDEN_PIO_MODE_SPPORTED] & 1)
584 pioMode = MV_ATA_TRANSFER_PIO_4;
586 else if (pMvSataChannel->identifyDevice[IDEN_PIO_MODE_SPPORTED] & 2)
588 pioMode = MV_ATA_TRANSFER_PIO_3;
592 MV_ERROR("IAL Error in IDENTIFY info: PIO modes 3 and 4 not supported\n");
593 pioMode = MV_ATA_TRANSFER_PIO_SLOW;
596 KdPrint(("RR18xx [%d] Set transfer mode XFER_PIO_4\n",
597 pMvSataAdapter->adapterId));
598 pAdapter->mvChannel[channelNum].maxPioModeSupported = pioMode;
599 if (mvStorageDevATASetFeatures(pMvSataAdapter, channelNum,
600 MV_ATA_SET_FEATURES_TRANSFER,
601 pioMode, 0, 0, 0) == MV_FALSE)
603 MV_ERROR("RR18xx [%d] channel %d: Set Features failed\n",
604 pMvSataAdapter->adapterId, channelNum);
608 udmaMode = MV_ATA_TRANSFER_UDMA_0;
609 if (pMvSataChannel->identifyDevice[IDEN_UDMA_MODE] & 0x40)
611 udmaMode = MV_ATA_TRANSFER_UDMA_6;
613 else if (pMvSataChannel->identifyDevice[IDEN_UDMA_MODE] & 0x20)
615 udmaMode = MV_ATA_TRANSFER_UDMA_5;
617 else if (pMvSataChannel->identifyDevice[IDEN_UDMA_MODE] & 0x10)
619 udmaMode = MV_ATA_TRANSFER_UDMA_4;
621 else if (pMvSataChannel->identifyDevice[IDEN_UDMA_MODE] & 8)
623 udmaMode = MV_ATA_TRANSFER_UDMA_3;
625 else if (pMvSataChannel->identifyDevice[IDEN_UDMA_MODE] & 4)
627 udmaMode = MV_ATA_TRANSFER_UDMA_2;
630 KdPrint(("RR18xx [%d] Set transfer mode XFER_UDMA_%d\n",
631 pMvSataAdapter->adapterId, udmaMode & 0xf));
632 pChannelInfo->maxUltraDmaModeSupported = udmaMode;
634 /*if (mvStorageDevATASetFeatures(pMvSataAdapter, channelNum,
635 MV_ATA_SET_FEATURES_TRANSFER, udmaMode,
636 0, 0, 0) == MV_FALSE)
638 MV_ERROR("RR18xx [%d] channel %d: Set Features failed\n",
639 pMvSataAdapter->adapterId, channelNum);
642 if (pChannelInfo->maxUltraDmaModeSupported == 0xFF)
647 if (mvStorageDevATASetFeatures(pMvSataAdapter, channelNum,
648 MV_ATA_SET_FEATURES_TRANSFER,
649 pChannelInfo->maxUltraDmaModeSupported,
650 0, 0, 0) == MV_FALSE)
652 if (pChannelInfo->maxUltraDmaModeSupported > MV_ATA_TRANSFER_UDMA_0)
654 if (mvStorageDevATASoftResetDevice(pMvSataAdapter, channelNum) == MV_FALSE)
656 MV_REG_WRITE_BYTE(pMvSataAdapter->adapterIoBaseAddress,
657 pMvSataChannel->eDmaRegsOffset +
658 0x11c, /* command reg */
659 MV_ATA_COMMAND_IDLE_IMMEDIATE);
660 mvMicroSecondsDelay(10000);
661 mvSataChannelHardReset(pMvSataAdapter, channelNum);
662 if (mvStorageDevATASoftResetDevice(pMvSataAdapter, channelNum) == MV_FALSE)
665 if (mvSataChannelHardReset(pMvSataAdapter, channelNum) == MV_FALSE)
667 pChannelInfo->maxUltraDmaModeSupported--;
675 /* Read look ahead */
676 #ifdef ENABLE_READ_AHEAD
677 if (pMvSataChannel->identifyDevice[82] & 0x40)
679 if (!(pMvSataChannel->identifyDevice[85] & 0x40)) /* if not enabled by default */
681 if (mvStorageDevATASetFeatures(pMvSataAdapter, channelNum,
682 MV_ATA_SET_FEATURES_ENABLE_RLA, 0, 0,
685 MV_ERROR("RR18xx [%d] channel %d: Set Features failed\n",
686 pMvSataAdapter->adapterId, channelNum);
690 KdPrint(("RR18xx [%d]: channel=%d, read look ahead enabled\n",
691 pMvSataAdapter->adapterId, channelNum));
695 KdPrint(("RR18xx [%d]: channel %d, Read Look Ahead not supported\n",
696 pMvSataAdapter->adapterId, channelNum));
700 if (pMvSataChannel->identifyDevice[86] & 0x20)
702 KdPrint(("RR18xx [%d]:channel %d, disable read look ahead\n",
703 pMvSataAdapter->adapterId, channelNum));
704 if (mvStorageDevATASetFeatures(pMvSataAdapter, channelNum,
705 MV_ATA_SET_FEATURES_DISABLE_RLA, 0, 0,
708 MV_ERROR("RR18xx [%d]:channel %d: ATA Set Features failed\n",
709 pMvSataAdapter->adapterId, channelNum);
713 KdPrint(("RR18xx [%d]:channel %d, read look ahead disabled\n",
714 pMvSataAdapter->adapterId, channelNum));
720 KdPrint(("RR18xx [%d]: channel %d config EDMA, Non Queued Mode\n",
721 pMvSataAdapter->adapterId,
723 if (mvSataConfigEdmaMode(pMvSataAdapter, channelNum,
724 MV_EDMA_MODE_NOT_QUEUED, 0) == MV_FALSE)
726 MV_ERROR("RR18xx [%d] channel %d Error: mvSataConfigEdmaMode failed\n",
727 pMvSataAdapter->adapterId, channelNum);
732 if (mvSataEnableChannelDma(pMvSataAdapter, channelNum) == MV_FALSE)
734 MV_ERROR("RR18xx [%d] Failed to enable DMA, channel=%d\n",
735 pMvSataAdapter->adapterId, channelNum);
738 MV_ERROR("RR18xx [%d,%d]: channel started successfully\n",
739 pMvSataAdapter->adapterId, channelNum);
742 set_fail_led(pMvSataAdapter, channelNum, 0);
748 hptmv_handle_event(void * data, int flag)
750 IAL_ADAPTER_T *pAdapter = (IAL_ADAPTER_T *)data;
751 MV_SATA_ADAPTER *pMvSataAdapter = &pAdapter->mvSataAdapter;
754 mtx_assert(&pAdapter->lock, MA_OWNED);
755 /* mvOsSemTake(&pMvSataAdapter->semaphore); */
756 for (channelIndex = 0; channelIndex < MV_SATA_CHANNELS_NUM; channelIndex++)
758 switch(pAdapter->sataEvents[channelIndex])
760 case SATA_EVENT_CHANNEL_CONNECTED:
761 /* Handle only connects */
764 KdPrint(("RR18xx [%d,%d]: new device connected\n",
765 pMvSataAdapter->adapterId, channelIndex));
766 hptmv_init_channel(pAdapter, channelIndex);
767 if (mvSataConfigureChannel( pMvSataAdapter, channelIndex) == MV_FALSE)
769 MV_ERROR("RR18xx [%d,%d] Failed to configure\n",
770 pMvSataAdapter->adapterId, channelIndex);
771 hptmv_free_channel(pAdapter, channelIndex);
775 /*mvSataChannelHardReset(pMvSataAdapter, channel);*/
776 if (start_channel( pAdapter, channelIndex))
778 MV_ERROR("RR18xx [%d,%d]Failed to start channel\n",
779 pMvSataAdapter->adapterId, channelIndex);
780 hptmv_free_channel(pAdapter, channelIndex);
784 device_change(pAdapter, channelIndex, TRUE);
787 pAdapter->sataEvents[channelIndex] = SATA_EVENT_NO_CHANGE;
790 case SATA_EVENT_CHANNEL_DISCONNECTED:
791 /* Handle only disconnects */
794 KdPrint(("RR18xx [%d,%d]: device disconnected\n",
795 pMvSataAdapter->adapterId, channelIndex));
796 /* Flush pending commands */
797 if(pMvSataAdapter->sataChannel[channelIndex])
799 _VBUS_INST(&pAdapter->VBus)
800 mvSataFlushDmaQueue (pMvSataAdapter, channelIndex,
801 MV_FLUSH_TYPE_CALLBACK);
802 CheckPendingCall(_VBUS_P0);
803 mvSataRemoveChannel(pMvSataAdapter,channelIndex);
804 hptmv_free_channel(pAdapter, channelIndex);
805 pMvSataAdapter->sataChannel[channelIndex] = NULL;
806 KdPrint(("RR18xx [%d,%d]: channel removed\n",
807 pMvSataAdapter->adapterId, channelIndex));
808 if (pAdapter->outstandingCommands==0 && DPC_Request_Nums==0)
809 Check_Idle_Call(pAdapter);
813 KdPrint(("RR18xx [%d,%d]: channel already removed!!\n",
814 pMvSataAdapter->adapterId, channelIndex));
816 pAdapter->sataEvents[channelIndex] = SATA_EVENT_NO_CHANGE;
819 case SATA_EVENT_NO_CHANGE:
826 /* mvOsSemRelease(&pMvSataAdapter->semaphore); */
829 #define EVENT_CONNECT 1
830 #define EVENT_DISCONNECT 0
833 hptmv_handle_event_connect(void *data)
835 hptmv_handle_event (data, 0);
839 hptmv_handle_event_disconnect(void *data)
841 hptmv_handle_event (data, 1);
845 hptmv_event_notify(MV_SATA_ADAPTER *pMvSataAdapter, MV_EVENT_TYPE eventType,
846 MV_U32 param1, MV_U32 param2)
848 IAL_ADAPTER_T *pAdapter = pMvSataAdapter->IALData;
852 case MV_EVENT_TYPE_SATA_CABLE:
854 MV_U8 channel = param2;
856 if (param1 == EVENT_CONNECT)
858 pAdapter->sataEvents[channel] = SATA_EVENT_CHANNEL_CONNECTED;
859 KdPrint(("RR18xx [%d,%d]: device connected event received\n",
860 pMvSataAdapter->adapterId, channel));
861 /* Delete previous timers (if multiple drives connected in the same time */
862 callout_reset(&pAdapter->event_timer_connect, 10 * hz, hptmv_handle_event_connect, pAdapter);
864 else if (param1 == EVENT_DISCONNECT)
866 pAdapter->sataEvents[channel] = SATA_EVENT_CHANNEL_DISCONNECTED;
867 KdPrint(("RR18xx [%d,%d]: device disconnected event received \n",
868 pMvSataAdapter->adapterId, channel));
869 device_change(pAdapter, channel, FALSE);
870 /* Delete previous timers (if multiple drives disconnected in the same time */
871 /*callout_reset(&pAdapter->event_timer_disconnect, 10 * hz, hptmv_handle_event_disconnect, pAdapter); */
872 /*It is not necessary to wait, handle it directly*/
873 hptmv_handle_event_disconnect(pAdapter);
878 MV_ERROR("RR18xx: illegal value for param1(%d) at "
879 "connect/disconnect event, host=%d\n", param1,
880 pMvSataAdapter->adapterId );
885 case MV_EVENT_TYPE_ADAPTER_ERROR:
886 KdPrint(("RR18xx: DEVICE error event received, pci cause "
887 "reg=%x, don't how to handle this\n", param1));
890 MV_ERROR("RR18xx[%d]: unknown event type (%d)\n",
891 pMvSataAdapter->adapterId, eventType);
898 hptmv_allocate_edma_queues(IAL_ADAPTER_T *pAdapter)
900 pAdapter->requestsArrayBaseAddr = (MV_U8 *)contigmalloc(REQUESTS_ARRAY_SIZE,
901 M_DEVBUF, M_NOWAIT, 0, 0xffffffff, PAGE_SIZE, 0ul);
902 if (pAdapter->requestsArrayBaseAddr == NULL)
904 MV_ERROR("RR18xx[%d]: Failed to allocate memory for EDMA request"
905 " queues\n", pAdapter->mvSataAdapter.adapterId);
908 pAdapter->requestsArrayBaseDmaAddr = fOsPhysicalAddress(pAdapter->requestsArrayBaseAddr);
909 pAdapter->requestsArrayBaseAlignedAddr = pAdapter->requestsArrayBaseAddr;
910 pAdapter->requestsArrayBaseAlignedAddr += MV_EDMA_REQUEST_QUEUE_SIZE;
911 pAdapter->requestsArrayBaseAlignedAddr = (MV_U8 *)
912 (((ULONG_PTR)pAdapter->requestsArrayBaseAlignedAddr) & ~(ULONG_PTR)(MV_EDMA_REQUEST_QUEUE_SIZE - 1));
913 pAdapter->requestsArrayBaseDmaAlignedAddr = pAdapter->requestsArrayBaseDmaAddr;
914 pAdapter->requestsArrayBaseDmaAlignedAddr += MV_EDMA_REQUEST_QUEUE_SIZE;
915 pAdapter->requestsArrayBaseDmaAlignedAddr &= ~(ULONG_PTR)(MV_EDMA_REQUEST_QUEUE_SIZE - 1);
917 if ((pAdapter->requestsArrayBaseDmaAlignedAddr - pAdapter->requestsArrayBaseDmaAddr) !=
918 (pAdapter->requestsArrayBaseAlignedAddr - pAdapter->requestsArrayBaseAddr))
920 MV_ERROR("RR18xx[%d]: Error in Request Quueues Alignment\n",
921 pAdapter->mvSataAdapter.adapterId);
922 contigfree(pAdapter->requestsArrayBaseAddr, REQUESTS_ARRAY_SIZE, M_DEVBUF);
925 /* response queues */
926 pAdapter->responsesArrayBaseAddr = (MV_U8 *)contigmalloc(RESPONSES_ARRAY_SIZE,
927 M_DEVBUF, M_NOWAIT, 0, 0xffffffff, PAGE_SIZE, 0ul);
928 if (pAdapter->responsesArrayBaseAddr == NULL)
930 MV_ERROR("RR18xx[%d]: Failed to allocate memory for EDMA response"
931 " queues\n", pAdapter->mvSataAdapter.adapterId);
932 contigfree(pAdapter->requestsArrayBaseAddr, RESPONSES_ARRAY_SIZE, M_DEVBUF);
935 pAdapter->responsesArrayBaseDmaAddr = fOsPhysicalAddress(pAdapter->responsesArrayBaseAddr);
936 pAdapter->responsesArrayBaseAlignedAddr = pAdapter->responsesArrayBaseAddr;
937 pAdapter->responsesArrayBaseAlignedAddr += MV_EDMA_RESPONSE_QUEUE_SIZE;
938 pAdapter->responsesArrayBaseAlignedAddr = (MV_U8 *)
939 (((ULONG_PTR)pAdapter->responsesArrayBaseAlignedAddr) & ~(ULONG_PTR)(MV_EDMA_RESPONSE_QUEUE_SIZE - 1));
940 pAdapter->responsesArrayBaseDmaAlignedAddr = pAdapter->responsesArrayBaseDmaAddr;
941 pAdapter->responsesArrayBaseDmaAlignedAddr += MV_EDMA_RESPONSE_QUEUE_SIZE;
942 pAdapter->responsesArrayBaseDmaAlignedAddr &= ~(ULONG_PTR)(MV_EDMA_RESPONSE_QUEUE_SIZE - 1);
944 if ((pAdapter->responsesArrayBaseDmaAlignedAddr - pAdapter->responsesArrayBaseDmaAddr) !=
945 (pAdapter->responsesArrayBaseAlignedAddr - pAdapter->responsesArrayBaseAddr))
947 MV_ERROR("RR18xx[%d]: Error in Response Queues Alignment\n",
948 pAdapter->mvSataAdapter.adapterId);
949 contigfree(pAdapter->requestsArrayBaseAddr, REQUESTS_ARRAY_SIZE, M_DEVBUF);
950 contigfree(pAdapter->responsesArrayBaseAddr, RESPONSES_ARRAY_SIZE, M_DEVBUF);
957 hptmv_free_edma_queues(IAL_ADAPTER_T *pAdapter)
959 contigfree(pAdapter->requestsArrayBaseAddr, REQUESTS_ARRAY_SIZE, M_DEVBUF);
960 contigfree(pAdapter->responsesArrayBaseAddr, RESPONSES_ARRAY_SIZE, M_DEVBUF);
964 AllocatePRDTable(IAL_ADAPTER_T *pAdapter)
967 if (pAdapter->pFreePRDLink) {
968 KdPrint(("pAdapter->pFreePRDLink:%p\n",pAdapter->pFreePRDLink));
969 ret = pAdapter->pFreePRDLink;
970 pAdapter->pFreePRDLink = *(void**)ret;
977 FreePRDTable(IAL_ADAPTER_T *pAdapter, PVOID PRDTable)
979 *(void**)PRDTable = pAdapter->pFreePRDLink;
980 pAdapter->pFreePRDLink = PRDTable;
983 extern PVDevice fGetFirstChild(PVDevice pLogical);
984 extern void fResetBootMark(PVDevice pLogical);
986 fRegisterVdevice(IAL_ADAPTER_T *pAdapter)
988 PVDevice pPhysical, pLogical;
992 for(i=0;i<MV_SATA_CHANNELS_NUM;i++) {
993 pPhysical = &(pAdapter->VDevices[i]);
994 pLogical = pPhysical;
995 while (pLogical->pParent) pLogical = pLogical->pParent;
996 if (pLogical->vf_online==0) {
997 pPhysical->vf_bootmark = pLogical->vf_bootmark = 0;
1000 if (pLogical->VDeviceType==VD_SPARE || pPhysical!=fGetFirstChild(pLogical))
1003 pVBus = &pAdapter->VBus;
1007 while(j<MAX_VDEVICE_PER_VBUS && pVBus->pVDevice[j]) j++;
1008 if(j<MAX_VDEVICE_PER_VBUS){
1009 pVBus->pVDevice[j] = pLogical;
1010 pLogical->pVBus = pVBus;
1012 if (j>0 && pLogical->vf_bootmark) {
1013 if (pVBus->pVDevice[0]->vf_bootmark) {
1014 fResetBootMark(pLogical);
1017 do { pVBus->pVDevice[j] = pVBus->pVDevice[j-1]; } while (--j);
1018 pVBus->pVDevice[0] = pLogical;
1027 GetSpareDisk(_VBUS_ARG PVDevice pArray)
1029 IAL_ADAPTER_T *pAdapter = (IAL_ADAPTER_T *)pArray->pVBus->OsExt;
1030 LBA_T capacity = LongDiv(pArray->VDeviceCapacity, pArray->u.array.bArnMember-1);
1031 LBA_T thiscap, maxcap = MAX_LBA_T;
1032 PVDevice pVDevice, pFind = NULL;
1035 for(i=0;i<MV_SATA_CHANNELS_NUM;i++)
1037 pVDevice = &pAdapter->VDevices[i];
1040 thiscap = pArray->vf_format_v2? pVDevice->u.disk.dDeRealCapacity : pVDevice->VDeviceCapacity;
1041 /* find the smallest usable spare disk */
1042 if (pVDevice->VDeviceType==VD_SPARE &&
1043 pVDevice->u.disk.df_on_line &&
1045 thiscap >= capacity)
1047 maxcap = pVDevice->VDeviceCapacity;
1054 /******************************************************************
1056 *******************************************************************/
1058 fDeReadWrite(PDevice pDev, ULONG Lba, UCHAR Cmd, void *tmpBuffer)
1060 return mvReadWrite(pDev->mv, Lba, Cmd, tmpBuffer);
1063 void HPTLIBAPI fDeSelectMode(PDevice pDev, UCHAR NewMode)
1065 MV_SATA_CHANNEL *pSataChannel = pDev->mv;
1066 MV_SATA_ADAPTER *pSataAdapter = pSataChannel->mvSataAdapter;
1067 MV_U8 channelIndex = pSataChannel->channelNumber;
1069 /* 508x don't use MW-DMA? */
1070 if (NewMode>4 && NewMode<8) NewMode = 4;
1071 pDev->bDeModeSetting = NewMode;
1073 mvMode = MV_ATA_TRANSFER_PIO_0 + NewMode;
1075 mvMode = MV_ATA_TRANSFER_UDMA_0 + (NewMode-8);
1077 /*To fix 88i8030 bug*/
1078 if (mvMode > MV_ATA_TRANSFER_UDMA_0 && mvMode < MV_ATA_TRANSFER_UDMA_4)
1079 mvMode = MV_ATA_TRANSFER_UDMA_0;
1081 mvSataDisableChannelDma(pSataAdapter, channelIndex);
1082 /* Flush pending commands */
1083 mvSataFlushDmaQueue (pSataAdapter, channelIndex, MV_FLUSH_TYPE_NONE);
1085 if (mvStorageDevATASetFeatures(pSataAdapter, channelIndex,
1086 MV_ATA_SET_FEATURES_TRANSFER,
1087 mvMode, 0, 0, 0) == MV_FALSE)
1089 KdPrint(("channel %d: Set Features failed\n", channelIndex));
1092 if (mvSataEnableChannelDma(pSataAdapter, channelIndex) == MV_FALSE)
1093 KdPrint(("Failed to enable DMA, channel=%d", channelIndex));
1096 int HPTLIBAPI fDeSetTCQ(PDevice pDev, int enable, int depth)
1098 MV_SATA_CHANNEL *pSataChannel = pDev->mv;
1099 MV_SATA_ADAPTER *pSataAdapter = pSataChannel->mvSataAdapter;
1100 MV_U8 channelIndex = pSataChannel->channelNumber;
1101 IAL_ADAPTER_T *pAdapter = pSataAdapter->IALData;
1102 MV_CHANNEL *channelInfo = &(pAdapter->mvChannel[channelIndex]);
1103 int dmaActive = pSataChannel->queueCommandsEnabled;
1107 mvSataDisableChannelDma(pSataAdapter, channelIndex);
1108 mvSataFlushDmaQueue(pSataAdapter,channelIndex,MV_FLUSH_TYPE_CALLBACK);
1112 if (pSataChannel->queuedDMA == MV_EDMA_MODE_NOT_QUEUED &&
1113 (pSataChannel->identifyDevice[IDEN_SUPPORTED_COMMANDS2] & (0x2))) {
1114 UCHAR depth = ((pSataChannel->identifyDevice[IDEN_QUEUE_DEPTH]) & 0x1f) + 1;
1115 channelInfo->queueDepth = (depth==32)? 31 : depth;
1116 mvSataConfigEdmaMode(pSataAdapter, channelIndex, MV_EDMA_MODE_QUEUED, depth);
1122 if (pSataChannel->queuedDMA != MV_EDMA_MODE_NOT_QUEUED) {
1123 channelInfo->queueDepth = 2;
1124 mvSataConfigEdmaMode(pSataAdapter, channelIndex, MV_EDMA_MODE_NOT_QUEUED, 0);
1130 mvSataEnableChannelDma(pSataAdapter,channelIndex);
1134 int HPTLIBAPI fDeSetNCQ(PDevice pDev, int enable, int depth)
1139 int HPTLIBAPI fDeSetWriteCache(PDevice pDev, int enable)
1141 MV_SATA_CHANNEL *pSataChannel = pDev->mv;
1142 MV_SATA_ADAPTER *pSataAdapter = pSataChannel->mvSataAdapter;
1143 MV_U8 channelIndex = pSataChannel->channelNumber;
1144 IAL_ADAPTER_T *pAdapter = pSataAdapter->IALData;
1145 MV_CHANNEL *channelInfo = &(pAdapter->mvChannel[channelIndex]);
1146 int dmaActive = pSataChannel->queueCommandsEnabled;
1150 mvSataDisableChannelDma(pSataAdapter, channelIndex);
1151 mvSataFlushDmaQueue(pSataAdapter,channelIndex,MV_FLUSH_TYPE_CALLBACK);
1154 if ((pSataChannel->identifyDevice[82] & (0x20))) {
1156 if (mvStorageDevATASetFeatures(pSataAdapter, channelIndex,
1157 MV_ATA_SET_FEATURES_ENABLE_WCACHE, 0, 0, 0, 0))
1159 channelInfo->writeCacheEnabled = MV_TRUE;
1164 if (mvStorageDevATASetFeatures(pSataAdapter, channelIndex,
1165 MV_ATA_SET_FEATURES_DISABLE_WCACHE, 0, 0, 0, 0))
1167 channelInfo->writeCacheEnabled = MV_FALSE;
1174 mvSataEnableChannelDma(pSataAdapter,channelIndex);
1178 int HPTLIBAPI fDeSetReadAhead(PDevice pDev, int enable)
1180 MV_SATA_CHANNEL *pSataChannel = pDev->mv;
1181 MV_SATA_ADAPTER *pSataAdapter = pSataChannel->mvSataAdapter;
1182 MV_U8 channelIndex = pSataChannel->channelNumber;
1183 IAL_ADAPTER_T *pAdapter = pSataAdapter->IALData;
1184 MV_CHANNEL *channelInfo = &(pAdapter->mvChannel[channelIndex]);
1185 int dmaActive = pSataChannel->queueCommandsEnabled;
1189 mvSataDisableChannelDma(pSataAdapter, channelIndex);
1190 mvSataFlushDmaQueue(pSataAdapter,channelIndex,MV_FLUSH_TYPE_CALLBACK);
1193 if ((pSataChannel->identifyDevice[82] & (0x40))) {
1195 if (mvStorageDevATASetFeatures(pSataAdapter, channelIndex,
1196 MV_ATA_SET_FEATURES_ENABLE_RLA, 0, 0, 0, 0))
1198 channelInfo->readAheadEnabled = MV_TRUE;
1203 if (mvStorageDevATASetFeatures(pSataAdapter, channelIndex,
1204 MV_ATA_SET_FEATURES_DISABLE_RLA, 0, 0, 0, 0))
1206 channelInfo->readAheadEnabled = MV_FALSE;
1213 mvSataEnableChannelDma(pSataAdapter,channelIndex);
1217 #ifdef SUPPORT_ARRAY
1218 #define IdeRegisterVDevice fCheckArray
1221 IdeRegisterVDevice(PDevice pDev)
1223 PVDevice pVDev = Map2pVDevice(pDev);
1225 pVDev->VDeviceType = pDev->df_atapi? VD_ATAPI :
1226 pDev->df_removable_drive? VD_REMOVABLE : VD_SINGLE_DISK;
1227 pVDev->vf_online = 1;
1228 pVDev->VDeviceCapacity = pDev->dDeRealCapacity;
1229 pVDev->pfnSendCommand = pfnSendCommand[pVDev->VDeviceType];
1230 pVDev->pfnDeviceFailed = pfnDeviceFailed[pVDev->VDeviceType];
1234 static __inline PBUS_DMAMAP
1235 dmamap_get(struct IALAdapter * pAdapter)
1237 PBUS_DMAMAP p = pAdapter->pbus_dmamap_list;
1239 pAdapter->pbus_dmamap_list = p-> next;
1243 static __inline void
1244 dmamap_put(PBUS_DMAMAP p)
1246 p->next = p->pAdapter->pbus_dmamap_list;
1247 p->pAdapter->pbus_dmamap_list = p;
1250 static int num_adapters = 0;
1252 init_adapter(IAL_ADAPTER_T *pAdapter)
1254 PVBus _vbus_p = &pAdapter->VBus;
1255 MV_SATA_ADAPTER *pMvSataAdapter;
1256 int i, channel, rid;
1260 mtx_init(&pAdapter->lock, "hptsleeplock", NULL, MTX_DEF);
1261 callout_init_mtx(&pAdapter->event_timer_connect, &pAdapter->lock, 0);
1262 callout_init_mtx(&pAdapter->event_timer_disconnect, &pAdapter->lock, 0);
1264 sx_xlock(&hptmv_list_lock);
1267 if(gIal_Adapter == NULL){
1268 gIal_Adapter = pAdapter;
1269 pCurAdapter = gIal_Adapter;
1272 pCurAdapter->next = pAdapter;
1273 pCurAdapter = pAdapter;
1275 sx_xunlock(&hptmv_list_lock);
1277 pAdapter->outstandingCommands = 0;
1279 pMvSataAdapter = &(pAdapter->mvSataAdapter);
1280 _vbus_p->OsExt = (void *)pAdapter;
1281 pMvSataAdapter->IALData = pAdapter;
1283 if (bus_dma_tag_create(bus_get_dma_tag(pAdapter->hpt_dev),/* parent */
1285 BUS_SPACE_MAXADDR_32BIT+1, /* boundary */
1286 BUS_SPACE_MAXADDR, /* lowaddr */
1287 BUS_SPACE_MAXADDR, /* highaddr */
1288 NULL, NULL, /* filter, filterarg */
1289 PAGE_SIZE * (MAX_SG_DESCRIPTORS-1), /* maxsize */
1290 MAX_SG_DESCRIPTORS, /* nsegments */
1291 0x10000, /* maxsegsize */
1292 BUS_DMA_WAITOK, /* flags */
1293 busdma_lock_mutex, /* lockfunc */
1294 &pAdapter->lock, /* lockfuncarg */
1295 &pAdapter->io_dma_parent /* tag */))
1301 if (hptmv_allocate_edma_queues(pAdapter))
1303 MV_ERROR("RR18xx: Failed to allocate memory for EDMA queues\n");
1307 /* also map EPROM address */
1309 if (!(pAdapter->mem_res = bus_alloc_resource_any(pAdapter->hpt_dev,
1310 SYS_RES_MEMORY, &rid, RF_ACTIVE))
1312 !(pMvSataAdapter->adapterIoBaseAddress = rman_get_virtual(pAdapter->mem_res)))
1314 MV_ERROR("RR18xx: Failed to remap memory space\n");
1315 hptmv_free_edma_queues(pAdapter);
1320 KdPrint(("RR18xx: io base address 0x%p\n", pMvSataAdapter->adapterIoBaseAddress));
1323 pMvSataAdapter->adapterId = num_adapters++;
1324 /* get the revision ID */
1325 pMvSataAdapter->pciConfigRevisionId = pci_read_config(pAdapter->hpt_dev, PCIR_REVID, 1);
1326 pMvSataAdapter->pciConfigDeviceId = pci_get_device(pAdapter->hpt_dev);
1329 pMvSataAdapter->intCoalThre[0]= 1;
1330 pMvSataAdapter->intCoalThre[1]= 1;
1331 pMvSataAdapter->intTimeThre[0] = 1;
1332 pMvSataAdapter->intTimeThre[1] = 1;
1333 pMvSataAdapter->pciCommand = 0x0107E371;
1334 pMvSataAdapter->pciSerrMask = 0xd77fe6ul;
1335 pMvSataAdapter->pciInterruptMask = 0xd77fe6ul;
1336 pMvSataAdapter->mvSataEventNotify = hptmv_event_notify;
1338 if (mvSataInitAdapter(pMvSataAdapter) == MV_FALSE)
1340 MV_ERROR("RR18xx[%d]: core failed to initialize the adapter\n",
1341 pMvSataAdapter->adapterId);
1343 bus_release_resource(pAdapter->hpt_dev, SYS_RES_MEMORY, rid, pAdapter->mem_res);
1344 hptmv_free_edma_queues(pAdapter);
1347 pAdapter->ver_601 = pMvSataAdapter->pcbVersion;
1350 set_fail_leds(pMvSataAdapter, 0);
1353 /* setup command blocks */
1354 KdPrint(("Allocate command blocks\n"));
1355 _vbus_(pFreeCommands) = 0;
1356 pAdapter->pCommandBlocks =
1357 malloc(sizeof(struct _Command) * MAX_COMMAND_BLOCKS_FOR_EACH_VBUS, M_DEVBUF, M_NOWAIT);
1358 KdPrint(("pCommandBlocks:%p\n",pAdapter->pCommandBlocks));
1359 if (!pAdapter->pCommandBlocks) {
1360 MV_ERROR("insufficient memory\n");
1364 for (i=0; i<MAX_COMMAND_BLOCKS_FOR_EACH_VBUS; i++) {
1365 FreeCommand(_VBUS_P &(pAdapter->pCommandBlocks[i]));
1368 /*Set up the bus_dmamap*/
1369 pAdapter->pbus_dmamap = (PBUS_DMAMAP)malloc (sizeof(struct _BUS_DMAMAP) * MAX_QUEUE_COMM, M_DEVBUF, M_NOWAIT);
1370 if(!pAdapter->pbus_dmamap) {
1371 MV_ERROR("insufficient memory\n");
1372 free(pAdapter->pCommandBlocks, M_DEVBUF);
1376 memset((void *)pAdapter->pbus_dmamap, 0, sizeof(struct _BUS_DMAMAP) * MAX_QUEUE_COMM);
1377 pAdapter->pbus_dmamap_list = 0;
1378 for (i=0; i < MAX_QUEUE_COMM; i++) {
1379 PBUS_DMAMAP pmap = &(pAdapter->pbus_dmamap[i]);
1380 pmap->pAdapter = pAdapter;
1383 if(bus_dmamap_create(pAdapter->io_dma_parent, 0, &pmap->dma_map)) {
1384 MV_ERROR("Can not allocate dma map\n");
1385 free(pAdapter->pCommandBlocks, M_DEVBUF);
1386 free(pAdapter->pbus_dmamap, M_DEVBUF);
1389 callout_init_mtx(&pmap->timeout, &pAdapter->lock, 0);
1391 /* setup PRD Tables */
1392 KdPrint(("Allocate PRD Tables\n"));
1393 pAdapter->pFreePRDLink = 0;
1395 pAdapter->prdTableAddr = (PUCHAR)contigmalloc(
1396 (PRD_ENTRIES_SIZE*PRD_TABLES_FOR_VBUS + 32), M_DEVBUF, M_NOWAIT, 0, 0xffffffff, PAGE_SIZE, 0ul);
1398 KdPrint(("prdTableAddr:%p\n",pAdapter->prdTableAddr));
1399 if (!pAdapter->prdTableAddr) {
1400 MV_ERROR("insufficient PRD Tables\n");
1403 pAdapter->prdTableAlignedAddr = (PUCHAR)(((ULONG_PTR)pAdapter->prdTableAddr + 0x1f) & ~(ULONG_PTR)0x1fL);
1405 PUCHAR PRDTable = pAdapter->prdTableAlignedAddr;
1406 for (i=0; i<PRD_TABLES_FOR_VBUS; i++)
1408 /* KdPrint(("i=%d,pAdapter->pFreePRDLink=%p\n",i,pAdapter->pFreePRDLink)); */
1409 FreePRDTable(pAdapter, PRDTable);
1410 PRDTable += PRD_ENTRIES_SIZE;
1414 /* enable the adapter interrupts */
1416 /* configure and start the connected channels*/
1417 for (channel = 0; channel < MV_SATA_CHANNELS_NUM; channel++)
1419 pAdapter->mvChannel[channel].online = MV_FALSE;
1420 if (mvSataIsStorageDeviceConnected(pMvSataAdapter, channel)
1423 KdPrint(("RR18xx[%d]: channel %d is connected\n",
1424 pMvSataAdapter->adapterId, channel));
1426 if (hptmv_init_channel(pAdapter, channel) == 0)
1428 if (mvSataConfigureChannel(pMvSataAdapter, channel) == MV_FALSE)
1430 MV_ERROR("RR18xx[%d]: Failed to configure channel"
1431 " %d\n",pMvSataAdapter->adapterId, channel);
1432 hptmv_free_channel(pAdapter, channel);
1436 if (start_channel(pAdapter, channel))
1438 MV_ERROR("RR18xx[%d]: Failed to start channel,"
1439 " channel=%d\n",pMvSataAdapter->adapterId,
1441 hptmv_free_channel(pAdapter, channel);
1443 pAdapter->mvChannel[channel].online = MV_TRUE;
1444 /* mvSataChannelSetEdmaLoopBackMode(pMvSataAdapter,
1450 KdPrint(("pAdapter->mvChannel[channel].online:%x, channel:%d\n",
1451 pAdapter->mvChannel[channel].online, channel));
1454 #ifdef SUPPORT_ARRAY
1455 for(i = MAX_ARRAY_DEVICE - 1; i >= 0; i--) {
1456 pVDev = ArrayTables(i);
1457 mArFreeArrayTable(pVDev);
1461 KdPrint(("Initialize Devices\n"));
1462 for (channel = 0; channel < MV_SATA_CHANNELS_NUM; channel++) {
1463 MV_SATA_CHANNEL *pMvSataChannel = pMvSataAdapter->sataChannel[channel];
1464 if (pMvSataChannel) {
1465 init_vdev_params(pAdapter, channel);
1466 IdeRegisterVDevice(&pAdapter->VDevices[channel].u.disk);
1469 #ifdef SUPPORT_ARRAY
1470 CheckArrayCritical(_VBUS_P0);
1472 _vbus_p->nInstances = 1;
1473 fRegisterVdevice(pAdapter);
1475 for (channel=0;channel<MV_SATA_CHANNELS_NUM;channel++) {
1476 pVDev = _vbus_p->pVDevice[channel];
1477 if (pVDev && pVDev->vf_online)
1478 fCheckBootable(pVDev);
1481 #if defined(SUPPORT_ARRAY) && defined(_RAID5N_)
1482 init_raid5_memory(_VBUS_P0);
1483 _vbus_(r5).enable_write_back = 1;
1484 printf("RR18xx: RAID5 write-back %s\n", _vbus_(r5).enable_write_back? "enabled" : "disabled");
1487 mvSataUnmaskAdapterInterrupt(pMvSataAdapter);
1492 MvSataResetChannel(MV_SATA_ADAPTER *pMvSataAdapter, MV_U8 channel)
1494 IAL_ADAPTER_T *pAdapter = (IAL_ADAPTER_T *)pMvSataAdapter->IALData;
1496 mvSataDisableChannelDma(pMvSataAdapter, channel);
1497 /* Flush pending commands */
1498 mvSataFlushDmaQueue (pMvSataAdapter, channel, MV_FLUSH_TYPE_CALLBACK);
1500 /* Software reset channel */
1501 if (mvStorageDevATASoftResetDevice(pMvSataAdapter, channel) == MV_FALSE)
1503 MV_ERROR("RR18xx [%d,%d]: failed to perform Software reset\n",
1504 pMvSataAdapter->adapterId, channel);
1505 hptmv_free_channel(pAdapter, channel);
1509 /* Hardware reset channel */
1510 if (mvSataChannelHardReset(pMvSataAdapter, channel)== MV_FALSE)
1512 MV_ERROR("RR18xx [%d,%d] Failed to Hard reser the SATA channel\n",
1513 pMvSataAdapter->adapterId, channel);
1514 hptmv_free_channel(pAdapter, channel);
1518 if (mvSataIsStorageDeviceConnected(pMvSataAdapter, channel) == MV_FALSE)
1520 MV_ERROR("RR18xx [%d,%d] Failed to Connect Device\n",
1521 pMvSataAdapter->adapterId, channel);
1522 hptmv_free_channel(pAdapter, channel);
1526 MV_ERROR("channel %d: perform recalibrate command", channel);
1527 if (!mvStorageDevATAExecuteNonUDMACommand(pMvSataAdapter, channel,
1528 MV_NON_UDMA_PROTOCOL_NON_DATA,
1542 MV_ERROR("channel %d: recalibrate failed", channel);
1544 /* Set transfer mode */
1545 if((mvStorageDevATASetFeatures(pMvSataAdapter, channel,
1546 MV_ATA_SET_FEATURES_TRANSFER,
1547 MV_ATA_TRANSFER_PIO_SLOW, 0, 0, 0) == MV_FALSE) ||
1548 (mvStorageDevATASetFeatures(pMvSataAdapter, channel,
1549 MV_ATA_SET_FEATURES_TRANSFER,
1550 pAdapter->mvChannel[channel].maxPioModeSupported, 0, 0, 0) == MV_FALSE) ||
1551 (mvStorageDevATASetFeatures(pMvSataAdapter, channel,
1552 MV_ATA_SET_FEATURES_TRANSFER,
1553 pAdapter->mvChannel[channel].maxUltraDmaModeSupported, 0, 0, 0) == MV_FALSE) )
1555 MV_ERROR("channel %d: Set Features failed", channel);
1556 hptmv_free_channel(pAdapter, channel);
1560 if (mvSataEnableChannelDma(pMvSataAdapter, channel) == MV_FALSE)
1562 MV_ERROR("Failed to enable DMA, channel=%d", channel);
1563 hptmv_free_channel(pAdapter, channel);
1571 fResetActiveCommands(PVBus _vbus_p)
1573 MV_SATA_ADAPTER *pMvSataAdapter = &((IAL_ADAPTER_T *)_vbus_p->OsExt)->mvSataAdapter;
1575 for (channel=0;channel< MV_SATA_CHANNELS_NUM;channel++) {
1576 if (pMvSataAdapter->sataChannel[channel] && pMvSataAdapter->sataChannel[channel]->outstandingCommands)
1577 MvSataResetChannel(pMvSataAdapter,channel);
1582 void fCompleteAllCommandsSynchronously(PVBus _vbus_p)
1587 MV_SATA_ADAPTER *pMvSataAdapter = &((IAL_ADAPTER_T *)_vbus_p->OsExt)->mvSataAdapter;
1588 MV_SATA_CHANNEL *pMvSataChannel;
1593 CheckPendingCall(_VBUS_P0);
1598 for (channel=0;channel< MV_SATA_CHANNELS_NUM;channel++) {
1599 pMvSataChannel = pMvSataAdapter->sataChannel[channel];
1600 if (pMvSataChannel && pMvSataChannel->outstandingCommands)
1602 while (pMvSataChannel->outstandingCommands) {
1603 if (!mvSataInterruptServiceRoutine(pMvSataAdapter)) {
1605 if (ticks++ > 3000) {
1606 MvSataResetChannel(pMvSataAdapter,channel);
1620 fResetVBus(_VBUS_ARG0)
1622 KdPrint(("fMvResetBus(%p)", _vbus_p));
1624 /* some commands may already finished. */
1625 CheckPendingCall(_VBUS_P0);
1627 fResetActiveCommands(_vbus_p);
1629 * the other pending commands may still be finished successfully.
1631 fCompleteAllCommandsSynchronously(_vbus_p);
1633 /* Now there should be no pending commands. No more action needed. */
1634 CheckIdleCall(_VBUS_P0);
1636 KdPrint(("fMvResetBus() done"));
1639 /*No rescan function*/
1641 fRescanAllDevice(_VBUS_ARG0)
1646 CommandCompletionCB(MV_SATA_ADAPTER *pMvSataAdapter,
1648 MV_COMPLETION_TYPE comp_type,
1649 MV_VOID_PTR commandId,
1650 MV_U16 responseFlags,
1652 MV_STORAGE_DEVICE_REGISTERS *registerStruct)
1654 PCommand pCmd = (PCommand) commandId;
1655 _VBUS_INST(pCmd->pVDevice->pVBus)
1657 if (pCmd->uScratch.sata_param.prdAddr)
1658 FreePRDTable(pMvSataAdapter->IALData,pCmd->uScratch.sata_param.prdAddr);
1662 case MV_COMPLETION_TYPE_NORMAL:
1663 pCmd->Result = RETURN_SUCCESS;
1665 case MV_COMPLETION_TYPE_ABORT:
1666 pCmd->Result = RETURN_BUS_RESET;
1668 case MV_COMPLETION_TYPE_ERROR:
1669 MV_ERROR("IAL: COMPLETION ERROR, adapter %d, channel %d, flags=%x\n",
1670 pMvSataAdapter->adapterId, channelNum, responseFlags);
1672 if (responseFlags & 4) {
1673 MV_ERROR("ATA regs: error %x, sector count %x, LBA low %x, LBA mid %x,"
1674 " LBA high %x, device %x, status %x\n",
1675 registerStruct->errorRegister,
1676 registerStruct->sectorCountRegister,
1677 registerStruct->lbaLowRegister,
1678 registerStruct->lbaMidRegister,
1679 registerStruct->lbaHighRegister,
1680 registerStruct->deviceRegister,
1681 registerStruct->statusRegister);
1683 /*We can't do handleEdmaError directly here, because CommandCompletionCB is called by
1684 * mv's ISR, if we retry the command, than the internel data structure may be destroyed*/
1685 pCmd->uScratch.sata_param.responseFlags = responseFlags;
1686 pCmd->uScratch.sata_param.bIdeStatus = registerStruct->statusRegister;
1687 pCmd->uScratch.sata_param.errorRegister = registerStruct->errorRegister;
1688 pCmd->pVDevice->u.disk.QueueLength--;
1689 CallAfterReturn(_VBUS_P (DPC_PROC)handleEdmaError,pCmd);
1693 MV_ERROR(" Unknown completion type (%d)\n", comp_type);
1697 if (pCmd->uCmd.Ide.Command == IDE_COMMAND_VERIFY && pCmd->uScratch.sata_param.cmd_priv > 1) {
1698 pCmd->uScratch.sata_param.cmd_priv --;
1701 pCmd->pVDevice->u.disk.QueueLength--;
1702 CallAfterReturn(_VBUS_P (DPC_PROC)pCmd->pfnCompletion, pCmd);
1707 fDeviceSendCommand(_VBUS_ARG PCommand pCmd)
1709 MV_SATA_EDMA_PRD_ENTRY *pPRDTable = 0;
1710 MV_SATA_ADAPTER *pMvSataAdapter;
1711 MV_SATA_CHANNEL *pMvSataChannel;
1712 PVDevice pVDevice = pCmd->pVDevice;
1713 PDevice pDevice = &pVDevice->u.disk;
1714 LBA_T Lba = pCmd->uCmd.Ide.Lba;
1715 USHORT nSector = pCmd->uCmd.Ide.nSectors;
1717 MV_QUEUE_COMMAND_RESULT result;
1718 MV_QUEUE_COMMAND_INFO commandInfo;
1719 MV_UDMA_COMMAND_PARAMS *pUdmaParams = &commandInfo.commandParams.udmaCommand;
1720 MV_NONE_UDMA_COMMAND_PARAMS *pNoUdmaParams = &commandInfo.commandParams.NoneUdmaCommand;
1726 DECLARE_BUFFER(FPSCAT_GATH, tmpSg);
1728 if (!pDevice->df_on_line) {
1729 MV_ERROR("Device is offline");
1730 pCmd->Result = RETURN_BAD_DEVICE;
1731 CallAfterReturn(_VBUS_P (DPC_PROC)pCmd->pfnCompletion, pCmd);
1735 pDevice->HeadPosition = pCmd->uCmd.Ide.Lba + pCmd->uCmd.Ide.nSectors;
1736 pMvSataChannel = pDevice->mv;
1737 pMvSataAdapter = pMvSataChannel->mvSataAdapter;
1738 channel = pMvSataChannel->channelNumber;
1740 /* old RAID0 has hidden lba. Remember to clear dDeHiddenLba when delete array! */
1741 Lba += pDevice->dDeHiddenLba;
1743 if (Lba+nSector-1 > pDevice->dDeRealCapacity) {
1744 pCmd->Result = RETURN_INVALID_REQUEST;
1745 CallAfterReturn(_VBUS_P (DPC_PROC)pCmd->pfnCompletion, pCmd);
1750 * always use 48bit LBA if drive supports it.
1751 * Some Seagate drives report error if you use a 28-bit command
1752 * to access sector 0xfffffff.
1754 is48bit = pMvSataChannel->lba48Address;
1756 switch (pCmd->uCmd.Ide.Command)
1758 case IDE_COMMAND_READ:
1759 case IDE_COMMAND_WRITE:
1760 if (pDevice->bDeModeSetting<8) goto pio;
1762 commandInfo.type = MV_QUEUED_COMMAND_TYPE_UDMA;
1763 pUdmaParams->isEXT = is48bit;
1764 pUdmaParams->numOfSectors = nSector;
1765 pUdmaParams->lowLBAAddress = Lba;
1766 pUdmaParams->highLBAAddress = 0;
1767 pUdmaParams->prdHighAddr = 0;
1768 pUdmaParams->callBack = CommandCompletionCB;
1769 pUdmaParams->commandId = (MV_VOID_PTR )pCmd;
1770 if(pCmd->uCmd.Ide.Command == IDE_COMMAND_READ)
1771 pUdmaParams->readWrite = MV_UDMA_TYPE_READ;
1773 pUdmaParams->readWrite = MV_UDMA_TYPE_WRITE;
1775 if (pCmd->pSgTable && pCmd->cf_physical_sg) {
1776 FPSCAT_GATH sg1=tmpSg, sg2=pCmd->pSgTable;
1777 do { *sg1++=*sg2; } while ((sg2++->wSgFlag & SG_FLAG_EOT)==0);
1780 if (!pCmd->pfnBuildSgl || !pCmd->pfnBuildSgl(_VBUS_P pCmd, tmpSg, 0)) {
1782 mvSataDisableChannelDma(pMvSataAdapter, channel);
1783 mvSataFlushDmaQueue(pMvSataAdapter, channel, MV_FLUSH_TYPE_CALLBACK);
1785 if (pCmd->pSgTable && pCmd->cf_physical_sg==0) {
1786 FPSCAT_GATH sg1=tmpSg, sg2=pCmd->pSgTable;
1787 do { *sg1++=*sg2; } while ((sg2++->wSgFlag & SG_FLAG_EOT)==0);
1790 if (!pCmd->pfnBuildSgl || !pCmd->pfnBuildSgl(_VBUS_P pCmd, tmpSg, 1)) {
1791 pCmd->Result = RETURN_NEED_LOGICAL_SG;
1797 ULONG size = tmpSg->wSgSize? tmpSg->wSgSize : 0x10000;
1798 ULONG_PTR addr = tmpSg->dSgAddress;
1800 pCmd->Result = RETURN_INVALID_REQUEST;
1803 if (mvStorageDevATAExecuteNonUDMACommand(pMvSataAdapter, channel,
1804 (pCmd->cf_data_out)?MV_NON_UDMA_PROTOCOL_PIO_DATA_OUT:MV_NON_UDMA_PROTOCOL_PIO_DATA_IN,
1807 size >> 1, /* count */
1808 0, /* features N/A */
1809 (MV_U16)(size>>9), /*sector count*/
1810 (MV_U16)( (is48bit? (MV_U16)((Lba >> 16) & 0xFF00) : 0 ) | (UCHAR)(Lba & 0xFF) ), /*lbalow*/
1811 (MV_U16)((Lba >> 8) & 0xFF), /* lbaMid */
1812 (MV_U16)((Lba >> 16) & 0xFF),/* lbaHigh */
1813 (MV_U8)(0x40 | (is48bit ? 0 : (UCHAR)(Lba >> 24) & 0xFF )),/* device */
1814 (MV_U8)(is48bit ? (pCmd->cf_data_in?IDE_COMMAND_READ_EXT:IDE_COMMAND_WRITE_EXT):pCmd->uCmd.Ide.Command)
1817 pCmd->Result = RETURN_IDE_ERROR;
1821 if(Lba & 0xF0000000) is48bit = MV_TRUE;
1823 while ((tmpSg++->wSgFlag & SG_FLAG_EOT)==0);
1824 pCmd->Result = RETURN_SUCCESS;
1826 mvSataEnableChannelDma(pMvSataAdapter,channel);
1827 CallAfterReturn(_VBUS_P (DPC_PROC)pCmd->pfnCompletion, pCmd);
1832 pPRDTable = (MV_SATA_EDMA_PRD_ENTRY *) AllocatePRDTable(pMvSataAdapter->IALData);
1833 KdPrint(("pPRDTable:%p\n",pPRDTable));
1835 pCmd->Result = RETURN_DEVICE_BUSY;
1836 CallAfterReturn(_VBUS_P (DPC_PROC)pCmd->pfnCompletion, pCmd);
1842 pPRDTable[i].highBaseAddr = (sizeof(tmpSg->dSgAddress)>4 ? (MV_U32)(tmpSg->dSgAddress>>32) : 0);
1843 pPRDTable[i].flags = (MV_U16)tmpSg->wSgFlag;
1844 pPRDTable[i].byteCount = (MV_U16)tmpSg->wSgSize;
1845 pPRDTable[i].lowBaseAddr = (MV_U32)tmpSg->dSgAddress;
1846 pPRDTable[i].reserved = 0;
1848 }while((tmpSg++->wSgFlag & SG_FLAG_EOT)==0);
1850 pUdmaParams->prdLowAddr = (ULONG)fOsPhysicalAddress(pPRDTable);
1851 if ((pUdmaParams->numOfSectors == 256) && (pMvSataChannel->lba48Address == MV_FALSE)) {
1852 pUdmaParams->numOfSectors = 0;
1855 pCmd->uScratch.sata_param.prdAddr = (PVOID)pPRDTable;
1857 result = mvSataQueueCommand(pMvSataAdapter, channel, &commandInfo);
1859 if (result != MV_QUEUE_COMMAND_RESULT_OK)
1864 case MV_QUEUE_COMMAND_RESULT_BAD_LBA_ADDRESS:
1865 MV_ERROR("IAL Error: Edma Queue command failed. Bad LBA "
1866 "LBA[31:0](0x%08x)\n", pUdmaParams->lowLBAAddress);
1867 pCmd->Result = RETURN_IDE_ERROR;
1869 case MV_QUEUE_COMMAND_RESULT_QUEUED_MODE_DISABLED:
1870 MV_ERROR("IAL Error: Edma Queue command failed. EDMA"
1871 " disabled adapter %d channel %d\n",
1872 pMvSataAdapter->adapterId, channel);
1873 mvSataEnableChannelDma(pMvSataAdapter,channel);
1874 pCmd->Result = RETURN_IDE_ERROR;
1876 case MV_QUEUE_COMMAND_RESULT_FULL:
1877 MV_ERROR("IAL Error: Edma Queue command failed. Queue is"
1878 " Full adapter %d channel %d\n",
1879 pMvSataAdapter->adapterId, channel);
1880 pCmd->Result = RETURN_DEVICE_BUSY;
1882 case MV_QUEUE_COMMAND_RESULT_BAD_PARAMS:
1883 MV_ERROR("IAL Error: Edma Queue command failed. (Bad "
1884 "Params), pMvSataAdapter: %p, pSataChannel: %p.\n",
1885 pMvSataAdapter, pMvSataAdapter->sataChannel[channel]);
1886 pCmd->Result = RETURN_IDE_ERROR;
1889 MV_ERROR("IAL Error: Bad result value (%d) from queue"
1890 " command\n", result);
1891 pCmd->Result = RETURN_IDE_ERROR;
1894 FreePRDTable(pMvSataAdapter->IALData,pPRDTable);
1895 CallAfterReturn(_VBUS_P (DPC_PROC)pCmd->pfnCompletion, pCmd);
1897 pDevice->QueueLength++;
1900 case IDE_COMMAND_VERIFY:
1901 commandInfo.type = MV_QUEUED_COMMAND_TYPE_NONE_UDMA;
1902 pNoUdmaParams->bufPtr = NULL;
1903 pNoUdmaParams->callBack = CommandCompletionCB;
1904 pNoUdmaParams->commandId = (MV_VOID_PTR)pCmd;
1905 pNoUdmaParams->count = 0;
1906 pNoUdmaParams->features = 0;
1907 pNoUdmaParams->protocolType = MV_NON_UDMA_PROTOCOL_NON_DATA;
1909 pCmd->uScratch.sata_param.cmd_priv = 1;
1910 if (pMvSataChannel->lba48Address == MV_TRUE){
1911 pNoUdmaParams->command = MV_ATA_COMMAND_READ_VERIFY_SECTORS_EXT;
1912 pNoUdmaParams->isEXT = MV_TRUE;
1913 pNoUdmaParams->lbaHigh = (MV_U16)((Lba & 0xff0000) >> 16);
1914 pNoUdmaParams->lbaMid = (MV_U16)((Lba & 0xff00) >> 8);
1915 pNoUdmaParams->lbaLow =
1916 (MV_U16)(((Lba & 0xff000000) >> 16)| (Lba & 0xff));
1917 pNoUdmaParams->sectorCount = nSector;
1918 pNoUdmaParams->device = 0x40;
1919 result = mvSataQueueCommand(pMvSataAdapter, channel, &commandInfo);
1920 if (result != MV_QUEUE_COMMAND_RESULT_OK){
1926 pNoUdmaParams->command = MV_ATA_COMMAND_READ_VERIFY_SECTORS;
1927 pNoUdmaParams->isEXT = MV_FALSE;
1928 pNoUdmaParams->lbaHigh = (MV_U16)((Lba & 0xff0000) >> 16);
1929 pNoUdmaParams->lbaMid = (MV_U16)((Lba & 0xff00) >> 8);
1930 pNoUdmaParams->lbaLow = (MV_U16)(Lba & 0xff);
1931 pNoUdmaParams->sectorCount = 0xff & nSector;
1932 pNoUdmaParams->device = (MV_U8)(0x40 |
1933 ((Lba & 0xf000000) >> 24));
1934 pNoUdmaParams->callBack = CommandCompletionCB;
1935 result = mvSataQueueCommand(pMvSataAdapter, channel, &commandInfo);
1936 /*FIXME: how about the commands already queued? but marvel also forgets to consider this*/
1937 if (result != MV_QUEUE_COMMAND_RESULT_OK){
1943 pCmd->Result = RETURN_INVALID_REQUEST;
1944 CallAfterReturn(_VBUS_P (DPC_PROC)pCmd->pfnCompletion, pCmd);
1949 /**********************************************************
1951 * Probe the hostadapter.
1953 **********************************************************/
1955 hpt_probe(device_t dev)
1957 if ((pci_get_vendor(dev) == MV_SATA_VENDOR_ID) &&
1958 (pci_get_device(dev) == MV_SATA_DEVICE_ID_5081
1960 || pci_get_device(dev) == MV_SATA_DEVICE_ID_5080
1964 KdPrintI((CONTROLLER_NAME " found\n"));
1965 device_set_desc(dev, CONTROLLER_NAME);
1966 return (BUS_PROBE_DEFAULT);
1972 /***********************************************************
1974 * Auto configuration: attach and init a host adapter.
1976 ***********************************************************/
1978 hpt_attach(device_t dev)
1980 IAL_ADAPTER_T * pAdapter = device_get_softc(dev);
1983 struct cam_devq *devq;
1984 struct cam_sim *hpt_vsim;
1986 device_printf(dev, "%s Version %s \n", DRIVER_NAME, DRIVER_VERSION);
1988 pAdapter->hpt_dev = dev;
1990 rid = init_adapter(pAdapter);
1995 if ((pAdapter->hpt_irq = bus_alloc_resource_any(pAdapter->hpt_dev, SYS_RES_IRQ, &rid, RF_SHAREABLE | RF_ACTIVE)) == NULL)
1997 hpt_printk(("can't allocate interrupt\n"));
2001 if (bus_setup_intr(pAdapter->hpt_dev, pAdapter->hpt_irq,
2002 INTR_TYPE_CAM | INTR_MPSAFE,
2003 NULL, hpt_intr, pAdapter, &pAdapter->hpt_intr))
2005 hpt_printk(("can't set up interrupt\n"));
2006 free(pAdapter, M_DEVBUF);
2011 if((ccb = (union ccb *)malloc(sizeof(*ccb), M_DEVBUF, M_WAITOK)) != (union ccb*)NULL)
2013 bzero(ccb, sizeof(*ccb));
2014 ccb->ccb_h.pinfo.priority = 1;
2015 ccb->ccb_h.pinfo.index = CAM_UNQUEUED_INDEX;
2022 * Create the device queue for our SIM(s).
2024 if((devq = cam_simq_alloc(8/*MAX_QUEUE_COMM*/)) == NULL)
2026 KdPrint(("ENXIO\n"));
2031 * Construct our SIM entry
2033 hpt_vsim = cam_sim_alloc(hpt_action, hpt_poll, __str(PROC_DIR_NAME),
2034 pAdapter, device_get_unit(pAdapter->hpt_dev),
2035 &pAdapter->lock, 1, 8, devq);
2036 if (hpt_vsim == NULL) {
2037 cam_simq_free(devq);
2041 mtx_lock(&pAdapter->lock);
2042 if (xpt_bus_register(hpt_vsim, dev, 0) != CAM_SUCCESS)
2044 cam_sim_free(hpt_vsim, /*free devq*/ TRUE);
2045 mtx_unlock(&pAdapter->lock);
2050 if(xpt_create_path(&pAdapter->path, /*periph */ NULL,
2051 cam_sim_path(hpt_vsim), CAM_TARGET_WILDCARD,
2052 CAM_LUN_WILDCARD) != CAM_REQ_CMP)
2054 xpt_bus_deregister(cam_sim_path(hpt_vsim));
2055 cam_sim_free(hpt_vsim, /*free_devq*/TRUE);
2056 mtx_unlock(&pAdapter->lock);
2060 mtx_unlock(&pAdapter->lock);
2062 xpt_setup_ccb(&(ccb->ccb_h), pAdapter->path, /*priority*/5);
2063 ccb->ccb_h.func_code = XPT_SASYNC_CB;
2064 ccb->csa.event_enable = AC_LOST_DEVICE;
2065 ccb->csa.callback = hpt_async;
2066 ccb->csa.callback_arg = hpt_vsim;
2067 xpt_action((union ccb *)ccb);
2068 free(ccb, M_DEVBUF);
2070 if (device_get_unit(dev) == 0) {
2071 /* Start the work thread. XXX */
2072 launch_worker_thread();
2079 hpt_detach(device_t dev)
2085 /***************************************************************
2086 * The poll function is used to simulate the interrupt when
2087 * the interrupt subsystem is not functioning.
2089 ***************************************************************/
2091 hpt_poll(struct cam_sim *sim)
2093 IAL_ADAPTER_T *pAdapter;
2095 pAdapter = cam_sim_softc(sim);
2097 hpt_intr_locked((void *)cam_sim_softc(sim));
2100 /****************************************************************
2102 * Description: Interrupt handler.
2103 ****************************************************************/
2107 IAL_ADAPTER_T *pAdapter;
2110 mtx_lock(&pAdapter->lock);
2111 hpt_intr_locked(pAdapter);
2112 mtx_unlock(&pAdapter->lock);
2116 hpt_intr_locked(IAL_ADAPTER_T *pAdapter)
2119 mtx_assert(&pAdapter->lock, MA_OWNED);
2120 /* KdPrintI(("----- Entering Isr() -----\n")); */
2121 if (mvSataInterruptServiceRoutine(&pAdapter->mvSataAdapter) == MV_TRUE)
2123 _VBUS_INST(&pAdapter->VBus)
2124 CheckPendingCall(_VBUS_P0);
2127 /* KdPrintI(("----- Leaving Isr() -----\n")); */
2130 /**********************************************************
2131 * Asynchronous Events
2132 *********************************************************/
2133 #if (!defined(UNREFERENCED_PARAMETER))
2134 #define UNREFERENCED_PARAMETER(x) (void)(x)
2138 hpt_async(void * callback_arg, u_int32_t code, struct cam_path * path,
2143 UNREFERENCED_PARAMETER(callback_arg);
2144 UNREFERENCED_PARAMETER(code);
2145 UNREFERENCED_PARAMETER(path);
2146 UNREFERENCED_PARAMETER(arg);
2151 FlushAdapter(IAL_ADAPTER_T *pAdapter)
2155 hpt_printk(("flush all devices\n"));
2157 /* flush all devices */
2158 for (i=0; i<MAX_VDEVICE_PER_VBUS; i++) {
2159 PVDevice pVDev = pAdapter->VBus.pVDevice[i];
2160 if(pVDev) fFlushVDev(pVDev);
2165 hpt_shutdown(device_t dev)
2167 IAL_ADAPTER_T *pAdapter;
2169 pAdapter = device_get_softc(dev);
2171 EVENTHANDLER_DEREGISTER(shutdown_final, pAdapter->eh);
2172 mtx_lock(&pAdapter->lock);
2173 FlushAdapter(pAdapter);
2174 mtx_unlock(&pAdapter->lock);
2175 /* give the flush some time to happen,
2176 *otherwise "shutdown -p now" will make file system corrupted */
2177 DELAY(1000 * 1000 * 5);
2182 Check_Idle_Call(IAL_ADAPTER_T *pAdapter)
2184 _VBUS_INST(&pAdapter->VBus)
2186 if (mWaitingForIdle(_VBUS_P0)) {
2187 CheckIdleCall(_VBUS_P0);
2188 #ifdef SUPPORT_ARRAY
2192 for(i = 0; i < MAX_ARRAY_PER_VBUS; i++){
2193 if ((pArray=ArrayTables(i))->u.array.dArStamp==0)
2195 else if (pArray->u.array.rf_auto_rebuild) {
2196 KdPrint(("auto rebuild.\n"));
2197 pArray->u.array.rf_auto_rebuild = 0;
2198 hpt_queue_dpc((HPT_DPC)hpt_rebuild_data_block, pAdapter, pArray, DUPLICATE);
2204 /* launch the awaiting commands blocked by mWaitingForIdle */
2205 while(pAdapter->pending_Q!= NULL)
2207 _VBUS_INST(&pAdapter->VBus)
2208 union ccb *ccb = (union ccb *)pAdapter->pending_Q->ccb_h.ccb_ccb_ptr;
2209 hpt_free_ccb(&pAdapter->pending_Q, ccb);
2210 CallAfterReturn(_VBUS_P (DPC_PROC)OsSendCommand, ccb);
2215 ccb_done(union ccb *ccb)
2217 PBUS_DMAMAP pmap = (PBUS_DMAMAP)ccb->ccb_adapter;
2218 IAL_ADAPTER_T * pAdapter = pmap->pAdapter;
2219 KdPrintI(("ccb_done: ccb %p status %x\n", ccb, ccb->ccb_h.status));
2224 pAdapter->outstandingCommands--;
2226 if (pAdapter->outstandingCommands == 0)
2228 if(DPC_Request_Nums == 0)
2229 Check_Idle_Call(pAdapter);
2234 /****************************************************************
2236 * Description: Process a queued command from the CAM layer.
2237 * Parameters: sim - Pointer to SIM object
2238 * ccb - Pointer to SCSI command structure.
2239 ****************************************************************/
2242 hpt_action(struct cam_sim *sim, union ccb *ccb)
2244 IAL_ADAPTER_T * pAdapter = (IAL_ADAPTER_T *) cam_sim_softc(sim);
2246 _VBUS_INST(&pAdapter->VBus)
2248 mtx_assert(&pAdapter->lock, MA_OWNED);
2249 CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, ("hpt_action\n"));
2250 KdPrint(("hpt_action(%lx,%lx{%x})\n", (u_long)sim, (u_long)ccb, ccb->ccb_h.func_code));
2252 switch (ccb->ccb_h.func_code)
2254 case XPT_SCSI_IO: /* Execute the requested I/O operation */
2256 /* ccb->ccb_h.path_id is not our bus id - don't check it */
2258 if (ccb->ccb_h.target_lun) {
2259 ccb->ccb_h.status = CAM_LUN_INVALID;
2263 if (ccb->ccb_h.target_id >= MAX_VDEVICE_PER_VBUS ||
2264 pAdapter->VBus.pVDevice[ccb->ccb_h.target_id]==0) {
2265 ccb->ccb_h.status = CAM_TID_INVALID;
2270 if (pAdapter->outstandingCommands==0 && DPC_Request_Nums==0)
2271 Check_Idle_Call(pAdapter);
2273 pmap = dmamap_get(pAdapter);
2275 ccb->ccb_adapter = pmap;
2276 memset((void *)pmap->psg, 0, sizeof(pmap->psg));
2278 if (mWaitingForIdle(_VBUS_P0))
2279 hpt_queue_ccb(&pAdapter->pending_Q, ccb);
2281 OsSendCommand(_VBUS_P ccb);
2283 /* KdPrint(("leave scsiio\n")); */
2288 KdPrint(("reset bus\n"));
2289 fResetVBus(_VBUS_P0);
2293 case XPT_RESET_DEV: /* Bus Device Reset the specified SCSI device */
2294 case XPT_ABORT: /* Abort the specified CCB */
2295 case XPT_TERM_IO: /* Terminate the I/O process */
2297 ccb->ccb_h.status = CAM_REQ_INVALID;
2301 case XPT_GET_TRAN_SETTINGS:
2302 case XPT_SET_TRAN_SETTINGS:
2304 ccb->ccb_h.status = CAM_FUNC_NOTAVAIL;
2308 case XPT_CALC_GEOMETRY:
2309 cam_calc_geometry(&ccb->ccg, 1);
2313 case XPT_PATH_INQ: /* Path routing inquiry */
2315 struct ccb_pathinq *cpi = &ccb->cpi;
2317 cpi->version_num = 1; /* XXX??? */
2318 cpi->hba_inquiry = PI_SDTR_ABLE;
2319 cpi->target_sprt = 0;
2320 /* Not necessary to reset bus */
2321 cpi->hba_misc = PIM_NOBUSRESET;
2322 cpi->hba_eng_cnt = 0;
2324 cpi->max_target = MAX_VDEVICE_PER_VBUS;
2326 cpi->initiator_id = MAX_VDEVICE_PER_VBUS;
2328 cpi->bus_id = cam_sim_bus(sim);
2329 cpi->base_transfer_speed = 3300;
2330 strlcpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN);
2331 strlcpy(cpi->hba_vid, "HPT ", HBA_IDLEN);
2332 strlcpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN);
2333 cpi->unit_number = cam_sim_unit(sim);
2334 cpi->transport = XPORT_SPI;
2335 cpi->transport_version = 2;
2336 cpi->protocol = PROTO_SCSI;
2337 cpi->protocol_version = SCSI_REV_2;
2338 cpi->ccb_h.status = CAM_REQ_CMP;
2344 KdPrint(("invalid cmd\n"));
2345 ccb->ccb_h.status = CAM_REQ_INVALID;
2349 /* KdPrint(("leave hpt_action..............\n")); */
2352 /* shall be called at lock_driver() */
2354 hpt_queue_ccb(union ccb **ccb_Q, union ccb *ccb)
2357 ccb->ccb_h.ccb_ccb_ptr = ccb;
2359 ccb->ccb_h.ccb_ccb_ptr = (*ccb_Q)->ccb_h.ccb_ccb_ptr;
2360 (*ccb_Q)->ccb_h.ccb_ccb_ptr = (char *)ccb;
2366 /* shall be called at lock_driver() */
2368 hpt_free_ccb(union ccb **ccb_Q, union ccb *ccb)
2374 if(ccb->ccb_h.ccb_ccb_ptr == ccb) /*it means SCpnt is the last one in CURRCMDs*/
2377 while(TempCCB->ccb_h.ccb_ccb_ptr != (char *)ccb)
2378 TempCCB = (union ccb *)TempCCB->ccb_h.ccb_ccb_ptr;
2380 TempCCB->ccb_h.ccb_ccb_ptr = ccb->ccb_h.ccb_ccb_ptr;
2387 #ifdef SUPPORT_ARRAY
2388 /***************************************************************************
2389 * Function: hpt_worker_thread
2390 * Description: Do background rebuilding. Execute in kernel thread context.
2392 ***************************************************************************/
2393 static void hpt_worker_thread(void)
2397 mtx_lock(&DpcQueue_Lock);
2398 while (DpcQueue_First!=DpcQueue_Last) {
2400 p = DpcQueue[DpcQueue_First];
2402 DpcQueue_First %= MAX_DPC;
2404 mtx_unlock(&DpcQueue_Lock);
2405 p.dpc(p.pAdapter, p.arg, p.flags);
2407 mtx_lock(&p.pAdapter->lock);
2408 mtx_lock(&DpcQueue_Lock);
2410 /* since we may have prevented Check_Idle_Call, do it here */
2411 if (DPC_Request_Nums==0) {
2412 if (p.pAdapter->outstandingCommands == 0) {
2413 _VBUS_INST(&p.pAdapter->VBus);
2414 Check_Idle_Call(p.pAdapter);
2415 CheckPendingCall(_VBUS_P0);
2418 mtx_unlock(&p.pAdapter->lock);
2419 mtx_unlock(&DpcQueue_Lock);
2422 if (SIGISMEMBER(curproc->p_siglist, SIGSTOP)) {
2423 /* abort rebuilding process. */
2424 IAL_ADAPTER_T *pAdapter;
2429 sx_slock(&hptmv_list_lock);
2430 pAdapter = gIal_Adapter;
2432 while(pAdapter != NULL){
2433 mtx_lock(&pAdapter->lock);
2434 _vbus_p = &pAdapter->VBus;
2436 for (i=0;i<MAX_ARRAY_PER_VBUS;i++)
2438 if ((pArray=ArrayTables(i))->u.array.dArStamp==0)
2440 else if (pArray->u.array.rf_rebuilding ||
2441 pArray->u.array.rf_verifying ||
2442 pArray->u.array.rf_initializing)
2444 pArray->u.array.rf_abort_rebuild = 1;
2447 mtx_unlock(&pAdapter->lock);
2448 pAdapter = pAdapter->next;
2450 sx_sunlock(&hptmv_list_lock);
2452 mtx_lock(&DpcQueue_Lock);
2454 mtx_unlock(&DpcQueue_Lock);
2456 /*Remove this debug option*/
2459 if (SIGISMEMBER(curproc->p_siglist, SIGSTOP))
2460 pause("hptrdy", 2*hz);
2463 kproc_suspend_check(curproc);
2464 pause("-", 2*hz); /* wait for something to do */
2468 static struct proc *hptdaemonproc;
2469 static struct kproc_desc hpt_kp = {
2475 /*Start this thread in the hpt_attach, to prevent kernel from loading it without our controller.*/
2477 launch_worker_thread(void)
2479 IAL_ADAPTER_T *pAdapTemp;
2481 kproc_start(&hpt_kp);
2483 sx_slock(&hptmv_list_lock);
2484 for (pAdapTemp = gIal_Adapter; pAdapTemp; pAdapTemp = pAdapTemp->next) {
2486 _VBUS_INST(&pAdapTemp->VBus)
2490 for(i = 0; i < MAX_ARRAY_PER_VBUS; i++)
2491 if ((pVDev=ArrayTables(i))->u.array.dArStamp==0)
2494 if (pVDev->u.array.rf_need_rebuild && !pVDev->u.array.rf_rebuilding)
2495 hpt_queue_dpc((HPT_DPC)hpt_rebuild_data_block, pAdapTemp, pVDev,
2496 (UCHAR)((pVDev->u.array.CriticalMembers || pVDev->VDeviceType == VD_RAID_1)? DUPLICATE : REBUILD_PARITY));
2499 sx_sunlock(&hptmv_list_lock);
2502 * hpt_worker_thread needs to be suspended after shutdown sync, when fs sync finished.
2504 EVENTHANDLER_REGISTER(shutdown_post_sync, kproc_shutdown, hptdaemonproc,
2508 *SYSINIT(hptwt, SI_SUB_KTHREAD_IDLE, SI_ORDER_FIRST, launch_worker_thread, NULL);
2513 /********************************************************************************/
2515 int HPTLIBAPI fOsBuildSgl(_VBUS_ARG PCommand pCmd, FPSCAT_GATH pSg, int logical)
2517 union ccb *ccb = (union ccb *)pCmd->pOrgCommand;
2520 pSg->dSgAddress = (ULONG_PTR)(UCHAR *)ccb->csio.data_ptr;
2521 pSg->wSgSize = ccb->csio.dxfer_len;
2522 pSg->wSgFlag = SG_FLAG_EOT;
2525 /* since we have provided physical sg, nobody will ask us to build physical sg */
2530 /*******************************************************************************/
2535 * the system variable, ticks, can't be used since it hasn't yet been active
2536 * when our driver starts (ticks==0, it's a invalid stamp value)
2539 do { stamp = random(); } while (stamp==0);
2545 SetInquiryData(PINQUIRYDATA inquiryData, PVDevice pVDev)
2548 IDENTIFY_DATA2 *pIdentify = (IDENTIFY_DATA2*)pVDev->u.disk.mv->identifyDevice;
2550 inquiryData->DeviceType = T_DIRECT; /*DIRECT_ACCESS_DEVICE*/
2551 inquiryData->AdditionalLength = (UCHAR)(sizeof(INQUIRYDATA) - 5);
2553 inquiryData->CommandQueue = 1;
2556 switch(pVDev->VDeviceType) {
2557 case VD_SINGLE_DISK:
2560 /* Set the removable bit, if applicable. */
2561 if ((pVDev->u.disk.df_removable_drive) || (pIdentify->GeneralConfiguration & 0x80))
2562 inquiryData->RemovableMedia = 1;
2564 /* Fill in vendor identification fields. */
2565 for (i = 0; i < 20; i += 2) {
2566 inquiryData->VendorId[i] = ((PUCHAR)pIdentify->ModelNumber)[i + 1];
2567 inquiryData->VendorId[i+1] = ((PUCHAR)pIdentify->ModelNumber)[i];
2571 /* Initialize unused portion of product id. */
2572 for (i = 0; i < 4; i++) inquiryData->ProductId[12+i] = ' ';
2574 /* firmware revision */
2575 for (i = 0; i < 4; i += 2)
2577 inquiryData->ProductRevisionLevel[i] = ((PUCHAR)pIdentify->FirmwareRevision)[i+1];
2578 inquiryData->ProductRevisionLevel[i+1] = ((PUCHAR)pIdentify->FirmwareRevision)[i];
2582 memcpy(&inquiryData->VendorId, "RR18xx ", 8);
2583 #ifdef SUPPORT_ARRAY
2584 switch(pVDev->VDeviceType){
2586 if ((pVDev->u.array.pMember[0] && mIsArray(pVDev->u.array.pMember[0])) ||
2587 (pVDev->u.array.pMember[1] && mIsArray(pVDev->u.array.pMember[1])))
2588 memcpy(&inquiryData->ProductId, "RAID 1/0 Array ", 16);
2590 memcpy(&inquiryData->ProductId, "RAID 0 Array ", 16);
2593 if ((pVDev->u.array.pMember[0] && mIsArray(pVDev->u.array.pMember[0])) ||
2594 (pVDev->u.array.pMember[1] && mIsArray(pVDev->u.array.pMember[1])))
2595 memcpy(&inquiryData->ProductId, "RAID 0/1 Array ", 16);
2597 memcpy(&inquiryData->ProductId, "RAID 1 Array ", 16);
2600 memcpy(&inquiryData->ProductId, "RAID 5 Array ", 16);
2603 memcpy(&inquiryData->ProductId, "JBOD Array ", 16);
2607 memcpy(&inquiryData->ProductRevisionLevel, "3.00", 4);
2613 hpt_timeout(void *arg)
2615 PBUS_DMAMAP pmap = (PBUS_DMAMAP)((union ccb *)arg)->ccb_adapter;
2616 IAL_ADAPTER_T *pAdapter = pmap->pAdapter;
2617 _VBUS_INST(&pAdapter->VBus)
2619 mtx_assert(&pAdapter->lock, MA_OWNED);
2620 fResetVBus(_VBUS_P0);
2624 hpt_io_dmamap_callback(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
2626 PCommand pCmd = (PCommand)arg;
2627 union ccb *ccb = pCmd->pOrgCommand;
2628 struct ccb_hdr *ccb_h = &ccb->ccb_h;
2629 PBUS_DMAMAP pmap = (PBUS_DMAMAP) ccb->ccb_adapter;
2630 IAL_ADAPTER_T *pAdapter = pmap->pAdapter;
2631 PVDevice pVDev = pAdapter->VBus.pVDevice[ccb_h->target_id];
2632 FPSCAT_GATH psg = pCmd->pSgTable;
2634 _VBUS_INST(pVDev->pVBus)
2636 HPT_ASSERT(pCmd->cf_physical_sg);
2639 panic("busdma error");
2641 HPT_ASSERT(nsegs<= MAX_SG_DESCRIPTORS);
2644 for (idx = 0; idx < nsegs; idx++, psg++) {
2645 psg->dSgAddress = (ULONG_PTR)(UCHAR *)segs[idx].ds_addr;
2646 psg->wSgSize = segs[idx].ds_len;
2647 psg->wSgFlag = (idx == nsegs-1)? SG_FLAG_EOT: 0;
2648 /* KdPrint(("psg[%d]:add=%p,size=%x,flag=%x\n", idx, psg->dSgAddress,psg->wSgSize,psg->wSgFlag)); */
2650 /* psg[-1].wSgFlag = SG_FLAG_EOT; */
2652 if (pCmd->cf_data_in) {
2653 bus_dmamap_sync(pAdapter->io_dma_parent, pmap->dma_map,
2654 BUS_DMASYNC_PREREAD);
2656 else if (pCmd->cf_data_out) {
2657 bus_dmamap_sync(pAdapter->io_dma_parent, pmap->dma_map,
2658 BUS_DMASYNC_PREWRITE);
2662 callout_reset(&pmap->timeout, 20 * hz, hpt_timeout, ccb);
2663 pVDev->pfnSendCommand(_VBUS_P pCmd);
2664 CheckPendingCall(_VBUS_P0);
2669 static void HPTLIBAPI
2670 OsSendCommand(_VBUS_ARG union ccb *ccb)
2672 PBUS_DMAMAP pmap = (PBUS_DMAMAP)ccb->ccb_adapter;
2673 IAL_ADAPTER_T *pAdapter = pmap->pAdapter;
2674 struct ccb_hdr *ccb_h = &ccb->ccb_h;
2675 struct ccb_scsiio *csio = &ccb->csio;
2676 PVDevice pVDev = pAdapter->VBus.pVDevice[ccb_h->target_id];
2678 KdPrintI(("OsSendCommand: ccb %p cdb %x-%x-%x\n",
2680 *(ULONG *)&ccb->csio.cdb_io.cdb_bytes[0],
2681 *(ULONG *)&ccb->csio.cdb_io.cdb_bytes[4],
2682 *(ULONG *)&ccb->csio.cdb_io.cdb_bytes[8]
2685 pAdapter->outstandingCommands++;
2687 if (pVDev == NULL || pVDev->vf_online == 0) {
2688 ccb->ccb_h.status = CAM_REQ_INVALID;
2690 goto Command_Complished;
2693 switch(ccb->csio.cdb_io.cdb_bytes[0])
2695 case TEST_UNIT_READY:
2696 case START_STOP_UNIT:
2697 case SYNCHRONIZE_CACHE:
2699 ccb->ccb_h.status = CAM_REQ_CMP;
2703 ZeroMemory(ccb->csio.data_ptr, ccb->csio.dxfer_len);
2704 SetInquiryData((PINQUIRYDATA)ccb->csio.data_ptr, pVDev);
2705 ccb_h->status = CAM_REQ_CMP;
2710 UCHAR *rbuf=csio->data_ptr;
2713 if (pVDev->VDeviceCapacity > 0xfffffffful) {
2716 cap = pVDev->VDeviceCapacity - 1;
2719 rbuf[0] = (UCHAR)(cap>>24);
2720 rbuf[1] = (UCHAR)(cap>>16);
2721 rbuf[2] = (UCHAR)(cap>>8);
2722 rbuf[3] = (UCHAR)cap;
2723 /* Claim 512 byte blocks (big-endian). */
2729 ccb_h->status = CAM_REQ_CMP;
2733 case 0x9e: /*SERVICE_ACTION_IN*/
2735 UCHAR *rbuf = csio->data_ptr;
2736 LBA_T cap = pVDev->VDeviceCapacity - 1;
2738 rbuf[0] = (UCHAR)(cap>>56);
2739 rbuf[1] = (UCHAR)(cap>>48);
2740 rbuf[2] = (UCHAR)(cap>>40);
2741 rbuf[3] = (UCHAR)(cap>>32);
2742 rbuf[4] = (UCHAR)(cap>>24);
2743 rbuf[5] = (UCHAR)(cap>>16);
2744 rbuf[6] = (UCHAR)(cap>>8);
2745 rbuf[7] = (UCHAR)cap;
2751 ccb_h->status = CAM_REQ_CMP;
2759 case 0x88: /* READ_16 */
2760 case 0x8a: /* WRITE_16 */
2766 _VBUS_INST(pVDev->pVBus)
2767 PCommand pCmd = AllocateCommand(_VBUS_P0);
2771 CdbLength = csio->cdb_len;
2772 if ((ccb->ccb_h.flags & CAM_CDB_POINTER) != 0)
2774 if ((ccb->ccb_h.flags & CAM_CDB_PHYS) == 0)
2776 bcopy(csio->cdb_io.cdb_ptr, Cdb, CdbLength);
2780 KdPrintE(("ERROR!!!\n"));
2781 ccb->ccb_h.status = CAM_REQ_INVALID;
2787 bcopy(csio->cdb_io.cdb_bytes, Cdb, CdbLength);
2790 pCmd->pOrgCommand = ccb;
2791 pCmd->pVDevice = pVDev;
2792 pCmd->pfnCompletion = fOsCommandDone;
2793 pCmd->pfnBuildSgl = fOsBuildSgl;
2794 pCmd->pSgTable = pmap->psg;
2801 pCmd->uCmd.Ide.Lba = ((ULONG)Cdb[1] << 16) | ((ULONG)Cdb[2] << 8) | (ULONG)Cdb[3];
2802 pCmd->uCmd.Ide.nSectors = (USHORT) Cdb[4];
2805 case 0x88: /* READ_16 */
2806 case 0x8a: /* WRITE_16 */
2807 pCmd->uCmd.Ide.Lba =
2808 (HPT_U64)Cdb[2] << 56 |
2809 (HPT_U64)Cdb[3] << 48 |
2810 (HPT_U64)Cdb[4] << 40 |
2811 (HPT_U64)Cdb[5] << 32 |
2812 (HPT_U64)Cdb[6] << 24 |
2813 (HPT_U64)Cdb[7] << 16 |
2814 (HPT_U64)Cdb[8] << 8 |
2816 pCmd->uCmd.Ide.nSectors = (USHORT)Cdb[12] << 8 | (USHORT)Cdb[13];
2820 pCmd->uCmd.Ide.Lba = (ULONG)Cdb[5] | ((ULONG)Cdb[4] << 8) | ((ULONG)Cdb[3] << 16) | ((ULONG)Cdb[2] << 24);
2821 pCmd->uCmd.Ide.nSectors = (USHORT) Cdb[8] | ((USHORT)Cdb[7]<<8);
2829 case 0x88: /* READ_16 */
2830 pCmd->uCmd.Ide.Command = IDE_COMMAND_READ;
2831 pCmd->cf_data_in = 1;
2836 case 0x8a: /* WRITE_16 */
2837 pCmd->uCmd.Ide.Command = IDE_COMMAND_WRITE;
2838 pCmd->cf_data_out = 1;
2842 pCmd->uCmd.Ide.Command = IDE_COMMAND_VERIFY;
2845 /*///////////////////////// */
2846 pCmd->cf_physical_sg = 1;
2847 error = bus_dmamap_load_ccb(pAdapter->io_dma_parent,
2850 hpt_io_dmamap_callback,
2851 pCmd, BUS_DMA_WAITOK
2853 KdPrint(("bus_dmamap_load return %d\n", error));
2854 if (error && error!=EINPROGRESS) {
2855 hpt_printk(("bus_dmamap_load error %d\n", error));
2856 FreeCommand(_VBUS_P pCmd);
2857 ccb->ccb_h.status = CAM_REQ_CMP_ERR;
2859 pAdapter->outstandingCommands--;
2860 if (pAdapter->outstandingCommands == 0)
2864 goto Command_Complished;
2868 ccb->ccb_h.status = CAM_REQ_INVALID;
2873 CheckPendingCall(_VBUS_P0);
2877 static void HPTLIBAPI
2878 fOsCommandDone(_VBUS_ARG PCommand pCmd)
2880 union ccb *ccb = pCmd->pOrgCommand;
2881 PBUS_DMAMAP pmap = (PBUS_DMAMAP)ccb->ccb_adapter;
2882 IAL_ADAPTER_T *pAdapter = pmap->pAdapter;
2884 KdPrint(("fOsCommandDone(pcmd=%p, result=%d)\n", pCmd, pCmd->Result));
2886 callout_stop(&pmap->timeout);
2888 switch(pCmd->Result) {
2889 case RETURN_SUCCESS:
2890 ccb->ccb_h.status = CAM_REQ_CMP;
2892 case RETURN_BAD_DEVICE:
2893 ccb->ccb_h.status = CAM_DEV_NOT_THERE;
2895 case RETURN_DEVICE_BUSY:
2896 ccb->ccb_h.status = CAM_BUSY;
2898 case RETURN_INVALID_REQUEST:
2899 ccb->ccb_h.status = CAM_REQ_INVALID;
2901 case RETURN_SELECTION_TIMEOUT:
2902 ccb->ccb_h.status = CAM_SEL_TIMEOUT;
2905 ccb->ccb_h.status = CAM_BUSY;
2908 ccb->ccb_h.status = CAM_SCSI_STATUS_ERROR;
2912 if (pCmd->cf_data_in) {
2913 bus_dmamap_sync(pAdapter->io_dma_parent, pmap->dma_map, BUS_DMASYNC_POSTREAD);
2915 else if (pCmd->cf_data_out) {
2916 bus_dmamap_sync(pAdapter->io_dma_parent, pmap->dma_map, BUS_DMASYNC_POSTWRITE);
2919 bus_dmamap_unload(pAdapter->io_dma_parent, pmap->dma_map);
2921 FreeCommand(_VBUS_P pCmd);
2926 hpt_queue_dpc(HPT_DPC dpc, IAL_ADAPTER_T * pAdapter, void *arg, UCHAR flags)
2930 mtx_lock(&DpcQueue_Lock);
2931 p = (DpcQueue_Last + 1) % MAX_DPC;
2932 if (p==DpcQueue_First) {
2933 KdPrint(("DPC Queue full!\n"));
2934 mtx_unlock(&DpcQueue_Lock);
2938 DpcQueue[DpcQueue_Last].dpc = dpc;
2939 DpcQueue[DpcQueue_Last].pAdapter = pAdapter;
2940 DpcQueue[DpcQueue_Last].arg = arg;
2941 DpcQueue[DpcQueue_Last].flags = flags;
2943 mtx_unlock(&DpcQueue_Lock);
2950 * Allocate memory above 16M, otherwise we may eat all low memory for ISA devices.
2951 * How about the memory for 5081 request/response array and PRD table?
2954 *os_alloc_page(_VBUS_ARG0)
2956 return (void *)contigmalloc(0x1000, M_DEVBUF, M_NOWAIT, 0x1000000, 0xffffffff, PAGE_SIZE, 0ul);
2960 *os_alloc_dma_page(_VBUS_ARG0)
2962 return (void *)contigmalloc(0x1000, M_DEVBUF, M_NOWAIT, 0x1000000, 0xffffffff, PAGE_SIZE, 0ul);
2966 os_free_page(_VBUS_ARG void *p)
2968 contigfree(p, 0x1000, M_DEVBUF);
2972 os_free_dma_page(_VBUS_ARG void *p)
2974 contigfree(p, 0x1000, M_DEVBUF);
2978 DoXor1(ULONG *p0, ULONG *p1, ULONG *p2, UINT nBytes)
2981 for (i = 0; i < nBytes / 4; i++) *p0++ = *p1++ ^ *p2++;
2985 DoXor2(ULONG *p0, ULONG *p2, UINT nBytes)
2988 for (i = 0; i < nBytes / 4; i++) *p0++ ^= *p2++;