sys/dev/hptmv/mvSata.h

   1 /*
   2  * Copyright (c) 2004-2005 MARVELL SEMICONDUCTOR ISRAEL, LTD.
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions
   7  * are met:
   8  * 1. Redistributions of source code must retain the above copyright
   9  *    notice, this list of conditions and the following disclaimer.
  10  * 2. Redistributions in binary form must reproduce the above copyright
  11  *    notice, this list of conditions and the following disclaimer in the
  12  *    documentation and/or other materials provided with the distribution.
  13  *
  14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  24  * SUCH DAMAGE.
  25  *
  26  * $FreeBSD$
  27  */
  28 #ifndef __INCmvSatah
  29 #define __INCmvSatah
  30
  31 #ifndef SUPPORT_MV_SATA_GEN_1
  32 #define SUPPORT_MV_SATA_GEN_1 1
  33 #endif
  34
  35 #ifndef SUPPORT_MV_SATA_GEN_2
  36 #define SUPPORT_MV_SATA_GEN_2 0
  37 #endif
  38
  39 #if SUPPORT_MV_SATA_GEN_1==1 && SUPPORT_MV_SATA_GEN_2==1
  40 #define MV_SATA_GEN_1(x) ((x)->sataAdapterGeneration==1)
  41 #define MV_SATA_GEN_2(x) ((x)->sataAdapterGeneration==2)
  42 #elif SUPPORT_MV_SATA_GEN_1==1
  43 #define MV_SATA_GEN_1(x) 1
  44 #define MV_SATA_GEN_2(x) 0
  45 #elif SUPPORT_MV_SATA_GEN_2==1
  46 #define MV_SATA_GEN_1(x) 0
  47 #define MV_SATA_GEN_2(x) 1
  48 #else
  49 #error "Which IC do you support?"
  50 #endif
  51
  52 /* Definitions */
  53 /* MV88SX50XX specific defines */
  54 #define MV_SATA_VENDOR_ID                                               0x11AB
  55 #define MV_SATA_DEVICE_ID_5080                                  0x5080
  56 #define MV_SATA_DEVICE_ID_5081                                  0x5081
  57 #define MV_SATA_DEVICE_ID_6080                                  0x6080
  58 #define MV_SATA_DEVICE_ID_6081                                  0x6081
  59 #define MV_SATA_CHANNELS_NUM                                    8
  60 #define MV_SATA_UNITS_NUM                                               2
  61 #define MV_SATA_PCI_BAR0_SPACE_SIZE                             (1<<18) /* 256 Kb*/
  62
  63 #define CHANNEL_QUEUE_LENGTH                                    32
  64 #define CHANNEL_QUEUE_MASK                                          0x1F
  65
  66 #define MV_EDMA_QUEUE_LENGTH                                    32      /* Up to 32 outstanding  */
  67                                                                                 /* commands per SATA channel*/
  68 #define MV_EDMA_QUEUE_MASK                      0x1F
  69 #define MV_EDMA_REQUEST_QUEUE_SIZE                              1024 /* 32*32 = 1KBytes */
  70 #define MV_EDMA_RESPONSE_QUEUE_SIZE                             256  /* 32*8 = 256 Bytes */
  71
  72 #define MV_EDMA_REQUEST_ENTRY_SIZE                              32
  73 #define MV_EDMA_RESPONSE_ENTRY_SIZE                             8
  74
  75 #define MV_EDMA_PRD_ENTRY_SIZE                                  16              /* 16Bytes*/
  76 #define MV_EDMA_PRD_NO_SNOOP_FLAG                               0x00000001 /* MV_BIT0 */
  77 #define MV_EDMA_PRD_EOT_FLAG                                    0x00008000 /* MV_BIT15 */
  78
  79 #define MV_ATA_IDENTIFY_DEV_DATA_LENGTH                 256     /* number of words(2 byte)*/
  80 #define MV_ATA_MODEL_NUMBER_LEN                                 40
  81 #define ATA_SECTOR_SIZE                                                 512
  82 /* Log messages level defines */
  83 #define MV_DEBUG                                                                0x1
  84 #define MV_DEBUG_INIT                                                   0x2
  85 #define MV_DEBUG_INTERRUPTS                                             0x4
  86 #define MV_DEBUG_SATA_LINK                                              0x8
  87 #define MV_DEBUG_UDMA_COMMAND                                   0x10
  88 #define MV_DEBUG_NON_UDMA_COMMAND                               0x20
  89 #define MV_DEBUG_ERROR                                                  0x40
  90
  91
  92 /* Typedefs    */
  93 typedef enum mvUdmaType
  94 {
  95         MV_UDMA_TYPE_READ, MV_UDMA_TYPE_WRITE
  96 } MV_UDMA_TYPE;
  97
  98 typedef enum mvFlushType
  99 {
 100         MV_FLUSH_TYPE_CALLBACK, MV_FLUSH_TYPE_NONE
 101 } MV_FLUSH_TYPE;
 102
 103 typedef enum mvCompletionType
 104 {
 105         MV_COMPLETION_TYPE_NORMAL, MV_COMPLETION_TYPE_ERROR,
 106         MV_COMPLETION_TYPE_ABORT
 107 } MV_COMPLETION_TYPE;
 108
 109 typedef enum mvEventType
 110 {
 111         MV_EVENT_TYPE_ADAPTER_ERROR, MV_EVENT_TYPE_SATA_CABLE
 112 } MV_EVENT_TYPE;
 113
 114 typedef enum mvEdmaMode
 115 {
 116         MV_EDMA_MODE_QUEUED,
 117         MV_EDMA_MODE_NOT_QUEUED,
 118         MV_EDMA_MODE_NATIVE_QUEUING
 119 } MV_EDMA_MODE;
 120
 121 typedef enum mvEdmaQueueResult
 122 {
 123         MV_EDMA_QUEUE_RESULT_OK = 0,
 124         MV_EDMA_QUEUE_RESULT_EDMA_DISABLED,
 125         MV_EDMA_QUEUE_RESULT_FULL,
 126         MV_EDMA_QUEUE_RESULT_BAD_LBA_ADDRESS,
 127         MV_EDMA_QUEUE_RESULT_BAD_PARAMS
 128 } MV_EDMA_QUEUE_RESULT;
 129
 130 typedef enum mvQueueCommandResult
 131 {
 132         MV_QUEUE_COMMAND_RESULT_OK = 0,
 133         MV_QUEUE_COMMAND_RESULT_QUEUED_MODE_DISABLED,
 134         MV_QUEUE_COMMAND_RESULT_FULL,
 135         MV_QUEUE_COMMAND_RESULT_BAD_LBA_ADDRESS,
 136         MV_QUEUE_COMMAND_RESULT_BAD_PARAMS
 137 } MV_QUEUE_COMMAND_RESULT;
 138
 139 typedef enum mvNonUdmaProtocol
 140 {
 141     MV_NON_UDMA_PROTOCOL_NON_DATA,
 142     MV_NON_UDMA_PROTOCOL_PIO_DATA_IN,
 143     MV_NON_UDMA_PROTOCOL_PIO_DATA_OUT
 144 } MV_NON_UDMA_PROTOCOL;
 145
 146
 147 struct mvDmaRequestQueueEntry;
 148 struct mvDmaResponseQueueEntry;
 149 struct mvDmaCommandEntry;
 150
 151 struct mvSataAdapter;
 152 struct mvStorageDevRegisters;
 153
 154 typedef MV_BOOLEAN (* HPTLIBAPI mvSataCommandCompletionCallBack_t)(struct mvSataAdapter *,
 155                                                                                                                  MV_U8,
 156                                                          MV_COMPLETION_TYPE,
 157                                                                                                                  MV_VOID_PTR, MV_U16,
 158                                                                                                                  MV_U32,
 159                                                                                             struct mvStorageDevRegisters FAR*);
 160
 161 typedef enum mvQueuedCommandType
 162 {
 163         MV_QUEUED_COMMAND_TYPE_UDMA,
 164         MV_QUEUED_COMMAND_TYPE_NONE_UDMA
 165 } MV_QUEUED_COMMAND_TYPE;
 166
 167 typedef struct mvUdmaCommandParams
 168 {
 169         MV_UDMA_TYPE readWrite;
 170         MV_BOOLEAN   isEXT;
 171         MV_U32       lowLBAAddress;
 172         MV_U16       highLBAAddress;
 173         MV_U16       numOfSectors;
 174         MV_U32       prdLowAddr;
 175         MV_U32       prdHighAddr;
 176         mvSataCommandCompletionCallBack_t callBack;
 177         MV_VOID_PTR  commandId;
 178 } MV_UDMA_COMMAND_PARAMS;
 179
 180 typedef struct mvNoneUdmaCommandParams
 181 {
 182         MV_NON_UDMA_PROTOCOL protocolType;
 183         MV_BOOLEAN  isEXT;
 184         MV_U16_PTR      bufPtr;
 185         MV_U32          count;
 186         MV_U16          features;
 187         MV_U16          sectorCount;
 188         MV_U16          lbaLow;
 189         MV_U16          lbaMid;
 190         MV_U16          lbaHigh;
 191         MV_U8           device;
 192         MV_U8           command;
 193     mvSataCommandCompletionCallBack_t callBack;
 194         MV_VOID_PTR  commandId;
 195 } MV_NONE_UDMA_COMMAND_PARAMS;
 196
 197 typedef struct mvQueueCommandInfo
 198 {
 199         MV_QUEUED_COMMAND_TYPE  type;
 200         union
 201         {
 202                 MV_UDMA_COMMAND_PARAMS          udmaCommand;
 203                 MV_NONE_UDMA_COMMAND_PARAMS     NoneUdmaCommand;
 204     } commandParams;
 205 } MV_QUEUE_COMMAND_INFO;
 206
 207 /* The following structure is for the Core Driver internal usage */
 208 typedef struct mvQueuedCommandEntry
 209 {
 210     MV_BOOLEAN   isFreeEntry;
 211     MV_U8        commandTag;
 212         struct mvQueuedCommandEntry     *next;
 213         struct mvQueuedCommandEntry     *prev;
 214         MV_QUEUE_COMMAND_INFO   commandInfo;
 215 } MV_QUEUED_COMMAND_ENTRY;
 216
 217 /* The following structures are part of the Core Driver API */
 218 typedef struct mvSataChannel
 219 {
 220         /* Fields set by Intermediate Application Layer */
 221         MV_U8                       channelNumber;
 222         MV_BOOLEAN                  waitingForInterrupt;
 223         MV_BOOLEAN                  lba48Address;
 224         MV_BOOLEAN                  maxReadTransfer;
 225         struct mvDmaRequestQueueEntry FAR *requestQueue;
 226         struct mvDmaResponseQueueEntry FAR *responseQueue;
 227         MV_U32                      requestQueuePciHiAddress;
 228         MV_U32                      requestQueuePciLowAddress;
 229         MV_U32                      responseQueuePciHiAddress;
 230         MV_U32                      responseQueuePciLowAddress;
 231         /* Fields set by CORE driver */
 232         struct mvSataAdapter        *mvSataAdapter;
 233         MV_OS_SEMAPHORE             semaphore;
 234         MV_U32                      eDmaRegsOffset;
 235         MV_U16                      identifyDevice[MV_ATA_IDENTIFY_DEV_DATA_LENGTH];
 236         MV_BOOLEAN                  EdmaActive;
 237         MV_EDMA_MODE                queuedDMA;
 238         MV_U8                       outstandingCommands;
 239         MV_BOOLEAN                                      workAroundDone;
 240         struct mvQueuedCommandEntry     commandsQueue[CHANNEL_QUEUE_LENGTH];
 241         struct mvQueuedCommandEntry     *commandsQueueHead;
 242         struct mvQueuedCommandEntry     *commandsQueueTail;
 243         MV_BOOLEAN                                      queueCommandsEnabled;
 244         MV_U8                       noneUdmaOutstandingCommands;
 245         MV_U8                       EdmaQueuedCommands;
 246     MV_U32                      freeIDsStack[MV_EDMA_QUEUE_LENGTH];
 247         MV_U32                      freeIDsNum;
 248         MV_U32                      reqInPtr;
 249         MV_U32                      rspOutPtr;
 250 } MV_SATA_CHANNEL;
 251
 252 typedef struct mvSataAdapter
 253 {
 254         /* Fields set by Intermediate Application Layer */
 255         MV_U32            adapterId;
 256         MV_U8             pcbVersion;
 257     MV_U8             pciConfigRevisionId;
 258     MV_U16            pciConfigDeviceId;
 259         MV_VOID_PTR               IALData;
 260         MV_BUS_ADDR_T     adapterIoBaseAddress;
 261         MV_U32            intCoalThre[MV_SATA_UNITS_NUM];
 262         MV_U32            intTimeThre[MV_SATA_UNITS_NUM];
 263         MV_BOOLEAN        (* HPTLIBAPI mvSataEventNotify)(struct mvSataAdapter *,
 264                                                                                    MV_EVENT_TYPE,
 265                                                                                    MV_U32, MV_U32);
 266         MV_SATA_CHANNEL   *sataChannel[MV_SATA_CHANNELS_NUM];
 267         MV_U32            pciCommand;
 268         MV_U32            pciSerrMask;
 269         MV_U32            pciInterruptMask;
 270
 271         /* Fields set by CORE driver */
 272         MV_OS_SEMAPHORE   semaphore;
 273         MV_U32                    mainMask;
 274         MV_OS_SEMAPHORE   interruptsMaskSem;
 275     MV_BOOLEAN        implementA0Workarounds;
 276     MV_BOOLEAN        implement50XXB0Workarounds;
 277         MV_BOOLEAN        implement50XXB1Workarounds;
 278         MV_BOOLEAN        implement50XXB2Workarounds;
 279         MV_BOOLEAN        implement60X1A0Workarounds;
 280         MV_BOOLEAN        implement60X1A1Workarounds;
 281         MV_BOOLEAN        implement60X1B0Workarounds;
 282         MV_U8                     sataAdapterGeneration;
 283         MV_U8             failLEDMask;
 284     MV_U8                         signalAmps[MV_SATA_CHANNELS_NUM];
 285         MV_U8                     pre[MV_SATA_CHANNELS_NUM];
 286     MV_BOOLEAN        staggaredSpinup[MV_SATA_CHANNELS_NUM]; /* For 60x1 only */
 287 } MV_SATA_ADAPTER;
 288
 289 typedef struct mvSataAdapterStatus
 290 {
 291         /* Fields set by CORE driver */
 292         MV_BOOLEAN              channelConnected[MV_SATA_CHANNELS_NUM];
 293         MV_U32                  pciDLLStatusAndControlRegister;
 294         MV_U32                  pciCommandRegister;
 295         MV_U32                  pciModeRegister;
 296         MV_U32                  pciSERRMaskRegister;
 297         MV_U32                  intCoalThre[MV_SATA_UNITS_NUM];
 298         MV_U32                  intTimeThre[MV_SATA_UNITS_NUM];
 299         MV_U32                  R00StatusBridgePortRegister[MV_SATA_CHANNELS_NUM];
 300 }MV_SATA_ADAPTER_STATUS;
 301
 302
 303 typedef struct mvSataChannelStatus
 304 {
 305         /* Fields set by CORE driver */
 306         MV_BOOLEAN              isConnected;
 307         MV_U8                   modelNumber[MV_ATA_MODEL_NUMBER_LEN];
 308         MV_BOOLEAN              DMAEnabled;
 309         MV_EDMA_MODE    queuedDMA;
 310         MV_U8                   outstandingCommands;
 311         MV_U32                  EdmaConfigurationRegister;
 312         MV_U32                  EdmaRequestQueueBaseAddressHighRegister;
 313         MV_U32                  EdmaRequestQueueInPointerRegister;
 314         MV_U32                  EdmaRequestQueueOutPointerRegister;
 315         MV_U32                  EdmaResponseQueueBaseAddressHighRegister;
 316         MV_U32                  EdmaResponseQueueInPointerRegister;
 317         MV_U32                  EdmaResponseQueueOutPointerRegister;
 318         MV_U32                  EdmaCommandRegister;
 319         MV_U32                  PHYModeRegister;
 320 }MV_SATA_CHANNEL_STATUS;
 321
 322 /* this structure used by the IAL defines the PRD entries used by the EDMA HW */
 323 typedef struct mvSataEdmaPRDEntry
 324 {
 325         volatile MV_U32 lowBaseAddr;
 326         volatile MV_U16 byteCount;
 327         volatile MV_U16 flags;
 328         volatile MV_U32 highBaseAddr;
 329         volatile MV_U32 reserved;
 330 }MV_SATA_EDMA_PRD_ENTRY;
 331
 332 /* API Functions */
 333
 334 /* CORE driver Adapter Management */
 335 MV_BOOLEAN HPTLIBAPI mvSataInitAdapter(MV_SATA_ADAPTER *pAdapter);
 336
 337 MV_BOOLEAN HPTLIBAPI mvSataShutdownAdapter(MV_SATA_ADAPTER *pAdapter);
 338
 339 MV_BOOLEAN HPTLIBAPI mvSataGetAdapterStatus(MV_SATA_ADAPTER *pAdapter,
 340                                                                   MV_SATA_ADAPTER_STATUS *pAdapterStatus);
 341
 342 MV_U32  HPTLIBAPI mvSataReadReg(MV_SATA_ADAPTER *pAdapter, MV_U32 regOffset);
 343
 344 MV_VOID HPTLIBAPI mvSataWriteReg(MV_SATA_ADAPTER *pAdapter, MV_U32 regOffset,
 345                                            MV_U32 regValue);
 346
 347 MV_VOID HPTLIBAPI mvEnableAutoFlush(MV_VOID);
 348 MV_VOID HPTLIBAPI mvDisableAutoFlush(MV_VOID);
 349
 350
 351 /* CORE driver SATA Channel Management */
 352 MV_BOOLEAN HPTLIBAPI mvSataConfigureChannel(MV_SATA_ADAPTER *pAdapter,
 353                                                                   MV_U8 channelIndex);
 354
 355 MV_BOOLEAN HPTLIBAPI mvSataRemoveChannel(MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex);
 356
 357 MV_BOOLEAN HPTLIBAPI mvSataIsStorageDeviceConnected(MV_SATA_ADAPTER *pAdapter,
 358                                                                                   MV_U8 channelIndex);
 359
 360 MV_BOOLEAN HPTLIBAPI mvSataChannelHardReset(MV_SATA_ADAPTER *pAdapter,
 361                                                                   MV_U8 channelIndex);
 362
 363 MV_BOOLEAN HPTLIBAPI mvSataConfigEdmaMode(MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex,
 364                                                                 MV_EDMA_MODE eDmaMode, MV_U8 maxQueueDepth);
 365
 366 MV_BOOLEAN HPTLIBAPI mvSataEnableChannelDma(MV_SATA_ADAPTER *pAdapter,
 367                                                                   MV_U8 channelIndex);
 368
 369 MV_BOOLEAN HPTLIBAPI mvSataDisableChannelDma(MV_SATA_ADAPTER *pAdapter,
 370                                                                    MV_U8 channelIndex);
 371
 372 MV_BOOLEAN HPTLIBAPI mvSataFlushDmaQueue(MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex,
 373                                                            MV_FLUSH_TYPE flushType);
 374
 375 MV_U8 HPTLIBAPI mvSataNumOfDmaCommands(MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex);
 376
 377 MV_BOOLEAN HPTLIBAPI mvSataSetIntCoalParams (MV_SATA_ADAPTER *pAdapter, MV_U8 sataUnit,
 378                                                                    MV_U32 intCoalThre, MV_U32 intTimeThre);
 379
 380 MV_BOOLEAN HPTLIBAPI mvSataSetChannelPhyParams(MV_SATA_ADAPTER *pAdapter,
 381                                                                          MV_U8 channelIndex,
 382                                                                          MV_U8 signalAmps, MV_U8 pre);
 383
 384 MV_BOOLEAN HPTLIBAPI mvSataChannelPhyShutdown(MV_SATA_ADAPTER *pAdapter,
 385                                                                         MV_U8 channelIndex);
 386
 387 MV_BOOLEAN HPTLIBAPI mvSataChannelPhyPowerOn(MV_SATA_ADAPTER *pAdapter,
 388                                                                         MV_U8 channelIndex);
 389
 390 MV_BOOLEAN HPTLIBAPI mvSataChannelSetEdmaLoopBackMode(MV_SATA_ADAPTER *pAdapter,
 391                                                                                         MV_U8 channelIndex,
 392                                                                                         MV_BOOLEAN loopBackOn);
 393
 394 MV_BOOLEAN HPTLIBAPI mvSataGetChannelStatus(MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex,
 395                                                                   MV_SATA_CHANNEL_STATUS *pChannelStatus);
 396
 397 /* Execute UDMA ATA commands */
 398 MV_EDMA_QUEUE_RESULT HPTLIBAPI mvSataQueueUDmaCommand(MV_SATA_ADAPTER *pAdapter,
 399                                                                                         MV_U8 channelIndex,
 400                                                                                         MV_UDMA_TYPE readWrite,
 401                                                                                         MV_U32 lowLBAAddr,
 402                                                                                         MV_U16 highLBAAddr,
 403                                                                                         MV_U16 sectorCount,
 404                                                                                         MV_U32 prdLowAddr,
 405                                                                                         MV_U32 prdHighAddr,
 406                                                                         mvSataCommandCompletionCallBack_t callBack,
 407                                                                                         MV_VOID_PTR commandId);
 408
 409 MV_QUEUE_COMMAND_RESULT HPTLIBAPI mvSataQueueCommand(MV_SATA_ADAPTER *pAdapter,
 410                                                                                    MV_U8 channelIndex,
 411                                                                                    MV_QUEUE_COMMAND_INFO FAR *pCommandParams);
 412
 413 /* Interrupt Service Routine */
 414 MV_BOOLEAN HPTLIBAPI mvSataInterruptServiceRoutine(MV_SATA_ADAPTER *pAdapter);
 415
 416 MV_BOOLEAN HPTLIBAPI mvSataMaskAdapterInterrupt(MV_SATA_ADAPTER *pAdapter);
 417
 418 MV_BOOLEAN HPTLIBAPI mvSataUnmaskAdapterInterrupt(MV_SATA_ADAPTER *pAdapter);
 419
 420 /* Command Completion and Event Notification (user implemented) */
 421 MV_BOOLEAN HPTLIBAPI mvSataEventNotify(MV_SATA_ADAPTER *, MV_EVENT_TYPE ,
 422                                                          MV_U32, MV_U32);
 423
 424 /*
 425  * Staggered spin-ip support and SATA interface speed control
 426  * (relevant for 60x1 adapters)
 427  */
 428 MV_BOOLEAN HPTLIBAPI mvSataEnableStaggeredSpinUpAll (MV_SATA_ADAPTER *pAdapter);
 429 MV_BOOLEAN HPTLIBAPI mvSataDisableStaggeredSpinUpAll (MV_SATA_ADAPTER *pAdapter);
 430
 431 #endif