2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright (c) 2004-2005 HighPoint Technologies, Inc.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 #include <sys/resource.h>
35 #include <sys/eventhandler.h>
36 #include <sys/devicestat.h>
40 #include <vm/vm_extern.h>
42 #include <machine/bus.h>
43 #include <machine/resource.h>
44 #include <machine/bus.h>
49 #include <cam/cam_ccb.h>
50 #include <cam/cam_debug.h>
51 #include <cam/cam_sim.h>
52 #include <cam/cam_xpt_sim.h>
53 #include <cam/cam_periph.h>
55 #include <cam/scsi/scsi_all.h>
56 #include <cam/scsi/scsi_message.h>
62 UCHAR status; /* 0 nonbootable; 80h bootable */
68 ULONG start_abs_sector;
72 typedef struct _INQUIRYDATA {
74 UCHAR DeviceTypeQualifier : 3;
75 UCHAR DeviceTypeModifier : 7;
76 UCHAR RemovableMedia : 1;
78 UCHAR ResponseDataFormat;
79 UCHAR AdditionalLength;
82 UCHAR CommandQueue : 1;
84 UCHAR LinkedCommands : 1;
85 UCHAR Synchronous : 1;
88 UCHAR RelativeAddressing : 1;
91 UCHAR ProductRevisionLevel[4];
92 UCHAR VendorSpecific[20];
94 } INQUIRYDATA, *PINQUIRYDATA;
96 #define MV_IAL_HT_SACOALT_DEFAULT 1
97 #define MV_IAL_HT_SAITMTH_DEFAULT 1
99 /****************************************/
100 /* GENERAL Definitions */
101 /****************************************/
103 /* Bits for HD_ERROR */
104 #define NM_ERR 0x02 /* media present */
105 #define ABRT_ERR 0x04 /* Command aborted */
106 #define MCR_ERR 0x08 /* media change request */
107 #define IDNF_ERR 0x10 /* ID field not found */
108 #define MC_ERR 0x20 /* media changed */
109 #define UNC_ERR 0x40 /* Uncorrect data */
110 #define WP_ERR 0x40 /* write protect */
111 #define ICRC_ERR 0x80 /* new meaning: CRC error during transfer */
113 #define REQUESTS_ARRAY_SIZE (9 * MV_EDMA_REQUEST_QUEUE_SIZE) /* 9 K bytes */
114 #define RESPONSES_ARRAY_SIZE (12 * MV_EDMA_RESPONSE_QUEUE_SIZE) /* 3 K bytes */
116 #define PRD_ENTRIES_PER_CMD (MAX_SG_DESCRIPTORS+1)
117 #define PRD_ENTRIES_SIZE (MV_EDMA_PRD_ENTRY_SIZE*PRD_ENTRIES_PER_CMD)
118 #define PRD_TABLES_FOR_VBUS (MV_SATA_CHANNELS_NUM*MV_EDMA_QUEUE_LENGTH)
120 typedef enum _SataEvent
122 SATA_EVENT_NO_CHANGE = 0,
123 SATA_EVENT_CHANNEL_CONNECTED,
124 SATA_EVENT_CHANNEL_DISCONNECTED
127 typedef ULONG_PTR dma_addr_t;
129 typedef struct _MV_CHANNEL
131 unsigned int maxUltraDmaModeSupported;
132 unsigned int maxDmaModeSupported;
133 unsigned int maxPioModeSupported;
135 MV_BOOLEAN writeCacheSupported;
136 MV_BOOLEAN writeCacheEnabled;
137 MV_BOOLEAN readAheadSupported;
138 MV_BOOLEAN readAheadEnabled;
143 typedef struct _BUS_DMAMAP
144 { struct _BUS_DMAMAP *next;
145 struct IALAdapter *pAdapter;
146 bus_dmamap_t dma_map;
147 struct callout timeout;
148 SCAT_GATH psg[MAX_SG_DESCRIPTORS];
149 } BUS_DMAMAP, *PBUS_DMAMAP;
151 typedef struct IALAdapter
153 struct cam_path *path;
156 bus_dma_tag_t io_dma_parent; /* I/O buffer DMA tag */
157 PBUS_DMAMAP pbus_dmamap_list;
158 PBUS_DMAMAP pbus_dmamap;
160 device_t hpt_dev; /* bus device */
161 struct resource *hpt_irq; /* interrupt */
162 struct resource *mem_res;
163 void *hpt_intr; /* interrupt handle */
164 struct IALAdapter *next;
166 MV_SATA_ADAPTER mvSataAdapter;
167 MV_CHANNEL mvChannel[MV_SATA_CHANNELS_NUM];
168 MV_U8 *requestsArrayBaseAddr;
169 MV_U8 *requestsArrayBaseAlignedAddr;
170 dma_addr_t requestsArrayBaseDmaAddr;
171 dma_addr_t requestsArrayBaseDmaAlignedAddr;
172 MV_U8 *responsesArrayBaseAddr;
173 MV_U8 *responsesArrayBaseAlignedAddr;
174 dma_addr_t responsesArrayBaseDmaAddr;
175 dma_addr_t responsesArrayBaseDmaAlignedAddr;
176 SATA_EVENT sataEvents[MV_SATA_CHANNELS_NUM];
178 struct callout event_timer_connect;
179 struct callout event_timer_disconnect;
182 struct _VDevice VDevices[MV_SATA_CHANNELS_NUM];
183 PCommand pCommandBlocks;
185 PUCHAR prdTableAlignedAddr;
188 union ccb *pending_Q;
190 MV_U8 outstandingCommands;
200 extern IAL_ADAPTER_T *gIal_Adapter;
203 typedef void (*HPT_DPC)(IAL_ADAPTER_T *,void*,UCHAR);
205 int hpt_queue_dpc(HPT_DPC dpc, IAL_ADAPTER_T *pAdapter, void *arg, UCHAR flags);
206 void hpt_rebuild_data_block(IAL_ADAPTER_T *pAdapter, PVDevice pArray, UCHAR flags);
207 void Check_Idle_Call(IAL_ADAPTER_T *pAdapter);
208 void fRescanAllDevice(_VBUS_ARG0);
209 int hpt_add_disk_to_array(_VBUS_ARG DEVICEID idArray, DEVICEID idDisk);
211 int Kernel_DeviceIoControl(_VBUS_ARG
212 DWORD dwIoControlCode, /* operation control code */
213 PVOID lpInBuffer, /* input data buffer */
214 DWORD nInBufferSize, /* size of input data buffer */
215 PVOID lpOutBuffer, /* output data buffer */
216 DWORD nOutBufferSize, /* size of output data buffer */
217 PDWORD lpBytesReturned /* byte count */
221 #define __str_direct(x) #x
222 #define __str(x) __str_direct(x)
223 #define KMSG_LEADING __str(PROC_DIR_NAME) ": "
224 #define hpt_printk(_x_) do { printf(KMSG_LEADING); printf _x_ ; } while (0)
228 #define REBUILD_PARITY 2
231 /***********************************************************/
233 static __inline struct cam_periph *
234 hpt_get_periph(int path_id,int target_id)
236 struct cam_periph *periph = NULL;
237 struct cam_path *path;
240 status = xpt_create_path(&path, NULL, path_id, target_id, 0);
241 if (status == CAM_REQ_CMP) {
242 periph = cam_periph_find(path, "da");
250 #define BITS_PER_LONG 32
251 #define VDEV_TO_ID(pVDev) (DEVICEID)(pVDev)
252 #define ID_TO_VDEV(id) (PVDevice)(id)
253 #else /*Only support x86_64(AMD64 and EM64T)*/
254 #define BITS_PER_LONG 64
255 #define VDEV_TO_ID(pVDev) (DEVICEID)(ULONG_PTR)(pVDev)
256 #define ID_TO_VDEV(id) (PVDevice)(((ULONG_PTR)gIal_Adapter & 0xffffffff00000000) | (id))
259 #define INVALID_DEVICEID (-1)
260 #define INVALID_STRIPSIZE (-1)
262 #define shortswap(w) ((WORD)((w)>>8 | ((w) & 0xFF)<<8))
264 #ifndef MinBlockSizeShift
265 #define MinBlockSizeShift 5
266 #define MaxBlockSizeShift 12
270 typedef struct _HPT_IOCTL_TRANSFER_PARAM
273 ULONG nOutBufferSize;
275 }HPT_IOCTL_TRANSFER_PARAM, *PHPT_IOCTL_TRANSFER_PARAM;
277 typedef struct _HPT_SET_STATE_PARAM
281 } HPT_SET_STATE_PARAM, *PHPT_SET_STATE_PARAM;
283 typedef struct _HPT_SET_ARRAY_INFO
286 ALTERABLE_ARRAY_INFO Info;
287 } HPT_SET_ARRAY_INFO, *PHPT_SET_ARRAY_INFO;
289 typedef struct _HPT_SET_DEVICE_INFO
292 ALTERABLE_DEVICE_INFO Info;
293 } HPT_SET_DEVICE_INFO, *PHPT_SET_DEVICE_INFO;
295 typedef struct _HPT_SET_DEVICE_INFO_V2
298 ALTERABLE_DEVICE_INFO_V2 Info;
299 } HPT_SET_DEVICE_INFO_V2, *PHPT_SET_DEVICE_INFO_V2;
301 typedef struct _HPT_ADD_DISK_TO_ARRAY
305 } HPT_ADD_DISK_TO_ARRAY, *PHPT_ADD_DISK_TO_ARRAY;
307 typedef struct _HPT_DEVICE_IO
314 } HPT_DEVICE_IO, *PHPT_DEVICE_IO;
316 int check_VDevice_valid(PVDevice);
317 int hpt_default_ioctl(_VBUS_ARG DWORD, PVOID, DWORD, PVOID, DWORD, PDWORD);
319 #define HPT_NULL_ID 0