sys/dev/hwpmc/hwpmc_beri.c

   1 /*-
   2  * SPDX-License-Identifier: BSD-2-Clause
   3  *
   4  * Copyright (c) 2019 Ruslan Bukin <br@bsdpad.com>
   5  *
   6  * This software was developed by SRI International and the University of
   7  * Cambridge Computer Laboratory (Department of Computer Science and
   8  * Technology) under DARPA contract HR0011-18-C-0016 ("ECATS"), as part of the
   9  * DARPA SSITH research programme.
  10  *
  11  * Redistribution and use in source and binary forms, with or without
  12  * modification, are permitted provided that the following conditions
  13  * are met:
  14  * 1. Redistributions of source code must retain the above copyright
  15  *    notice, this list of conditions and the following disclaimer.
  16  * 2. Redistributions in binary form must reproduce the above copyright
  17  *    notice, this list of conditions and the following disclaimer in the
  18  *    documentation and/or other materials provided with the distribution.
  19  *
  20  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  21  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  22  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  23  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  24  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  25  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  26  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  27  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  28  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  29  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  30  * SUCH DAMAGE.
  31  */
  32
  33 #include <sys/cdefs.h>
  34 __FBSDID("$FreeBSD$");
  35
  36 #include "opt_hwpmc_hooks.h"
  37
  38 #include <sys/param.h>
  39 #include <sys/pmckern.h>
  40
  41 #include <dev/hwpmc/hwpmc_beri.h>
  42
  43 #define BERI_NCOUNTERS  56
  44 #define BERI_PMC_CAPS   (PMC_CAP_USER | PMC_CAP_SYSTEM | \
  45                          PMC_CAP_READ | PMC_CAP_WRITE )
  46
  47 struct beri_event_code_map {
  48         uint32_t        pe_ev;       /* enum value */
  49         uint64_t        (*get_func)(void);
  50 };
  51
  52 const struct beri_event_code_map beri_event_codes[BERI_NCOUNTERS] = {
  53         { PMC_EV_BERI_CYCLE,
  54                 statcounters_get_cycle_count },
  55         { PMC_EV_BERI_INST,
  56                 statcounters_get_inst_count },
  57         { PMC_EV_BERI_INST_USER,
  58                 statcounters_get_inst_user_count },
  59         { PMC_EV_BERI_INST_KERNEL,
  60                 statcounters_get_inst_kernel_count },
  61         { PMC_EV_BERI_IMPRECISE_SETBOUNDS,
  62                 statcounters_get_imprecise_setbounds_count },
  63         { PMC_EV_BERI_UNREPRESENTABLE_CAPS,
  64                 statcounters_get_unrepresentable_caps_count },
  65         { PMC_EV_BERI_ITLB_MISS,
  66                 statcounters_get_itlb_miss_count },
  67         { PMC_EV_BERI_DTLB_MISS,
  68                 statcounters_get_dtlb_miss_count },
  69         { PMC_EV_BERI_ICACHE_WRITE_HIT,
  70                 statcounters_get_icache_write_hit_count },
  71         { PMC_EV_BERI_ICACHE_WRITE_MISS,
  72                 statcounters_get_icache_write_miss_count },
  73         { PMC_EV_BERI_ICACHE_READ_HIT,
  74                 statcounters_get_icache_read_hit_count },
  75         { PMC_EV_BERI_ICACHE_READ_MISS,
  76                 statcounters_get_icache_read_miss_count },
  77         { PMC_EV_BERI_ICACHE_EVICT,
  78                 statcounters_get_icache_evict_count },
  79         { PMC_EV_BERI_DCACHE_WRITE_HIT,
  80                 statcounters_get_dcache_write_hit_count },
  81         { PMC_EV_BERI_DCACHE_WRITE_MISS,
  82                 statcounters_get_dcache_write_miss_count },
  83         { PMC_EV_BERI_DCACHE_READ_HIT,
  84                 statcounters_get_dcache_read_hit_count },
  85         { PMC_EV_BERI_DCACHE_READ_MISS,
  86                 statcounters_get_dcache_read_miss_count },
  87         { PMC_EV_BERI_DCACHE_EVICT,
  88                 statcounters_get_dcache_evict_count },
  89         { PMC_EV_BERI_DCACHE_SET_TAG_WRITE,
  90                 statcounters_get_dcache_set_tag_write_count },
  91         { PMC_EV_BERI_DCACHE_SET_TAG_READ,
  92                 statcounters_get_dcache_set_tag_read_count },
  93         { PMC_EV_BERI_L2CACHE_WRITE_HIT,
  94                 statcounters_get_l2cache_write_hit_count },
  95         { PMC_EV_BERI_L2CACHE_WRITE_MISS,
  96                 statcounters_get_l2cache_write_miss_count },
  97         { PMC_EV_BERI_L2CACHE_READ_HIT,
  98                 statcounters_get_l2cache_read_hit_count },
  99         { PMC_EV_BERI_L2CACHE_READ_MISS,
 100                 statcounters_get_l2cache_read_miss_count },
 101         { PMC_EV_BERI_L2CACHE_EVICT,
 102                 statcounters_get_l2cache_evict_count },
 103         { PMC_EV_BERI_L2CACHE_SET_TAG_WRITE,
 104                 statcounters_get_l2cache_set_tag_write_count },
 105         { PMC_EV_BERI_L2CACHE_SET_TAG_READ,
 106                 statcounters_get_l2cache_set_tag_read_count },
 107         { PMC_EV_BERI_MEM_BYTE_READ,
 108                 statcounters_get_mem_byte_read_count },
 109         { PMC_EV_BERI_MEM_BYTE_WRITE,
 110                 statcounters_get_mem_byte_write_count },
 111         { PMC_EV_BERI_MEM_HWORD_READ,
 112                 statcounters_get_mem_hword_read_count },
 113         { PMC_EV_BERI_MEM_HWORD_WRITE,
 114                 statcounters_get_mem_hword_write_count },
 115         { PMC_EV_BERI_MEM_WORD_READ,
 116                 statcounters_get_mem_word_read_count },
 117         { PMC_EV_BERI_MEM_WORD_WRITE,
 118                 statcounters_get_mem_word_write_count },
 119         { PMC_EV_BERI_MEM_DWORD_READ,
 120                 statcounters_get_mem_dword_read_count },
 121         { PMC_EV_BERI_MEM_DWORD_WRITE,
 122                 statcounters_get_mem_dword_write_count },
 123         { PMC_EV_BERI_MEM_CAP_READ,
 124                 statcounters_get_mem_cap_read_count },
 125         { PMC_EV_BERI_MEM_CAP_WRITE,
 126                 statcounters_get_mem_cap_write_count },
 127         { PMC_EV_BERI_MEM_CAP_READ_TAG_SET,
 128                 statcounters_get_mem_cap_read_tag_set_count },
 129         { PMC_EV_BERI_MEM_CAP_WRITE_TAG_SET,
 130                 statcounters_get_mem_cap_write_tag_set_count },
 131         { PMC_EV_BERI_TAGCACHE_WRITE_HIT,
 132                 statcounters_get_tagcache_write_hit_count },
 133         { PMC_EV_BERI_TAGCACHE_WRITE_MISS,
 134                 statcounters_get_tagcache_write_miss_count },
 135         { PMC_EV_BERI_TAGCACHE_READ_HIT,
 136                 statcounters_get_tagcache_read_hit_count },
 137         { PMC_EV_BERI_TAGCACHE_READ_MISS,
 138                 statcounters_get_tagcache_read_miss_count },
 139         { PMC_EV_BERI_TAGCACHE_EVICT,
 140                 statcounters_get_tagcache_evict_count },
 141         { PMC_EV_BERI_L2CACHEMASTER_READ_REQ,
 142                 statcounters_get_l2cachemaster_read_req_count },
 143         { PMC_EV_BERI_L2CACHEMASTER_WRITE_REQ,
 144                 statcounters_get_l2cachemaster_write_req_count },
 145         { PMC_EV_BERI_L2CACHEMASTER_WRITE_REQ_FLIT,
 146                 statcounters_get_l2cachemaster_write_req_flit_count },
 147         { PMC_EV_BERI_L2CACHEMASTER_READ_RSP,
 148                 statcounters_get_l2cachemaster_read_rsp_count },
 149         { PMC_EV_BERI_L2CACHEMASTER_READ_RSP_FLIT,
 150                 statcounters_get_l2cachemaster_read_rsp_flit_count },
 151         { PMC_EV_BERI_L2CACHEMASTER_WRITE_RSP,
 152                 statcounters_get_l2cachemaster_write_rsp_count },
 153         { PMC_EV_BERI_TAGCACHEMASTER_READ_REQ,
 154                 statcounters_get_tagcachemaster_read_req_count },
 155         { PMC_EV_BERI_TAGCACHEMASTER_WRITE_REQ,
 156                 statcounters_get_tagcachemaster_write_req_count },
 157         { PMC_EV_BERI_TAGCACHEMASTER_WRITE_REQ_FLIT,
 158                 statcounters_get_tagcachemaster_write_req_flit_count },
 159         { PMC_EV_BERI_TAGCACHEMASTER_READ_RSP,
 160                 statcounters_get_tagcachemaster_read_rsp_count },
 161         { PMC_EV_BERI_TAGCACHEMASTER_READ_RSP_FLIT,
 162                 statcounters_get_tagcachemaster_read_rsp_flit_count },
 163         { PMC_EV_BERI_TAGCACHEMASTER_WRITE_RSP,
 164                 statcounters_get_tagcachemaster_write_rsp_count },
 165 };
 166
 167 struct mips_pmc_spec beri_pmc_spec = {
 168         .ps_cpuclass = PMC_CLASS_BERI,
 169         .ps_cputype = PMC_CPU_MIPS_BERI,
 170         .ps_capabilities = BERI_PMC_CAPS,
 171         .ps_counter_width = 64
 172 };
 173
 174 /*
 175  * Per-processor information.
 176  */
 177 struct beri_cpu {
 178         struct pmc_hw   *pc_beripmcs;
 179         uint64_t        start_values[BERI_NCOUNTERS];
 180         uint64_t        stop_values[BERI_NCOUNTERS];
 181         uint64_t        saved_values[BERI_NCOUNTERS];
 182 };
 183
 184 int beri_npmcs;
 185 static struct beri_cpu **beri_pcpu;
 186
 187 static int
 188 beri_allocate_pmc(int cpu, int ri, struct pmc *pm,
 189   const struct pmc_op_pmcallocate *a)
 190 {
 191         uint32_t config;
 192         int i;
 193
 194         KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
 195             ("[beri,%d] illegal CPU value %d", __LINE__, cpu));
 196         KASSERT(ri >= 0 && ri < beri_npmcs,
 197             ("[beri,%d] illegal row index %d", __LINE__, ri));
 198
 199         if (a->pm_class != beri_pmc_spec.ps_cpuclass)
 200                 return (EINVAL);
 201
 202         for (i = 0; i < BERI_NCOUNTERS; i++) {
 203                 if (beri_event_codes[i].pe_ev == a->pm_ev) {
 204                         config = i;
 205                         break;
 206                 }
 207         }
 208
 209         if (i == BERI_NCOUNTERS)
 210                 return (EINVAL);
 211
 212         pm->pm_md.pm_mips_evsel = config;
 213
 214         PMCDBG2(MDP,ALL,2,"beri-allocate ri=%d -> config=0x%x", ri, config);
 215
 216         return (0);
 217 }
 218
 219 static int
 220 beri_read_pmc(int cpu, int ri, pmc_value_t *v)
 221 {
 222         uint32_t config;
 223         struct pmc *pm;
 224         pmc_value_t new;
 225         pmc_value_t start_val;
 226         pmc_value_t stop_val;
 227         pmc_value_t saved_val;
 228         pmc_value_t result;
 229
 230         KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
 231             ("[beri,%d] illegal CPU value %d", __LINE__, cpu));
 232         KASSERT(ri >= 0 && ri < beri_npmcs,
 233             ("[beri,%d] illegal row index %d", __LINE__, ri));
 234
 235         pm = beri_pcpu[cpu]->pc_beripmcs[ri].phw_pmc;
 236         config = pm->pm_md.pm_mips_evsel;
 237
 238         start_val = beri_pcpu[cpu]->start_values[config];
 239         if (PMC_IS_SYSTEM_MODE(PMC_TO_MODE(pm))) {
 240                 stop_val = beri_event_codes[config].get_func();
 241         } else
 242                 stop_val = beri_pcpu[cpu]->stop_values[config];
 243
 244         if (start_val <= stop_val)
 245                 result = stop_val - start_val;
 246         else {
 247                 if (config == 0) /* CYCLE counter is 48 bit */
 248                         result = 0x00ffffffffffffffUL;
 249                 else
 250                         result = 0xffffffffffffffffUL;
 251                 result -= start_val;
 252                 result += stop_val;
 253         }
 254
 255         saved_val = beri_pcpu[cpu]->saved_values[config];
 256
 257         *v = result + saved_val;
 258
 259         return (0);
 260 }
 261
 262 static int
 263 beri_write_pmc(int cpu, int ri, pmc_value_t v)
 264 {
 265         struct pmc *pm;
 266         uint32_t config;
 267
 268         KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
 269             ("[beri,%d] illegal CPU value %d", __LINE__, cpu));
 270         KASSERT(ri >= 0 && ri < beri_npmcs,
 271             ("[beri,%d] illegal row-index %d", __LINE__, ri));
 272
 273         pm = beri_pcpu[cpu]->pc_beripmcs[ri].phw_pmc;
 274         config = pm->pm_md.pm_mips_evsel;
 275
 276         if (PMC_IS_SAMPLING_MODE(PMC_TO_MODE(pm)))
 277                 v = (1UL << (beri_pmc_spec.ps_counter_width - 1)) - v;
 278
 279         PMCDBG3(MDP,WRI,1,"beri-write cpu=%d ri=%d v=%jx", cpu, ri, v);
 280
 281         if (PMC_IS_SYSTEM_MODE(PMC_TO_MODE(pm)))
 282                 beri_pcpu[cpu]->saved_values[config] = 0;
 283         else
 284                 beri_pcpu[cpu]->saved_values[config] = v;
 285
 286         return (0);
 287 }
 288
 289 static int
 290 beri_config_pmc(int cpu, int ri, struct pmc *pm)
 291 {
 292         struct pmc_hw *phw;
 293
 294         PMCDBG3(MDP,CFG,1, "cpu=%d ri=%d pm=%p", cpu, ri, pm);
 295
 296         KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
 297             ("[beri,%d] illegal CPU value %d", __LINE__, cpu));
 298         KASSERT(ri >= 0 && ri < beri_npmcs,
 299             ("[beri,%d] illegal row-index %d", __LINE__, ri));
 300
 301         phw = &beri_pcpu[cpu]->pc_beripmcs[ri];
 302
 303         KASSERT(pm == NULL || phw->phw_pmc == NULL,
 304             ("[beri,%d] pm=%p phw->pm=%p hwpmc not unconfigured",
 305             __LINE__, pm, phw->phw_pmc));
 306
 307         phw->phw_pmc = pm;
 308
 309         return (0);
 310 }
 311
 312 static int
 313 beri_start_pmc(int cpu, int ri)
 314 {
 315         uint32_t config;
 316         struct pmc *pm;
 317         struct pmc_hw *phw;
 318         pmc_value_t v;
 319
 320         phw = &beri_pcpu[cpu]->pc_beripmcs[ri];
 321         pm = phw->phw_pmc;
 322         config = pm->pm_md.pm_mips_evsel;
 323
 324         v = beri_event_codes[config].get_func();
 325         beri_pcpu[cpu]->start_values[config] = v;
 326
 327         return (0);
 328 }
 329
 330 static int
 331 beri_stop_pmc(int cpu, int ri)
 332 {
 333         uint32_t config;
 334         struct pmc *pm;
 335         struct pmc_hw *phw;
 336         pmc_value_t v;
 337
 338         phw = &beri_pcpu[cpu]->pc_beripmcs[ri];
 339         pm = phw->phw_pmc;
 340         config = pm->pm_md.pm_mips_evsel;
 341
 342         v = beri_event_codes[config].get_func();
 343         beri_pcpu[cpu]->stop_values[config] = v;
 344
 345         return (0);
 346 }
 347
 348 static int
 349 beri_release_pmc(int cpu, int ri, struct pmc *pmc)
 350 {
 351         struct pmc_hw *phw;
 352
 353         KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
 354             ("[beri,%d] illegal CPU value %d", __LINE__, cpu));
 355         KASSERT(ri >= 0 && ri < beri_npmcs,
 356             ("[beri,%d] illegal row-index %d", __LINE__, ri));
 357
 358         phw = &beri_pcpu[cpu]->pc_beripmcs[ri];
 359         KASSERT(phw->phw_pmc == NULL,
 360             ("[beri,%d] PHW pmc %p non-NULL", __LINE__, phw->phw_pmc));
 361
 362         return (0);
 363 }
 364
 365 static int
 366 beri_describe(int cpu, int ri, struct pmc_info *pi, struct pmc **ppmc)
 367 {
 368         struct pmc_hw *phw;
 369         char beri_name[PMC_NAME_MAX];
 370         int error;
 371
 372         KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
 373             ("[beri,%d], illegal CPU %d", __LINE__, cpu));
 374         KASSERT(ri >= 0 && ri < beri_npmcs,
 375             ("[beri,%d] row-index %d out of range", __LINE__, ri));
 376
 377         phw = &beri_pcpu[cpu]->pc_beripmcs[ri];
 378         snprintf(beri_name, sizeof(beri_name), "MIPS-%d", ri);
 379         if ((error = copystr(beri_name, pi->pm_name, PMC_NAME_MAX,
 380             NULL)) != 0)
 381                 return error;
 382         pi->pm_class = beri_pmc_spec.ps_cpuclass;
 383         if (phw->phw_state & PMC_PHW_FLAG_IS_ENABLED) {
 384                 pi->pm_enabled = TRUE;
 385                 *ppmc = phw->phw_pmc;
 386         } else {
 387                 pi->pm_enabled = FALSE;
 388                 *ppmc = NULL;
 389         }
 390
 391         return (0);
 392 }
 393
 394 static int
 395 beri_get_config(int cpu, int ri, struct pmc **ppm)
 396 {
 397
 398         *ppm = beri_pcpu[cpu]->pc_beripmcs[ri].phw_pmc;
 399
 400         return (0);
 401 }
 402
 403 static int
 404 beri_pmc_switch_in(struct pmc_cpu *pc, struct pmc_process *pp)
 405 {
 406
 407         return (0);
 408 }
 409
 410 static int
 411 beri_pmc_switch_out(struct pmc_cpu *pc, struct pmc_process *pp)
 412 {
 413
 414         return (0);
 415 }
 416
 417 static int
 418 beri_pcpu_init(struct pmc_mdep *md, int cpu)
 419 {
 420         int first_ri, i;
 421         struct pmc_cpu *pc;
 422         struct beri_cpu *pac;
 423         struct pmc_hw  *phw;
 424
 425         KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
 426             ("[beri,%d] wrong cpu number %d", __LINE__, cpu));
 427         PMCDBG1(MDP,INI,1,"beri-init cpu=%d", cpu);
 428
 429         beri_pcpu[cpu] = pac = malloc(sizeof(struct beri_cpu), M_PMC,
 430             M_WAITOK|M_ZERO);
 431         pac->pc_beripmcs = malloc(sizeof(struct pmc_hw) * beri_npmcs,
 432             M_PMC, M_WAITOK|M_ZERO);
 433         pc = pmc_pcpu[cpu];
 434         first_ri = md->pmd_classdep[PMC_MDEP_CLASS_INDEX_MIPS].pcd_ri;
 435         KASSERT(pc != NULL, ("[beri,%d] NULL per-cpu pointer", __LINE__));
 436
 437         for (i = 0, phw = pac->pc_beripmcs; i < beri_npmcs; i++, phw++) {
 438                 phw->phw_state = PMC_PHW_FLAG_IS_ENABLED |
 439                     PMC_PHW_CPU_TO_STATE(cpu) | PMC_PHW_INDEX_TO_STATE(i);
 440                 phw->phw_pmc = NULL;
 441                 pc->pc_hwpmcs[i + first_ri] = phw;
 442         }
 443
 444         return (0);
 445 }
 446
 447 static int
 448 beri_pcpu_fini(struct pmc_mdep *md, int cpu)
 449 {
 450
 451         return (0);
 452 }
 453
 454 struct pmc_mdep *
 455 pmc_beri_initialize()
 456 {
 457         struct pmc_mdep *pmc_mdep;
 458         struct pmc_classdep *pcd;
 459
 460         snprintf(pmc_cpuid, sizeof(pmc_cpuid), "beri");
 461
 462         beri_npmcs = 2;
 463
 464         PMCDBG1(MDP,INI,1,"beri-init npmcs=%d", beri_npmcs);
 465
 466         /*
 467          * Allocate space for pointers to PMC HW descriptors and for
 468          * the MDEP structure used by MI code.
 469          */
 470         beri_pcpu = malloc(sizeof(struct beri_cpu *) * pmc_cpu_max(), M_PMC,
 471                            M_WAITOK|M_ZERO);
 472
 473         /* Just one class */
 474         pmc_mdep = pmc_mdep_alloc(1);
 475
 476         pmc_mdep->pmd_cputype = beri_pmc_spec.ps_cputype;
 477
 478         pcd = &pmc_mdep->pmd_classdep[PMC_MDEP_CLASS_INDEX_MIPS];
 479         pcd->pcd_caps = beri_pmc_spec.ps_capabilities;
 480         pcd->pcd_class = beri_pmc_spec.ps_cpuclass;
 481         pcd->pcd_num = beri_npmcs;
 482         pcd->pcd_ri = pmc_mdep->pmd_npmc;
 483         pcd->pcd_width = beri_pmc_spec.ps_counter_width;
 484
 485         pcd->pcd_allocate_pmc   = beri_allocate_pmc;
 486         pcd->pcd_config_pmc     = beri_config_pmc;
 487         pcd->pcd_pcpu_fini      = beri_pcpu_fini;
 488         pcd->pcd_pcpu_init      = beri_pcpu_init;
 489         pcd->pcd_describe       = beri_describe;
 490         pcd->pcd_get_config     = beri_get_config;
 491         pcd->pcd_read_pmc       = beri_read_pmc;
 492         pcd->pcd_release_pmc    = beri_release_pmc;
 493         pcd->pcd_start_pmc      = beri_start_pmc;
 494         pcd->pcd_stop_pmc       = beri_stop_pmc;
 495         pcd->pcd_write_pmc      = beri_write_pmc;
 496
 497         pmc_mdep->pmd_intr       = NULL;
 498         pmc_mdep->pmd_switch_in  = beri_pmc_switch_in;
 499         pmc_mdep->pmd_switch_out = beri_pmc_switch_out;
 500
 501         pmc_mdep->pmd_npmc += beri_npmcs;
 502
 503         return (pmc_mdep);
 504 }
 505
 506 void
 507 pmc_beri_finalize(struct pmc_mdep *md)
 508 {
 509
 510 }
 511
 512 struct pmc_mdep *
 513 pmc_md_initialize()
 514 {
 515
 516         return (pmc_beri_initialize());
 517 }
 518
 519 void
 520 pmc_md_finalize(struct pmc_mdep *md)
 521 {
 522
 523         return (pmc_beri_finalize(md));
 524 }
 525
 526 int
 527 pmc_save_kernel_callchain(uintptr_t *cc, int nframes,
 528     struct trapframe *tf)
 529 {
 530
 531         return (0);
 532 }
 533
 534 int
 535 pmc_save_user_callchain(uintptr_t *cc, int nframes,
 536     struct trapframe *tf)
 537 {
 538
 539         return (0);
 540 }