2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright (c) 2008 Joseph Koshy
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 #include <sys/cdefs.h>
34 __FBSDID("$FreeBSD$");
36 #include <sys/param.h>
39 #include <sys/pmckern.h>
40 #include <sys/systm.h>
42 #include <machine/intr_machdep.h>
43 #if (__FreeBSD_version >= 1100000)
44 #include <x86/apicvar.h>
46 #include <machine/apicvar.h>
48 #include <machine/cpu.h>
49 #include <machine/cpufunc.h>
50 #include <machine/md_var.h>
51 #include <machine/specialreg.h>
53 #define CORE_CPUID_REQUEST 0xA
54 #define CORE_CPUID_REQUEST_SIZE 0x4
55 #define CORE_CPUID_EAX 0x0
56 #define CORE_CPUID_EBX 0x1
57 #define CORE_CPUID_ECX 0x2
58 #define CORE_CPUID_EDX 0x3
60 #define IAF_PMC_CAPS \
61 (PMC_CAP_READ | PMC_CAP_WRITE | PMC_CAP_INTERRUPT | \
62 PMC_CAP_USER | PMC_CAP_SYSTEM)
63 #define IAF_RI_TO_MSR(RI) ((RI) + (1 << 30))
65 #define IAP_PMC_CAPS (PMC_CAP_INTERRUPT | PMC_CAP_USER | PMC_CAP_SYSTEM | \
66 PMC_CAP_EDGE | PMC_CAP_THRESHOLD | PMC_CAP_READ | PMC_CAP_WRITE | \
67 PMC_CAP_INVERT | PMC_CAP_QUALIFIER | PMC_CAP_PRECISE)
69 #define EV_IS_NOTARCH 0
70 #define EV_IS_ARCH_SUPP 1
71 #define EV_IS_ARCH_NOTSUPP -1
74 * "Architectural" events defined by Intel. The values of these
75 * symbols correspond to positions in the bitmask returned by
76 * the CPUID.0AH instruction.
78 enum core_arch_events {
79 CORE_AE_BRANCH_INSTRUCTION_RETIRED = 5,
80 CORE_AE_BRANCH_MISSES_RETIRED = 6,
81 CORE_AE_INSTRUCTION_RETIRED = 1,
82 CORE_AE_LLC_MISSES = 4,
83 CORE_AE_LLC_REFERENCE = 3,
84 CORE_AE_UNHALTED_REFERENCE_CYCLES = 2,
85 CORE_AE_UNHALTED_CORE_CYCLES = 0
88 static enum pmc_cputype core_cputype;
91 volatile uint32_t pc_resync;
92 volatile uint32_t pc_iafctrl; /* Fixed function control. */
93 volatile uint64_t pc_globalctrl; /* Global control register. */
94 struct pmc_hw pc_corepmcs[];
97 static struct core_cpu **core_pcpu;
99 static uint32_t core_architectural_events;
100 static uint64_t core_pmcmask;
102 static int core_iaf_ri; /* relative index of fixed counters */
103 static int core_iaf_width;
104 static int core_iaf_npmc;
106 static int core_iap_width;
107 static int core_iap_npmc;
108 static int core_iap_wroffset;
111 core_pcpu_noop(struct pmc_mdep *md, int cpu)
119 core_pcpu_init(struct pmc_mdep *md, int cpu)
124 int core_ri, n, npmc;
126 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
127 ("[iaf,%d] insane cpu number %d", __LINE__, cpu));
129 PMCDBG1(MDP,INI,1,"core-init cpu=%d", cpu);
131 core_ri = md->pmd_classdep[PMC_MDEP_CLASS_INDEX_IAP].pcd_ri;
132 npmc = md->pmd_classdep[PMC_MDEP_CLASS_INDEX_IAP].pcd_num;
134 if (core_cputype != PMC_CPU_INTEL_CORE)
135 npmc += md->pmd_classdep[PMC_MDEP_CLASS_INDEX_IAF].pcd_num;
137 cc = malloc(sizeof(struct core_cpu) + npmc * sizeof(struct pmc_hw),
138 M_PMC, M_WAITOK | M_ZERO);
143 KASSERT(pc != NULL && cc != NULL,
144 ("[core,%d] NULL per-cpu structures cpu=%d", __LINE__, cpu));
146 for (n = 0, phw = cc->pc_corepmcs; n < npmc; n++, phw++) {
147 phw->phw_state = PMC_PHW_FLAG_IS_ENABLED |
148 PMC_PHW_CPU_TO_STATE(cpu) |
149 PMC_PHW_INDEX_TO_STATE(n + core_ri);
151 pc->pc_hwpmcs[n + core_ri] = phw;
158 core_pcpu_fini(struct pmc_mdep *md, int cpu)
160 int core_ri, n, npmc;
165 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
166 ("[core,%d] insane cpu number (%d)", __LINE__, cpu));
168 PMCDBG1(MDP,INI,1,"core-pcpu-fini cpu=%d", cpu);
170 if ((cc = core_pcpu[cpu]) == NULL)
173 core_pcpu[cpu] = NULL;
177 KASSERT(pc != NULL, ("[core,%d] NULL per-cpu %d state", __LINE__,
180 npmc = md->pmd_classdep[PMC_MDEP_CLASS_INDEX_IAP].pcd_num;
181 core_ri = md->pmd_classdep[PMC_MDEP_CLASS_INDEX_IAP].pcd_ri;
183 for (n = 0; n < npmc; n++) {
184 msr = rdmsr(IAP_EVSEL0 + n) & ~IAP_EVSEL_MASK;
185 wrmsr(IAP_EVSEL0 + n, msr);
188 if (core_cputype != PMC_CPU_INTEL_CORE) {
189 msr = rdmsr(IAF_CTRL) & ~IAF_CTRL_MASK;
190 wrmsr(IAF_CTRL, msr);
191 npmc += md->pmd_classdep[PMC_MDEP_CLASS_INDEX_IAF].pcd_num;
194 for (n = 0; n < npmc; n++)
195 pc->pc_hwpmcs[n + core_ri] = NULL;
203 * Fixed function counters.
207 iaf_perfctr_value_to_reload_count(pmc_value_t v)
210 /* If the PMC has overflowed, return a reload count of zero. */
211 if ((v & (1ULL << (core_iaf_width - 1))) == 0)
213 v &= (1ULL << core_iaf_width) - 1;
214 return (1ULL << core_iaf_width) - v;
218 iaf_reload_count_to_perfctr_value(pmc_value_t rlc)
220 return (1ULL << core_iaf_width) - rlc;
224 iaf_allocate_pmc(int cpu, int ri, struct pmc *pm,
225 const struct pmc_op_pmcallocate *a)
228 uint32_t caps, flags, validflags;
230 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
231 ("[core,%d] illegal CPU %d", __LINE__, cpu));
233 PMCDBG2(MDP,ALL,1, "iaf-allocate ri=%d reqcaps=0x%x", ri, pm->pm_caps);
235 if (ri < 0 || ri > core_iaf_npmc)
240 if (a->pm_class != PMC_CLASS_IAF ||
241 (caps & IAF_PMC_CAPS) != caps)
245 if (ev < PMC_EV_IAF_FIRST || ev > PMC_EV_IAF_LAST)
248 if (ev == PMC_EV_IAF_INSTR_RETIRED_ANY && ri != 0)
250 if (ev == PMC_EV_IAF_CPU_CLK_UNHALTED_CORE && ri != 1)
252 if (ev == PMC_EV_IAF_CPU_CLK_UNHALTED_REF && ri != 2)
255 flags = a->pm_md.pm_iaf.pm_iaf_flags;
257 validflags = IAF_MASK;
259 if (core_cputype != PMC_CPU_INTEL_ATOM &&
260 core_cputype != PMC_CPU_INTEL_ATOM_SILVERMONT)
261 validflags &= ~IAF_ANY;
263 if ((flags & ~validflags) != 0)
266 if (caps & PMC_CAP_INTERRUPT)
268 if (caps & PMC_CAP_SYSTEM)
270 if (caps & PMC_CAP_USER)
272 if ((caps & (PMC_CAP_USER | PMC_CAP_SYSTEM)) == 0)
273 flags |= (IAF_OS | IAF_USR);
275 pm->pm_md.pm_iaf.pm_iaf_ctrl = (flags << (ri * 4));
277 PMCDBG1(MDP,ALL,2, "iaf-allocate config=0x%jx",
278 (uintmax_t) pm->pm_md.pm_iaf.pm_iaf_ctrl);
284 iaf_config_pmc(int cpu, int ri, struct pmc *pm)
286 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
287 ("[core,%d] illegal CPU %d", __LINE__, cpu));
289 KASSERT(ri >= 0 && ri < core_iaf_npmc,
290 ("[core,%d] illegal row-index %d", __LINE__, ri));
292 PMCDBG3(MDP,CFG,1, "iaf-config cpu=%d ri=%d pm=%p", cpu, ri, pm);
294 KASSERT(core_pcpu[cpu] != NULL, ("[core,%d] null per-cpu %d", __LINE__,
297 core_pcpu[cpu]->pc_corepmcs[ri + core_iaf_ri].phw_pmc = pm;
303 iaf_describe(int cpu, int ri, struct pmc_info *pi, struct pmc **ppmc)
307 char iaf_name[PMC_NAME_MAX];
309 phw = &core_pcpu[cpu]->pc_corepmcs[ri + core_iaf_ri];
311 (void) snprintf(iaf_name, sizeof(iaf_name), "IAF-%d", ri);
312 if ((error = copystr(iaf_name, pi->pm_name, PMC_NAME_MAX,
316 pi->pm_class = PMC_CLASS_IAF;
318 if (phw->phw_state & PMC_PHW_FLAG_IS_ENABLED) {
319 pi->pm_enabled = TRUE;
320 *ppmc = phw->phw_pmc;
322 pi->pm_enabled = FALSE;
330 iaf_get_config(int cpu, int ri, struct pmc **ppm)
332 *ppm = core_pcpu[cpu]->pc_corepmcs[ri + core_iaf_ri].phw_pmc;
338 iaf_get_msr(int ri, uint32_t *msr)
340 KASSERT(ri >= 0 && ri < core_iaf_npmc,
341 ("[iaf,%d] ri %d out of range", __LINE__, ri));
343 *msr = IAF_RI_TO_MSR(ri);
349 iaf_read_pmc(int cpu, int ri, pmc_value_t *v)
354 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
355 ("[core,%d] illegal cpu value %d", __LINE__, cpu));
356 KASSERT(ri >= 0 && ri < core_iaf_npmc,
357 ("[core,%d] illegal row-index %d", __LINE__, ri));
359 pm = core_pcpu[cpu]->pc_corepmcs[ri + core_iaf_ri].phw_pmc;
362 ("[core,%d] cpu %d ri %d(%d) pmc not configured", __LINE__, cpu,
363 ri, ri + core_iaf_ri));
365 tmp = rdpmc(IAF_RI_TO_MSR(ri));
367 if (PMC_IS_SAMPLING_MODE(PMC_TO_MODE(pm)))
368 *v = iaf_perfctr_value_to_reload_count(tmp);
370 *v = tmp & ((1ULL << core_iaf_width) - 1);
372 PMCDBG4(MDP,REA,1, "iaf-read cpu=%d ri=%d msr=0x%x -> v=%jx", cpu, ri,
373 IAF_RI_TO_MSR(ri), *v);
379 iaf_release_pmc(int cpu, int ri, struct pmc *pmc)
381 PMCDBG3(MDP,REL,1, "iaf-release cpu=%d ri=%d pm=%p", cpu, ri, pmc);
383 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
384 ("[core,%d] illegal CPU value %d", __LINE__, cpu));
385 KASSERT(ri >= 0 && ri < core_iaf_npmc,
386 ("[core,%d] illegal row-index %d", __LINE__, ri));
388 KASSERT(core_pcpu[cpu]->pc_corepmcs[ri + core_iaf_ri].phw_pmc == NULL,
389 ("[core,%d] PHW pmc non-NULL", __LINE__));
395 iaf_start_pmc(int cpu, int ri)
398 struct core_cpu *iafc;
401 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
402 ("[core,%d] illegal CPU value %d", __LINE__, cpu));
403 KASSERT(ri >= 0 && ri < core_iaf_npmc,
404 ("[core,%d] illegal row-index %d", __LINE__, ri));
406 PMCDBG2(MDP,STA,1,"iaf-start cpu=%d ri=%d", cpu, ri);
408 iafc = core_pcpu[cpu];
409 pm = iafc->pc_corepmcs[ri + core_iaf_ri].phw_pmc;
411 iafc->pc_iafctrl |= pm->pm_md.pm_iaf.pm_iaf_ctrl;
413 msr = rdmsr(IAF_CTRL) & ~IAF_CTRL_MASK;
414 wrmsr(IAF_CTRL, msr | (iafc->pc_iafctrl & IAF_CTRL_MASK));
418 iafc->pc_globalctrl |= (1ULL << (ri + IAF_OFFSET));
419 msr = rdmsr(IA_GLOBAL_CTRL) & ~IAF_GLOBAL_CTRL_MASK;
420 wrmsr(IA_GLOBAL_CTRL, msr | (iafc->pc_globalctrl &
421 IAF_GLOBAL_CTRL_MASK));
422 } while (iafc->pc_resync != 0);
424 PMCDBG4(MDP,STA,1,"iafctrl=%x(%x) globalctrl=%jx(%jx)",
425 iafc->pc_iafctrl, (uint32_t) rdmsr(IAF_CTRL),
426 iafc->pc_globalctrl, rdmsr(IA_GLOBAL_CTRL));
432 iaf_stop_pmc(int cpu, int ri)
435 struct core_cpu *iafc;
438 PMCDBG2(MDP,STO,1,"iaf-stop cpu=%d ri=%d", cpu, ri);
440 iafc = core_pcpu[cpu];
442 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
443 ("[core,%d] illegal CPU value %d", __LINE__, cpu));
444 KASSERT(ri >= 0 && ri < core_iaf_npmc,
445 ("[core,%d] illegal row-index %d", __LINE__, ri));
447 fc = (IAF_MASK << (ri * 4));
449 if (core_cputype != PMC_CPU_INTEL_ATOM &&
450 core_cputype != PMC_CPU_INTEL_ATOM_SILVERMONT)
453 iafc->pc_iafctrl &= ~fc;
455 PMCDBG1(MDP,STO,1,"iaf-stop iafctrl=%x", iafc->pc_iafctrl);
456 msr = rdmsr(IAF_CTRL) & ~IAF_CTRL_MASK;
457 wrmsr(IAF_CTRL, msr | (iafc->pc_iafctrl & IAF_CTRL_MASK));
461 iafc->pc_globalctrl &= ~(1ULL << (ri + IAF_OFFSET));
462 msr = rdmsr(IA_GLOBAL_CTRL) & ~IAF_GLOBAL_CTRL_MASK;
463 wrmsr(IA_GLOBAL_CTRL, msr | (iafc->pc_globalctrl &
464 IAF_GLOBAL_CTRL_MASK));
465 } while (iafc->pc_resync != 0);
467 PMCDBG4(MDP,STO,1,"iafctrl=%x(%x) globalctrl=%jx(%jx)",
468 iafc->pc_iafctrl, (uint32_t) rdmsr(IAF_CTRL),
469 iafc->pc_globalctrl, rdmsr(IA_GLOBAL_CTRL));
475 iaf_write_pmc(int cpu, int ri, pmc_value_t v)
481 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
482 ("[core,%d] illegal cpu value %d", __LINE__, cpu));
483 KASSERT(ri >= 0 && ri < core_iaf_npmc,
484 ("[core,%d] illegal row-index %d", __LINE__, ri));
487 pm = cc->pc_corepmcs[ri + core_iaf_ri].phw_pmc;
490 ("[core,%d] cpu %d ri %d pmc not configured", __LINE__, cpu, ri));
492 if (PMC_IS_SAMPLING_MODE(PMC_TO_MODE(pm)))
493 v = iaf_reload_count_to_perfctr_value(v);
495 /* Turn off fixed counters */
496 msr = rdmsr(IAF_CTRL) & ~IAF_CTRL_MASK;
497 wrmsr(IAF_CTRL, msr);
499 wrmsr(IAF_CTR0 + ri, v & ((1ULL << core_iaf_width) - 1));
501 /* Turn on fixed counters */
502 msr = rdmsr(IAF_CTRL) & ~IAF_CTRL_MASK;
503 wrmsr(IAF_CTRL, msr | (cc->pc_iafctrl & IAF_CTRL_MASK));
505 PMCDBG6(MDP,WRI,1, "iaf-write cpu=%d ri=%d msr=0x%x v=%jx iafctrl=%jx "
506 "pmc=%jx", cpu, ri, IAF_RI_TO_MSR(ri), v,
507 (uintmax_t) rdmsr(IAF_CTRL),
508 (uintmax_t) rdpmc(IAF_RI_TO_MSR(ri)));
515 iaf_initialize(struct pmc_mdep *md, int maxcpu, int npmc, int pmcwidth)
517 struct pmc_classdep *pcd;
519 KASSERT(md != NULL, ("[iaf,%d] md is NULL", __LINE__));
521 PMCDBG0(MDP,INI,1, "iaf-initialize");
523 pcd = &md->pmd_classdep[PMC_MDEP_CLASS_INDEX_IAF];
525 pcd->pcd_caps = IAF_PMC_CAPS;
526 pcd->pcd_class = PMC_CLASS_IAF;
528 pcd->pcd_ri = md->pmd_npmc;
529 pcd->pcd_width = pmcwidth;
531 pcd->pcd_allocate_pmc = iaf_allocate_pmc;
532 pcd->pcd_config_pmc = iaf_config_pmc;
533 pcd->pcd_describe = iaf_describe;
534 pcd->pcd_get_config = iaf_get_config;
535 pcd->pcd_get_msr = iaf_get_msr;
536 pcd->pcd_pcpu_fini = core_pcpu_noop;
537 pcd->pcd_pcpu_init = core_pcpu_noop;
538 pcd->pcd_read_pmc = iaf_read_pmc;
539 pcd->pcd_release_pmc = iaf_release_pmc;
540 pcd->pcd_start_pmc = iaf_start_pmc;
541 pcd->pcd_stop_pmc = iaf_stop_pmc;
542 pcd->pcd_write_pmc = iaf_write_pmc;
544 md->pmd_npmc += npmc;
548 * Intel programmable PMCs.
552 * Event descriptor tables.
554 * For each event id, we track:
556 * 1. The CPUs that the event is valid for.
558 * 2. If the event uses a fixed UMASK, the value of the umask field.
559 * If the event doesn't use a fixed UMASK, a mask of legal bits
563 struct iap_event_descr {
564 enum pmc_event iap_ev;
565 unsigned char iap_evcode;
566 unsigned char iap_umask;
567 unsigned int iap_flags;
570 #define IAP_F_CC (1 << 0) /* CPU: Core */
571 #define IAP_F_CC2 (1 << 1) /* CPU: Core2 family */
572 #define IAP_F_CC2E (1 << 2) /* CPU: Core2 Extreme only */
573 #define IAP_F_CA (1 << 3) /* CPU: Atom */
574 #define IAP_F_I7 (1 << 4) /* CPU: Core i7 */
575 #define IAP_F_I7O (1 << 4) /* CPU: Core i7 (old) */
576 #define IAP_F_WM (1 << 5) /* CPU: Westmere */
577 #define IAP_F_SB (1 << 6) /* CPU: Sandy Bridge */
578 #define IAP_F_IB (1 << 7) /* CPU: Ivy Bridge */
579 #define IAP_F_SBX (1 << 8) /* CPU: Sandy Bridge Xeon */
580 #define IAP_F_IBX (1 << 9) /* CPU: Ivy Bridge Xeon */
581 #define IAP_F_HW (1 << 10) /* CPU: Haswell */
582 #define IAP_F_CAS (1 << 11) /* CPU: Atom Silvermont */
583 #define IAP_F_HWX (1 << 12) /* CPU: Haswell Xeon */
584 #define IAP_F_BW (1 << 13) /* CPU: Broadwell */
585 #define IAP_F_BWX (1 << 14) /* CPU: Broadwell Xeon */
586 #define IAP_F_SL (1 << 15) /* CPU: Skylake */
587 #define IAP_F_SLX (1 << 16) /* CPU: Skylake Xeon AKA scalable */
588 #define IAP_F_FM (1 << 18) /* Fixed mask */
590 #define IAP_F_ALLCPUSCORE2 \
591 (IAP_F_CC | IAP_F_CC2 | IAP_F_CC2E | IAP_F_CA)
593 /* Sub fields of UMASK that this event supports. */
594 #define IAP_M_CORE (1 << 0) /* Core specificity */
595 #define IAP_M_AGENT (1 << 1) /* Agent specificity */
596 #define IAP_M_PREFETCH (1 << 2) /* Prefetch */
597 #define IAP_M_MESI (1 << 3) /* MESI */
598 #define IAP_M_SNOOPRESPONSE (1 << 4) /* Snoop response */
599 #define IAP_M_SNOOPTYPE (1 << 5) /* Snoop type */
600 #define IAP_M_TRANSITION (1 << 6) /* Transition */
602 #define IAP_F_CORE (0x3 << 14) /* Core specificity */
603 #define IAP_F_AGENT (0x1 << 13) /* Agent specificity */
604 #define IAP_F_PREFETCH (0x3 << 12) /* Prefetch */
605 #define IAP_F_MESI (0xF << 8) /* MESI */
606 #define IAP_F_SNOOPRESPONSE (0xB << 8) /* Snoop response */
607 #define IAP_F_SNOOPTYPE (0x3 << 8) /* Snoop type */
608 #define IAP_F_TRANSITION (0x1 << 12) /* Transition */
610 #define IAP_PREFETCH_RESERVED (0x2 << 12)
611 #define IAP_CORE_THIS (0x1 << 14)
612 #define IAP_CORE_ALL (0x3 << 14)
613 #define IAP_F_CMASK 0xFF000000
615 static struct iap_event_descr iap_events[] = {
617 #define IAPDESCR(N,EV,UM,FLAGS) { \
618 .iap_ev = PMC_EV_IAP_EVENT_##N, \
619 .iap_evcode = (EV), \
621 .iap_flags = (FLAGS) \
624 IAPDESCR(02H_01H, 0x02, 0x01, IAP_F_FM | IAP_F_I7O),
625 IAPDESCR(02H_81H, 0x02, 0x81, IAP_F_FM | IAP_F_CA),
627 IAPDESCR(03H_00H, 0x03, 0x00, IAP_F_FM | IAP_F_CC),
628 IAPDESCR(03H_01H, 0x03, 0x01, IAP_F_FM | IAP_F_I7O | IAP_F_SB |
629 IAP_F_SBX | IAP_F_CAS),
630 IAPDESCR(03H_02H, 0x03, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
631 IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW |
632 IAP_F_CAS | IAP_F_HWX | IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
633 IAPDESCR(03H_04H, 0x03, 0x04, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_I7O |
635 IAPDESCR(03H_08H, 0x03, 0x08, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_SB |
636 IAP_F_SBX | IAP_F_CAS | IAP_F_IB | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
637 IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
638 IAPDESCR(03H_10H, 0x03, 0x10, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_SB |
639 IAP_F_SBX | IAP_F_CAS),
640 IAPDESCR(03H_20H, 0x03, 0x20, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_CAS),
641 IAPDESCR(03H_40H, 0x03, 0x40, IAP_F_FM | IAP_F_CAS),
642 IAPDESCR(03H_80H, 0x03, 0x80, IAP_F_FM | IAP_F_CAS),
644 IAPDESCR(04H_00H, 0x04, 0x00, IAP_F_FM | IAP_F_CC | IAP_F_CAS),
645 IAPDESCR(04H_01H, 0x04, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_I7O |
647 IAPDESCR(04H_02H, 0x04, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_CAS),
648 IAPDESCR(04H_04H, 0x04, 0x04, IAP_F_FM | IAP_F_CAS),
649 IAPDESCR(04H_07H, 0x04, 0x07, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
650 IAPDESCR(04H_08H, 0x04, 0x08, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_CAS),
651 IAPDESCR(04H_10H, 0x04, 0x10, IAP_F_FM | IAP_F_CAS),
652 IAPDESCR(04H_20H, 0x04, 0x20, IAP_F_FM | IAP_F_CAS),
653 IAPDESCR(04H_40H, 0x04, 0x40, IAP_F_FM | IAP_F_CAS),
654 IAPDESCR(04H_80H, 0x04, 0x80, IAP_F_FM | IAP_F_CAS),
656 IAPDESCR(05H_00H, 0x05, 0x00, IAP_F_FM | IAP_F_CC),
657 IAPDESCR(05H_01H, 0x05, 0x01, IAP_F_FM | IAP_F_I7O | IAP_F_SB | IAP_F_IB |
658 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_CAS | IAP_F_HWX | IAP_F_BW |
660 IAPDESCR(05H_02H, 0x05, 0x02, IAP_F_FM | IAP_F_I7O | IAP_F_WM | IAP_F_SB |
661 IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_CAS | IAP_F_HWX |
662 IAP_F_BW | IAP_F_BWX),
663 IAPDESCR(05H_03H, 0x05, 0x03, IAP_F_FM | IAP_F_I7O | IAP_F_CAS),
665 IAPDESCR(06H_00H, 0x06, 0x00, IAP_F_FM | IAP_F_CC | IAP_F_CC2 |
666 IAP_F_CC2E | IAP_F_CA),
667 IAPDESCR(06H_01H, 0x06, 0x01, IAP_F_FM | IAP_F_I7O),
668 IAPDESCR(06H_02H, 0x06, 0x02, IAP_F_FM | IAP_F_I7O),
669 IAPDESCR(06H_04H, 0x06, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
670 IAPDESCR(06H_08H, 0x06, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
671 IAPDESCR(06H_0FH, 0x06, 0x0F, IAP_F_FM | IAP_F_I7O),
673 IAPDESCR(07H_00H, 0x07, 0x00, IAP_F_FM | IAP_F_CC | IAP_F_CC2),
674 IAPDESCR(07H_01H, 0x07, 0x01, IAP_F_FM | IAP_F_ALLCPUSCORE2 |
675 IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX |
676 IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
677 IAPDESCR(07H_02H, 0x07, 0x02, IAP_F_FM | IAP_F_ALLCPUSCORE2),
678 IAPDESCR(07H_03H, 0x07, 0x03, IAP_F_FM | IAP_F_ALLCPUSCORE2),
679 IAPDESCR(07H_06H, 0x07, 0x06, IAP_F_FM | IAP_F_CA),
680 IAPDESCR(07H_08H, 0x07, 0x08, IAP_F_FM | IAP_F_CA | IAP_F_SB |
683 IAPDESCR(08H_01H, 0x08, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
684 IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_SBX | IAP_F_HW | IAP_F_HWX |
685 IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
686 IAPDESCR(08H_02H, 0x08, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
687 IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_SBX | IAP_F_HW | IAP_F_HWX |
688 IAP_F_BW | IAP_F_BWX | IAP_F_SLX),
689 IAPDESCR(08H_04H, 0x08, 0x04, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
690 IAP_F_WM | IAP_F_SB | IAP_F_SBX | IAP_F_HW | IAP_F_HWX | IAP_F_SLX),
691 IAPDESCR(08H_05H, 0x08, 0x05, IAP_F_FM | IAP_F_CA),
692 IAPDESCR(08H_06H, 0x08, 0x06, IAP_F_FM | IAP_F_CA),
693 IAPDESCR(08H_07H, 0x08, 0x07, IAP_F_FM | IAP_F_CA),
694 IAPDESCR(08H_08H, 0x08, 0x08, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_SLX),
695 IAPDESCR(08H_09H, 0x08, 0x09, IAP_F_FM | IAP_F_CA),
696 IAPDESCR(08H_0EH, 0x08, 0x0E, IAP_F_FM | IAP_F_HW | IAP_F_HWX | IAP_F_SL |
698 IAPDESCR(08H_10H, 0x08, 0x10, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB |
699 IAP_F_SBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX | IAP_F_SL |
701 IAPDESCR(08H_20H, 0x08, 0x20, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_HW |
702 IAP_F_HWX | IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
703 IAPDESCR(08H_40H, 0x08, 0x40, IAP_F_FM | IAP_F_I7O | IAP_F_HW | IAP_F_HWX),
704 IAPDESCR(08H_60H, 0x08, 0x60, IAP_F_FM | IAP_F_HW | IAP_F_HWX),
705 IAPDESCR(08H_80H, 0x08, 0x80, IAP_F_FM | IAP_F_I7 | IAP_F_HW | IAP_F_HWX),
706 IAPDESCR(08H_81H, 0x08, 0x81, IAP_F_FM | IAP_F_IB | IAP_F_IBX),
707 IAPDESCR(08H_82H, 0x08, 0x82, IAP_F_FM | IAP_F_IB | IAP_F_IBX),
708 IAPDESCR(08H_84H, 0x08, 0x84, IAP_F_FM | IAP_F_IB | IAP_F_IBX),
709 IAPDESCR(08H_88H, 0x08, 0x88, IAP_F_FM | IAP_F_IB | IAP_F_IBX),
711 IAPDESCR(09H_01H, 0x09, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_I7O),
712 IAPDESCR(09H_02H, 0x09, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_I7O),
713 IAPDESCR(09H_04H, 0x09, 0x04, IAP_F_FM | IAP_F_I7O),
714 IAPDESCR(09H_08H, 0x09, 0x08, IAP_F_FM | IAP_F_I7O),
716 IAPDESCR(0BH_01H, 0x0B, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
717 IAPDESCR(0BH_02H, 0x0B, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
718 IAPDESCR(0BH_10H, 0x0B, 0x10, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
720 IAPDESCR(0CH_01H, 0x0C, 0x01, IAP_F_FM | IAP_F_CC2 | IAP_F_I7 |
721 IAP_F_WM | IAP_F_SL),
722 IAPDESCR(0CH_02H, 0x0C, 0x02, IAP_F_FM | IAP_F_CC2),
723 IAPDESCR(0CH_03H, 0x0C, 0x03, IAP_F_FM | IAP_F_CA),
725 IAPDESCR(0DH_01H, 0x0D, 0x01, IAP_F_FM | IAP_F_SL | IAP_F_SLX),
726 IAPDESCR(0DH_03H, 0x0D, 0x03, IAP_F_FM | IAP_F_SB | IAP_F_SBX | IAP_F_HW |
727 IAP_F_IB | IAP_F_IBX | IAP_F_HWX | IAP_F_BW | IAP_F_BWX),
728 IAPDESCR(0DH_40H, 0x0D, 0x40, IAP_F_FM | IAP_F_SB | IAP_F_SBX),
729 IAPDESCR(0DH_80H, 0x0D, 0x80, IAP_F_FM | IAP_F_SL | IAP_F_SLX),
731 IAPDESCR(0EH_01H, 0x0E, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB |
732 IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
733 IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
734 IAPDESCR(0EH_02H, 0x0E, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SL |
736 IAPDESCR(0EH_10H, 0x0E, 0x10, IAP_F_FM | IAP_F_IB | IAP_F_IBX | IAP_F_HW |
737 IAP_F_HWX | IAP_F_BW | IAP_F_BWX),
738 IAPDESCR(0EH_20H, 0x0E, 0x20, IAP_F_FM | IAP_F_IB | IAP_F_IBX | IAP_F_HW |
739 IAP_F_HWX | IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
740 IAPDESCR(0EH_40H, 0x0E, 0x40, IAP_F_FM | IAP_F_IB | IAP_F_IBX | IAP_F_HW |
741 IAP_F_HWX | IAP_F_BW | IAP_F_BWX),
743 IAPDESCR(0FH_01H, 0x0F, 0x01, IAP_F_FM | IAP_F_I7),
744 IAPDESCR(0FH_02H, 0x0F, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
745 IAPDESCR(0FH_08H, 0x0F, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
746 IAPDESCR(0FH_10H, 0x0F, 0x10, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
747 IAPDESCR(0FH_20H, 0x0F, 0x20, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
748 IAPDESCR(0FH_80H, 0x0F, 0x80, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
750 IAPDESCR(10H_00H, 0x10, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2),
751 IAPDESCR(10H_01H, 0x10, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_I7 |
752 IAP_F_WM | IAP_F_SB | IAP_F_SBX | IAP_F_IB | IAP_F_IBX ),
753 IAPDESCR(10H_02H, 0x10, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
754 IAPDESCR(10H_04H, 0x10, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
755 IAPDESCR(10H_08H, 0x10, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
756 IAPDESCR(10H_10H, 0x10, 0x10, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB |
757 IAP_F_SBX | IAP_F_IB | IAP_F_IBX),
758 IAPDESCR(10H_20H, 0x10, 0x20, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB |
759 IAP_F_SBX | IAP_F_IB | IAP_F_IBX),
760 IAPDESCR(10H_40H, 0x10, 0x40, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB |
761 IAP_F_SBX | IAP_F_IB | IAP_F_IBX),
762 IAPDESCR(10H_80H, 0x10, 0x80, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB |
763 IAP_F_SBX | IAP_F_IB | IAP_F_IBX),
764 IAPDESCR(10H_81H, 0x10, 0x81, IAP_F_FM | IAP_F_CA),
766 IAPDESCR(11H_00H, 0x11, 0x00, IAP_F_FM | IAP_F_CC | IAP_F_CC2),
767 IAPDESCR(11H_01H, 0x11, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_SB |
768 IAP_F_SBX | IAP_F_IB | IAP_F_IBX),
769 IAPDESCR(11H_02H, 0x11, 0x02, IAP_F_FM | IAP_F_SB | IAP_F_SBX | IAP_F_IB | IAP_F_IBX),
770 IAPDESCR(11H_81H, 0x11, 0x81, IAP_F_FM | IAP_F_CA),
772 IAPDESCR(12H_00H, 0x12, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2),
773 IAPDESCR(12H_01H, 0x12, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_I7 | IAP_F_WM),
774 IAPDESCR(12H_02H, 0x12, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
775 IAPDESCR(12H_04H, 0x12, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
776 IAPDESCR(12H_08H, 0x12, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
777 IAPDESCR(12H_10H, 0x12, 0x10, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
778 IAPDESCR(12H_20H, 0x12, 0x20, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
779 IAPDESCR(12H_40H, 0x12, 0x40, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
780 IAPDESCR(12H_81H, 0x12, 0x81, IAP_F_FM | IAP_F_CA),
782 IAPDESCR(13H_00H, 0x13, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2),
783 IAPDESCR(13H_01H, 0x13, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_I7 | IAP_F_WM),
784 IAPDESCR(13H_02H, 0x13, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
785 IAPDESCR(13H_04H, 0x13, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
786 IAPDESCR(13H_07H, 0x13, 0x07, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
787 IAPDESCR(13H_81H, 0x13, 0x81, IAP_F_FM | IAP_F_CA),
789 IAPDESCR(14H_00H, 0x14, 0x00, IAP_F_FM | IAP_F_CC | IAP_F_CC2),
790 IAPDESCR(14H_01H, 0x14, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_I7 |
791 IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX |
792 IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
793 IAPDESCR(14H_02H, 0x14, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
795 IAPDESCR(17H_01H, 0x17, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB |
798 IAPDESCR(18H_00H, 0x18, 0x00, IAP_F_FM | IAP_F_CA | IAP_F_CC2),
799 IAPDESCR(18H_01H, 0x18, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
801 IAPDESCR(19H_00H, 0x19, 0x00, IAP_F_FM | IAP_F_CA | IAP_F_CC2),
802 IAPDESCR(19H_01H, 0x19, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
803 IAP_F_I7 | IAP_F_WM),
804 IAPDESCR(19H_02H, 0x19, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2),
806 IAPDESCR(1DH_01H, 0x1D, 0x01, IAP_F_FM | IAP_F_I7O),
807 IAPDESCR(1DH_02H, 0x1D, 0x02, IAP_F_FM | IAP_F_I7O),
808 IAPDESCR(1DH_04H, 0x1D, 0x04, IAP_F_FM | IAP_F_I7O),
810 IAPDESCR(1EH_01H, 0x1E, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
812 IAPDESCR(20H_01H, 0x20, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
813 IAPDESCR(21H, 0x21, IAP_M_CORE, IAP_F_ALLCPUSCORE2),
814 IAPDESCR(22H, 0x22, IAP_M_CORE, IAP_F_CC2),
815 IAPDESCR(23H, 0x23, IAP_M_CORE, IAP_F_ALLCPUSCORE2),
817 IAPDESCR(24H, 0x24, IAP_M_CORE | IAP_M_PREFETCH, IAP_F_ALLCPUSCORE2),
818 IAPDESCR(24H_01H, 0x24, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB |
819 IAP_F_IB | IAP_F_SBX | IAP_F_IBX ),
820 IAPDESCR(24H_02H, 0x24, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
821 IAPDESCR(24H_03H, 0x24, 0x03, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB |
822 IAP_F_IB | IAP_F_SBX | IAP_F_IBX),
823 IAPDESCR(24H_04H, 0x24, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB |
824 IAP_F_IB | IAP_F_SBX | IAP_F_IBX),
825 IAPDESCR(24H_08H, 0x24, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB |
826 IAP_F_IB | IAP_F_SBX | IAP_F_IBX),
827 IAPDESCR(24H_0CH, 0x24, 0x0C, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB |
828 IAP_F_IB | IAP_F_SBX | IAP_F_IBX),
829 IAPDESCR(24H_10H, 0x24, 0x10, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB |
830 IAP_F_IB | IAP_F_SBX | IAP_F_IBX),
831 IAPDESCR(24H_20H, 0x24, 0x20, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB |
832 IAP_F_IB | IAP_F_SBX | IAP_F_IBX),
833 IAPDESCR(24H_21H, 0x24, 0x21, IAP_F_FM | IAP_F_HW | IAP_F_HWX |
834 IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
835 IAPDESCR(24H_22H, 0x24, 0x22, IAP_F_FM | IAP_F_HW | IAP_F_HWX | IAP_F_SL |
837 IAPDESCR(24H_24H, 0x24, 0x24, IAP_F_FM | IAP_F_HW | IAP_F_HWX | IAP_F_SL |
839 IAPDESCR(24H_27H, 0x24, 0x27, IAP_F_FM | IAP_F_HW | IAP_F_HWX | IAP_F_SL |
841 IAPDESCR(24H_30H, 0x24, 0x30, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB |
842 IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
843 IAP_F_BW | IAP_F_BWX),
844 IAPDESCR(24H_38H, 0x24, 0x38, IAP_F_FM | IAP_F_SL | IAP_F_SLX),
845 IAPDESCR(24H_3FH, 0x24, 0x3F, IAP_F_FM | IAP_F_HW | IAP_F_HWX | IAP_F_SL |
847 IAPDESCR(24H_40H, 0x24, 0x40, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB |
848 IAP_F_IB | IAP_F_SBX | IAP_F_IBX),
849 IAPDESCR(24H_41H, 0x24, 0x41, IAP_F_FM | IAP_F_HW | IAP_F_HWX |
850 IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
851 IAPDESCR(24H_42H, 0x24, 0x42, IAP_F_FM | IAP_F_HW | IAP_F_HWX | IAP_F_SL |
853 IAPDESCR(24H_44H, 0x24, 0x44, IAP_F_FM | IAP_F_HW | IAP_F_HWX | IAP_F_SL |
855 IAPDESCR(24H_50H, 0x24, 0x50, IAP_F_FM | IAP_F_HW | IAP_F_HWX |
856 IAP_F_BW | IAP_F_BWX),
857 IAPDESCR(24H_80H, 0x24, 0x80, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB |
858 IAP_F_IB | IAP_F_SBX | IAP_F_IBX),
859 IAPDESCR(24H_AAH, 0x24, 0xAA, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
860 IAPDESCR(24H_C0H, 0x24, 0xC0, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB |
861 IAP_F_IB | IAP_F_SBX | IAP_F_IBX),
862 IAPDESCR(24H_D8H, 0x24, 0xD8, IAP_F_FM | IAP_F_SL | IAP_F_SLX),
863 IAPDESCR(24H_E1H, 0x24, 0xE1, IAP_F_FM | IAP_F_HW | IAP_F_HWX |
864 IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
865 IAPDESCR(24H_E2H, 0x24, 0xE2, IAP_F_FM | IAP_F_HW | IAP_F_HWX | IAP_F_BW |
866 IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
867 IAPDESCR(24H_E4H, 0x24, 0xE4, IAP_F_FM | IAP_F_HW | IAP_F_HWX | IAP_F_BW |
868 IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
869 IAPDESCR(24H_E7H, 0x24, 0xE7, IAP_F_FM | IAP_F_HW | IAP_F_HWX | IAP_F_SL |
871 IAPDESCR(24H_EFH, 0x24, 0xEF, IAP_F_FM | IAP_F_SL),
872 IAPDESCR(24H_F8H, 0x24, 0xF8, IAP_F_FM | IAP_F_HW | IAP_F_HWX | IAP_F_BW |
873 IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
874 IAPDESCR(24H_FFH, 0x24, 0xFF, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_HW |
875 IAP_F_HWX | IAP_F_SLX),
877 IAPDESCR(25H, 0x25, IAP_M_CORE, IAP_F_ALLCPUSCORE2),
879 IAPDESCR(26H, 0x26, IAP_M_CORE | IAP_M_PREFETCH, IAP_F_ALLCPUSCORE2),
880 IAPDESCR(26H_01H, 0x26, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
881 IAPDESCR(26H_02H, 0x26, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
882 IAPDESCR(26H_04H, 0x26, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
883 IAPDESCR(26H_08H, 0x26, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
884 IAPDESCR(26H_0FH, 0x26, 0x0F, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
885 IAPDESCR(26H_10H, 0x26, 0x10, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
886 IAPDESCR(26H_20H, 0x26, 0x20, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
887 IAPDESCR(26H_40H, 0x26, 0x40, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
888 IAPDESCR(26H_80H, 0x26, 0x80, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
889 IAPDESCR(26H_F0H, 0x26, 0xF0, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
890 IAPDESCR(26H_FFH, 0x26, 0xFF, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
892 IAPDESCR(27H, 0x27, IAP_M_CORE | IAP_M_PREFETCH, IAP_F_ALLCPUSCORE2),
893 IAPDESCR(27H_01H, 0x27, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB |
894 IAP_F_IB | IAP_F_SBX | IAP_F_IBX),
895 IAPDESCR(27H_02H, 0x27, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
896 IAPDESCR(27H_04H, 0x27, 0x04, IAP_F_FM | IAP_F_I7O | IAP_F_SB |
898 IAPDESCR(27H_08H, 0x27, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB |
899 IAP_F_IB | IAP_F_SBX | IAP_F_IBX),
900 IAPDESCR(27H_0EH, 0x27, 0x0E, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
901 IAPDESCR(27H_0FH, 0x27, 0x0F, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB |
902 IAP_F_IB | IAP_F_SBX | IAP_F_IBX),
903 IAPDESCR(27H_10H, 0x27, 0x10, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
904 IAPDESCR(27H_20H, 0x27, 0x20, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
905 IAPDESCR(27H_40H, 0x27, 0x40, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
906 IAPDESCR(27H_50H, 0x27, 0x50, IAP_F_FM | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX),
907 IAPDESCR(27H_80H, 0x27, 0x80, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
908 IAPDESCR(27H_E0H, 0x27, 0xE0, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
909 IAPDESCR(27H_F0H, 0x27, 0xF0, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
911 IAPDESCR(28H, 0x28, IAP_M_CORE | IAP_M_MESI, IAP_F_ALLCPUSCORE2),
912 IAPDESCR(28H_01H, 0x28, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_IB |
913 IAP_F_SBX | IAP_F_IBX),
914 IAPDESCR(28H_02H, 0x28, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SBX),
915 IAPDESCR(28H_04H, 0x28, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB |
916 IAP_F_IB | IAP_F_SBX | IAP_F_IBX),
917 IAPDESCR(28H_07H, 0x28, 0x07, IAP_F_FM | IAP_F_SLX),
918 IAPDESCR(28H_08H, 0x28, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB |
919 IAP_F_IB | IAP_F_SBX | IAP_F_IBX),
920 IAPDESCR(28H_0FH, 0x28, 0x0F, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_IB |
921 IAP_F_SBX | IAP_F_IBX),
922 IAPDESCR(28H_18H, 0x28, 0x18, IAP_F_SLX),
923 IAPDESCR(28H_20H, 0x28, 0x20, IAP_F_SLX),
924 IAPDESCR(28H_40H, 0x28, 0x40, IAP_F_SLX),
926 IAPDESCR(29H, 0x29, IAP_M_CORE | IAP_M_MESI, IAP_F_CC),
927 IAPDESCR(29H, 0x29, IAP_M_CORE | IAP_M_MESI | IAP_M_PREFETCH,
928 IAP_F_CA | IAP_F_CC2),
929 IAPDESCR(2AH, 0x2A, IAP_M_CORE | IAP_M_MESI, IAP_F_ALLCPUSCORE2),
930 IAPDESCR(2BH, 0x2B, IAP_M_CORE | IAP_M_MESI, IAP_F_CA | IAP_F_CC2),
932 IAPDESCR(2EH, 0x2E, IAP_M_CORE | IAP_M_MESI | IAP_M_PREFETCH,
934 IAPDESCR(2EH_01H, 0x2E, 0x01, IAP_F_FM | IAP_F_WM),
935 IAPDESCR(2EH_02H, 0x2E, 0x02, IAP_F_FM | IAP_F_WM),
936 IAPDESCR(2EH_41H, 0x2E, 0x41, IAP_F_FM | IAP_F_ALLCPUSCORE2 | IAP_F_I7 |
937 IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW |
938 IAP_F_CAS | IAP_F_HWX | IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
939 IAPDESCR(2EH_4FH, 0x2E, 0x4F, IAP_F_FM | IAP_F_ALLCPUSCORE2 | IAP_F_I7 |
940 IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW |
941 IAP_F_CAS | IAP_F_HWX | IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
943 IAPDESCR(30H, 0x30, IAP_M_CORE | IAP_M_MESI | IAP_M_PREFETCH,
945 IAPDESCR(30H_00H, 0x30, 0x00, IAP_F_FM | IAP_F_CAS),
946 IAPDESCR(31H_00H, 0x31, 0x00, IAP_F_FM | IAP_F_CAS),
947 IAPDESCR(32H, 0x32, IAP_M_CORE | IAP_M_MESI | IAP_M_PREFETCH, IAP_F_CC),
948 IAPDESCR(32H, 0x32, IAP_M_CORE, IAP_F_CA | IAP_F_CC2),
950 IAPDESCR(3AH, 0x3A, IAP_M_TRANSITION, IAP_F_CC),
951 IAPDESCR(3AH_00H, 0x3A, 0x00, IAP_F_FM | IAP_F_CA | IAP_F_CC2),
953 IAPDESCR(3BH_C0H, 0x3B, 0xC0, IAP_F_FM | IAP_F_ALLCPUSCORE2),
955 IAPDESCR(3CH_00H, 0x3C, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2 |
956 IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX |
957 IAP_F_HW | IAP_F_CAS | IAP_F_HWX | IAP_F_BW | IAP_F_BWX | IAP_F_SL |
959 IAPDESCR(3CH_01H, 0x3C, 0x01, IAP_F_FM | IAP_F_ALLCPUSCORE2 |
960 IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX |
961 IAP_F_HW | IAP_F_CAS | IAP_F_HWX | IAP_F_BW | IAP_F_BWX | IAP_F_SL |
963 IAPDESCR(3CH_02H, 0x3C, 0x02, IAP_F_FM | IAP_F_ALLCPUSCORE2 | IAP_F_SL |
966 IAPDESCR(3DH_01H, 0x3D, 0x01, IAP_F_FM | IAP_F_I7O),
968 IAPDESCR(40H, 0x40, IAP_M_MESI, IAP_F_CC | IAP_F_CC2),
969 IAPDESCR(40H_01H, 0x40, 0x01, IAP_F_FM | IAP_F_I7),
970 IAPDESCR(40H_02H, 0x40, 0x02, IAP_F_FM | IAP_F_I7),
971 IAPDESCR(40H_04H, 0x40, 0x04, IAP_F_FM | IAP_F_I7),
972 IAPDESCR(40H_08H, 0x40, 0x08, IAP_F_FM | IAP_F_I7),
973 IAPDESCR(40H_0FH, 0x40, 0x0F, IAP_F_FM | IAP_F_I7),
974 IAPDESCR(40H_21H, 0x40, 0x21, IAP_F_FM | IAP_F_CA),
976 IAPDESCR(41H, 0x41, IAP_M_MESI, IAP_F_CC | IAP_F_CC2),
977 IAPDESCR(41H_01H, 0x41, 0x01, IAP_F_FM | IAP_F_I7O),
978 IAPDESCR(41H_02H, 0x41, 0x02, IAP_F_FM | IAP_F_I7),
979 IAPDESCR(41H_04H, 0x41, 0x04, IAP_F_FM | IAP_F_I7),
980 IAPDESCR(41H_08H, 0x41, 0x08, IAP_F_FM | IAP_F_I7),
981 IAPDESCR(41H_0FH, 0x41, 0x0F, IAP_F_FM | IAP_F_I7O),
982 IAPDESCR(41H_22H, 0x41, 0x22, IAP_F_FM | IAP_F_CA),
984 IAPDESCR(42H, 0x42, IAP_M_MESI, IAP_F_ALLCPUSCORE2),
985 IAPDESCR(42H_01H, 0x42, 0x01, IAP_F_FM | IAP_F_I7),
986 IAPDESCR(42H_02H, 0x42, 0x02, IAP_F_FM | IAP_F_I7),
987 IAPDESCR(42H_04H, 0x42, 0x04, IAP_F_FM | IAP_F_I7),
988 IAPDESCR(42H_08H, 0x42, 0x08, IAP_F_FM | IAP_F_I7),
989 IAPDESCR(42H_10H, 0x42, 0x10, IAP_F_FM | IAP_F_CA | IAP_F_CC2),
991 IAPDESCR(43H_01H, 0x43, 0x01, IAP_F_FM | IAP_F_ALLCPUSCORE2 |
993 IAPDESCR(43H_02H, 0x43, 0x02, IAP_F_FM | IAP_F_CA |
994 IAP_F_CC2 | IAP_F_I7),
996 IAPDESCR(44H_02H, 0x44, 0x02, IAP_F_FM | IAP_F_CC),
998 IAPDESCR(45H_0FH, 0x45, 0x0F, IAP_F_FM | IAP_F_ALLCPUSCORE2),
1000 IAPDESCR(46H_00H, 0x46, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2),
1001 IAPDESCR(47H_00H, 0x47, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2),
1003 IAPDESCR(48H_00H, 0x48, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2),
1004 IAPDESCR(48H_01H, 0x48, 0x01, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1005 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX |
1006 IAP_F_SL | IAP_F_SLX),
1007 IAPDESCR(48H_02H, 0x48, 0x02, IAP_F_FM | IAP_F_I7O | IAP_F_SL | IAP_F_SLX),
1009 IAPDESCR(49H_00H, 0x49, 0x00, IAP_F_FM | IAP_F_CC),
1010 IAPDESCR(49H_01H, 0x49, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
1011 IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX |
1012 IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
1013 IAPDESCR(49H_02H, 0x49, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
1014 IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX |
1015 IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX | IAP_F_SLX),
1016 IAPDESCR(49H_04H, 0x49, 0x04, IAP_F_FM | IAP_F_WM | IAP_F_SB | IAP_F_IB |
1017 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_SLX),
1018 IAPDESCR(49H_08H, 0x49, 0x08, IAP_F_FM | IAP_F_SLX),
1019 IAPDESCR(49H_0EH, 0x49, 0x0E, IAP_F_FM | IAP_F_HW | IAP_F_HWX | IAP_F_SL |
1021 IAPDESCR(49H_10H, 0x49, 0x10, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1022 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1023 IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
1024 IAPDESCR(49H_20H, 0x49, 0x20, IAP_F_FM | IAP_F_I7 | IAP_F_HW | IAP_F_HWX |
1025 IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
1026 IAPDESCR(49H_40H, 0x49, 0x40, IAP_F_FM | IAP_F_I7O | IAP_F_HW | IAP_F_HWX),
1027 IAPDESCR(49H_60H, 0x49, 0x60, IAP_F_FM | IAP_F_HW | IAP_F_HWX),
1028 IAPDESCR(49H_80H, 0x49, 0x80, IAP_F_FM | IAP_F_WM | IAP_F_I7 | IAP_F_HW |
1031 IAPDESCR(4BH_00H, 0x4B, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2),
1032 IAPDESCR(4BH_01H, 0x4B, 0x01, IAP_F_FM | IAP_F_ALLCPUSCORE2 | IAP_F_I7O),
1033 IAPDESCR(4BH_02H, 0x4B, 0x02, IAP_F_FM | IAP_F_ALLCPUSCORE2),
1034 IAPDESCR(4BH_03H, 0x4B, 0x03, IAP_F_FM | IAP_F_CC),
1035 IAPDESCR(4BH_08H, 0x4B, 0x08, IAP_F_FM | IAP_F_I7O),
1037 IAPDESCR(4CH_00H, 0x4C, 0x00, IAP_F_FM | IAP_F_CA | IAP_F_CC2),
1038 IAPDESCR(4CH_01H, 0x4C, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1039 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1040 IAP_F_SL | IAP_F_SLX),
1041 IAPDESCR(4CH_02H, 0x4C, 0x02, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1042 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX),
1044 IAPDESCR(4DH_01H, 0x4D, 0x01, IAP_F_FM | IAP_F_I7O),
1046 IAPDESCR(4EH_01H, 0x4E, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
1047 IAPDESCR(4EH_02H, 0x4E, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1048 IAP_F_SB | IAP_F_SBX),
1049 IAPDESCR(4EH_04H, 0x4E, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
1050 IAPDESCR(4EH_10H, 0x4E, 0x10, IAP_F_FM | IAP_F_CA | IAP_F_CC2),
1052 IAPDESCR(4FH_00H, 0x4F, 0x00, IAP_F_FM | IAP_F_CC),
1053 IAPDESCR(4FH_02H, 0x4F, 0x02, IAP_F_FM | IAP_F_I7O),
1054 IAPDESCR(4FH_04H, 0x4F, 0x04, IAP_F_FM | IAP_F_I7O),
1055 IAPDESCR(4FH_08H, 0x4F, 0x08, IAP_F_FM | IAP_F_I7O),
1056 IAPDESCR(4FH_10H, 0x4F, 0x10, IAP_F_FM | IAP_F_WM | IAP_F_BW | IAP_F_BWX |
1057 IAP_F_SL | IAP_F_SLX),
1059 IAPDESCR(51H_01H, 0x51, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1060 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW |
1061 IAP_F_HWX | IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
1062 IAPDESCR(51H_02H, 0x51, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1063 IAP_F_SB | IAP_F_SBX),
1064 IAPDESCR(51H_04H, 0x51, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1065 IAP_F_SB | IAP_F_SBX),
1066 IAPDESCR(51H_08H, 0x51, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1067 IAP_F_SB | IAP_F_SBX),
1069 IAPDESCR(52H_01H, 0x52, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
1071 IAPDESCR(53H_01H, 0x53, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
1073 IAPDESCR(54H_01H, 0x54, 0x01, IAP_F_FM | IAP_F_SLX),
1074 IAPDESCR(54H_02H, 0x54, 0x02, IAP_F_FM | IAP_F_SLX),
1075 IAPDESCR(54H_04H, 0x54, 0x04, IAP_F_FM | IAP_F_SLX),
1076 IAPDESCR(54H_08H, 0x54, 0x08, IAP_F_FM | IAP_F_SLX),
1077 IAPDESCR(54H_10H, 0x54, 0x10, IAP_F_FM | IAP_F_SLX),
1078 IAPDESCR(54H_20H, 0x54, 0x20, IAP_F_FM | IAP_F_SLX),
1079 IAPDESCR(54H_40H, 0x54, 0x40, IAP_F_FM | IAP_F_SLX),
1081 IAPDESCR(58H_01H, 0x58, 0x01, IAP_F_FM | IAP_F_IB | IAP_F_IBX | IAP_F_HW |
1082 IAP_F_HWX | IAP_F_BW | IAP_F_BWX),
1083 IAPDESCR(58H_02H, 0x58, 0x02, IAP_F_FM | IAP_F_IB | IAP_F_IBX | IAP_F_HW |
1084 IAP_F_HWX | IAP_F_BW | IAP_F_BWX),
1085 IAPDESCR(58H_04H, 0x58, 0x04, IAP_F_FM | IAP_F_IB | IAP_F_IBX | IAP_F_HW |
1086 IAP_F_HWX | IAP_F_BW | IAP_F_BWX),
1087 IAPDESCR(58H_08H, 0x58, 0x08, IAP_F_FM | IAP_F_IB | IAP_F_IBX | IAP_F_HW |
1088 IAP_F_HWX | IAP_F_BW | IAP_F_BWX),
1090 IAPDESCR(59H_20H, 0x59, 0x20, IAP_F_FM | IAP_F_SB | IAP_F_SBX),
1091 IAPDESCR(59H_40H, 0x59, 0x40, IAP_F_FM | IAP_F_SB | IAP_F_SBX),
1092 IAPDESCR(59H_80H, 0x59, 0x80, IAP_F_FM | IAP_F_SB | IAP_F_SBX),
1094 IAPDESCR(5BH_0CH, 0x5B, 0x0C, IAP_F_FM | IAP_F_SB | IAP_F_SBX),
1095 IAPDESCR(5BH_0FH, 0x5B, 0x0F, IAP_F_FM | IAP_F_SB | IAP_F_SBX),
1096 IAPDESCR(5BH_40H, 0x5B, 0x40, IAP_F_FM | IAP_F_SB | IAP_F_SBX),
1097 IAPDESCR(5BH_4FH, 0x5B, 0x4F, IAP_F_FM | IAP_F_SB | IAP_F_SBX),
1099 IAPDESCR(5CH_01H, 0x5C, 0x01, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1100 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX),
1101 IAPDESCR(5CH_02H, 0x5C, 0x02, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1102 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX),
1104 IAPDESCR(5DH_01H, 0x5d, 0x01, IAP_F_FM | IAP_F_SLX),
1105 IAPDESCR(5DH_02H, 0x5d, 0x02, IAP_F_FM | IAP_F_SLX),
1106 IAPDESCR(5DH_04H, 0x5d, 0x04, IAP_F_FM | IAP_F_SLX),
1107 IAPDESCR(5DH_08H, 0x5d, 0x08, IAP_F_FM | IAP_F_SLX),
1108 IAPDESCR(5DH_10H, 0x5d, 0x10, IAP_F_FM | IAP_F_SLX),
1110 IAPDESCR(5EH_01H, 0x5E, 0x01, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1111 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX |
1112 IAP_F_SL | IAP_F_SLX),
1114 IAPDESCR(5FH_01H, 0x5F, 0x01, IAP_F_FM | IAP_F_IB ), /* IB not in manual */
1115 IAPDESCR(5FH_04H, 0x5F, 0x04, IAP_F_FM | IAP_F_IBX | IAP_F_IB),
1117 IAPDESCR(60H, 0x60, IAP_M_AGENT | IAP_M_CORE, IAP_F_ALLCPUSCORE2),
1118 IAPDESCR(60H_01H, 0x60, 0x01, IAP_F_FM | IAP_F_WM | IAP_F_I7O |
1119 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1120 IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
1121 IAPDESCR(60H_02H, 0x60, 0x02, IAP_F_FM | IAP_F_WM | IAP_F_I7O | IAP_F_IB |
1122 IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX | IAP_F_SL |
1124 IAPDESCR(60H_04H, 0x60, 0x04, IAP_F_FM |IAP_F_I7O |
1125 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1126 IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
1127 IAPDESCR(60H_08H, 0x60, 0x08, IAP_F_FM |IAP_F_I7O |
1128 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1129 IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
1130 IAPDESCR(60H_10H, 0x60, 0x10, IAP_F_FM | IAP_F_SL | IAP_F_SLX),
1132 IAPDESCR(61H, 0x61, IAP_M_AGENT, IAP_F_CA | IAP_F_CC2),
1134 IAPDESCR(61H_00H, 0x61, 0x00, IAP_F_FM | IAP_F_CC),
1136 IAPDESCR(62H, 0x62, IAP_M_AGENT, IAP_F_ALLCPUSCORE2),
1137 IAPDESCR(62H_00H, 0x62, 0x00, IAP_F_FM | IAP_F_CC),
1139 IAPDESCR(63H, 0x63, IAP_M_AGENT | IAP_M_CORE,
1140 IAP_F_CA | IAP_F_CC2),
1141 IAPDESCR(63H, 0x63, IAP_M_CORE, IAP_F_CC),
1142 IAPDESCR(63H_01H, 0x63, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1143 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1144 IAP_F_BW | IAP_F_BWX ),
1145 IAPDESCR(63H_02H, 0x63, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1146 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1147 IAP_F_BW | IAP_F_BWX | IAP_F_SL),
1149 IAPDESCR(64H, 0x64, IAP_M_CORE, IAP_F_CA | IAP_F_CC2),
1150 IAPDESCR(64H_40H, 0x64, 0x40, IAP_F_FM | IAP_F_CC),
1152 IAPDESCR(65H, 0x65, IAP_M_AGENT | IAP_M_CORE,
1153 IAP_F_CA | IAP_F_CC2),
1154 IAPDESCR(65H, 0x65, IAP_M_CORE, IAP_F_CC),
1156 IAPDESCR(66H, 0x66, IAP_M_AGENT | IAP_M_CORE, IAP_F_ALLCPUSCORE2),
1158 IAPDESCR(67H, 0x67, IAP_M_AGENT | IAP_M_CORE, IAP_F_CA | IAP_F_CC2),
1159 IAPDESCR(67H, 0x67, IAP_M_AGENT, IAP_F_CC),
1160 IAPDESCR(68H, 0x68, IAP_M_AGENT | IAP_M_CORE, IAP_F_ALLCPUSCORE2),
1161 IAPDESCR(69H, 0x69, IAP_M_AGENT | IAP_M_CORE, IAP_F_ALLCPUSCORE2),
1162 IAPDESCR(6AH, 0x6A, IAP_M_AGENT | IAP_M_CORE, IAP_F_ALLCPUSCORE2),
1163 IAPDESCR(6BH, 0x6B, IAP_M_AGENT | IAP_M_CORE, IAP_F_ALLCPUSCORE2),
1165 IAPDESCR(6CH, 0x6C, IAP_M_AGENT | IAP_M_CORE, IAP_F_ALLCPUSCORE2),
1166 IAPDESCR(6CH_01H, 0x6C, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
1168 IAPDESCR(6DH, 0x6D, IAP_M_AGENT | IAP_M_CORE, IAP_F_CA | IAP_F_CC2),
1169 IAPDESCR(6DH, 0x6D, IAP_M_CORE, IAP_F_CC),
1171 IAPDESCR(6EH, 0x6E, IAP_M_AGENT | IAP_M_CORE, IAP_F_CA | IAP_F_CC2),
1172 IAPDESCR(6EH, 0x6E, IAP_M_CORE, IAP_F_CC),
1174 IAPDESCR(6FH, 0x6F, IAP_M_AGENT | IAP_M_CORE, IAP_F_CA | IAP_F_CC2),
1175 IAPDESCR(6FH, 0x6F, IAP_M_CORE, IAP_F_CC),
1177 IAPDESCR(70H, 0x70, IAP_M_AGENT | IAP_M_CORE, IAP_F_CA | IAP_F_CC2),
1178 IAPDESCR(70H, 0x70, IAP_M_CORE, IAP_F_CC),
1180 IAPDESCR(77H, 0x77, IAP_M_AGENT | IAP_M_SNOOPRESPONSE,
1181 IAP_F_CA | IAP_F_CC2),
1182 IAPDESCR(77H, 0x77, IAP_M_AGENT | IAP_M_MESI, IAP_F_CC),
1184 IAPDESCR(78H, 0x78, IAP_M_CORE, IAP_F_CC),
1185 IAPDESCR(78H, 0x78, IAP_M_CORE | IAP_M_SNOOPTYPE, IAP_F_CA | IAP_F_CC2),
1187 IAPDESCR(79H_02H, 0x79, 0x02, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1188 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX),
1189 IAPDESCR(79H_04H, 0x79, 0x04, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1190 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX |
1191 IAP_F_SL | IAP_F_SLX),
1192 IAPDESCR(79H_08H, 0x79, 0x08, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1193 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_SL | IAP_F_BW |
1194 IAP_F_BWX | IAP_F_SLX),
1195 IAPDESCR(79H_10H, 0x79, 0x10, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1196 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX |
1197 IAP_F_SL | IAP_F_SLX),
1198 IAPDESCR(79H_18H, 0x79, 0x18, IAP_F_FM | IAP_F_IB | IAP_F_IBX | IAP_F_HW |
1199 IAP_F_HWX | IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
1200 IAPDESCR(79H_20H, 0x79, 0x20, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1201 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX |
1202 IAP_F_SL | IAP_F_SLX),
1203 IAPDESCR(79H_24H, 0x79, 0x24, IAP_F_FM | IAP_F_IB | IAP_F_IBX | IAP_F_HW |
1204 IAP_F_HWX | IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
1205 IAPDESCR(79H_30H, 0x79, 0x30, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1206 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX |
1207 IAP_F_SL | IAP_F_SLX),
1208 IAPDESCR(79H_3CH, 0x79, 0x3C, IAP_F_FM | IAP_F_IB | IAP_F_IBX | IAP_F_HW |
1209 IAP_F_HWX | IAP_F_BW | IAP_F_BWX),
1211 IAPDESCR(7AH, 0x7A, IAP_M_AGENT, IAP_F_CA | IAP_F_CC2),
1213 IAPDESCR(7BH, 0x7B, IAP_M_AGENT, IAP_F_CA | IAP_F_CC2),
1215 IAPDESCR(7DH, 0x7D, IAP_M_CORE, IAP_F_ALLCPUSCORE2),
1217 IAPDESCR(7EH, 0x7E, IAP_M_AGENT | IAP_M_CORE, IAP_F_CA | IAP_F_CC2),
1218 IAPDESCR(7EH_00H, 0x7E, 0x00, IAP_F_FM | IAP_F_CC),
1220 IAPDESCR(7FH, 0x7F, IAP_M_CORE, IAP_F_CA | IAP_F_CC2),
1222 IAPDESCR(80H_00H, 0x80, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2),
1223 IAPDESCR(80H_01H, 0x80, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_CAS),
1224 IAPDESCR(80H_02H, 0x80, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_I7 |
1225 IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW |
1226 IAP_F_CAS | IAP_F_HWX | IAP_F_BW | IAP_F_BWX),
1227 IAPDESCR(80H_03H, 0x80, 0x03, IAP_F_FM | IAP_F_CA | IAP_F_I7 |
1228 IAP_F_WM | IAP_F_CAS),
1229 IAPDESCR(80H_04H, 0x80, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_IB |
1230 IAP_F_IBX | IAP_F_SL | IAP_F_SLX), /* SL may have a spec bug two with
1231 same entry no cmask */
1233 IAPDESCR(81H_00H, 0x81, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2),
1234 IAPDESCR(81H_01H, 0x81, 0x01, IAP_F_FM | IAP_F_I7O),
1235 IAPDESCR(81H_02H, 0x81, 0x02, IAP_F_FM | IAP_F_I7O),
1237 IAPDESCR(82H_01H, 0x82, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
1238 IAPDESCR(82H_02H, 0x82, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2),
1239 IAPDESCR(82H_04H, 0x82, 0x04, IAP_F_FM | IAP_F_CA),
1240 IAPDESCR(82H_10H, 0x82, 0x10, IAP_F_FM | IAP_F_CA | IAP_F_CC2),
1241 IAPDESCR(82H_12H, 0x82, 0x12, IAP_F_FM | IAP_F_CC2),
1242 IAPDESCR(82H_40H, 0x82, 0x40, IAP_F_FM | IAP_F_CC2),
1244 IAPDESCR(83H_01H, 0x83, 0x01, IAP_F_FM | IAP_F_I7O | IAP_F_SL | IAP_F_SLX),
1245 IAPDESCR(83H_02H, 0x83, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_SL |
1247 IAPDESCR(83H_04H, 0x83, 0x04, IAP_F_FM | IAP_F_SLX),
1249 IAPDESCR(85H_00H, 0x85, 0x00, IAP_F_FM | IAP_F_CC),
1250 IAPDESCR(85H_01H, 0x85, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1251 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1252 IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
1253 IAPDESCR(85H_02H, 0x85, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1254 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1255 IAP_F_BW | IAP_F_BWX | IAP_F_SLX),
1256 IAPDESCR(85H_04H, 0x85, 0x04, IAP_F_FM | IAP_F_WM | IAP_F_I7O |
1257 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1259 IAPDESCR(85H_08H, 0x85, 0x08, IAP_F_FM | IAP_F_SLX),
1260 IAPDESCR(85H_0EH, 0x85, 0x0E, IAP_F_FM | IAP_F_HW | IAP_F_HWX | IAP_F_SL |
1262 IAPDESCR(85H_10H, 0x85, 0x10, IAP_F_FM | IAP_F_I7O | IAP_F_SB | IAP_F_IB |
1263 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX |
1264 IAP_F_SL | IAP_F_SLX),
1265 IAPDESCR(85H_20H, 0x85, 0x20, IAP_F_FM | IAP_F_I7O | IAP_F_HW | IAP_F_HWX |
1266 IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
1267 IAPDESCR(85H_40H, 0x85, 0x40, IAP_F_FM | IAP_F_I7O | IAP_F_HW | IAP_F_HWX),
1268 IAPDESCR(85H_60H, 0x85, 0x60, IAP_F_FM | IAP_F_HW | IAP_F_HWX),
1269 IAPDESCR(85H_80H, 0x85, 0x80, IAP_F_FM | IAP_F_WM | IAP_F_I7O),
1271 IAPDESCR(86H_00H, 0x86, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2),
1273 IAPDESCR(87H_00H, 0x87, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2),
1274 IAPDESCR(87H_01H, 0x87, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1275 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1276 IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
1277 IAPDESCR(87H_02H, 0x87, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
1278 IAPDESCR(87H_04H, 0x87, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1279 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX),
1280 IAPDESCR(87H_08H, 0x87, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
1281 IAPDESCR(87H_0FH, 0x87, 0x0F, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
1283 IAPDESCR(88H_00H, 0x88, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2),
1284 IAPDESCR(88H_01H, 0x88, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_BW | IAP_F_BWX),
1285 IAPDESCR(88H_02H, 0x88, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_BW | IAP_F_BWX),
1286 IAPDESCR(88H_04H, 0x88, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_BW | IAP_F_BWX),
1287 IAPDESCR(88H_07H, 0x88, 0x07, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
1288 IAPDESCR(88H_08H, 0x88, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_BW | IAP_F_BWX),
1289 IAPDESCR(88H_10H, 0x88, 0x10, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_BW | IAP_F_BWX),
1290 IAPDESCR(88H_20H, 0x88, 0x20, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_BW | IAP_F_BWX),
1291 IAPDESCR(88H_30H, 0x88, 0x30, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
1292 IAPDESCR(88H_40H, 0x88, 0x40, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_BW | IAP_F_BWX),
1293 IAPDESCR(88H_41H, 0x88, 0x41, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1294 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX),
1295 IAPDESCR(88H_7FH, 0x88, 0x7F, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
1296 IAPDESCR(88H_80H, 0x88, 0x80, IAP_F_FM | IAP_F_BW | IAP_F_BWX),
1297 IAPDESCR(88H_81H, 0x88, 0x81, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1298 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX),
1299 IAPDESCR(88H_82H, 0x88, 0x82, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1300 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX),
1301 IAPDESCR(88H_84H, 0x88, 0x84, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1302 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX),
1303 IAPDESCR(88H_88H, 0x88, 0x88, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1304 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX),
1305 IAPDESCR(88H_90H, 0x88, 0x90, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1306 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX),
1307 IAPDESCR(88H_A0H, 0x88, 0xA0, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1308 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX),
1309 IAPDESCR(88H_FFH, 0x88, 0xFF, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1310 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX),
1312 IAPDESCR(89H_00H, 0x89, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2),
1313 IAPDESCR(89H_01H, 0x89, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_BW | IAP_F_BWX),
1314 IAPDESCR(89H_02H, 0x89, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
1315 IAPDESCR(89H_04H, 0x89, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_BW | IAP_F_BWX),
1316 IAPDESCR(89H_07H, 0x89, 0x07, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
1317 IAPDESCR(89H_08H, 0x89, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_BW | IAP_F_BWX),
1318 IAPDESCR(89H_10H, 0x89, 0x10, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_BW | IAP_F_BWX),
1319 IAPDESCR(89H_20H, 0x89, 0x20, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_BW | IAP_F_BWX),
1320 IAPDESCR(89H_30H, 0x89, 0x30, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
1321 IAPDESCR(89H_40H, 0x89, 0x40, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_BW | IAP_F_BWX),
1322 IAPDESCR(89H_41H, 0x89, 0x41, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1323 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX),
1324 IAPDESCR(89H_7FH, 0x89, 0x7F, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
1325 IAPDESCR(89H_80H, 0x89, 0x80, IAP_F_FM | IAP_F_BW | IAP_F_BWX),
1326 IAPDESCR(89H_81H, 0x89, 0x81, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1327 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX),
1328 IAPDESCR(89H_82H, 0x89, 0x82, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1329 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX),
1330 IAPDESCR(89H_84H, 0x89, 0x84, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1331 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX),
1332 IAPDESCR(89H_88H, 0x89, 0x88, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1333 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX),
1334 IAPDESCR(89H_90H, 0x89, 0x90, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1335 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX),
1336 IAPDESCR(89H_A0H, 0x89, 0xA0, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1337 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX),
1338 IAPDESCR(89H_FFH, 0x89, 0xFF, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1339 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX),
1341 IAPDESCR(8AH_00H, 0x8A, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2),
1342 IAPDESCR(8BH_00H, 0x8B, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2),
1343 IAPDESCR(8CH_00H, 0x8C, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2),
1344 IAPDESCR(8DH_00H, 0x8D, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2),
1345 IAPDESCR(8EH_00H, 0x8E, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2),
1346 IAPDESCR(8FH_00H, 0x8F, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2),
1348 IAPDESCR(90H_00H, 0x90, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2),
1349 IAPDESCR(91H_00H, 0x91, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2),
1350 IAPDESCR(92H_00H, 0x92, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2),
1351 IAPDESCR(93H_00H, 0x93, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2),
1352 IAPDESCR(94H_00H, 0x94, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2),
1354 IAPDESCR(97H_00H, 0x97, 0x00, IAP_F_FM | IAP_F_CA | IAP_F_CC2),
1355 IAPDESCR(98H_00H, 0x98, 0x00, IAP_F_FM | IAP_F_CA | IAP_F_CC2),
1357 IAPDESCR(9CH_01H, 0x9C, 0x01, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1358 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX |
1359 IAP_F_SL | IAP_F_SLX),
1361 IAPDESCR(A0H_00H, 0xA0, 0x00, IAP_F_FM | IAP_F_CA | IAP_F_CC2),
1363 IAPDESCR(A1H_01H, 0xA1, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
1364 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1365 IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
1366 IAPDESCR(A1H_02H, 0xA1, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
1367 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1368 IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
1369 IAPDESCR(A1H_04H, 0xA1, 0x04, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | /* No desc in IB for this*/
1370 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1371 IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
1372 IAPDESCR(A1H_08H, 0xA1, 0x08, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | /* No desc in IB for this*/
1373 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1374 IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
1375 IAPDESCR(A1H_0CH, 0xA1, 0x0C, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1376 IAP_F_SBX | IAP_F_IBX),
1377 IAPDESCR(A1H_10H, 0xA1, 0x10, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | /* No desc in IB for this*/
1378 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1379 IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
1380 IAPDESCR(A1H_20H, 0xA1, 0x20, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | /* No desc in IB for this*/
1381 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1382 IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
1383 IAPDESCR(A1H_40H, 0xA1, 0x40, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1384 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX |
1385 IAP_F_SL | IAP_F_SLX),
1386 IAPDESCR(A1H_80H, 0xA1, 0x80, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1387 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX |
1388 IAP_F_SL | IAP_F_SLX),
1390 IAPDESCR(A2H_00H, 0xA2, 0x00, IAP_F_FM | IAP_F_CC),
1391 IAPDESCR(A2H_01H, 0xA2, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1392 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1393 IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
1394 IAPDESCR(A2H_02H, 0xA2, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1395 IAP_F_SB | IAP_F_SBX),
1396 IAPDESCR(A2H_04H, 0xA2, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1397 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1398 IAP_F_BW | IAP_F_BWX),
1399 IAPDESCR(A2H_08H, 0xA2, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1400 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1401 IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
1402 IAPDESCR(A2H_10H, 0xA2, 0x10, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1403 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1404 IAP_F_BW | IAP_F_BWX),
1405 IAPDESCR(A2H_20H, 0xA2, 0x20, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1406 IAP_F_SB | IAP_F_SBX),
1407 IAPDESCR(A2H_40H, 0xA2, 0x40, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1408 IAP_F_SB | IAP_F_SBX),
1409 IAPDESCR(A2H_80H, 0xA2, 0x80, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1410 IAP_F_SB | IAP_F_SBX),
1412 IAPDESCR(A3H_01H, 0xA3, 0x01, IAP_F_FM | IAP_F_SBX | IAP_F_IBX | IAP_F_IB |
1413 IAP_F_HW | IAP_F_HWX | IAP_F_SL | IAP_F_SLX),
1414 IAPDESCR(A3H_02H, 0xA3, 0x02, IAP_F_FM | IAP_F_SBX | IAP_F_IBX | IAP_F_IB |
1415 IAP_F_HW | IAP_F_HWX | IAP_F_SL | IAP_F_SLX),
1416 IAPDESCR(A3H_04H, 0xA3, 0x04, IAP_F_FM | IAP_F_SBX | IAP_F_IBX | IAP_F_IB |
1417 IAP_F_SL | IAP_F_SLX),
1418 IAPDESCR(A3H_05H, 0xA3, 0x05, IAP_F_FM | IAP_F_HW | IAP_F_HWX | IAP_F_SL |
1420 IAPDESCR(A3H_06H, 0xA3, 0x06, IAP_F_FM | IAP_F_SL | IAP_F_SLX),
1421 IAPDESCR(A3H_08H, 0xA3, 0x08, IAP_F_FM | IAP_F_IBX | IAP_F_HW | IAP_F_IB |
1422 IAP_F_HWX | IAP_F_SL | IAP_F_SLX),
1423 IAPDESCR(A3H_0CH, 0xA3, 0x0C, IAP_F_FM | IAP_F_HW | IAP_F_HW | IAP_F_SL |
1425 IAPDESCR(A3H_10H, 0xA3, 0x10, IAP_F_FM | IAP_F_SL | IAP_F_SLX),
1426 IAPDESCR(A3H_14H, 0xA3, 0x14, IAP_F_FM | IAP_F_SL | IAP_F_SLX),
1428 IAPDESCR(A6H_01H, 0xA6, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SL |
1430 IAPDESCR(A6H_02H, 0xA6, 0x02, IAP_F_FM | IAP_F_SL | IAP_F_SLX),
1431 IAPDESCR(A6H_04H, 0xA6, 0x04, IAP_F_FM | IAP_F_SL | IAP_F_SLX),
1432 IAPDESCR(A6H_08H, 0xA6, 0x08, IAP_F_FM | IAP_F_SL | IAP_F_SLX),
1433 IAPDESCR(A6H_10H, 0xA6, 0x10, IAP_F_FM | IAP_F_SL | IAP_F_SLX),
1434 IAPDESCR(A6H_40H, 0xA6, 0x40, IAP_F_FM | IAP_F_SL | IAP_F_SLX),
1436 IAPDESCR(A7H_01H, 0xA7, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM ),
1438 IAPDESCR(A8H_01H, 0xA8, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_IBX |
1439 IAP_F_IB |IAP_F_SB | IAP_F_SBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW |
1440 IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
1442 IAPDESCR(AAH_01H, 0xAA, 0x01, IAP_F_FM | IAP_F_CC2),
1443 IAPDESCR(AAH_02H, 0xAA, 0x02, IAP_F_FM | IAP_F_CA),
1444 IAPDESCR(AAH_03H, 0xAA, 0x03, IAP_F_FM | IAP_F_CA),
1445 IAPDESCR(AAH_08H, 0xAA, 0x08, IAP_F_FM | IAP_F_CC2),
1447 IAPDESCR(ABH_01H, 0xAB, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
1448 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX),
1449 IAPDESCR(ABH_02H, 0xAB, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
1450 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_BW | IAP_F_BWX |
1451 IAP_F_SL | IAP_F_SLX),
1453 IAPDESCR(ACH_02H, 0xAC, 0x02, IAP_F_FM | IAP_F_SB | IAP_F_SBX | IAP_F_SL),
1454 IAPDESCR(ACH_08H, 0xAC, 0x08, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1455 IAP_F_SBX | IAP_F_IBX),
1456 IAPDESCR(ACH_0AH, 0xAC, 0x0A, IAP_F_FM | IAP_F_SB | IAP_F_SBX),
1458 IAPDESCR(AEH_01H, 0xAE, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1459 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1460 IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
1462 IAPDESCR(B0H_00H, 0xB0, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2),
1463 IAPDESCR(B0H_01H, 0xB0, 0x01, IAP_F_FM | IAP_F_WM | IAP_F_I7O |
1464 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1465 IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
1466 IAPDESCR(B0H_02H, 0xB0, 0x02, IAP_F_FM | IAP_F_WM | IAP_F_I7O | IAP_F_IB |
1467 IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX | IAP_F_SL |
1469 IAPDESCR(B0H_04H, 0xB0, 0x04, IAP_F_FM | IAP_F_WM | IAP_F_I7O |
1470 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1471 IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
1472 IAPDESCR(B0H_08H, 0xB0, 0x08, IAP_F_FM | IAP_F_WM | IAP_F_I7O |
1473 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1474 IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
1475 IAPDESCR(B0H_10H, 0xB0, 0x10, IAP_F_FM | IAP_F_WM | IAP_F_I7O | IAP_F_SL |
1477 IAPDESCR(B0H_20H, 0xB0, 0x20, IAP_F_FM | IAP_F_I7O),
1478 IAPDESCR(B0H_40H, 0xB0, 0x40, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
1479 IAPDESCR(B0H_80H, 0xB0, 0x80, IAP_F_FM | IAP_F_CA | IAP_F_WM | IAP_F_I7O |
1480 IAP_F_SL | IAP_F_SLX),
1482 IAPDESCR(B1H_00H, 0xB1, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2),
1483 IAPDESCR(B1H_01H, 0xB1, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1484 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_BW | IAP_F_BWX |
1485 IAP_F_SL | IAP_F_SLX),
1486 IAPDESCR(B1H_02H, 0xB1, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1487 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1488 IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
1489 IAPDESCR(B1H_04H, 0xB1, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
1490 IAPDESCR(B1H_08H, 0xB1, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
1491 IAPDESCR(B1H_10H, 0xB1, 0x10, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SL |
1493 IAPDESCR(B1H_1FH, 0xB1, 0x1F, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
1494 IAPDESCR(B1H_20H, 0xB1, 0x20, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
1495 IAPDESCR(B1H_3FH, 0xB1, 0x3F, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
1496 IAPDESCR(B1H_40H, 0xB1, 0x40, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
1497 IAPDESCR(B1H_80H, 0xB1, 0x80, IAP_F_FM | IAP_F_CA | IAP_F_I7 |
1500 IAPDESCR(B2H_01H, 0xB2, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1501 IAP_F_SB | IAP_F_SBX | IAP_F_SL | IAP_F_SLX),
1503 IAPDESCR(B3H_01H, 0xB3, 0x01, IAP_F_FM | IAP_F_ALLCPUSCORE2 |
1504 IAP_F_WM | IAP_F_I7O),
1505 IAPDESCR(B3H_02H, 0xB3, 0x02, IAP_F_FM | IAP_F_ALLCPUSCORE2 |
1506 IAP_F_WM | IAP_F_I7O),
1507 IAPDESCR(B3H_04H, 0xB3, 0x04, IAP_F_FM | IAP_F_ALLCPUSCORE2 |
1508 IAP_F_WM | IAP_F_I7O),
1509 IAPDESCR(B3H_08H, 0xB3, 0x08, IAP_F_FM | IAP_F_ALLCPUSCORE2),
1510 IAPDESCR(B3H_10H, 0xB3, 0x10, IAP_F_FM | IAP_F_ALLCPUSCORE2),
1511 IAPDESCR(B3H_20H, 0xB3, 0x20, IAP_F_FM | IAP_F_ALLCPUSCORE2),
1512 IAPDESCR(B3H_81H, 0xB3, 0x81, IAP_F_FM | IAP_F_CA),
1513 IAPDESCR(B3H_82H, 0xB3, 0x82, IAP_F_FM | IAP_F_CA),
1514 IAPDESCR(B3H_84H, 0xB3, 0x84, IAP_F_FM | IAP_F_CA),
1515 IAPDESCR(B3H_88H, 0xB3, 0x88, IAP_F_FM | IAP_F_CA),
1516 IAPDESCR(B3H_90H, 0xB3, 0x90, IAP_F_FM | IAP_F_CA),
1517 IAPDESCR(B3H_A0H, 0xB3, 0xA0, IAP_F_FM | IAP_F_CA),
1519 IAPDESCR(B4H_01H, 0xB4, 0x01, IAP_F_FM | IAP_F_WM),
1520 IAPDESCR(B4H_02H, 0xB4, 0x02, IAP_F_FM | IAP_F_WM),
1521 IAPDESCR(B4H_04H, 0xB4, 0x04, IAP_F_FM | IAP_F_WM),
1523 IAPDESCR(B6H_01H, 0xB6, 0x01, IAP_F_FM | IAP_F_SB | IAP_F_SBX),
1524 IAPDESCR(B6H_04H, 0xB6, 0x04, IAP_F_FM | IAP_F_CAS),
1526 IAPDESCR(B7H_01H, 0xB7, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1527 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_CAS |
1528 IAP_F_HWX |IAP_F_BW | IAP_F_BWX | IAP_F_SL),
1529 IAPDESCR(B7H_02H, 0xB7, 0x02, IAP_F_CAS),
1531 IAPDESCR(B8H_01H, 0xB8, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
1532 IAPDESCR(B8H_02H, 0xB8, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
1533 IAPDESCR(B8H_04H, 0xB8, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
1535 IAPDESCR(BAH_01H, 0xBA, 0x01, IAP_F_FM | IAP_F_I7O),
1536 IAPDESCR(BAH_02H, 0xBA, 0x02, IAP_F_FM | IAP_F_I7O),
1538 IAPDESCR(BBH_01H, 0xBB, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1539 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1540 IAP_F_BW | IAP_F_BWX | IAP_F_SL),
1542 IAPDESCR(BCH_11H, 0xBC, 0x11, IAP_F_FM | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX),
1543 IAPDESCR(BCH_12H, 0xBC, 0x12, IAP_F_FM | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX),
1544 IAPDESCR(BCH_14H, 0xBC, 0x14, IAP_F_FM | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX),
1545 IAPDESCR(BCH_18H, 0xBC, 0x18, IAP_F_FM | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX),
1546 IAPDESCR(BCH_21H, 0xBC, 0x21, IAP_F_FM | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX),
1547 IAPDESCR(BCH_22H, 0xBC, 0x22, IAP_F_FM | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX),
1548 IAPDESCR(BCH_24H, 0xBC, 0x24, IAP_F_FM | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX),
1549 IAPDESCR(BCH_28H, 0xBC, 0x28, IAP_F_FM | IAP_F_HW | IAP_F_HWX),
1551 IAPDESCR(BDH_01H, 0xBD, 0x01, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1552 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_SL | IAP_F_SLX), /* spec bug SL? */
1553 IAPDESCR(BDH_20H, 0xBD, 0x20, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1554 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_SLX),
1556 IAPDESCR(BFH_05H, 0xBF, 0x05, IAP_F_FM | IAP_F_SB | IAP_F_SBX),
1558 IAPDESCR(C0H_00H, 0xC0, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2 |
1559 IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW |
1560 IAP_F_CAS | IAP_F_HWX | IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
1561 IAPDESCR(C0H_01H, 0xC0, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
1562 IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX |
1563 IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX | IAP_F_SL |
1565 IAPDESCR(C0H_02H, 0xC0, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
1566 IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_BW | IAP_F_BWX),
1567 IAPDESCR(C0H_04H, 0xC0, 0x04, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
1568 IAP_F_I7 | IAP_F_WM),
1569 IAPDESCR(C0H_08H, 0xC0, 0x08, IAP_F_FM | IAP_F_CC2E),
1571 IAPDESCR(C1H_00H, 0xC1, 0x00, IAP_F_FM | IAP_F_CC),
1572 IAPDESCR(C1H_01H, 0xC1, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2),
1573 IAPDESCR(C1H_02H, 0xC1, 0x02, IAP_F_FM | IAP_F_SB | IAP_F_SBX),
1574 IAPDESCR(C1H_08H, 0xC1, 0x08, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1575 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX),
1576 IAPDESCR(C1H_10H, 0xC1, 0x10, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1577 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX),
1578 IAPDESCR(C1H_20H, 0xC1, 0x20, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1579 IAP_F_SBX | IAP_F_IBX),
1580 IAPDESCR(C1H_3FH, 0xC1, 0x3F, IAP_F_FM | IAP_F_SL | IAP_F_SLX),
1581 IAPDESCR(C1H_40H, 0xC1, 0x40, IAP_F_FM | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX),
1582 IAPDESCR(C1H_80H, 0xC1, 0x80, IAP_F_FM |IAP_F_IB | IAP_F_IBX),
1583 IAPDESCR(C1H_FEH, 0xC1, 0xFE, IAP_F_FM | IAP_F_CA | IAP_F_CC2),
1585 IAPDESCR(C2H_00H, 0xC2, 0x00, IAP_F_FM | IAP_F_CC),
1586 IAPDESCR(C2H_01H, 0xC2, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
1587 IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX |
1588 IAP_F_IBX | IAP_F_HW | IAP_F_CAS | IAP_F_HWX | IAP_F_BW | IAP_F_BWX |
1589 IAP_F_SL | IAP_F_SLX),
1590 IAPDESCR(C2H_02H, 0xC2, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
1591 IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX |
1592 IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX | IAP_F_SL |
1594 IAPDESCR(C2H_04H, 0xC2, 0x04, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
1595 IAP_F_I7 | IAP_F_WM),
1596 IAPDESCR(C2H_07H, 0xC2, 0x07, IAP_F_FM | IAP_F_CA | IAP_F_CC2),
1597 IAPDESCR(C2H_08H, 0xC2, 0x08, IAP_F_FM | IAP_F_CA | IAP_F_CC2),
1598 IAPDESCR(C2H_0FH, 0xC2, 0x0F, IAP_F_FM | IAP_F_CC2),
1599 IAPDESCR(C2H_10H, 0xC2, 0x10, IAP_F_FM | IAP_F_CA | IAP_F_CAS),
1601 IAPDESCR(C3H_00H, 0xC3, 0x00, IAP_F_FM | IAP_F_CC),
1602 IAPDESCR(C3H_01H, 0xC3, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
1603 IAP_F_I7 | IAP_F_WM | IAP_F_CAS | IAP_F_BW | IAP_F_BWX | IAP_F_SL |
1605 IAPDESCR(C3H_02H, 0xC3, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1606 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW |
1607 IAP_F_CAS | IAP_F_HWX | IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
1608 IAPDESCR(C3H_04H, 0xC3, 0x04, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
1609 IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX |
1610 IAP_F_IBX | IAP_F_HW | IAP_F_CAS | IAP_F_HWX | IAP_F_BW | IAP_F_BWX |
1611 IAP_F_SL | IAP_F_SLX),
1612 IAPDESCR(C3H_08H, 0xC3, 0x08, IAP_F_FM | IAP_F_CAS),
1613 IAPDESCR(C3H_10H, 0xC3, 0x10, IAP_F_FM | IAP_F_I7O),
1614 IAPDESCR(C3H_20H, 0xC3, 0x20, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1615 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX),
1617 IAPDESCR(C4H_00H, 0xC4, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2 |
1618 IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX |
1619 IAP_F_IBX | IAP_F_HW | IAP_F_CAS | IAP_F_HWX | IAP_F_BW | IAP_F_BWX |
1620 IAP_F_SL | IAP_F_SLX),
1621 IAPDESCR(C4H_01H, 0xC4, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
1622 IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX |
1623 IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX | IAP_F_SL |
1625 IAPDESCR(C4H_02H, 0xC4, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
1626 IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX |
1627 IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX | IAP_F_SL |
1629 IAPDESCR(C4H_04H, 0xC4, 0x04, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
1630 IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX |
1631 IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX | IAP_F_SL |
1633 IAPDESCR(C4H_08H, 0xC4, 0x08, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
1634 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW |
1635 IAP_F_HWX | IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
1636 IAPDESCR(C4H_0CH, 0xC4, 0x0C, IAP_F_FM | IAP_F_CA | IAP_F_CC2),
1637 IAPDESCR(C4H_0FH, 0xC4, 0x0F, IAP_F_FM | IAP_F_CA),
1638 IAPDESCR(C4H_10H, 0xC4, 0x10, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1639 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX |
1640 IAP_F_SL | IAP_F_SLX),
1641 IAPDESCR(C4H_20H, 0xC4, 0x20, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1642 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX |
1643 IAP_F_SL | IAP_F_SLX),
1644 IAPDESCR(C4H_40H, 0xC4, 0x40, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1645 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX |
1646 IAP_F_SL | IAP_F_SLX),
1647 IAPDESCR(C4H_7EH, 0xC4, 0x7E, IAP_F_FM | IAP_F_CAS),
1648 IAPDESCR(C4H_BFH, 0xC4, 0xBF, IAP_F_FM | IAP_F_CAS),
1649 IAPDESCR(C4H_EBH, 0xC4, 0xEB, IAP_F_FM | IAP_F_CAS),
1650 IAPDESCR(C4H_F7H, 0xC4, 0xF7, IAP_F_FM | IAP_F_CAS),
1651 IAPDESCR(C4H_F9H, 0xC4, 0xF9, IAP_F_FM | IAP_F_CAS),
1652 IAPDESCR(C4H_FBH, 0xC4, 0xFB, IAP_F_FM | IAP_F_CAS),
1653 IAPDESCR(C4H_FDH, 0xC4, 0xFD, IAP_F_FM | IAP_F_CAS),
1654 IAPDESCR(C4H_FEH, 0xC4, 0xFE, IAP_F_FM | IAP_F_CAS),
1656 IAPDESCR(C5H_00H, 0xC5, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2 |
1657 IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX |
1658 IAP_F_IBX | IAP_F_HW | IAP_F_CAS | IAP_F_HWX | IAP_F_BW | IAP_F_BWX |
1659 IAP_F_SL | IAP_F_SLX),
1660 IAPDESCR(C5H_01H, 0xC5, 0x01, IAP_F_FM | IAP_F_WM | IAP_F_SB |
1661 IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW |
1662 IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
1663 IAPDESCR(C5H_02H, 0xC5, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1664 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_SL | IAP_F_SLX),
1665 IAPDESCR(C5H_04H, 0xC5, 0x04, IAP_F_FM | IAP_F_WM | IAP_F_SB |
1666 IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW |
1667 IAP_F_BWX | IAP_F_SL),
1668 IAPDESCR(C5H_10H, 0xC5, 0x10, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1669 IAP_F_SBX | IAP_F_IBX),
1670 IAPDESCR(C5H_20H, 0xC5, 0x20, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1671 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_SL | IAP_F_SLX),
1672 IAPDESCR(C5H_7EH, 0xC5, 0x7E, IAP_F_FM | IAP_F_CAS),
1673 IAPDESCR(C5H_BFH, 0xC5, 0xBF, IAP_F_FM | IAP_F_CAS),
1674 IAPDESCR(C5H_EBH, 0xC5, 0xEB, IAP_F_FM | IAP_F_CAS),
1675 IAPDESCR(C5H_F7H, 0xC5, 0xF7, IAP_F_FM | IAP_F_CAS),
1676 IAPDESCR(C5H_F9H, 0xC5, 0xF9, IAP_F_FM | IAP_F_CAS),
1677 IAPDESCR(C5H_FBH, 0xC5, 0xFB, IAP_F_FM | IAP_F_CAS),
1678 IAPDESCR(C5H_FDH, 0xC5, 0xFD, IAP_F_FM | IAP_F_CAS),
1679 IAPDESCR(C5H_FEH, 0xC5, 0xFE, IAP_F_FM | IAP_F_CAS),
1681 IAPDESCR(C6H_00H, 0xC6, 0x00, IAP_F_FM | IAP_F_CC),
1682 /* For SL C6_01 needs EV_SEL? 0x11, 0x12, 0x13, 0x14, 0x15? */
1683 IAPDESCR(C6H_01H, 0xC6, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_SL |
1685 IAPDESCR(C6H_02H, 0xC6, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2),
1687 IAPDESCR(C7H_00H, 0xC7, 0x00, IAP_F_FM | IAP_F_CC),
1688 IAPDESCR(C7H_01H, 0xC7, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
1689 IAP_F_I7 | IAP_F_WM | IAP_F_SL | IAP_F_SLX),
1690 IAPDESCR(C7H_02H, 0xC7, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
1691 IAP_F_I7 | IAP_F_WM | IAP_F_SL | IAP_F_SLX),
1692 IAPDESCR(C7H_04H, 0xC7, 0x04, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
1693 IAP_F_I7 | IAP_F_WM | IAP_F_SL | IAP_F_SLX),
1694 IAPDESCR(C7H_08H, 0xC7, 0x08, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
1695 IAP_F_I7 | IAP_F_WM | IAP_F_SL | IAP_F_SLX),
1696 IAPDESCR(C7H_10H, 0xC7, 0x10, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
1697 IAP_F_I7 | IAP_F_WM | IAP_F_SL | IAP_F_SLX),
1698 IAPDESCR(C7H_1FH, 0xC7, 0x1F, IAP_F_FM | IAP_F_CA | IAP_F_CC2),
1699 IAPDESCR(C7H_20H, 0xC7, 0x20, IAP_F_FM | IAP_F_SL | IAP_F_SLX),
1700 IAPDESCR(C7H_40H, 0xc7, 0x40, IAP_F_FM | IAP_F_SLX),
1701 IAPDESCR(C7H_80H, 0xc7, 0x80, IAP_F_FM | IAP_F_SLX),
1703 IAPDESCR(C8H_00H, 0xC8, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2),
1704 IAPDESCR(C8H_01H, 0xC8, 0x01, IAP_F_FM | IAP_F_SLX),
1705 IAPDESCR(C8H_02H, 0xC8, 0x02, IAP_F_FM | IAP_F_SLX),
1706 IAPDESCR(C8H_04H, 0xC8, 0x04, IAP_F_FM | IAP_F_SLX),
1707 IAPDESCR(C8H_08H, 0xC8, 0x08, IAP_F_FM | IAP_F_SLX),
1708 IAPDESCR(C8H_10H, 0xC8, 0x10, IAP_F_FM | IAP_F_SLX),
1709 IAPDESCR(C8H_20H, 0xC8, 0x20, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SLX),
1710 IAPDESCR(C8H_40H, 0xC8, 0x40, IAP_F_FM | IAP_F_SLX),
1711 IAPDESCR(C8H_80H, 0xC8, 0x80, IAP_F_FM | IAP_F_SLX),
1713 IAPDESCR(C9H_00H, 0xC9, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2),
1714 IAPDESCR(C9H_01H, 0xC9, 0x01, IAP_F_FM | IAP_F_SLX),
1715 IAPDESCR(C9H_02H, 0xC9, 0x02, IAP_F_FM | IAP_F_SLX),
1716 IAPDESCR(C9H_04H, 0xC9, 0x04, IAP_F_FM | IAP_F_SLX),
1717 IAPDESCR(C9H_08H, 0xC9, 0x08, IAP_F_FM | IAP_F_SLX),
1718 IAPDESCR(C9H_10H, 0xC9, 0x10, IAP_F_FM | IAP_F_SLX),
1719 IAPDESCR(C9H_20H, 0xC9, 0x20, IAP_F_FM | IAP_F_SLX),
1720 IAPDESCR(C9H_40H, 0xC9, 0x40, IAP_F_FM | IAP_F_SLX),
1721 IAPDESCR(C9H_80H, 0xC9, 0x80, IAP_F_FM | IAP_F_SLX),
1723 IAPDESCR(CAH_00H, 0xCA, 0x00, IAP_F_FM | IAP_F_CC),
1724 IAPDESCR(CAH_01H, 0xCA, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_CAS),
1725 IAPDESCR(CAH_02H, 0xCA, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
1726 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1727 IAP_F_BW | IAP_F_BWX),
1728 IAPDESCR(CAH_04H, 0xCA, 0x04, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
1729 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1730 IAP_F_BW | IAP_F_BWX),
1731 IAPDESCR(CAH_08H, 0xCA, 0x08, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
1732 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1733 IAP_F_BW | IAP_F_BWX),
1734 IAPDESCR(CAH_10H, 0xCA, 0x10, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1735 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX),
1736 IAPDESCR(CAH_1EH, 0xCA, 0x1E, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1737 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX |
1738 IAP_F_SL | IAP_F_SLX),
1739 IAPDESCR(CAH_20H, 0xCA, 0x20, IAP_F_FM | IAP_F_CAS | IAP_F_BW | IAP_F_BWX),
1740 IAPDESCR(CAH_3FH, 0xCA, 0x3F, IAP_F_FM | IAP_F_CAS),
1741 IAPDESCR(CAH_50H, 0xCA, 0x50, IAP_F_FM | IAP_F_CAS),
1743 IAPDESCR(CBH_01H, 0xCB, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
1744 IAP_F_I7 | IAP_F_WM | IAP_F_CAS | IAP_F_SL | IAP_F_SLX),
1745 IAPDESCR(CBH_02H, 0xCB, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
1746 IAP_F_I7 | IAP_F_WM),
1747 IAPDESCR(CBH_04H, 0xCB, 0x04, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
1748 IAP_F_I7 | IAP_F_WM),
1749 IAPDESCR(CBH_08H, 0xCB, 0x08, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
1750 IAP_F_I7 | IAP_F_WM),
1751 IAPDESCR(CBH_10H, 0xCB, 0x10, IAP_F_FM | IAP_F_CC2 | IAP_F_I7 |
1753 IAPDESCR(CBH_1FH, 0xCB, 0x1F, IAP_F_FM | IAP_F_CAS),
1754 IAPDESCR(CBH_40H, 0xCB, 0x40, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
1755 IAPDESCR(CBH_80H, 0xCB, 0x80, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
1757 IAPDESCR(CCH_00H, 0xCC, 0x00, IAP_F_FM | IAP_F_CC),
1758 IAPDESCR(CCH_01H, 0xCC, 0x01, IAP_F_FM | IAP_F_ALLCPUSCORE2 |
1759 IAP_F_I7 | IAP_F_WM),
1760 IAPDESCR(CCH_02H, 0xCC, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
1761 IAP_F_I7 | IAP_F_WM),
1762 IAPDESCR(CCH_03H, 0xCC, 0x03, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
1763 IAPDESCR(CCH_20H, 0xCC, 0x20, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1764 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX |
1767 IAPDESCR(CDH_00H, 0xCD, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2),
1768 IAPDESCR(CDH_01H, 0xCD, 0x01, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1769 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_CAS | IAP_F_HWX | IAP_F_BW |
1770 IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
1771 IAPDESCR(CDH_02H, 0xCD, 0x02, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1772 IAP_F_SBX | IAP_F_IBX),
1774 IAPDESCR(CEH_00H, 0xCE, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2),
1775 IAPDESCR(CFH_00H, 0xCF, 0x00, IAP_F_FM | IAP_F_CA | IAP_F_CC2),
1777 /* Sandy Bridge / Sandy Bridge Xeon - 11, 12, 21, 41, 42, 81, 82 */
1778 IAPDESCR(D0H_00H, 0xD0, 0x00, IAP_F_FM | IAP_F_CC),
1779 IAPDESCR(D0H_01H, 0xD0, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
1780 IAPDESCR(D0H_11H, 0xD0, 0x11, IAP_F_FM | IAP_F_SB | IAP_F_SBX | IAP_F_IB |
1781 IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX | IAP_F_SL |
1783 IAPDESCR(D0H_12H, 0xD0, 0x12, IAP_F_FM | IAP_F_SB | IAP_F_SBX | IAP_F_IB |
1784 IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX | IAP_F_SL |
1786 IAPDESCR(D0H_21H, 0xD0, 0x21, IAP_F_FM | IAP_F_SB | IAP_F_SBX | IAP_F_BW |
1787 IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
1788 IAPDESCR(D0H_41H, 0xD0, 0x41, IAP_F_FM | IAP_F_SB | IAP_F_SBX | IAP_F_IB |
1789 IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX | IAP_F_SL |
1791 IAPDESCR(D0H_42H, 0xD0, 0x42, IAP_F_FM | IAP_F_SB | IAP_F_SBX | IAP_F_IB |
1792 IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX | IAP_F_SL |
1794 IAPDESCR(D0H_81H, 0xD0, 0x81, IAP_F_FM | IAP_F_SB | IAP_F_SBX | IAP_F_IB |
1795 IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX | IAP_F_SL |
1797 IAPDESCR(D0H_82H, 0xD0, 0x82, IAP_F_FM | IAP_F_SB | IAP_F_SBX | IAP_F_IB |
1798 IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX | IAP_F_SL |
1801 IAPDESCR(D1H_01H, 0xD1, 0x01, IAP_F_FM | IAP_F_WM | IAP_F_SB |
1802 IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW |
1803 IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
1804 IAPDESCR(D1H_02H, 0xD1, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1805 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1806 IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
1807 IAPDESCR(D1H_04H, 0xD1, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1808 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1809 IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
1810 IAPDESCR(D1H_08H, 0xD1, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_IB |
1811 IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX | IAP_F_SL |
1813 IAPDESCR(D1H_10H, 0xD1, 0x10, IAP_F_HW | IAP_F_IB | IAP_F_IBX | IAP_F_HWX |
1814 IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
1815 IAPDESCR(D1H_20H, 0xD1, 0x20, IAP_F_FM | IAP_F_SBX | IAP_F_IBX | IAP_F_IB |
1816 IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
1817 IAPDESCR(D1H_40H, 0xD1, 0x40, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1818 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX |
1819 IAP_F_SL | IAP_F_SLX),
1821 IAPDESCR(D2H_01H, 0xD2, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
1822 IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_SBX | IAP_F_IB |
1823 IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX | IAP_F_SL |
1825 IAPDESCR(D2H_02H, 0xD2, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
1826 IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_SBX | IAP_F_IB |
1827 IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX | IAP_F_SL |
1829 IAPDESCR(D2H_04H, 0xD2, 0x04, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
1830 IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_SBX | IAP_F_IB |
1831 IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX | IAP_F_SL |
1833 IAPDESCR(D2H_08H, 0xD2, 0x08, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
1834 IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_SBX | IAP_F_IB |
1835 IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX | IAP_F_SL |
1837 IAPDESCR(D2H_0FH, 0xD2, 0x0F, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
1838 IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_SBX | IAP_F_IB |
1839 IAP_F_IBX | IAP_F_HW | IAP_F_HWX),
1841 IAPDESCR(D2H_10H, 0xD2, 0x10, IAP_F_FM | IAP_F_CC2E),
1843 IAPDESCR(D3H_01H, 0xD3, 0x01, IAP_F_FM | IAP_F_IB | IAP_F_SBX |
1844 IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX | IAP_F_SLX),
1845 IAPDESCR(D3H_02H, 0xD3, 0x02, IAP_F_FM | IAP_F_SLX),
1846 IAPDESCR(D3H_03H, 0xD3, 0x03, IAP_F_FM | IAP_F_IBX),
1847 IAPDESCR(D3H_04H, 0xD3, 0x04, IAP_F_FM | IAP_F_SBX | IAP_F_IBX | IAP_F_SLX), /* Not defined for IBX */
1848 IAPDESCR(D3H_08H, 0xD3, 0x08, IAP_F_FM | IAP_F_SLX),
1849 IAPDESCR(D3H_0CH, 0xD3, 0x0C, IAP_F_FM | IAP_F_IBX),
1850 IAPDESCR(D3H_10H, 0xD3, 0x10, IAP_F_FM | IAP_F_IBX ),
1851 IAPDESCR(D3H_20H, 0xD3, 0x20, IAP_F_FM | IAP_F_IBX ),
1853 IAPDESCR(D4H_01H, 0xD4, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
1854 IAP_F_I7 | IAP_F_WM),
1855 IAPDESCR(D4H_02H, 0xD4, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
1856 IAP_F_SB | IAP_F_SBX),
1857 IAPDESCR(D4H_04H, 0xD4, 0x04, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_SLX),
1858 IAPDESCR(D4H_08H, 0xD4, 0x08, IAP_F_FM | IAP_F_CA | IAP_F_CC2),
1859 IAPDESCR(D4H_0FH, 0xD4, 0x0F, IAP_F_FM | IAP_F_CA | IAP_F_CC2),
1861 IAPDESCR(D5H_01H, 0xD5, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
1862 IAP_F_I7 | IAP_F_WM),
1863 IAPDESCR(D5H_02H, 0xD5, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2),
1864 IAPDESCR(D5H_04H, 0xD5, 0x04, IAP_F_FM | IAP_F_CA | IAP_F_CC2),
1865 IAPDESCR(D5H_08H, 0xD5, 0x08, IAP_F_FM | IAP_F_CA | IAP_F_CC2),
1866 IAPDESCR(D5H_0FH, 0xD5, 0x0F, IAP_F_FM | IAP_F_CA | IAP_F_CC2),
1868 IAPDESCR(D7H_00H, 0xD7, 0x00, IAP_F_FM | IAP_F_CC),
1870 IAPDESCR(D8H_00H, 0xD8, 0x00, IAP_F_FM | IAP_F_CC),
1871 IAPDESCR(D8H_01H, 0xD8, 0x01, IAP_F_FM | IAP_F_CC),
1872 IAPDESCR(D8H_02H, 0xD8, 0x02, IAP_F_FM | IAP_F_CC),
1873 IAPDESCR(D8H_03H, 0xD8, 0x03, IAP_F_FM | IAP_F_CC),
1874 IAPDESCR(D8H_04H, 0xD8, 0x04, IAP_F_FM | IAP_F_CC),
1876 IAPDESCR(D9H_00H, 0xD9, 0x00, IAP_F_FM | IAP_F_CC),
1877 IAPDESCR(D9H_01H, 0xD9, 0x01, IAP_F_FM | IAP_F_CC),
1878 IAPDESCR(D9H_02H, 0xD9, 0x02, IAP_F_FM | IAP_F_CC),
1879 IAPDESCR(D9H_03H, 0xD9, 0x03, IAP_F_FM | IAP_F_CC),
1881 IAPDESCR(DAH_00H, 0xDA, 0x00, IAP_F_FM | IAP_F_CC),
1882 IAPDESCR(DAH_01H, 0xDA, 0x01, IAP_F_FM | IAP_F_CC),
1883 IAPDESCR(DAH_02H, 0xDA, 0x02, IAP_F_FM | IAP_F_CC),
1885 IAPDESCR(DBH_00H, 0xDB, 0x00, IAP_F_FM | IAP_F_CC),
1886 IAPDESCR(DBH_01H, 0xDB, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
1888 IAPDESCR(DCH_01H, 0xDC, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2),
1889 IAPDESCR(DCH_02H, 0xDC, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2),
1890 IAPDESCR(DCH_04H, 0xDC, 0x04, IAP_F_FM | IAP_F_CA | IAP_F_CC2),
1891 IAPDESCR(DCH_08H, 0xDC, 0x08, IAP_F_FM | IAP_F_CA | IAP_F_CC2),
1892 IAPDESCR(DCH_10H, 0xDC, 0x10, IAP_F_FM | IAP_F_CA | IAP_F_CC2),
1893 IAPDESCR(DCH_1FH, 0xDC, 0x1F, IAP_F_FM | IAP_F_CA | IAP_F_CC2),
1895 IAPDESCR(E0H_00H, 0xE0, 0x00, IAP_F_FM | IAP_F_CC | IAP_F_CC2),
1896 IAPDESCR(E0H_01H, 0xE0, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_I7 |
1899 IAPDESCR(E2H_00H, 0xE2, 0x00, IAP_F_FM | IAP_F_CC),
1901 IAPDESCR(E4H_00H, 0xE4, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2),
1902 IAPDESCR(E4H_01H, 0xE4, 0x01, IAP_F_FM | IAP_F_I7O),
1904 IAPDESCR(E5H_01H, 0xE5, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
1906 IAPDESCR(E6H_00H, 0xE6, 0x00, IAP_F_FM | IAP_F_CC | IAP_F_CC2),
1907 IAPDESCR(E6H_01H, 0xE6, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_I7 |
1908 IAP_F_WM | IAP_F_SBX | IAP_F_CAS | IAP_F_SL | IAP_F_SLX),
1909 IAPDESCR(E6H_02H, 0xE6, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
1910 IAPDESCR(E6H_08H, 0xE6, 0x08, IAP_F_FM | IAP_F_CAS),
1911 IAPDESCR(E6H_10H, 0xE6, 0x10, IAP_F_FM | IAP_F_CAS),
1912 IAPDESCR(E6H_1FH, 0xE6, 0x1F, IAP_F_FM | IAP_F_IB |
1913 IAP_F_IBX | IAP_F_HW | IAP_F_HWX),
1915 IAPDESCR(E7H_01H, 0xE7, 0x01, IAP_F_FM | IAP_F_CAS),
1917 IAPDESCR(E8H_01H, 0xE8, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
1918 IAPDESCR(E8H_02H, 0xE8, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
1919 IAPDESCR(E8H_03H, 0xE8, 0x03, IAP_F_FM | IAP_F_I7O),
1921 IAPDESCR(ECH_01H, 0xEC, 0x01, IAP_F_FM | IAP_F_WM),
1923 IAPDESCR(F0H_00H, 0xF0, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2),
1924 IAPDESCR(F0H_01H, 0xF0, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1925 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1926 IAP_F_BW | IAP_F_BWX),
1927 IAPDESCR(F0H_02H, 0xF0, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1928 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1929 IAP_F_BW | IAP_F_BWX),
1930 IAPDESCR(F0H_04H, 0xF0, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1931 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1932 IAP_F_BW | IAP_F_BWX),
1933 IAPDESCR(F0H_08H, 0xF0, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1934 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1935 IAP_F_BW | IAP_F_BWX),
1936 IAPDESCR(F0H_10H, 0xF0, 0x10, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1937 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1938 IAP_F_BW | IAP_F_BWX),
1939 IAPDESCR(F0H_20H, 0xF0, 0x20, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1940 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1941 IAP_F_BW | IAP_F_BWX),
1942 IAPDESCR(F0H_40H, 0xF0, 0x40, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1943 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1944 IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
1945 IAPDESCR(F0H_80H, 0xF0, 0x80, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1946 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1947 IAP_F_BW | IAP_F_BWX),
1949 IAPDESCR(F1H_01H, 0xF1, 0x01, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1950 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX),
1951 IAPDESCR(F1H_02H, 0xF1, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1952 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1953 IAP_F_BW | IAP_F_BWX),
1954 IAPDESCR(F1H_04H, 0xF1, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1955 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1956 IAP_F_BW | IAP_F_BWX ),
1957 IAPDESCR(F1H_07H, 0xF1, 0x07, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1958 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1959 IAP_F_BW | IAP_F_BWX | IAP_F_SL),
1960 IAPDESCR(F1H_1FH, 0xF1, 0x1f, IAP_F_FM | IAP_F_SLX),
1962 IAPDESCR(F2H_01H, 0xF2, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1963 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_SLX),
1964 IAPDESCR(F2H_02H, 0xF2, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1965 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_SLX),
1966 IAPDESCR(F2H_04H, 0xF2, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1967 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_SLX),
1968 IAPDESCR(F2H_05H, 0xF2, 0x05, IAP_F_FM | IAP_F_HW | IAP_F_HWX | IAP_F_BW |
1970 IAPDESCR(F2H_06H, 0xF2, 0x06, IAP_F_FM | IAP_F_HW | IAP_F_HWX),
1971 IAPDESCR(F2H_08H, 0xF2, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1972 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX),
1973 IAPDESCR(F2H_0AH, 0xF2, 0x0A, IAP_F_FM | IAP_F_SB | IAP_F_SBX |
1975 IAPDESCR(F2H_0FH, 0xF2, 0x0F, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
1977 IAPDESCR(F3H_01H, 0xF3, 0x01, IAP_F_FM | IAP_F_I7O),
1978 IAPDESCR(F3H_02H, 0xF3, 0x02, IAP_F_FM | IAP_F_I7O),
1979 IAPDESCR(F3H_04H, 0xF3, 0x04, IAP_F_FM | IAP_F_I7O),
1980 IAPDESCR(F3H_08H, 0xF3, 0x08, IAP_F_FM | IAP_F_I7O),
1981 IAPDESCR(F3H_10H, 0xF3, 0x10, IAP_F_FM | IAP_F_I7O),
1982 IAPDESCR(F3H_20H, 0xF3, 0x20, IAP_F_FM | IAP_F_I7O),
1984 IAPDESCR(F4H_01H, 0xF4, 0x01, IAP_F_FM | IAP_F_I7O),
1985 IAPDESCR(F4H_02H, 0xF4, 0x02, IAP_F_FM | IAP_F_I7O),
1986 IAPDESCR(F4H_04H, 0xF4, 0x04, IAP_F_FM | IAP_F_WM | IAP_F_I7O),
1987 IAPDESCR(F4H_08H, 0xF4, 0x08, IAP_F_FM | IAP_F_I7O),
1988 IAPDESCR(F4H_10H, 0xF4, 0x10, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1989 IAP_F_SB | IAP_F_SBX | IAP_F_SLX),
1991 IAPDESCR(F6H_01H, 0xF6, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
1993 IAPDESCR(F7H_01H, 0xF7, 0x01, IAP_F_FM | IAP_F_WM | IAP_F_I7),
1994 IAPDESCR(F7H_02H, 0xF7, 0x02, IAP_F_FM | IAP_F_WM | IAP_F_I7),
1995 IAPDESCR(F7H_04H, 0xF7, 0x04, IAP_F_FM | IAP_F_WM | IAP_F_I7),
1997 IAPDESCR(F8H_00H, 0xF8, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2),
1998 IAPDESCR(F8H_01H, 0xF8, 0x01, IAP_F_FM | IAP_F_I7O),
2000 IAPDESCR(FDH_01H, 0xFD, 0x01, IAP_F_FM | IAP_F_WM | IAP_F_I7),
2001 IAPDESCR(FDH_02H, 0xFD, 0x02, IAP_F_FM | IAP_F_WM | IAP_F_I7),
2002 IAPDESCR(FDH_04H, 0xFD, 0x04, IAP_F_FM | IAP_F_WM | IAP_F_I7),
2003 IAPDESCR(FDH_08H, 0xFD, 0x08, IAP_F_FM | IAP_F_WM | IAP_F_I7),
2004 IAPDESCR(FDH_10H, 0xFD, 0x10, IAP_F_FM | IAP_F_WM | IAP_F_I7),
2005 IAPDESCR(FDH_20H, 0xFD, 0x20, IAP_F_FM | IAP_F_WM | IAP_F_I7),
2006 IAPDESCR(FDH_40H, 0xFD, 0x40, IAP_F_FM | IAP_F_WM | IAP_F_I7),
2008 IAPDESCR(FEH_02H, 0xfe, 0x02, IAP_F_FM | IAP_F_SLX),
2009 IAPDESCR(FEH_04H, 0xfe, 0x04, IAP_F_FM | IAP_F_SLX),
2013 iap_perfctr_value_to_reload_count(pmc_value_t v)
2016 /* If the PMC has overflowed, return a reload count of zero. */
2017 if ((v & (1ULL << (core_iap_width - 1))) == 0)
2019 v &= (1ULL << core_iap_width) - 1;
2020 return (1ULL << core_iap_width) - v;
2024 iap_reload_count_to_perfctr_value(pmc_value_t rlc)
2026 return (1ULL << core_iap_width) - rlc;
2030 iap_pmc_has_overflowed(int ri)
2035 * We treat a Core (i.e., Intel architecture v1) PMC as has
2036 * having overflowed if its MSB is zero.
2039 return ((v & (1ULL << (core_iap_width - 1))) == 0);
2043 * Check an event against the set of supported architectural events.
2045 * If the event is not architectural EV_IS_NOTARCH is returned.
2046 * If the event is architectural and supported on this CPU, the correct
2047 * event+umask mapping is returned in map, and EV_IS_ARCH_SUPP is returned.
2048 * Otherwise, the function returns EV_IS_ARCH_NOTSUPP.
2052 iap_is_event_architectural(enum pmc_event pe, enum pmc_event *map)
2054 enum core_arch_events ae;
2057 case PMC_EV_IAP_ARCH_UNH_COR_CYC:
2058 ae = CORE_AE_UNHALTED_CORE_CYCLES;
2059 *map = PMC_EV_IAP_EVENT_3CH_00H;
2061 case PMC_EV_IAP_ARCH_INS_RET:
2062 ae = CORE_AE_INSTRUCTION_RETIRED;
2063 *map = PMC_EV_IAP_EVENT_C0H_00H;
2065 case PMC_EV_IAP_ARCH_UNH_REF_CYC:
2066 ae = CORE_AE_UNHALTED_REFERENCE_CYCLES;
2067 *map = PMC_EV_IAP_EVENT_3CH_01H;
2069 case PMC_EV_IAP_ARCH_LLC_REF:
2070 ae = CORE_AE_LLC_REFERENCE;
2071 *map = PMC_EV_IAP_EVENT_2EH_4FH;
2073 case PMC_EV_IAP_ARCH_LLC_MIS:
2074 ae = CORE_AE_LLC_MISSES;
2075 *map = PMC_EV_IAP_EVENT_2EH_41H;
2077 case PMC_EV_IAP_ARCH_BR_INS_RET:
2078 ae = CORE_AE_BRANCH_INSTRUCTION_RETIRED;
2079 *map = PMC_EV_IAP_EVENT_C4H_00H;
2081 case PMC_EV_IAP_ARCH_BR_MIS_RET:
2082 ae = CORE_AE_BRANCH_MISSES_RETIRED;
2083 *map = PMC_EV_IAP_EVENT_C5H_00H;
2086 default: /* Non architectural event. */
2087 return (EV_IS_NOTARCH);
2090 return (((core_architectural_events & (1 << ae)) == 0) ?
2091 EV_IS_ARCH_NOTSUPP : EV_IS_ARCH_SUPP);
2095 iap_event_corei7_ok_on_counter(enum pmc_event pe, int ri)
2101 * Events valid only on counter 0, 1.
2103 case PMC_EV_IAP_EVENT_40H_01H:
2104 case PMC_EV_IAP_EVENT_40H_02H:
2105 case PMC_EV_IAP_EVENT_40H_04H:
2106 case PMC_EV_IAP_EVENT_40H_08H:
2107 case PMC_EV_IAP_EVENT_40H_0FH:
2108 case PMC_EV_IAP_EVENT_41H_02H:
2109 case PMC_EV_IAP_EVENT_41H_04H:
2110 case PMC_EV_IAP_EVENT_41H_08H:
2111 case PMC_EV_IAP_EVENT_42H_01H:
2112 case PMC_EV_IAP_EVENT_42H_02H:
2113 case PMC_EV_IAP_EVENT_42H_04H:
2114 case PMC_EV_IAP_EVENT_42H_08H:
2115 case PMC_EV_IAP_EVENT_43H_01H:
2116 case PMC_EV_IAP_EVENT_43H_02H:
2117 case PMC_EV_IAP_EVENT_51H_01H:
2118 case PMC_EV_IAP_EVENT_51H_02H:
2119 case PMC_EV_IAP_EVENT_51H_04H:
2120 case PMC_EV_IAP_EVENT_51H_08H:
2121 case PMC_EV_IAP_EVENT_63H_01H:
2122 case PMC_EV_IAP_EVENT_63H_02H:
2127 mask = ~0; /* Any row index is ok. */
2130 return (mask & (1 << ri));
2134 iap_event_westmere_ok_on_counter(enum pmc_event pe, int ri)
2140 * Events valid only on counter 0.
2142 case PMC_EV_IAP_EVENT_60H_01H:
2143 case PMC_EV_IAP_EVENT_60H_02H:
2144 case PMC_EV_IAP_EVENT_60H_04H:
2145 case PMC_EV_IAP_EVENT_60H_08H:
2146 case PMC_EV_IAP_EVENT_B3H_01H:
2147 case PMC_EV_IAP_EVENT_B3H_02H:
2148 case PMC_EV_IAP_EVENT_B3H_04H:
2153 * Events valid only on counter 0, 1.
2155 case PMC_EV_IAP_EVENT_4CH_01H:
2156 case PMC_EV_IAP_EVENT_4EH_01H:
2157 case PMC_EV_IAP_EVENT_4EH_02H:
2158 case PMC_EV_IAP_EVENT_4EH_04H:
2159 case PMC_EV_IAP_EVENT_51H_01H:
2160 case PMC_EV_IAP_EVENT_51H_02H:
2161 case PMC_EV_IAP_EVENT_51H_04H:
2162 case PMC_EV_IAP_EVENT_51H_08H:
2163 case PMC_EV_IAP_EVENT_63H_01H:
2164 case PMC_EV_IAP_EVENT_63H_02H:
2169 mask = ~0; /* Any row index is ok. */
2172 return (mask & (1 << ri));
2176 iap_event_sb_sbx_ib_ibx_ok_on_counter(enum pmc_event pe, int ri)
2181 /* Events valid only on counter 0. */
2182 case PMC_EV_IAP_EVENT_B7H_01H:
2185 /* Events valid only on counter 1. */
2186 case PMC_EV_IAP_EVENT_C0H_01H:
2189 /* Events valid only on counter 2. */
2190 case PMC_EV_IAP_EVENT_48H_01H:
2191 case PMC_EV_IAP_EVENT_A2H_02H:
2192 case PMC_EV_IAP_EVENT_A3H_08H:
2195 /* Events valid only on counter 3. */
2196 case PMC_EV_IAP_EVENT_BBH_01H:
2197 case PMC_EV_IAP_EVENT_CDH_01H:
2198 case PMC_EV_IAP_EVENT_CDH_02H:
2202 mask = ~0; /* Any row index is ok. */
2205 return (mask & (1 << ri));
2209 iap_event_ok_on_counter(enum pmc_event pe, int ri)
2215 * Events valid only on counter 0.
2217 case PMC_EV_IAP_EVENT_10H_00H:
2218 case PMC_EV_IAP_EVENT_14H_00H:
2219 case PMC_EV_IAP_EVENT_18H_00H:
2220 case PMC_EV_IAP_EVENT_B3H_01H:
2221 case PMC_EV_IAP_EVENT_B3H_02H:
2222 case PMC_EV_IAP_EVENT_B3H_04H:
2223 case PMC_EV_IAP_EVENT_C1H_00H:
2224 case PMC_EV_IAP_EVENT_CBH_01H:
2225 case PMC_EV_IAP_EVENT_CBH_02H:
2230 * Events valid only on counter 1.
2232 case PMC_EV_IAP_EVENT_11H_00H:
2233 case PMC_EV_IAP_EVENT_12H_00H:
2234 case PMC_EV_IAP_EVENT_13H_00H:
2239 mask = ~0; /* Any row index is ok. */
2242 return (mask & (1 << ri));
2246 iap_allocate_pmc(int cpu, int ri, struct pmc *pm,
2247 const struct pmc_op_pmcallocate *a)
2250 enum pmc_event ev, map;
2251 struct iap_event_descr *ie;
2252 uint32_t c, caps, config, cpuflag, evsel, mask;
2254 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
2255 ("[core,%d] illegal CPU %d", __LINE__, cpu));
2256 KASSERT(ri >= 0 && ri < core_iap_npmc,
2257 ("[core,%d] illegal row-index value %d", __LINE__, ri));
2259 /* check requested capabilities */
2261 if ((IAP_PMC_CAPS & caps) != caps)
2263 map = 0; /* XXX: silent GCC warning */
2264 arch = iap_is_event_architectural(pm->pm_event, &map);
2265 if (arch == EV_IS_ARCH_NOTSUPP)
2266 return (EOPNOTSUPP);
2267 else if (arch == EV_IS_ARCH_SUPP)
2273 * A small number of events are not supported in all the
2274 * processors based on a given microarchitecture.
2276 if (ev == PMC_EV_IAP_EVENT_0FH_01H || ev == PMC_EV_IAP_EVENT_0FH_80H) {
2277 model = ((cpu_id & 0xF0000) >> 12) | ((cpu_id & 0xF0) >> 4);
2278 if (core_cputype == PMC_CPU_INTEL_COREI7 && model != 0x2E)
2282 switch (core_cputype) {
2283 case PMC_CPU_INTEL_COREI7:
2284 case PMC_CPU_INTEL_NEHALEM_EX:
2285 if (iap_event_corei7_ok_on_counter(ev, ri) == 0)
2288 case PMC_CPU_INTEL_SKYLAKE:
2289 case PMC_CPU_INTEL_SKYLAKE_XEON:
2290 case PMC_CPU_INTEL_BROADWELL:
2291 case PMC_CPU_INTEL_BROADWELL_XEON:
2292 case PMC_CPU_INTEL_SANDYBRIDGE:
2293 case PMC_CPU_INTEL_SANDYBRIDGE_XEON:
2294 case PMC_CPU_INTEL_IVYBRIDGE:
2295 case PMC_CPU_INTEL_IVYBRIDGE_XEON:
2296 case PMC_CPU_INTEL_HASWELL:
2297 case PMC_CPU_INTEL_HASWELL_XEON:
2298 if (iap_event_sb_sbx_ib_ibx_ok_on_counter(ev, ri) == 0)
2301 case PMC_CPU_INTEL_WESTMERE:
2302 case PMC_CPU_INTEL_WESTMERE_EX:
2303 if (iap_event_westmere_ok_on_counter(ev, ri) == 0)
2307 if (iap_event_ok_on_counter(ev, ri) == 0)
2312 * Look for an event descriptor with matching CPU and event id
2316 switch (core_cputype) {
2318 case PMC_CPU_INTEL_ATOM:
2321 case PMC_CPU_INTEL_ATOM_SILVERMONT:
2322 cpuflag = IAP_F_CAS;
2324 case PMC_CPU_INTEL_SKYLAKE_XEON:
2325 cpuflag = IAP_F_SLX;
2327 case PMC_CPU_INTEL_SKYLAKE:
2330 case PMC_CPU_INTEL_BROADWELL_XEON:
2331 cpuflag = IAP_F_BWX;
2333 case PMC_CPU_INTEL_BROADWELL:
2336 case PMC_CPU_INTEL_CORE:
2339 case PMC_CPU_INTEL_CORE2:
2340 cpuflag = IAP_F_CC2;
2342 case PMC_CPU_INTEL_CORE2EXTREME:
2343 cpuflag = IAP_F_CC2 | IAP_F_CC2E;
2345 case PMC_CPU_INTEL_COREI7:
2348 case PMC_CPU_INTEL_HASWELL:
2351 case PMC_CPU_INTEL_HASWELL_XEON:
2352 cpuflag = IAP_F_HWX;
2354 case PMC_CPU_INTEL_IVYBRIDGE:
2357 case PMC_CPU_INTEL_IVYBRIDGE_XEON:
2358 cpuflag = IAP_F_IBX;
2360 case PMC_CPU_INTEL_SANDYBRIDGE:
2363 case PMC_CPU_INTEL_SANDYBRIDGE_XEON:
2364 cpuflag = IAP_F_SBX;
2366 case PMC_CPU_INTEL_WESTMERE:
2371 for (n = 0, ie = iap_events; n < nitems(iap_events); n++, ie++)
2372 if (ie->iap_ev == ev && ie->iap_flags & cpuflag)
2375 if (n == nitems(iap_events))
2379 * A matching event descriptor has been found, so start
2380 * assembling the contents of the event select register.
2382 evsel = ie->iap_evcode;
2384 config = a->pm_md.pm_iap.pm_iap_config & ~IAP_F_CMASK;
2387 * If the event uses a fixed umask value, reject any umask
2388 * bits set by the user.
2390 if (ie->iap_flags & IAP_F_FM) {
2392 if (IAP_UMASK(config) != 0)
2395 evsel |= (ie->iap_umask << 8);
2400 * Otherwise, the UMASK value needs to be taken from
2401 * the MD fields of the allocation request. Reject
2402 * requests that specify reserved bits.
2407 if (ie->iap_umask & IAP_M_CORE) {
2408 if ((c = (config & IAP_F_CORE)) != IAP_CORE_ALL &&
2414 if (ie->iap_umask & IAP_M_AGENT)
2415 mask |= IAP_F_AGENT;
2417 if (ie->iap_umask & IAP_M_PREFETCH) {
2419 if ((c = (config & IAP_F_PREFETCH)) ==
2420 IAP_PREFETCH_RESERVED)
2423 mask |= IAP_F_PREFETCH;
2426 if (ie->iap_umask & IAP_M_MESI)
2429 if (ie->iap_umask & IAP_M_SNOOPRESPONSE)
2430 mask |= IAP_F_SNOOPRESPONSE;
2432 if (ie->iap_umask & IAP_M_SNOOPTYPE)
2433 mask |= IAP_F_SNOOPTYPE;
2435 if (ie->iap_umask & IAP_M_TRANSITION)
2436 mask |= IAP_F_TRANSITION;
2439 * If bits outside of the allowed set of umask bits
2440 * are set, reject the request.
2445 evsel |= (config & mask);
2450 * Only Atom and SandyBridge CPUs support the 'ANY' qualifier.
2452 if (core_cputype == PMC_CPU_INTEL_ATOM ||
2453 core_cputype == PMC_CPU_INTEL_ATOM_SILVERMONT ||
2454 core_cputype == PMC_CPU_INTEL_SANDYBRIDGE ||
2455 core_cputype == PMC_CPU_INTEL_SANDYBRIDGE_XEON)
2456 evsel |= (config & IAP_ANY);
2457 else if (config & IAP_ANY)
2461 * Check offcore response configuration.
2463 if (a->pm_md.pm_iap.pm_iap_rsp != 0) {
2464 if (ev != PMC_EV_IAP_EVENT_B7H_01H &&
2465 ev != PMC_EV_IAP_EVENT_BBH_01H)
2467 if (core_cputype == PMC_CPU_INTEL_COREI7 &&
2468 ev == PMC_EV_IAP_EVENT_BBH_01H)
2470 if ((core_cputype == PMC_CPU_INTEL_COREI7 ||
2471 core_cputype == PMC_CPU_INTEL_WESTMERE ||
2472 core_cputype == PMC_CPU_INTEL_NEHALEM_EX ||
2473 core_cputype == PMC_CPU_INTEL_WESTMERE_EX) &&
2474 a->pm_md.pm_iap.pm_iap_rsp & ~IA_OFFCORE_RSP_MASK_I7WM)
2476 else if ((core_cputype == PMC_CPU_INTEL_SANDYBRIDGE ||
2477 core_cputype == PMC_CPU_INTEL_SANDYBRIDGE_XEON ||
2478 core_cputype == PMC_CPU_INTEL_IVYBRIDGE ||
2479 core_cputype == PMC_CPU_INTEL_IVYBRIDGE_XEON) &&
2480 a->pm_md.pm_iap.pm_iap_rsp & ~IA_OFFCORE_RSP_MASK_SBIB)
2482 pm->pm_md.pm_iap.pm_iap_rsp = a->pm_md.pm_iap.pm_iap_rsp;
2485 if (caps & PMC_CAP_THRESHOLD)
2486 evsel |= (a->pm_md.pm_iap.pm_iap_config & IAP_F_CMASK);
2487 if (caps & PMC_CAP_USER)
2489 if (caps & PMC_CAP_SYSTEM)
2491 if ((caps & (PMC_CAP_USER | PMC_CAP_SYSTEM)) == 0)
2492 evsel |= (IAP_OS | IAP_USR);
2493 if (caps & PMC_CAP_EDGE)
2495 if (caps & PMC_CAP_INVERT)
2497 if (caps & PMC_CAP_INTERRUPT)
2500 pm->pm_md.pm_iap.pm_iap_evsel = evsel;
2506 iap_config_pmc(int cpu, int ri, struct pmc *pm)
2508 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
2509 ("[core,%d] illegal CPU %d", __LINE__, cpu));
2511 KASSERT(ri >= 0 && ri < core_iap_npmc,
2512 ("[core,%d] illegal row-index %d", __LINE__, ri));
2514 PMCDBG3(MDP,CFG,1, "iap-config cpu=%d ri=%d pm=%p", cpu, ri, pm);
2516 KASSERT(core_pcpu[cpu] != NULL, ("[core,%d] null per-cpu %d", __LINE__,
2519 core_pcpu[cpu]->pc_corepmcs[ri].phw_pmc = pm;
2525 iap_describe(int cpu, int ri, struct pmc_info *pi, struct pmc **ppmc)
2529 char iap_name[PMC_NAME_MAX];
2531 phw = &core_pcpu[cpu]->pc_corepmcs[ri];
2533 (void) snprintf(iap_name, sizeof(iap_name), "IAP-%d", ri);
2534 if ((error = copystr(iap_name, pi->pm_name, PMC_NAME_MAX,
2538 pi->pm_class = PMC_CLASS_IAP;
2540 if (phw->phw_state & PMC_PHW_FLAG_IS_ENABLED) {
2541 pi->pm_enabled = TRUE;
2542 *ppmc = phw->phw_pmc;
2544 pi->pm_enabled = FALSE;
2552 iap_get_config(int cpu, int ri, struct pmc **ppm)
2554 *ppm = core_pcpu[cpu]->pc_corepmcs[ri].phw_pmc;
2560 iap_get_msr(int ri, uint32_t *msr)
2562 KASSERT(ri >= 0 && ri < core_iap_npmc,
2563 ("[iap,%d] ri %d out of range", __LINE__, ri));
2571 iap_read_pmc(int cpu, int ri, pmc_value_t *v)
2576 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
2577 ("[core,%d] illegal cpu value %d", __LINE__, cpu));
2578 KASSERT(ri >= 0 && ri < core_iap_npmc,
2579 ("[core,%d] illegal row-index %d", __LINE__, ri));
2581 pm = core_pcpu[cpu]->pc_corepmcs[ri].phw_pmc;
2584 ("[core,%d] cpu %d ri %d pmc not configured", __LINE__, cpu,
2588 if (PMC_IS_SAMPLING_MODE(PMC_TO_MODE(pm)))
2589 *v = iap_perfctr_value_to_reload_count(tmp);
2591 *v = tmp & ((1ULL << core_iap_width) - 1);
2593 PMCDBG4(MDP,REA,1, "iap-read cpu=%d ri=%d msr=0x%x -> v=%jx", cpu, ri,
2600 iap_release_pmc(int cpu, int ri, struct pmc *pm)
2604 PMCDBG3(MDP,REL,1, "iap-release cpu=%d ri=%d pm=%p", cpu, ri,
2607 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
2608 ("[core,%d] illegal CPU value %d", __LINE__, cpu));
2609 KASSERT(ri >= 0 && ri < core_iap_npmc,
2610 ("[core,%d] illegal row-index %d", __LINE__, ri));
2612 KASSERT(core_pcpu[cpu]->pc_corepmcs[ri].phw_pmc
2613 == NULL, ("[core,%d] PHW pmc non-NULL", __LINE__));
2619 iap_start_pmc(int cpu, int ri)
2623 struct core_cpu *cc;
2625 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
2626 ("[core,%d] illegal CPU value %d", __LINE__, cpu));
2627 KASSERT(ri >= 0 && ri < core_iap_npmc,
2628 ("[core,%d] illegal row-index %d", __LINE__, ri));
2630 cc = core_pcpu[cpu];
2631 pm = cc->pc_corepmcs[ri].phw_pmc;
2634 ("[core,%d] starting cpu%d,ri%d with no pmc configured",
2635 __LINE__, cpu, ri));
2637 PMCDBG2(MDP,STA,1, "iap-start cpu=%d ri=%d", cpu, ri);
2639 evsel = pm->pm_md.pm_iap.pm_iap_evsel;
2641 PMCDBG4(MDP,STA,2, "iap-start/2 cpu=%d ri=%d evselmsr=0x%x evsel=0x%x",
2642 cpu, ri, IAP_EVSEL0 + ri, evsel);
2644 /* Event specific configuration. */
2645 switch (pm->pm_event) {
2646 case PMC_EV_IAP_EVENT_B7H_01H:
2647 wrmsr(IA_OFFCORE_RSP0, pm->pm_md.pm_iap.pm_iap_rsp);
2649 case PMC_EV_IAP_EVENT_BBH_01H:
2650 wrmsr(IA_OFFCORE_RSP1, pm->pm_md.pm_iap.pm_iap_rsp);
2656 wrmsr(IAP_EVSEL0 + ri, evsel | IAP_EN);
2658 if (core_cputype == PMC_CPU_INTEL_CORE)
2663 cc->pc_globalctrl |= (1ULL << ri);
2664 wrmsr(IA_GLOBAL_CTRL, cc->pc_globalctrl);
2665 } while (cc->pc_resync != 0);
2671 iap_stop_pmc(int cpu, int ri)
2674 struct core_cpu *cc;
2677 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
2678 ("[core,%d] illegal cpu value %d", __LINE__, cpu));
2679 KASSERT(ri >= 0 && ri < core_iap_npmc,
2680 ("[core,%d] illegal row index %d", __LINE__, ri));
2682 cc = core_pcpu[cpu];
2683 pm = cc->pc_corepmcs[ri].phw_pmc;
2686 ("[core,%d] cpu%d ri%d no configured PMC to stop", __LINE__,
2689 PMCDBG2(MDP,STO,1, "iap-stop cpu=%d ri=%d", cpu, ri);
2691 msr = rdmsr(IAP_EVSEL0 + ri) & ~IAP_EVSEL_MASK;
2692 wrmsr(IAP_EVSEL0 + ri, msr); /* stop hw */
2694 if (core_cputype == PMC_CPU_INTEL_CORE)
2700 cc->pc_globalctrl &= ~(1ULL << ri);
2701 msr = rdmsr(IA_GLOBAL_CTRL) & ~IA_GLOBAL_CTRL_MASK;
2702 wrmsr(IA_GLOBAL_CTRL, cc->pc_globalctrl);
2703 } while (cc->pc_resync != 0);
2709 iap_write_pmc(int cpu, int ri, pmc_value_t v)
2712 struct core_cpu *cc;
2714 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
2715 ("[core,%d] illegal cpu value %d", __LINE__, cpu));
2716 KASSERT(ri >= 0 && ri < core_iap_npmc,
2717 ("[core,%d] illegal row index %d", __LINE__, ri));
2719 cc = core_pcpu[cpu];
2720 pm = cc->pc_corepmcs[ri].phw_pmc;
2723 ("[core,%d] cpu%d ri%d no configured PMC to stop", __LINE__,
2726 if (PMC_IS_SAMPLING_MODE(PMC_TO_MODE(pm)))
2727 v = iap_reload_count_to_perfctr_value(v);
2729 v &= (1ULL << core_iap_width) - 1;
2731 PMCDBG4(MDP,WRI,1, "iap-write cpu=%d ri=%d msr=0x%x v=%jx", cpu, ri,
2735 * Write the new value to the counter (or it's alias). The
2736 * counter will be in a stopped state when the pcd_write()
2737 * entry point is called.
2739 wrmsr(core_iap_wroffset + IAP_PMC0 + ri, v);
2745 iap_initialize(struct pmc_mdep *md, int maxcpu, int npmc, int pmcwidth,
2748 struct pmc_classdep *pcd;
2750 KASSERT(md != NULL, ("[iap,%d] md is NULL", __LINE__));
2752 PMCDBG0(MDP,INI,1, "iap-initialize");
2754 /* Remember the set of architectural events supported. */
2755 core_architectural_events = ~flags;
2757 pcd = &md->pmd_classdep[PMC_MDEP_CLASS_INDEX_IAP];
2759 pcd->pcd_caps = IAP_PMC_CAPS;
2760 pcd->pcd_class = PMC_CLASS_IAP;
2761 pcd->pcd_num = npmc;
2762 pcd->pcd_ri = md->pmd_npmc;
2763 pcd->pcd_width = pmcwidth;
2765 pcd->pcd_allocate_pmc = iap_allocate_pmc;
2766 pcd->pcd_config_pmc = iap_config_pmc;
2767 pcd->pcd_describe = iap_describe;
2768 pcd->pcd_get_config = iap_get_config;
2769 pcd->pcd_get_msr = iap_get_msr;
2770 pcd->pcd_pcpu_fini = core_pcpu_fini;
2771 pcd->pcd_pcpu_init = core_pcpu_init;
2772 pcd->pcd_read_pmc = iap_read_pmc;
2773 pcd->pcd_release_pmc = iap_release_pmc;
2774 pcd->pcd_start_pmc = iap_start_pmc;
2775 pcd->pcd_stop_pmc = iap_stop_pmc;
2776 pcd->pcd_write_pmc = iap_write_pmc;
2778 md->pmd_npmc += npmc;
2782 core_intr(int cpu, struct trapframe *tf)
2786 struct core_cpu *cc;
2787 int error, found_interrupt, ri;
2790 PMCDBG3(MDP,INT, 1, "cpu=%d tf=0x%p um=%d", cpu, (void *) tf,
2791 TRAPF_USERMODE(tf));
2793 found_interrupt = 0;
2794 cc = core_pcpu[cpu];
2796 for (ri = 0; ri < core_iap_npmc; ri++) {
2798 if ((pm = cc->pc_corepmcs[ri].phw_pmc) == NULL ||
2799 !PMC_IS_SAMPLING_MODE(PMC_TO_MODE(pm)))
2802 if (!iap_pmc_has_overflowed(ri))
2805 found_interrupt = 1;
2807 if (pm->pm_state != PMC_STATE_RUNNING)
2810 error = pmc_process_interrupt(cpu, PMC_HR, pm, tf,
2811 TRAPF_USERMODE(tf));
2813 v = pm->pm_sc.pm_reloadcount;
2814 v = iap_reload_count_to_perfctr_value(v);
2817 * Stop the counter, reload it but only restart it if
2818 * the PMC is not stalled.
2820 msr = rdmsr(IAP_EVSEL0 + ri) & ~IAP_EVSEL_MASK;
2821 wrmsr(IAP_EVSEL0 + ri, msr);
2822 wrmsr(core_iap_wroffset + IAP_PMC0 + ri, v);
2827 wrmsr(IAP_EVSEL0 + ri, msr | (pm->pm_md.pm_iap.pm_iap_evsel |
2831 if (found_interrupt)
2832 lapic_reenable_pmc();
2834 atomic_add_int(found_interrupt ? &pmc_stats.pm_intr_processed :
2835 &pmc_stats.pm_intr_ignored, 1);
2837 return (found_interrupt);
2841 core2_intr(int cpu, struct trapframe *tf)
2843 int error, found_interrupt, n;
2844 uint64_t flag, intrstatus, intrenable, msr;
2846 struct core_cpu *cc;
2849 PMCDBG3(MDP,INT, 1, "cpu=%d tf=0x%p um=%d", cpu, (void *) tf,
2850 TRAPF_USERMODE(tf));
2853 * The IA_GLOBAL_STATUS (MSR 0x38E) register indicates which
2854 * PMCs have a pending PMI interrupt. We take a 'snapshot' of
2855 * the current set of interrupting PMCs and process these
2856 * after stopping them.
2858 intrstatus = rdmsr(IA_GLOBAL_STATUS);
2859 intrenable = intrstatus & core_pmcmask;
2861 PMCDBG2(MDP,INT, 1, "cpu=%d intrstatus=%jx", cpu,
2862 (uintmax_t) intrstatus);
2864 found_interrupt = 0;
2865 cc = core_pcpu[cpu];
2867 KASSERT(cc != NULL, ("[core,%d] null pcpu", __LINE__));
2869 cc->pc_globalctrl &= ~intrenable;
2870 cc->pc_resync = 1; /* MSRs now potentially out of sync. */
2873 * Stop PMCs and clear overflow status bits.
2875 msr = rdmsr(IA_GLOBAL_CTRL) & ~IA_GLOBAL_CTRL_MASK;
2876 wrmsr(IA_GLOBAL_CTRL, msr);
2877 wrmsr(IA_GLOBAL_OVF_CTRL, intrenable |
2878 IA_GLOBAL_STATUS_FLAG_OVFBUF |
2879 IA_GLOBAL_STATUS_FLAG_CONDCHG);
2882 * Look for interrupts from fixed function PMCs.
2884 for (n = 0, flag = (1ULL << IAF_OFFSET); n < core_iaf_npmc;
2887 if ((intrstatus & flag) == 0)
2890 found_interrupt = 1;
2892 pm = cc->pc_corepmcs[n + core_iaf_ri].phw_pmc;
2893 if (pm == NULL || pm->pm_state != PMC_STATE_RUNNING ||
2894 !PMC_IS_SAMPLING_MODE(PMC_TO_MODE(pm)))
2897 error = pmc_process_interrupt(cpu, PMC_HR, pm, tf,
2898 TRAPF_USERMODE(tf));
2900 intrenable &= ~flag;
2902 v = iaf_reload_count_to_perfctr_value(pm->pm_sc.pm_reloadcount);
2904 /* Reload sampling count. */
2905 wrmsr(IAF_CTR0 + n, v);
2907 PMCDBG4(MDP,INT, 1, "iaf-intr cpu=%d error=%d v=%jx(%jx)", cpu,
2908 error, (uintmax_t) v, (uintmax_t) rdpmc(IAF_RI_TO_MSR(n)));
2912 * Process interrupts from the programmable counters.
2914 for (n = 0, flag = 1; n < core_iap_npmc; n++, flag <<= 1) {
2915 if ((intrstatus & flag) == 0)
2918 found_interrupt = 1;
2920 pm = cc->pc_corepmcs[n].phw_pmc;
2921 if (pm == NULL || pm->pm_state != PMC_STATE_RUNNING ||
2922 !PMC_IS_SAMPLING_MODE(PMC_TO_MODE(pm)))
2925 error = pmc_process_interrupt(cpu, PMC_HR, pm, tf,
2926 TRAPF_USERMODE(tf));
2928 intrenable &= ~flag;
2930 v = iap_reload_count_to_perfctr_value(pm->pm_sc.pm_reloadcount);
2932 PMCDBG3(MDP,INT, 1, "iap-intr cpu=%d error=%d v=%jx", cpu, error,
2935 /* Reload sampling count. */
2936 wrmsr(core_iap_wroffset + IAP_PMC0 + n, v);
2940 * Reenable all non-stalled PMCs.
2942 PMCDBG2(MDP,INT, 1, "cpu=%d intrenable=%jx", cpu,
2943 (uintmax_t) intrenable);
2945 cc->pc_globalctrl |= intrenable;
2947 wrmsr(IA_GLOBAL_CTRL, cc->pc_globalctrl & IA_GLOBAL_CTRL_MASK);
2949 PMCDBG5(MDP,INT, 1, "cpu=%d fixedctrl=%jx globalctrl=%jx status=%jx "
2950 "ovf=%jx", cpu, (uintmax_t) rdmsr(IAF_CTRL),
2951 (uintmax_t) rdmsr(IA_GLOBAL_CTRL),
2952 (uintmax_t) rdmsr(IA_GLOBAL_STATUS),
2953 (uintmax_t) rdmsr(IA_GLOBAL_OVF_CTRL));
2955 if (found_interrupt)
2956 lapic_reenable_pmc();
2958 atomic_add_int(found_interrupt ? &pmc_stats.pm_intr_processed :
2959 &pmc_stats.pm_intr_ignored, 1);
2961 return (found_interrupt);
2965 pmc_core_initialize(struct pmc_mdep *md, int maxcpu, int version_override)
2967 int cpuid[CORE_CPUID_REQUEST_SIZE];
2968 int ipa_version, flags, nflags;
2970 do_cpuid(CORE_CPUID_REQUEST, cpuid);
2972 ipa_version = (version_override > 0) ? version_override :
2973 cpuid[CORE_CPUID_EAX] & 0xFF;
2974 core_cputype = md->pmd_cputype;
2976 PMCDBG3(MDP,INI,1,"core-init cputype=%d ncpu=%d ipa-version=%d",
2977 core_cputype, maxcpu, ipa_version);
2979 if (ipa_version < 1 || ipa_version > 4 ||
2980 (core_cputype != PMC_CPU_INTEL_CORE && ipa_version == 1)) {
2981 /* Unknown PMC architecture. */
2982 printf("hwpc_core: unknown PMC architecture: %d\n",
2984 return (EPROGMISMATCH);
2987 core_iap_wroffset = 0;
2988 if (cpu_feature2 & CPUID2_PDCM) {
2989 if (rdmsr(IA32_PERF_CAPABILITIES) & PERFCAP_FW_WRITE) {
2990 PMCDBG0(MDP, INI, 1,
2991 "core-init full-width write supported");
2992 core_iap_wroffset = IAP_A_PMC0 - IAP_PMC0;
2994 PMCDBG0(MDP, INI, 1,
2995 "core-init full-width write NOT supported");
2997 PMCDBG0(MDP, INI, 1, "core-init pdcm not supported");
3002 * Initialize programmable counters.
3004 core_iap_npmc = (cpuid[CORE_CPUID_EAX] >> 8) & 0xFF;
3005 core_iap_width = (cpuid[CORE_CPUID_EAX] >> 16) & 0xFF;
3007 core_pmcmask |= ((1ULL << core_iap_npmc) - 1);
3009 nflags = (cpuid[CORE_CPUID_EAX] >> 24) & 0xFF;
3010 flags = cpuid[CORE_CPUID_EBX] & ((1 << nflags) - 1);
3012 iap_initialize(md, maxcpu, core_iap_npmc, core_iap_width, flags);
3015 * Initialize fixed function counters, if present.
3017 if (core_cputype != PMC_CPU_INTEL_CORE) {
3018 core_iaf_ri = core_iap_npmc;
3019 core_iaf_npmc = cpuid[CORE_CPUID_EDX] & 0x1F;
3020 core_iaf_width = (cpuid[CORE_CPUID_EDX] >> 5) & 0xFF;
3022 iaf_initialize(md, maxcpu, core_iaf_npmc, core_iaf_width);
3023 core_pmcmask |= ((1ULL << core_iaf_npmc) - 1) << IAF_OFFSET;
3026 PMCDBG2(MDP,INI,1,"core-init pmcmask=0x%jx iafri=%d", core_pmcmask,
3029 core_pcpu = malloc(sizeof(*core_pcpu) * maxcpu, M_PMC,
3033 * Choose the appropriate interrupt handler.
3035 if (ipa_version == 1)
3036 md->pmd_intr = core_intr;
3038 md->pmd_intr = core2_intr;
3040 md->pmd_pcpu_fini = NULL;
3041 md->pmd_pcpu_init = NULL;
3047 pmc_core_finalize(struct pmc_mdep *md)
3049 PMCDBG0(MDP,INI,1, "core-finalize");
3051 free(core_pcpu, M_PMC);