2 * Copyright (c) 2008 Joseph Koshy
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 #include <sys/cdefs.h>
32 __FBSDID("$FreeBSD$");
34 #include <sys/param.h>
37 #include <sys/pmckern.h>
38 #include <sys/systm.h>
40 #include <machine/intr_machdep.h>
41 #if (__FreeBSD_version >= 1100000)
42 #include <x86/apicvar.h>
44 #include <machine/apicvar.h>
46 #include <machine/cpu.h>
47 #include <machine/cpufunc.h>
48 #include <machine/md_var.h>
49 #include <machine/specialreg.h>
51 #define CORE_CPUID_REQUEST 0xA
52 #define CORE_CPUID_REQUEST_SIZE 0x4
53 #define CORE_CPUID_EAX 0x0
54 #define CORE_CPUID_EBX 0x1
55 #define CORE_CPUID_ECX 0x2
56 #define CORE_CPUID_EDX 0x3
58 #define IAF_PMC_CAPS \
59 (PMC_CAP_READ | PMC_CAP_WRITE | PMC_CAP_INTERRUPT | \
60 PMC_CAP_USER | PMC_CAP_SYSTEM)
61 #define IAF_RI_TO_MSR(RI) ((RI) + (1 << 30))
63 #define IAP_PMC_CAPS (PMC_CAP_INTERRUPT | PMC_CAP_USER | PMC_CAP_SYSTEM | \
64 PMC_CAP_EDGE | PMC_CAP_THRESHOLD | PMC_CAP_READ | PMC_CAP_WRITE | \
65 PMC_CAP_INVERT | PMC_CAP_QUALIFIER | PMC_CAP_PRECISE)
67 #define EV_IS_NOTARCH 0
68 #define EV_IS_ARCH_SUPP 1
69 #define EV_IS_ARCH_NOTSUPP -1
72 * "Architectural" events defined by Intel. The values of these
73 * symbols correspond to positions in the bitmask returned by
74 * the CPUID.0AH instruction.
76 enum core_arch_events {
77 CORE_AE_BRANCH_INSTRUCTION_RETIRED = 5,
78 CORE_AE_BRANCH_MISSES_RETIRED = 6,
79 CORE_AE_INSTRUCTION_RETIRED = 1,
80 CORE_AE_LLC_MISSES = 4,
81 CORE_AE_LLC_REFERENCE = 3,
82 CORE_AE_UNHALTED_REFERENCE_CYCLES = 2,
83 CORE_AE_UNHALTED_CORE_CYCLES = 0
86 static enum pmc_cputype core_cputype;
89 volatile uint32_t pc_resync;
90 volatile uint32_t pc_iafctrl; /* Fixed function control. */
91 volatile uint64_t pc_globalctrl; /* Global control register. */
92 struct pmc_hw pc_corepmcs[];
95 static struct core_cpu **core_pcpu;
97 static uint32_t core_architectural_events;
98 static uint64_t core_pmcmask;
100 static int core_iaf_ri; /* relative index of fixed counters */
101 static int core_iaf_width;
102 static int core_iaf_npmc;
104 static int core_iap_width;
105 static int core_iap_npmc;
106 static int core_iap_wroffset;
109 core_pcpu_noop(struct pmc_mdep *md, int cpu)
117 core_pcpu_init(struct pmc_mdep *md, int cpu)
122 int core_ri, n, npmc;
124 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
125 ("[iaf,%d] insane cpu number %d", __LINE__, cpu));
127 PMCDBG1(MDP,INI,1,"core-init cpu=%d", cpu);
129 core_ri = md->pmd_classdep[PMC_MDEP_CLASS_INDEX_IAP].pcd_ri;
130 npmc = md->pmd_classdep[PMC_MDEP_CLASS_INDEX_IAP].pcd_num;
132 if (core_cputype != PMC_CPU_INTEL_CORE)
133 npmc += md->pmd_classdep[PMC_MDEP_CLASS_INDEX_IAF].pcd_num;
135 cc = malloc(sizeof(struct core_cpu) + npmc * sizeof(struct pmc_hw),
136 M_PMC, M_WAITOK | M_ZERO);
141 KASSERT(pc != NULL && cc != NULL,
142 ("[core,%d] NULL per-cpu structures cpu=%d", __LINE__, cpu));
144 for (n = 0, phw = cc->pc_corepmcs; n < npmc; n++, phw++) {
145 phw->phw_state = PMC_PHW_FLAG_IS_ENABLED |
146 PMC_PHW_CPU_TO_STATE(cpu) |
147 PMC_PHW_INDEX_TO_STATE(n + core_ri);
149 pc->pc_hwpmcs[n + core_ri] = phw;
156 core_pcpu_fini(struct pmc_mdep *md, int cpu)
158 int core_ri, n, npmc;
163 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
164 ("[core,%d] insane cpu number (%d)", __LINE__, cpu));
166 PMCDBG1(MDP,INI,1,"core-pcpu-fini cpu=%d", cpu);
168 if ((cc = core_pcpu[cpu]) == NULL)
171 core_pcpu[cpu] = NULL;
175 KASSERT(pc != NULL, ("[core,%d] NULL per-cpu %d state", __LINE__,
178 npmc = md->pmd_classdep[PMC_MDEP_CLASS_INDEX_IAP].pcd_num;
179 core_ri = md->pmd_classdep[PMC_MDEP_CLASS_INDEX_IAP].pcd_ri;
181 for (n = 0; n < npmc; n++) {
182 msr = rdmsr(IAP_EVSEL0 + n) & ~IAP_EVSEL_MASK;
183 wrmsr(IAP_EVSEL0 + n, msr);
186 if (core_cputype != PMC_CPU_INTEL_CORE) {
187 msr = rdmsr(IAF_CTRL) & ~IAF_CTRL_MASK;
188 wrmsr(IAF_CTRL, msr);
189 npmc += md->pmd_classdep[PMC_MDEP_CLASS_INDEX_IAF].pcd_num;
192 for (n = 0; n < npmc; n++)
193 pc->pc_hwpmcs[n + core_ri] = NULL;
201 * Fixed function counters.
205 iaf_perfctr_value_to_reload_count(pmc_value_t v)
208 /* If the PMC has overflowed, return a reload count of zero. */
209 if ((v & (1ULL << (core_iaf_width - 1))) == 0)
211 v &= (1ULL << core_iaf_width) - 1;
212 return (1ULL << core_iaf_width) - v;
216 iaf_reload_count_to_perfctr_value(pmc_value_t rlc)
218 return (1ULL << core_iaf_width) - rlc;
222 iaf_allocate_pmc(int cpu, int ri, struct pmc *pm,
223 const struct pmc_op_pmcallocate *a)
226 uint32_t caps, flags, validflags;
228 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
229 ("[core,%d] illegal CPU %d", __LINE__, cpu));
231 PMCDBG2(MDP,ALL,1, "iaf-allocate ri=%d reqcaps=0x%x", ri, pm->pm_caps);
233 if (ri < 0 || ri > core_iaf_npmc)
238 if (a->pm_class != PMC_CLASS_IAF ||
239 (caps & IAF_PMC_CAPS) != caps)
243 if (ev < PMC_EV_IAF_FIRST || ev > PMC_EV_IAF_LAST)
246 if (ev == PMC_EV_IAF_INSTR_RETIRED_ANY && ri != 0)
248 if (ev == PMC_EV_IAF_CPU_CLK_UNHALTED_CORE && ri != 1)
250 if (ev == PMC_EV_IAF_CPU_CLK_UNHALTED_REF && ri != 2)
253 flags = a->pm_md.pm_iaf.pm_iaf_flags;
255 validflags = IAF_MASK;
257 if (core_cputype != PMC_CPU_INTEL_ATOM &&
258 core_cputype != PMC_CPU_INTEL_ATOM_SILVERMONT)
259 validflags &= ~IAF_ANY;
261 if ((flags & ~validflags) != 0)
264 if (caps & PMC_CAP_INTERRUPT)
266 if (caps & PMC_CAP_SYSTEM)
268 if (caps & PMC_CAP_USER)
270 if ((caps & (PMC_CAP_USER | PMC_CAP_SYSTEM)) == 0)
271 flags |= (IAF_OS | IAF_USR);
273 pm->pm_md.pm_iaf.pm_iaf_ctrl = (flags << (ri * 4));
275 PMCDBG1(MDP,ALL,2, "iaf-allocate config=0x%jx",
276 (uintmax_t) pm->pm_md.pm_iaf.pm_iaf_ctrl);
282 iaf_config_pmc(int cpu, int ri, struct pmc *pm)
284 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
285 ("[core,%d] illegal CPU %d", __LINE__, cpu));
287 KASSERT(ri >= 0 && ri < core_iaf_npmc,
288 ("[core,%d] illegal row-index %d", __LINE__, ri));
290 PMCDBG3(MDP,CFG,1, "iaf-config cpu=%d ri=%d pm=%p", cpu, ri, pm);
292 KASSERT(core_pcpu[cpu] != NULL, ("[core,%d] null per-cpu %d", __LINE__,
295 core_pcpu[cpu]->pc_corepmcs[ri + core_iaf_ri].phw_pmc = pm;
301 iaf_describe(int cpu, int ri, struct pmc_info *pi, struct pmc **ppmc)
305 char iaf_name[PMC_NAME_MAX];
307 phw = &core_pcpu[cpu]->pc_corepmcs[ri + core_iaf_ri];
309 (void) snprintf(iaf_name, sizeof(iaf_name), "IAF-%d", ri);
310 if ((error = copystr(iaf_name, pi->pm_name, PMC_NAME_MAX,
314 pi->pm_class = PMC_CLASS_IAF;
316 if (phw->phw_state & PMC_PHW_FLAG_IS_ENABLED) {
317 pi->pm_enabled = TRUE;
318 *ppmc = phw->phw_pmc;
320 pi->pm_enabled = FALSE;
328 iaf_get_config(int cpu, int ri, struct pmc **ppm)
330 *ppm = core_pcpu[cpu]->pc_corepmcs[ri + core_iaf_ri].phw_pmc;
336 iaf_get_msr(int ri, uint32_t *msr)
338 KASSERT(ri >= 0 && ri < core_iaf_npmc,
339 ("[iaf,%d] ri %d out of range", __LINE__, ri));
341 *msr = IAF_RI_TO_MSR(ri);
347 iaf_read_pmc(int cpu, int ri, pmc_value_t *v)
352 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
353 ("[core,%d] illegal cpu value %d", __LINE__, cpu));
354 KASSERT(ri >= 0 && ri < core_iaf_npmc,
355 ("[core,%d] illegal row-index %d", __LINE__, ri));
357 pm = core_pcpu[cpu]->pc_corepmcs[ri + core_iaf_ri].phw_pmc;
360 ("[core,%d] cpu %d ri %d(%d) pmc not configured", __LINE__, cpu,
361 ri, ri + core_iaf_ri));
363 tmp = rdpmc(IAF_RI_TO_MSR(ri));
365 if (PMC_IS_SAMPLING_MODE(PMC_TO_MODE(pm)))
366 *v = iaf_perfctr_value_to_reload_count(tmp);
368 *v = tmp & ((1ULL << core_iaf_width) - 1);
370 PMCDBG4(MDP,REA,1, "iaf-read cpu=%d ri=%d msr=0x%x -> v=%jx", cpu, ri,
371 IAF_RI_TO_MSR(ri), *v);
377 iaf_release_pmc(int cpu, int ri, struct pmc *pmc)
379 PMCDBG3(MDP,REL,1, "iaf-release cpu=%d ri=%d pm=%p", cpu, ri, pmc);
381 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
382 ("[core,%d] illegal CPU value %d", __LINE__, cpu));
383 KASSERT(ri >= 0 && ri < core_iaf_npmc,
384 ("[core,%d] illegal row-index %d", __LINE__, ri));
386 KASSERT(core_pcpu[cpu]->pc_corepmcs[ri + core_iaf_ri].phw_pmc == NULL,
387 ("[core,%d] PHW pmc non-NULL", __LINE__));
393 iaf_start_pmc(int cpu, int ri)
396 struct core_cpu *iafc;
399 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
400 ("[core,%d] illegal CPU value %d", __LINE__, cpu));
401 KASSERT(ri >= 0 && ri < core_iaf_npmc,
402 ("[core,%d] illegal row-index %d", __LINE__, ri));
404 PMCDBG2(MDP,STA,1,"iaf-start cpu=%d ri=%d", cpu, ri);
406 iafc = core_pcpu[cpu];
407 pm = iafc->pc_corepmcs[ri + core_iaf_ri].phw_pmc;
409 iafc->pc_iafctrl |= pm->pm_md.pm_iaf.pm_iaf_ctrl;
411 msr = rdmsr(IAF_CTRL) & ~IAF_CTRL_MASK;
412 wrmsr(IAF_CTRL, msr | (iafc->pc_iafctrl & IAF_CTRL_MASK));
416 iafc->pc_globalctrl |= (1ULL << (ri + IAF_OFFSET));
417 msr = rdmsr(IA_GLOBAL_CTRL) & ~IAF_GLOBAL_CTRL_MASK;
418 wrmsr(IA_GLOBAL_CTRL, msr | (iafc->pc_globalctrl &
419 IAF_GLOBAL_CTRL_MASK));
420 } while (iafc->pc_resync != 0);
422 PMCDBG4(MDP,STA,1,"iafctrl=%x(%x) globalctrl=%jx(%jx)",
423 iafc->pc_iafctrl, (uint32_t) rdmsr(IAF_CTRL),
424 iafc->pc_globalctrl, rdmsr(IA_GLOBAL_CTRL));
430 iaf_stop_pmc(int cpu, int ri)
433 struct core_cpu *iafc;
436 PMCDBG2(MDP,STO,1,"iaf-stop cpu=%d ri=%d", cpu, ri);
438 iafc = core_pcpu[cpu];
440 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
441 ("[core,%d] illegal CPU value %d", __LINE__, cpu));
442 KASSERT(ri >= 0 && ri < core_iaf_npmc,
443 ("[core,%d] illegal row-index %d", __LINE__, ri));
445 fc = (IAF_MASK << (ri * 4));
447 if (core_cputype != PMC_CPU_INTEL_ATOM &&
448 core_cputype != PMC_CPU_INTEL_ATOM_SILVERMONT)
451 iafc->pc_iafctrl &= ~fc;
453 PMCDBG1(MDP,STO,1,"iaf-stop iafctrl=%x", iafc->pc_iafctrl);
454 msr = rdmsr(IAF_CTRL) & ~IAF_CTRL_MASK;
455 wrmsr(IAF_CTRL, msr | (iafc->pc_iafctrl & IAF_CTRL_MASK));
459 iafc->pc_globalctrl &= ~(1ULL << (ri + IAF_OFFSET));
460 msr = rdmsr(IA_GLOBAL_CTRL) & ~IAF_GLOBAL_CTRL_MASK;
461 wrmsr(IA_GLOBAL_CTRL, msr | (iafc->pc_globalctrl &
462 IAF_GLOBAL_CTRL_MASK));
463 } while (iafc->pc_resync != 0);
465 PMCDBG4(MDP,STO,1,"iafctrl=%x(%x) globalctrl=%jx(%jx)",
466 iafc->pc_iafctrl, (uint32_t) rdmsr(IAF_CTRL),
467 iafc->pc_globalctrl, rdmsr(IA_GLOBAL_CTRL));
473 iaf_write_pmc(int cpu, int ri, pmc_value_t v)
479 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
480 ("[core,%d] illegal cpu value %d", __LINE__, cpu));
481 KASSERT(ri >= 0 && ri < core_iaf_npmc,
482 ("[core,%d] illegal row-index %d", __LINE__, ri));
485 pm = cc->pc_corepmcs[ri + core_iaf_ri].phw_pmc;
488 ("[core,%d] cpu %d ri %d pmc not configured", __LINE__, cpu, ri));
490 if (PMC_IS_SAMPLING_MODE(PMC_TO_MODE(pm)))
491 v = iaf_reload_count_to_perfctr_value(v);
493 /* Turn off fixed counters */
494 msr = rdmsr(IAF_CTRL) & ~IAF_CTRL_MASK;
495 wrmsr(IAF_CTRL, msr);
497 wrmsr(IAF_CTR0 + ri, v & ((1ULL << core_iaf_width) - 1));
499 /* Turn on fixed counters */
500 msr = rdmsr(IAF_CTRL) & ~IAF_CTRL_MASK;
501 wrmsr(IAF_CTRL, msr | (cc->pc_iafctrl & IAF_CTRL_MASK));
503 PMCDBG6(MDP,WRI,1, "iaf-write cpu=%d ri=%d msr=0x%x v=%jx iafctrl=%jx "
504 "pmc=%jx", cpu, ri, IAF_RI_TO_MSR(ri), v,
505 (uintmax_t) rdmsr(IAF_CTRL),
506 (uintmax_t) rdpmc(IAF_RI_TO_MSR(ri)));
513 iaf_initialize(struct pmc_mdep *md, int maxcpu, int npmc, int pmcwidth)
515 struct pmc_classdep *pcd;
517 KASSERT(md != NULL, ("[iaf,%d] md is NULL", __LINE__));
519 PMCDBG0(MDP,INI,1, "iaf-initialize");
521 pcd = &md->pmd_classdep[PMC_MDEP_CLASS_INDEX_IAF];
523 pcd->pcd_caps = IAF_PMC_CAPS;
524 pcd->pcd_class = PMC_CLASS_IAF;
526 pcd->pcd_ri = md->pmd_npmc;
527 pcd->pcd_width = pmcwidth;
529 pcd->pcd_allocate_pmc = iaf_allocate_pmc;
530 pcd->pcd_config_pmc = iaf_config_pmc;
531 pcd->pcd_describe = iaf_describe;
532 pcd->pcd_get_config = iaf_get_config;
533 pcd->pcd_get_msr = iaf_get_msr;
534 pcd->pcd_pcpu_fini = core_pcpu_noop;
535 pcd->pcd_pcpu_init = core_pcpu_noop;
536 pcd->pcd_read_pmc = iaf_read_pmc;
537 pcd->pcd_release_pmc = iaf_release_pmc;
538 pcd->pcd_start_pmc = iaf_start_pmc;
539 pcd->pcd_stop_pmc = iaf_stop_pmc;
540 pcd->pcd_write_pmc = iaf_write_pmc;
542 md->pmd_npmc += npmc;
546 * Intel programmable PMCs.
550 * Event descriptor tables.
552 * For each event id, we track:
554 * 1. The CPUs that the event is valid for.
556 * 2. If the event uses a fixed UMASK, the value of the umask field.
557 * If the event doesn't use a fixed UMASK, a mask of legal bits
561 struct iap_event_descr {
562 enum pmc_event iap_ev;
563 unsigned char iap_evcode;
564 unsigned char iap_umask;
565 unsigned int iap_flags;
568 #define IAP_F_CC (1 << 0) /* CPU: Core */
569 #define IAP_F_CC2 (1 << 1) /* CPU: Core2 family */
570 #define IAP_F_CC2E (1 << 2) /* CPU: Core2 Extreme only */
571 #define IAP_F_CA (1 << 3) /* CPU: Atom */
572 #define IAP_F_I7 (1 << 4) /* CPU: Core i7 */
573 #define IAP_F_I7O (1 << 4) /* CPU: Core i7 (old) */
574 #define IAP_F_WM (1 << 5) /* CPU: Westmere */
575 #define IAP_F_SB (1 << 6) /* CPU: Sandy Bridge */
576 #define IAP_F_IB (1 << 7) /* CPU: Ivy Bridge */
577 #define IAP_F_SBX (1 << 8) /* CPU: Sandy Bridge Xeon */
578 #define IAP_F_IBX (1 << 9) /* CPU: Ivy Bridge Xeon */
579 #define IAP_F_HW (1 << 10) /* CPU: Haswell */
580 #define IAP_F_CAS (1 << 11) /* CPU: Atom Silvermont */
581 #define IAP_F_HWX (1 << 12) /* CPU: Haswell Xeon */
582 #define IAP_F_BW (1 << 13) /* CPU: Broadwell */
583 #define IAP_F_BWX (1 << 14) /* CPU: Broadwell Xeon */
584 #define IAP_F_SL (1 << 15) /* CPU: Skylake */
585 #define IAP_F_SLX (1 << 16) /* CPU: Skylake Xeon AKA scalable */
586 #define IAP_F_FM (1 << 18) /* Fixed mask */
588 #define IAP_F_ALLCPUSCORE2 \
589 (IAP_F_CC | IAP_F_CC2 | IAP_F_CC2E | IAP_F_CA)
591 /* Sub fields of UMASK that this event supports. */
592 #define IAP_M_CORE (1 << 0) /* Core specificity */
593 #define IAP_M_AGENT (1 << 1) /* Agent specificity */
594 #define IAP_M_PREFETCH (1 << 2) /* Prefetch */
595 #define IAP_M_MESI (1 << 3) /* MESI */
596 #define IAP_M_SNOOPRESPONSE (1 << 4) /* Snoop response */
597 #define IAP_M_SNOOPTYPE (1 << 5) /* Snoop type */
598 #define IAP_M_TRANSITION (1 << 6) /* Transition */
600 #define IAP_F_CORE (0x3 << 14) /* Core specificity */
601 #define IAP_F_AGENT (0x1 << 13) /* Agent specificity */
602 #define IAP_F_PREFETCH (0x3 << 12) /* Prefetch */
603 #define IAP_F_MESI (0xF << 8) /* MESI */
604 #define IAP_F_SNOOPRESPONSE (0xB << 8) /* Snoop response */
605 #define IAP_F_SNOOPTYPE (0x3 << 8) /* Snoop type */
606 #define IAP_F_TRANSITION (0x1 << 12) /* Transition */
608 #define IAP_PREFETCH_RESERVED (0x2 << 12)
609 #define IAP_CORE_THIS (0x1 << 14)
610 #define IAP_CORE_ALL (0x3 << 14)
611 #define IAP_F_CMASK 0xFF000000
613 static struct iap_event_descr iap_events[] = {
615 #define IAPDESCR(N,EV,UM,FLAGS) { \
616 .iap_ev = PMC_EV_IAP_EVENT_##N, \
617 .iap_evcode = (EV), \
619 .iap_flags = (FLAGS) \
622 IAPDESCR(02H_01H, 0x02, 0x01, IAP_F_FM | IAP_F_I7O),
623 IAPDESCR(02H_81H, 0x02, 0x81, IAP_F_FM | IAP_F_CA),
625 IAPDESCR(03H_00H, 0x03, 0x00, IAP_F_FM | IAP_F_CC),
626 IAPDESCR(03H_01H, 0x03, 0x01, IAP_F_FM | IAP_F_I7O | IAP_F_SB |
627 IAP_F_SBX | IAP_F_CAS),
628 IAPDESCR(03H_02H, 0x03, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
629 IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW |
630 IAP_F_CAS | IAP_F_HWX | IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
631 IAPDESCR(03H_04H, 0x03, 0x04, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_I7O |
633 IAPDESCR(03H_08H, 0x03, 0x08, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_SB |
634 IAP_F_SBX | IAP_F_CAS | IAP_F_IB | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
635 IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
636 IAPDESCR(03H_10H, 0x03, 0x10, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_SB |
637 IAP_F_SBX | IAP_F_CAS),
638 IAPDESCR(03H_20H, 0x03, 0x20, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_CAS),
639 IAPDESCR(03H_40H, 0x03, 0x40, IAP_F_FM | IAP_F_CAS),
640 IAPDESCR(03H_80H, 0x03, 0x80, IAP_F_FM | IAP_F_CAS),
642 IAPDESCR(04H_00H, 0x04, 0x00, IAP_F_FM | IAP_F_CC | IAP_F_CAS),
643 IAPDESCR(04H_01H, 0x04, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_I7O |
645 IAPDESCR(04H_02H, 0x04, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_CAS),
646 IAPDESCR(04H_04H, 0x04, 0x04, IAP_F_FM | IAP_F_CAS),
647 IAPDESCR(04H_07H, 0x04, 0x07, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
648 IAPDESCR(04H_08H, 0x04, 0x08, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_CAS),
649 IAPDESCR(04H_10H, 0x04, 0x10, IAP_F_FM | IAP_F_CAS),
650 IAPDESCR(04H_20H, 0x04, 0x20, IAP_F_FM | IAP_F_CAS),
651 IAPDESCR(04H_40H, 0x04, 0x40, IAP_F_FM | IAP_F_CAS),
652 IAPDESCR(04H_80H, 0x04, 0x80, IAP_F_FM | IAP_F_CAS),
654 IAPDESCR(05H_00H, 0x05, 0x00, IAP_F_FM | IAP_F_CC),
655 IAPDESCR(05H_01H, 0x05, 0x01, IAP_F_FM | IAP_F_I7O | IAP_F_SB | IAP_F_IB |
656 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_CAS | IAP_F_HWX | IAP_F_BW |
658 IAPDESCR(05H_02H, 0x05, 0x02, IAP_F_FM | IAP_F_I7O | IAP_F_WM | IAP_F_SB |
659 IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_CAS | IAP_F_HWX |
660 IAP_F_BW | IAP_F_BWX),
661 IAPDESCR(05H_03H, 0x05, 0x03, IAP_F_FM | IAP_F_I7O | IAP_F_CAS),
663 IAPDESCR(06H_00H, 0x06, 0x00, IAP_F_FM | IAP_F_CC | IAP_F_CC2 |
664 IAP_F_CC2E | IAP_F_CA),
665 IAPDESCR(06H_01H, 0x06, 0x01, IAP_F_FM | IAP_F_I7O),
666 IAPDESCR(06H_02H, 0x06, 0x02, IAP_F_FM | IAP_F_I7O),
667 IAPDESCR(06H_04H, 0x06, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
668 IAPDESCR(06H_08H, 0x06, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
669 IAPDESCR(06H_0FH, 0x06, 0x0F, IAP_F_FM | IAP_F_I7O),
671 IAPDESCR(07H_00H, 0x07, 0x00, IAP_F_FM | IAP_F_CC | IAP_F_CC2),
672 IAPDESCR(07H_01H, 0x07, 0x01, IAP_F_FM | IAP_F_ALLCPUSCORE2 |
673 IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX |
674 IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
675 IAPDESCR(07H_02H, 0x07, 0x02, IAP_F_FM | IAP_F_ALLCPUSCORE2),
676 IAPDESCR(07H_03H, 0x07, 0x03, IAP_F_FM | IAP_F_ALLCPUSCORE2),
677 IAPDESCR(07H_06H, 0x07, 0x06, IAP_F_FM | IAP_F_CA),
678 IAPDESCR(07H_08H, 0x07, 0x08, IAP_F_FM | IAP_F_CA | IAP_F_SB |
681 IAPDESCR(08H_01H, 0x08, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
682 IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_SBX | IAP_F_HW | IAP_F_HWX |
683 IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
684 IAPDESCR(08H_02H, 0x08, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
685 IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_SBX | IAP_F_HW | IAP_F_HWX |
686 IAP_F_BW | IAP_F_BWX | IAP_F_SLX),
687 IAPDESCR(08H_04H, 0x08, 0x04, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
688 IAP_F_WM | IAP_F_SB | IAP_F_SBX | IAP_F_HW | IAP_F_HWX | IAP_F_SLX),
689 IAPDESCR(08H_05H, 0x08, 0x05, IAP_F_FM | IAP_F_CA),
690 IAPDESCR(08H_06H, 0x08, 0x06, IAP_F_FM | IAP_F_CA),
691 IAPDESCR(08H_07H, 0x08, 0x07, IAP_F_FM | IAP_F_CA),
692 IAPDESCR(08H_08H, 0x08, 0x08, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_SLX),
693 IAPDESCR(08H_09H, 0x08, 0x09, IAP_F_FM | IAP_F_CA),
694 IAPDESCR(08H_0EH, 0x08, 0x0E, IAP_F_FM | IAP_F_HW | IAP_F_HWX | IAP_F_SL |
696 IAPDESCR(08H_10H, 0x08, 0x10, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB |
697 IAP_F_SBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX | IAP_F_SL |
699 IAPDESCR(08H_20H, 0x08, 0x20, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_HW |
700 IAP_F_HWX | IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
701 IAPDESCR(08H_40H, 0x08, 0x40, IAP_F_FM | IAP_F_I7O | IAP_F_HW | IAP_F_HWX),
702 IAPDESCR(08H_60H, 0x08, 0x60, IAP_F_FM | IAP_F_HW | IAP_F_HWX),
703 IAPDESCR(08H_80H, 0x08, 0x80, IAP_F_FM | IAP_F_I7 | IAP_F_HW | IAP_F_HWX),
704 IAPDESCR(08H_81H, 0x08, 0x81, IAP_F_FM | IAP_F_IB | IAP_F_IBX),
705 IAPDESCR(08H_82H, 0x08, 0x82, IAP_F_FM | IAP_F_IB | IAP_F_IBX),
706 IAPDESCR(08H_84H, 0x08, 0x84, IAP_F_FM | IAP_F_IB | IAP_F_IBX),
707 IAPDESCR(08H_88H, 0x08, 0x88, IAP_F_FM | IAP_F_IB | IAP_F_IBX),
709 IAPDESCR(09H_01H, 0x09, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_I7O),
710 IAPDESCR(09H_02H, 0x09, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_I7O),
711 IAPDESCR(09H_04H, 0x09, 0x04, IAP_F_FM | IAP_F_I7O),
712 IAPDESCR(09H_08H, 0x09, 0x08, IAP_F_FM | IAP_F_I7O),
714 IAPDESCR(0BH_01H, 0x0B, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
715 IAPDESCR(0BH_02H, 0x0B, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
716 IAPDESCR(0BH_10H, 0x0B, 0x10, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
718 IAPDESCR(0CH_01H, 0x0C, 0x01, IAP_F_FM | IAP_F_CC2 | IAP_F_I7 |
719 IAP_F_WM | IAP_F_SL),
720 IAPDESCR(0CH_02H, 0x0C, 0x02, IAP_F_FM | IAP_F_CC2),
721 IAPDESCR(0CH_03H, 0x0C, 0x03, IAP_F_FM | IAP_F_CA),
723 IAPDESCR(0DH_01H, 0x0D, 0x01, IAP_F_FM | IAP_F_SL | IAP_F_SLX),
724 IAPDESCR(0DH_03H, 0x0D, 0x03, IAP_F_FM | IAP_F_SB | IAP_F_SBX | IAP_F_HW |
725 IAP_F_IB | IAP_F_IBX | IAP_F_HWX | IAP_F_BW | IAP_F_BWX),
726 IAPDESCR(0DH_40H, 0x0D, 0x40, IAP_F_FM | IAP_F_SB | IAP_F_SBX),
727 IAPDESCR(0DH_80H, 0x0D, 0x80, IAP_F_FM | IAP_F_SL | IAP_F_SLX),
729 IAPDESCR(0EH_01H, 0x0E, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB |
730 IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
731 IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
732 IAPDESCR(0EH_02H, 0x0E, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SL |
734 IAPDESCR(0EH_10H, 0x0E, 0x10, IAP_F_FM | IAP_F_IB | IAP_F_IBX | IAP_F_HW |
735 IAP_F_HWX | IAP_F_BW | IAP_F_BWX),
736 IAPDESCR(0EH_20H, 0x0E, 0x20, IAP_F_FM | IAP_F_IB | IAP_F_IBX | IAP_F_HW |
737 IAP_F_HWX | IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
738 IAPDESCR(0EH_40H, 0x0E, 0x40, IAP_F_FM | IAP_F_IB | IAP_F_IBX | IAP_F_HW |
739 IAP_F_HWX | IAP_F_BW | IAP_F_BWX),
741 IAPDESCR(0FH_01H, 0x0F, 0x01, IAP_F_FM | IAP_F_I7),
742 IAPDESCR(0FH_02H, 0x0F, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
743 IAPDESCR(0FH_08H, 0x0F, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
744 IAPDESCR(0FH_10H, 0x0F, 0x10, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
745 IAPDESCR(0FH_20H, 0x0F, 0x20, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
746 IAPDESCR(0FH_80H, 0x0F, 0x80, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
748 IAPDESCR(10H_00H, 0x10, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2),
749 IAPDESCR(10H_01H, 0x10, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_I7 |
750 IAP_F_WM | IAP_F_SB | IAP_F_SBX | IAP_F_IB | IAP_F_IBX ),
751 IAPDESCR(10H_02H, 0x10, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
752 IAPDESCR(10H_04H, 0x10, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
753 IAPDESCR(10H_08H, 0x10, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
754 IAPDESCR(10H_10H, 0x10, 0x10, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB |
755 IAP_F_SBX | IAP_F_IB | IAP_F_IBX),
756 IAPDESCR(10H_20H, 0x10, 0x20, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB |
757 IAP_F_SBX | IAP_F_IB | IAP_F_IBX),
758 IAPDESCR(10H_40H, 0x10, 0x40, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB |
759 IAP_F_SBX | IAP_F_IB | IAP_F_IBX),
760 IAPDESCR(10H_80H, 0x10, 0x80, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB |
761 IAP_F_SBX | IAP_F_IB | IAP_F_IBX),
762 IAPDESCR(10H_81H, 0x10, 0x81, IAP_F_FM | IAP_F_CA),
764 IAPDESCR(11H_00H, 0x11, 0x00, IAP_F_FM | IAP_F_CC | IAP_F_CC2),
765 IAPDESCR(11H_01H, 0x11, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_SB |
766 IAP_F_SBX | IAP_F_IB | IAP_F_IBX),
767 IAPDESCR(11H_02H, 0x11, 0x02, IAP_F_FM | IAP_F_SB | IAP_F_SBX | IAP_F_IB | IAP_F_IBX),
768 IAPDESCR(11H_81H, 0x11, 0x81, IAP_F_FM | IAP_F_CA),
770 IAPDESCR(12H_00H, 0x12, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2),
771 IAPDESCR(12H_01H, 0x12, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_I7 | IAP_F_WM),
772 IAPDESCR(12H_02H, 0x12, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
773 IAPDESCR(12H_04H, 0x12, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
774 IAPDESCR(12H_08H, 0x12, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
775 IAPDESCR(12H_10H, 0x12, 0x10, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
776 IAPDESCR(12H_20H, 0x12, 0x20, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
777 IAPDESCR(12H_40H, 0x12, 0x40, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
778 IAPDESCR(12H_81H, 0x12, 0x81, IAP_F_FM | IAP_F_CA),
780 IAPDESCR(13H_00H, 0x13, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2),
781 IAPDESCR(13H_01H, 0x13, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_I7 | IAP_F_WM),
782 IAPDESCR(13H_02H, 0x13, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
783 IAPDESCR(13H_04H, 0x13, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
784 IAPDESCR(13H_07H, 0x13, 0x07, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
785 IAPDESCR(13H_81H, 0x13, 0x81, IAP_F_FM | IAP_F_CA),
787 IAPDESCR(14H_00H, 0x14, 0x00, IAP_F_FM | IAP_F_CC | IAP_F_CC2),
788 IAPDESCR(14H_01H, 0x14, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_I7 |
789 IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX |
790 IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
791 IAPDESCR(14H_02H, 0x14, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
793 IAPDESCR(17H_01H, 0x17, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB |
796 IAPDESCR(18H_00H, 0x18, 0x00, IAP_F_FM | IAP_F_CA | IAP_F_CC2),
797 IAPDESCR(18H_01H, 0x18, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
799 IAPDESCR(19H_00H, 0x19, 0x00, IAP_F_FM | IAP_F_CA | IAP_F_CC2),
800 IAPDESCR(19H_01H, 0x19, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
801 IAP_F_I7 | IAP_F_WM),
802 IAPDESCR(19H_02H, 0x19, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2),
804 IAPDESCR(1DH_01H, 0x1D, 0x01, IAP_F_FM | IAP_F_I7O),
805 IAPDESCR(1DH_02H, 0x1D, 0x02, IAP_F_FM | IAP_F_I7O),
806 IAPDESCR(1DH_04H, 0x1D, 0x04, IAP_F_FM | IAP_F_I7O),
808 IAPDESCR(1EH_01H, 0x1E, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
810 IAPDESCR(20H_01H, 0x20, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
811 IAPDESCR(21H, 0x21, IAP_M_CORE, IAP_F_ALLCPUSCORE2),
812 IAPDESCR(22H, 0x22, IAP_M_CORE, IAP_F_CC2),
813 IAPDESCR(23H, 0x23, IAP_M_CORE, IAP_F_ALLCPUSCORE2),
815 IAPDESCR(24H, 0x24, IAP_M_CORE | IAP_M_PREFETCH, IAP_F_ALLCPUSCORE2),
816 IAPDESCR(24H_01H, 0x24, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB |
817 IAP_F_IB | IAP_F_SBX | IAP_F_IBX ),
818 IAPDESCR(24H_02H, 0x24, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
819 IAPDESCR(24H_03H, 0x24, 0x03, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB |
820 IAP_F_IB | IAP_F_SBX | IAP_F_IBX),
821 IAPDESCR(24H_04H, 0x24, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB |
822 IAP_F_IB | IAP_F_SBX | IAP_F_IBX),
823 IAPDESCR(24H_08H, 0x24, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB |
824 IAP_F_IB | IAP_F_SBX | IAP_F_IBX),
825 IAPDESCR(24H_0CH, 0x24, 0x0C, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB |
826 IAP_F_IB | IAP_F_SBX | IAP_F_IBX),
827 IAPDESCR(24H_10H, 0x24, 0x10, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB |
828 IAP_F_IB | IAP_F_SBX | IAP_F_IBX),
829 IAPDESCR(24H_20H, 0x24, 0x20, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB |
830 IAP_F_IB | IAP_F_SBX | IAP_F_IBX),
831 IAPDESCR(24H_21H, 0x24, 0x21, IAP_F_FM | IAP_F_HW | IAP_F_HWX |
832 IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
833 IAPDESCR(24H_22H, 0x24, 0x22, IAP_F_FM | IAP_F_HW | IAP_F_HWX | IAP_F_SL |
835 IAPDESCR(24H_24H, 0x24, 0x24, IAP_F_FM | IAP_F_HW | IAP_F_HWX | IAP_F_SL |
837 IAPDESCR(24H_27H, 0x24, 0x27, IAP_F_FM | IAP_F_HW | IAP_F_HWX | IAP_F_SL |
839 IAPDESCR(24H_30H, 0x24, 0x30, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB |
840 IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
841 IAP_F_BW | IAP_F_BWX),
842 IAPDESCR(24H_38H, 0x24, 0x38, IAP_F_FM | IAP_F_SL | IAP_F_SLX),
843 IAPDESCR(24H_3FH, 0x24, 0x3F, IAP_F_FM | IAP_F_HW | IAP_F_HWX | IAP_F_SL |
845 IAPDESCR(24H_40H, 0x24, 0x40, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB |
846 IAP_F_IB | IAP_F_SBX | IAP_F_IBX),
847 IAPDESCR(24H_41H, 0x24, 0x41, IAP_F_FM | IAP_F_HW | IAP_F_HWX |
848 IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
849 IAPDESCR(24H_42H, 0x24, 0x42, IAP_F_FM | IAP_F_HW | IAP_F_HWX | IAP_F_SL |
851 IAPDESCR(24H_44H, 0x24, 0x44, IAP_F_FM | IAP_F_HW | IAP_F_HWX | IAP_F_SL |
853 IAPDESCR(24H_50H, 0x24, 0x50, IAP_F_FM | IAP_F_HW | IAP_F_HWX |
854 IAP_F_BW | IAP_F_BWX),
855 IAPDESCR(24H_80H, 0x24, 0x80, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB |
856 IAP_F_IB | IAP_F_SBX | IAP_F_IBX),
857 IAPDESCR(24H_AAH, 0x24, 0xAA, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
858 IAPDESCR(24H_C0H, 0x24, 0xC0, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB |
859 IAP_F_IB | IAP_F_SBX | IAP_F_IBX),
860 IAPDESCR(24H_D8H, 0x24, 0xD8, IAP_F_FM | IAP_F_SL | IAP_F_SLX),
861 IAPDESCR(24H_E1H, 0x24, 0xE1, IAP_F_FM | IAP_F_HW | IAP_F_HWX |
862 IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
863 IAPDESCR(24H_E2H, 0x24, 0xE2, IAP_F_FM | IAP_F_HW | IAP_F_HWX | IAP_F_BW |
864 IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
865 IAPDESCR(24H_E4H, 0x24, 0xE4, IAP_F_FM | IAP_F_HW | IAP_F_HWX | IAP_F_BW |
866 IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
867 IAPDESCR(24H_E7H, 0x24, 0xE7, IAP_F_FM | IAP_F_HW | IAP_F_HWX | IAP_F_SL |
869 IAPDESCR(24H_EFH, 0x24, 0xEF, IAP_F_FM | IAP_F_SL),
870 IAPDESCR(24H_F8H, 0x24, 0xF8, IAP_F_FM | IAP_F_HW | IAP_F_HWX | IAP_F_BW |
871 IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
872 IAPDESCR(24H_FFH, 0x24, 0xFF, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_HW |
873 IAP_F_HWX | IAP_F_SLX),
875 IAPDESCR(25H, 0x25, IAP_M_CORE, IAP_F_ALLCPUSCORE2),
877 IAPDESCR(26H, 0x26, IAP_M_CORE | IAP_M_PREFETCH, IAP_F_ALLCPUSCORE2),
878 IAPDESCR(26H_01H, 0x26, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
879 IAPDESCR(26H_02H, 0x26, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
880 IAPDESCR(26H_04H, 0x26, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
881 IAPDESCR(26H_08H, 0x26, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
882 IAPDESCR(26H_0FH, 0x26, 0x0F, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
883 IAPDESCR(26H_10H, 0x26, 0x10, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
884 IAPDESCR(26H_20H, 0x26, 0x20, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
885 IAPDESCR(26H_40H, 0x26, 0x40, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
886 IAPDESCR(26H_80H, 0x26, 0x80, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
887 IAPDESCR(26H_F0H, 0x26, 0xF0, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
888 IAPDESCR(26H_FFH, 0x26, 0xFF, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
890 IAPDESCR(27H, 0x27, IAP_M_CORE | IAP_M_PREFETCH, IAP_F_ALLCPUSCORE2),
891 IAPDESCR(27H_01H, 0x27, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB |
892 IAP_F_IB | IAP_F_SBX | IAP_F_IBX),
893 IAPDESCR(27H_02H, 0x27, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
894 IAPDESCR(27H_04H, 0x27, 0x04, IAP_F_FM | IAP_F_I7O | IAP_F_SB |
896 IAPDESCR(27H_08H, 0x27, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB |
897 IAP_F_IB | IAP_F_SBX | IAP_F_IBX),
898 IAPDESCR(27H_0EH, 0x27, 0x0E, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
899 IAPDESCR(27H_0FH, 0x27, 0x0F, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB |
900 IAP_F_IB | IAP_F_SBX | IAP_F_IBX),
901 IAPDESCR(27H_10H, 0x27, 0x10, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
902 IAPDESCR(27H_20H, 0x27, 0x20, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
903 IAPDESCR(27H_40H, 0x27, 0x40, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
904 IAPDESCR(27H_50H, 0x27, 0x50, IAP_F_FM | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX),
905 IAPDESCR(27H_80H, 0x27, 0x80, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
906 IAPDESCR(27H_E0H, 0x27, 0xE0, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
907 IAPDESCR(27H_F0H, 0x27, 0xF0, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
909 IAPDESCR(28H, 0x28, IAP_M_CORE | IAP_M_MESI, IAP_F_ALLCPUSCORE2),
910 IAPDESCR(28H_01H, 0x28, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_IB |
911 IAP_F_SBX | IAP_F_IBX),
912 IAPDESCR(28H_02H, 0x28, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SBX),
913 IAPDESCR(28H_04H, 0x28, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB |
914 IAP_F_IB | IAP_F_SBX | IAP_F_IBX),
915 IAPDESCR(28H_07H, 0x28, 0x07, IAP_F_FM | IAP_F_SLX),
916 IAPDESCR(28H_08H, 0x28, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB |
917 IAP_F_IB | IAP_F_SBX | IAP_F_IBX),
918 IAPDESCR(28H_0FH, 0x28, 0x0F, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_IB |
919 IAP_F_SBX | IAP_F_IBX),
920 IAPDESCR(28H_18H, 0x28, 0x18, IAP_F_SLX),
921 IAPDESCR(28H_20H, 0x28, 0x20, IAP_F_SLX),
922 IAPDESCR(28H_40H, 0x28, 0x40, IAP_F_SLX),
924 IAPDESCR(29H, 0x29, IAP_M_CORE | IAP_M_MESI, IAP_F_CC),
925 IAPDESCR(29H, 0x29, IAP_M_CORE | IAP_M_MESI | IAP_M_PREFETCH,
926 IAP_F_CA | IAP_F_CC2),
927 IAPDESCR(2AH, 0x2A, IAP_M_CORE | IAP_M_MESI, IAP_F_ALLCPUSCORE2),
928 IAPDESCR(2BH, 0x2B, IAP_M_CORE | IAP_M_MESI, IAP_F_CA | IAP_F_CC2),
930 IAPDESCR(2EH, 0x2E, IAP_M_CORE | IAP_M_MESI | IAP_M_PREFETCH,
932 IAPDESCR(2EH_01H, 0x2E, 0x01, IAP_F_FM | IAP_F_WM),
933 IAPDESCR(2EH_02H, 0x2E, 0x02, IAP_F_FM | IAP_F_WM),
934 IAPDESCR(2EH_41H, 0x2E, 0x41, IAP_F_FM | IAP_F_ALLCPUSCORE2 | IAP_F_I7 |
935 IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW |
936 IAP_F_CAS | IAP_F_HWX | IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
937 IAPDESCR(2EH_4FH, 0x2E, 0x4F, IAP_F_FM | IAP_F_ALLCPUSCORE2 | IAP_F_I7 |
938 IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW |
939 IAP_F_CAS | IAP_F_HWX | IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
941 IAPDESCR(30H, 0x30, IAP_M_CORE | IAP_M_MESI | IAP_M_PREFETCH,
943 IAPDESCR(30H_00H, 0x30, 0x00, IAP_F_FM | IAP_F_CAS),
944 IAPDESCR(31H_00H, 0x31, 0x00, IAP_F_FM | IAP_F_CAS),
945 IAPDESCR(32H, 0x32, IAP_M_CORE | IAP_M_MESI | IAP_M_PREFETCH, IAP_F_CC),
946 IAPDESCR(32H, 0x32, IAP_M_CORE, IAP_F_CA | IAP_F_CC2),
948 IAPDESCR(3AH, 0x3A, IAP_M_TRANSITION, IAP_F_CC),
949 IAPDESCR(3AH_00H, 0x3A, 0x00, IAP_F_FM | IAP_F_CA | IAP_F_CC2),
951 IAPDESCR(3BH_C0H, 0x3B, 0xC0, IAP_F_FM | IAP_F_ALLCPUSCORE2),
953 IAPDESCR(3CH_00H, 0x3C, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2 |
954 IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX |
955 IAP_F_HW | IAP_F_CAS | IAP_F_HWX | IAP_F_BW | IAP_F_BWX | IAP_F_SL |
957 IAPDESCR(3CH_01H, 0x3C, 0x01, IAP_F_FM | IAP_F_ALLCPUSCORE2 |
958 IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX |
959 IAP_F_HW | IAP_F_CAS | IAP_F_HWX | IAP_F_BW | IAP_F_BWX | IAP_F_SL |
961 IAPDESCR(3CH_02H, 0x3C, 0x02, IAP_F_FM | IAP_F_ALLCPUSCORE2 | IAP_F_SL |
964 IAPDESCR(3DH_01H, 0x3D, 0x01, IAP_F_FM | IAP_F_I7O),
966 IAPDESCR(40H, 0x40, IAP_M_MESI, IAP_F_CC | IAP_F_CC2),
967 IAPDESCR(40H_01H, 0x40, 0x01, IAP_F_FM | IAP_F_I7),
968 IAPDESCR(40H_02H, 0x40, 0x02, IAP_F_FM | IAP_F_I7),
969 IAPDESCR(40H_04H, 0x40, 0x04, IAP_F_FM | IAP_F_I7),
970 IAPDESCR(40H_08H, 0x40, 0x08, IAP_F_FM | IAP_F_I7),
971 IAPDESCR(40H_0FH, 0x40, 0x0F, IAP_F_FM | IAP_F_I7),
972 IAPDESCR(40H_21H, 0x40, 0x21, IAP_F_FM | IAP_F_CA),
974 IAPDESCR(41H, 0x41, IAP_M_MESI, IAP_F_CC | IAP_F_CC2),
975 IAPDESCR(41H_01H, 0x41, 0x01, IAP_F_FM | IAP_F_I7O),
976 IAPDESCR(41H_02H, 0x41, 0x02, IAP_F_FM | IAP_F_I7),
977 IAPDESCR(41H_04H, 0x41, 0x04, IAP_F_FM | IAP_F_I7),
978 IAPDESCR(41H_08H, 0x41, 0x08, IAP_F_FM | IAP_F_I7),
979 IAPDESCR(41H_0FH, 0x41, 0x0F, IAP_F_FM | IAP_F_I7O),
980 IAPDESCR(41H_22H, 0x41, 0x22, IAP_F_FM | IAP_F_CA),
982 IAPDESCR(42H, 0x42, IAP_M_MESI, IAP_F_ALLCPUSCORE2),
983 IAPDESCR(42H_01H, 0x42, 0x01, IAP_F_FM | IAP_F_I7),
984 IAPDESCR(42H_02H, 0x42, 0x02, IAP_F_FM | IAP_F_I7),
985 IAPDESCR(42H_04H, 0x42, 0x04, IAP_F_FM | IAP_F_I7),
986 IAPDESCR(42H_08H, 0x42, 0x08, IAP_F_FM | IAP_F_I7),
987 IAPDESCR(42H_10H, 0x42, 0x10, IAP_F_FM | IAP_F_CA | IAP_F_CC2),
989 IAPDESCR(43H_01H, 0x43, 0x01, IAP_F_FM | IAP_F_ALLCPUSCORE2 |
991 IAPDESCR(43H_02H, 0x43, 0x02, IAP_F_FM | IAP_F_CA |
992 IAP_F_CC2 | IAP_F_I7),
994 IAPDESCR(44H_02H, 0x44, 0x02, IAP_F_FM | IAP_F_CC),
996 IAPDESCR(45H_0FH, 0x45, 0x0F, IAP_F_FM | IAP_F_ALLCPUSCORE2),
998 IAPDESCR(46H_00H, 0x46, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2),
999 IAPDESCR(47H_00H, 0x47, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2),
1001 IAPDESCR(48H_00H, 0x48, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2),
1002 IAPDESCR(48H_01H, 0x48, 0x01, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1003 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX |
1004 IAP_F_SL | IAP_F_SLX),
1005 IAPDESCR(48H_02H, 0x48, 0x02, IAP_F_FM | IAP_F_I7O | IAP_F_SL | IAP_F_SLX),
1007 IAPDESCR(49H_00H, 0x49, 0x00, IAP_F_FM | IAP_F_CC),
1008 IAPDESCR(49H_01H, 0x49, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
1009 IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX |
1010 IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
1011 IAPDESCR(49H_02H, 0x49, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
1012 IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX |
1013 IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX | IAP_F_SLX),
1014 IAPDESCR(49H_04H, 0x49, 0x04, IAP_F_FM | IAP_F_WM | IAP_F_SB | IAP_F_IB |
1015 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_SLX),
1016 IAPDESCR(49H_08H, 0x49, 0x08, IAP_F_FM | IAP_F_SLX),
1017 IAPDESCR(49H_0EH, 0x49, 0x0E, IAP_F_FM | IAP_F_HW | IAP_F_HWX | IAP_F_SL |
1019 IAPDESCR(49H_10H, 0x49, 0x10, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1020 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1021 IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
1022 IAPDESCR(49H_20H, 0x49, 0x20, IAP_F_FM | IAP_F_I7 | IAP_F_HW | IAP_F_HWX |
1023 IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
1024 IAPDESCR(49H_40H, 0x49, 0x40, IAP_F_FM | IAP_F_I7O | IAP_F_HW | IAP_F_HWX),
1025 IAPDESCR(49H_60H, 0x49, 0x60, IAP_F_FM | IAP_F_HW | IAP_F_HWX),
1026 IAPDESCR(49H_80H, 0x49, 0x80, IAP_F_FM | IAP_F_WM | IAP_F_I7 | IAP_F_HW |
1029 IAPDESCR(4BH_00H, 0x4B, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2),
1030 IAPDESCR(4BH_01H, 0x4B, 0x01, IAP_F_FM | IAP_F_ALLCPUSCORE2 | IAP_F_I7O),
1031 IAPDESCR(4BH_02H, 0x4B, 0x02, IAP_F_FM | IAP_F_ALLCPUSCORE2),
1032 IAPDESCR(4BH_03H, 0x4B, 0x03, IAP_F_FM | IAP_F_CC),
1033 IAPDESCR(4BH_08H, 0x4B, 0x08, IAP_F_FM | IAP_F_I7O),
1035 IAPDESCR(4CH_00H, 0x4C, 0x00, IAP_F_FM | IAP_F_CA | IAP_F_CC2),
1036 IAPDESCR(4CH_01H, 0x4C, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1037 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1038 IAP_F_SL | IAP_F_SLX),
1039 IAPDESCR(4CH_02H, 0x4C, 0x02, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1040 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX),
1042 IAPDESCR(4DH_01H, 0x4D, 0x01, IAP_F_FM | IAP_F_I7O),
1044 IAPDESCR(4EH_01H, 0x4E, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
1045 IAPDESCR(4EH_02H, 0x4E, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1046 IAP_F_SB | IAP_F_SBX),
1047 IAPDESCR(4EH_04H, 0x4E, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
1048 IAPDESCR(4EH_10H, 0x4E, 0x10, IAP_F_FM | IAP_F_CA | IAP_F_CC2),
1050 IAPDESCR(4FH_00H, 0x4F, 0x00, IAP_F_FM | IAP_F_CC),
1051 IAPDESCR(4FH_02H, 0x4F, 0x02, IAP_F_FM | IAP_F_I7O),
1052 IAPDESCR(4FH_04H, 0x4F, 0x04, IAP_F_FM | IAP_F_I7O),
1053 IAPDESCR(4FH_08H, 0x4F, 0x08, IAP_F_FM | IAP_F_I7O),
1054 IAPDESCR(4FH_10H, 0x4F, 0x10, IAP_F_FM | IAP_F_WM | IAP_F_BW | IAP_F_BWX |
1055 IAP_F_SL | IAP_F_SLX),
1057 IAPDESCR(51H_01H, 0x51, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1058 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW |
1059 IAP_F_HWX | IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
1060 IAPDESCR(51H_02H, 0x51, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1061 IAP_F_SB | IAP_F_SBX),
1062 IAPDESCR(51H_04H, 0x51, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1063 IAP_F_SB | IAP_F_SBX),
1064 IAPDESCR(51H_08H, 0x51, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1065 IAP_F_SB | IAP_F_SBX),
1067 IAPDESCR(52H_01H, 0x52, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
1069 IAPDESCR(53H_01H, 0x53, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
1071 IAPDESCR(54H_01H, 0x54, 0x01, IAP_F_FM | IAP_F_SLX),
1072 IAPDESCR(54H_02H, 0x54, 0x02, IAP_F_FM | IAP_F_SLX),
1073 IAPDESCR(54H_04H, 0x54, 0x04, IAP_F_FM | IAP_F_SLX),
1074 IAPDESCR(54H_08H, 0x54, 0x08, IAP_F_FM | IAP_F_SLX),
1075 IAPDESCR(54H_10H, 0x54, 0x10, IAP_F_FM | IAP_F_SLX),
1076 IAPDESCR(54H_20H, 0x54, 0x20, IAP_F_FM | IAP_F_SLX),
1077 IAPDESCR(54H_40H, 0x54, 0x40, IAP_F_FM | IAP_F_SLX),
1079 IAPDESCR(58H_01H, 0x58, 0x01, IAP_F_FM | IAP_F_IB | IAP_F_IBX | IAP_F_HW |
1080 IAP_F_HWX | IAP_F_BW | IAP_F_BWX),
1081 IAPDESCR(58H_02H, 0x58, 0x02, IAP_F_FM | IAP_F_IB | IAP_F_IBX | IAP_F_HW |
1082 IAP_F_HWX | IAP_F_BW | IAP_F_BWX),
1083 IAPDESCR(58H_04H, 0x58, 0x04, IAP_F_FM | IAP_F_IB | IAP_F_IBX | IAP_F_HW |
1084 IAP_F_HWX | IAP_F_BW | IAP_F_BWX),
1085 IAPDESCR(58H_08H, 0x58, 0x08, IAP_F_FM | IAP_F_IB | IAP_F_IBX | IAP_F_HW |
1086 IAP_F_HWX | IAP_F_BW | IAP_F_BWX),
1088 IAPDESCR(59H_20H, 0x59, 0x20, IAP_F_FM | IAP_F_SB | IAP_F_SBX),
1089 IAPDESCR(59H_40H, 0x59, 0x40, IAP_F_FM | IAP_F_SB | IAP_F_SBX),
1090 IAPDESCR(59H_80H, 0x59, 0x80, IAP_F_FM | IAP_F_SB | IAP_F_SBX),
1092 IAPDESCR(5BH_0CH, 0x5B, 0x0C, IAP_F_FM | IAP_F_SB | IAP_F_SBX),
1093 IAPDESCR(5BH_0FH, 0x5B, 0x0F, IAP_F_FM | IAP_F_SB | IAP_F_SBX),
1094 IAPDESCR(5BH_40H, 0x5B, 0x40, IAP_F_FM | IAP_F_SB | IAP_F_SBX),
1095 IAPDESCR(5BH_4FH, 0x5B, 0x4F, IAP_F_FM | IAP_F_SB | IAP_F_SBX),
1097 IAPDESCR(5CH_01H, 0x5C, 0x01, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1098 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX),
1099 IAPDESCR(5CH_02H, 0x5C, 0x02, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1100 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX),
1102 IAPDESCR(5DH_01H, 0x5d, 0x01, IAP_F_FM | IAP_F_SLX),
1103 IAPDESCR(5DH_02H, 0x5d, 0x02, IAP_F_FM | IAP_F_SLX),
1104 IAPDESCR(5DH_04H, 0x5d, 0x04, IAP_F_FM | IAP_F_SLX),
1105 IAPDESCR(5DH_08H, 0x5d, 0x08, IAP_F_FM | IAP_F_SLX),
1106 IAPDESCR(5DH_10H, 0x5d, 0x10, IAP_F_FM | IAP_F_SLX),
1108 IAPDESCR(5EH_01H, 0x5E, 0x01, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1109 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX |
1110 IAP_F_SL | IAP_F_SLX),
1112 IAPDESCR(5FH_01H, 0x5F, 0x01, IAP_F_FM | IAP_F_IB ), /* IB not in manual */
1113 IAPDESCR(5FH_04H, 0x5F, 0x04, IAP_F_FM | IAP_F_IBX | IAP_F_IB),
1115 IAPDESCR(60H, 0x60, IAP_M_AGENT | IAP_M_CORE, IAP_F_ALLCPUSCORE2),
1116 IAPDESCR(60H_01H, 0x60, 0x01, IAP_F_FM | IAP_F_WM | IAP_F_I7O |
1117 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1118 IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
1119 IAPDESCR(60H_02H, 0x60, 0x02, IAP_F_FM | IAP_F_WM | IAP_F_I7O | IAP_F_IB |
1120 IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX | IAP_F_SL |
1122 IAPDESCR(60H_04H, 0x60, 0x04, IAP_F_FM |IAP_F_I7O |
1123 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1124 IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
1125 IAPDESCR(60H_08H, 0x60, 0x08, IAP_F_FM |IAP_F_I7O |
1126 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1127 IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
1128 IAPDESCR(60H_10H, 0x60, 0x10, IAP_F_FM | IAP_F_SL | IAP_F_SLX),
1130 IAPDESCR(61H, 0x61, IAP_M_AGENT, IAP_F_CA | IAP_F_CC2),
1132 IAPDESCR(61H_00H, 0x61, 0x00, IAP_F_FM | IAP_F_CC),
1134 IAPDESCR(62H, 0x62, IAP_M_AGENT, IAP_F_ALLCPUSCORE2),
1135 IAPDESCR(62H_00H, 0x62, 0x00, IAP_F_FM | IAP_F_CC),
1137 IAPDESCR(63H, 0x63, IAP_M_AGENT | IAP_M_CORE,
1138 IAP_F_CA | IAP_F_CC2),
1139 IAPDESCR(63H, 0x63, IAP_M_CORE, IAP_F_CC),
1140 IAPDESCR(63H_01H, 0x63, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1141 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1142 IAP_F_BW | IAP_F_BWX ),
1143 IAPDESCR(63H_02H, 0x63, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1144 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1145 IAP_F_BW | IAP_F_BWX | IAP_F_SL),
1147 IAPDESCR(64H, 0x64, IAP_M_CORE, IAP_F_CA | IAP_F_CC2),
1148 IAPDESCR(64H_40H, 0x64, 0x40, IAP_F_FM | IAP_F_CC),
1150 IAPDESCR(65H, 0x65, IAP_M_AGENT | IAP_M_CORE,
1151 IAP_F_CA | IAP_F_CC2),
1152 IAPDESCR(65H, 0x65, IAP_M_CORE, IAP_F_CC),
1154 IAPDESCR(66H, 0x66, IAP_M_AGENT | IAP_M_CORE, IAP_F_ALLCPUSCORE2),
1156 IAPDESCR(67H, 0x67, IAP_M_AGENT | IAP_M_CORE, IAP_F_CA | IAP_F_CC2),
1157 IAPDESCR(67H, 0x67, IAP_M_AGENT, IAP_F_CC),
1158 IAPDESCR(68H, 0x68, IAP_M_AGENT | IAP_M_CORE, IAP_F_ALLCPUSCORE2),
1159 IAPDESCR(69H, 0x69, IAP_M_AGENT | IAP_M_CORE, IAP_F_ALLCPUSCORE2),
1160 IAPDESCR(6AH, 0x6A, IAP_M_AGENT | IAP_M_CORE, IAP_F_ALLCPUSCORE2),
1161 IAPDESCR(6BH, 0x6B, IAP_M_AGENT | IAP_M_CORE, IAP_F_ALLCPUSCORE2),
1163 IAPDESCR(6CH, 0x6C, IAP_M_AGENT | IAP_M_CORE, IAP_F_ALLCPUSCORE2),
1164 IAPDESCR(6CH_01H, 0x6C, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
1166 IAPDESCR(6DH, 0x6D, IAP_M_AGENT | IAP_M_CORE, IAP_F_CA | IAP_F_CC2),
1167 IAPDESCR(6DH, 0x6D, IAP_M_CORE, IAP_F_CC),
1169 IAPDESCR(6EH, 0x6E, IAP_M_AGENT | IAP_M_CORE, IAP_F_CA | IAP_F_CC2),
1170 IAPDESCR(6EH, 0x6E, IAP_M_CORE, IAP_F_CC),
1172 IAPDESCR(6FH, 0x6F, IAP_M_AGENT | IAP_M_CORE, IAP_F_CA | IAP_F_CC2),
1173 IAPDESCR(6FH, 0x6F, IAP_M_CORE, IAP_F_CC),
1175 IAPDESCR(70H, 0x70, IAP_M_AGENT | IAP_M_CORE, IAP_F_CA | IAP_F_CC2),
1176 IAPDESCR(70H, 0x70, IAP_M_CORE, IAP_F_CC),
1178 IAPDESCR(77H, 0x77, IAP_M_AGENT | IAP_M_SNOOPRESPONSE,
1179 IAP_F_CA | IAP_F_CC2),
1180 IAPDESCR(77H, 0x77, IAP_M_AGENT | IAP_M_MESI, IAP_F_CC),
1182 IAPDESCR(78H, 0x78, IAP_M_CORE, IAP_F_CC),
1183 IAPDESCR(78H, 0x78, IAP_M_CORE | IAP_M_SNOOPTYPE, IAP_F_CA | IAP_F_CC2),
1185 IAPDESCR(79H_02H, 0x79, 0x02, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1186 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX),
1187 IAPDESCR(79H_04H, 0x79, 0x04, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1188 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX |
1189 IAP_F_SL | IAP_F_SLX),
1190 IAPDESCR(79H_08H, 0x79, 0x08, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1191 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_SL | IAP_F_BW |
1192 IAP_F_BWX | IAP_F_SLX),
1193 IAPDESCR(79H_10H, 0x79, 0x10, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1194 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX |
1195 IAP_F_SL | IAP_F_SLX),
1196 IAPDESCR(79H_18H, 0x79, 0x18, IAP_F_FM | IAP_F_IB | IAP_F_IBX | IAP_F_HW |
1197 IAP_F_HWX | IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
1198 IAPDESCR(79H_20H, 0x79, 0x20, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1199 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX |
1200 IAP_F_SL | IAP_F_SLX),
1201 IAPDESCR(79H_24H, 0x79, 0x24, IAP_F_FM | IAP_F_IB | IAP_F_IBX | IAP_F_HW |
1202 IAP_F_HWX | IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
1203 IAPDESCR(79H_30H, 0x79, 0x30, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1204 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX |
1205 IAP_F_SL | IAP_F_SLX),
1206 IAPDESCR(79H_3CH, 0x79, 0x3C, IAP_F_FM | IAP_F_IB | IAP_F_IBX | IAP_F_HW |
1207 IAP_F_HWX | IAP_F_BW | IAP_F_BWX),
1209 IAPDESCR(7AH, 0x7A, IAP_M_AGENT, IAP_F_CA | IAP_F_CC2),
1211 IAPDESCR(7BH, 0x7B, IAP_M_AGENT, IAP_F_CA | IAP_F_CC2),
1213 IAPDESCR(7DH, 0x7D, IAP_M_CORE, IAP_F_ALLCPUSCORE2),
1215 IAPDESCR(7EH, 0x7E, IAP_M_AGENT | IAP_M_CORE, IAP_F_CA | IAP_F_CC2),
1216 IAPDESCR(7EH_00H, 0x7E, 0x00, IAP_F_FM | IAP_F_CC),
1218 IAPDESCR(7FH, 0x7F, IAP_M_CORE, IAP_F_CA | IAP_F_CC2),
1220 IAPDESCR(80H_00H, 0x80, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2),
1221 IAPDESCR(80H_01H, 0x80, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_CAS),
1222 IAPDESCR(80H_02H, 0x80, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_I7 |
1223 IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW |
1224 IAP_F_CAS | IAP_F_HWX | IAP_F_BW | IAP_F_BWX),
1225 IAPDESCR(80H_03H, 0x80, 0x03, IAP_F_FM | IAP_F_CA | IAP_F_I7 |
1226 IAP_F_WM | IAP_F_CAS),
1227 IAPDESCR(80H_04H, 0x80, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_IB |
1228 IAP_F_IBX | IAP_F_SL | IAP_F_SLX), /* SL may have a spec bug two with
1229 same entry no cmask */
1231 IAPDESCR(81H_00H, 0x81, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2),
1232 IAPDESCR(81H_01H, 0x81, 0x01, IAP_F_FM | IAP_F_I7O),
1233 IAPDESCR(81H_02H, 0x81, 0x02, IAP_F_FM | IAP_F_I7O),
1235 IAPDESCR(82H_01H, 0x82, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
1236 IAPDESCR(82H_02H, 0x82, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2),
1237 IAPDESCR(82H_04H, 0x82, 0x04, IAP_F_FM | IAP_F_CA),
1238 IAPDESCR(82H_10H, 0x82, 0x10, IAP_F_FM | IAP_F_CA | IAP_F_CC2),
1239 IAPDESCR(82H_12H, 0x82, 0x12, IAP_F_FM | IAP_F_CC2),
1240 IAPDESCR(82H_40H, 0x82, 0x40, IAP_F_FM | IAP_F_CC2),
1242 IAPDESCR(83H_01H, 0x83, 0x01, IAP_F_FM | IAP_F_I7O | IAP_F_SL | IAP_F_SLX),
1243 IAPDESCR(83H_02H, 0x83, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_SL |
1245 IAPDESCR(83H_04H, 0x83, 0x04, IAP_F_FM | IAP_F_SLX),
1247 IAPDESCR(85H_00H, 0x85, 0x00, IAP_F_FM | IAP_F_CC),
1248 IAPDESCR(85H_01H, 0x85, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1249 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1250 IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
1251 IAPDESCR(85H_02H, 0x85, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1252 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1253 IAP_F_BW | IAP_F_BWX | IAP_F_SLX),
1254 IAPDESCR(85H_04H, 0x85, 0x04, IAP_F_FM | IAP_F_WM | IAP_F_I7O |
1255 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1257 IAPDESCR(85H_08H, 0x85, 0x08, IAP_F_FM | IAP_F_SLX),
1258 IAPDESCR(85H_0EH, 0x85, 0x0E, IAP_F_FM | IAP_F_HW | IAP_F_HWX | IAP_F_SL |
1260 IAPDESCR(85H_10H, 0x85, 0x10, IAP_F_FM | IAP_F_I7O | IAP_F_SB | IAP_F_IB |
1261 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX |
1262 IAP_F_SL | IAP_F_SLX),
1263 IAPDESCR(85H_20H, 0x85, 0x20, IAP_F_FM | IAP_F_I7O | IAP_F_HW | IAP_F_HWX |
1264 IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
1265 IAPDESCR(85H_40H, 0x85, 0x40, IAP_F_FM | IAP_F_I7O | IAP_F_HW | IAP_F_HWX),
1266 IAPDESCR(85H_60H, 0x85, 0x60, IAP_F_FM | IAP_F_HW | IAP_F_HWX),
1267 IAPDESCR(85H_80H, 0x85, 0x80, IAP_F_FM | IAP_F_WM | IAP_F_I7O),
1269 IAPDESCR(86H_00H, 0x86, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2),
1271 IAPDESCR(87H_00H, 0x87, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2),
1272 IAPDESCR(87H_01H, 0x87, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1273 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1274 IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
1275 IAPDESCR(87H_02H, 0x87, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
1276 IAPDESCR(87H_04H, 0x87, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1277 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX),
1278 IAPDESCR(87H_08H, 0x87, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
1279 IAPDESCR(87H_0FH, 0x87, 0x0F, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
1281 IAPDESCR(88H_00H, 0x88, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2),
1282 IAPDESCR(88H_01H, 0x88, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_BW | IAP_F_BWX),
1283 IAPDESCR(88H_02H, 0x88, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_BW | IAP_F_BWX),
1284 IAPDESCR(88H_04H, 0x88, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_BW | IAP_F_BWX),
1285 IAPDESCR(88H_07H, 0x88, 0x07, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
1286 IAPDESCR(88H_08H, 0x88, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_BW | IAP_F_BWX),
1287 IAPDESCR(88H_10H, 0x88, 0x10, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_BW | IAP_F_BWX),
1288 IAPDESCR(88H_20H, 0x88, 0x20, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_BW | IAP_F_BWX),
1289 IAPDESCR(88H_30H, 0x88, 0x30, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
1290 IAPDESCR(88H_40H, 0x88, 0x40, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_BW | IAP_F_BWX),
1291 IAPDESCR(88H_41H, 0x88, 0x41, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1292 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX),
1293 IAPDESCR(88H_7FH, 0x88, 0x7F, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
1294 IAPDESCR(88H_80H, 0x88, 0x80, IAP_F_FM | IAP_F_BW | IAP_F_BWX),
1295 IAPDESCR(88H_81H, 0x88, 0x81, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1296 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX),
1297 IAPDESCR(88H_82H, 0x88, 0x82, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1298 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX),
1299 IAPDESCR(88H_84H, 0x88, 0x84, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1300 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX),
1301 IAPDESCR(88H_88H, 0x88, 0x88, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1302 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX),
1303 IAPDESCR(88H_90H, 0x88, 0x90, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1304 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX),
1305 IAPDESCR(88H_A0H, 0x88, 0xA0, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1306 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX),
1307 IAPDESCR(88H_FFH, 0x88, 0xFF, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1308 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX),
1310 IAPDESCR(89H_00H, 0x89, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2),
1311 IAPDESCR(89H_01H, 0x89, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_BW | IAP_F_BWX),
1312 IAPDESCR(89H_02H, 0x89, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
1313 IAPDESCR(89H_04H, 0x89, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_BW | IAP_F_BWX),
1314 IAPDESCR(89H_07H, 0x89, 0x07, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
1315 IAPDESCR(89H_08H, 0x89, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_BW | IAP_F_BWX),
1316 IAPDESCR(89H_10H, 0x89, 0x10, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_BW | IAP_F_BWX),
1317 IAPDESCR(89H_20H, 0x89, 0x20, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_BW | IAP_F_BWX),
1318 IAPDESCR(89H_30H, 0x89, 0x30, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
1319 IAPDESCR(89H_40H, 0x89, 0x40, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_BW | IAP_F_BWX),
1320 IAPDESCR(89H_41H, 0x89, 0x41, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1321 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX),
1322 IAPDESCR(89H_7FH, 0x89, 0x7F, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
1323 IAPDESCR(89H_80H, 0x89, 0x80, IAP_F_FM | IAP_F_BW | IAP_F_BWX),
1324 IAPDESCR(89H_81H, 0x89, 0x81, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1325 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX),
1326 IAPDESCR(89H_82H, 0x89, 0x82, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1327 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX),
1328 IAPDESCR(89H_84H, 0x89, 0x84, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1329 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX),
1330 IAPDESCR(89H_88H, 0x89, 0x88, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1331 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX),
1332 IAPDESCR(89H_90H, 0x89, 0x90, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1333 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX),
1334 IAPDESCR(89H_A0H, 0x89, 0xA0, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1335 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX),
1336 IAPDESCR(89H_FFH, 0x89, 0xFF, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1337 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX),
1339 IAPDESCR(8AH_00H, 0x8A, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2),
1340 IAPDESCR(8BH_00H, 0x8B, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2),
1341 IAPDESCR(8CH_00H, 0x8C, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2),
1342 IAPDESCR(8DH_00H, 0x8D, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2),
1343 IAPDESCR(8EH_00H, 0x8E, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2),
1344 IAPDESCR(8FH_00H, 0x8F, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2),
1346 IAPDESCR(90H_00H, 0x90, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2),
1347 IAPDESCR(91H_00H, 0x91, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2),
1348 IAPDESCR(92H_00H, 0x92, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2),
1349 IAPDESCR(93H_00H, 0x93, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2),
1350 IAPDESCR(94H_00H, 0x94, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2),
1352 IAPDESCR(97H_00H, 0x97, 0x00, IAP_F_FM | IAP_F_CA | IAP_F_CC2),
1353 IAPDESCR(98H_00H, 0x98, 0x00, IAP_F_FM | IAP_F_CA | IAP_F_CC2),
1355 IAPDESCR(9CH_01H, 0x9C, 0x01, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1356 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX |
1357 IAP_F_SL | IAP_F_SLX),
1359 IAPDESCR(A0H_00H, 0xA0, 0x00, IAP_F_FM | IAP_F_CA | IAP_F_CC2),
1361 IAPDESCR(A1H_01H, 0xA1, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
1362 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1363 IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
1364 IAPDESCR(A1H_02H, 0xA1, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
1365 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1366 IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
1367 IAPDESCR(A1H_04H, 0xA1, 0x04, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | /* No desc in IB for this*/
1368 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1369 IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
1370 IAPDESCR(A1H_08H, 0xA1, 0x08, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | /* No desc in IB for this*/
1371 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1372 IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
1373 IAPDESCR(A1H_0CH, 0xA1, 0x0C, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1374 IAP_F_SBX | IAP_F_IBX),
1375 IAPDESCR(A1H_10H, 0xA1, 0x10, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | /* No desc in IB for this*/
1376 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1377 IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
1378 IAPDESCR(A1H_20H, 0xA1, 0x20, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | /* No desc in IB for this*/
1379 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1380 IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
1381 IAPDESCR(A1H_40H, 0xA1, 0x40, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1382 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX |
1383 IAP_F_SL | IAP_F_SLX),
1384 IAPDESCR(A1H_80H, 0xA1, 0x80, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1385 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX |
1386 IAP_F_SL | IAP_F_SLX),
1388 IAPDESCR(A2H_00H, 0xA2, 0x00, IAP_F_FM | IAP_F_CC),
1389 IAPDESCR(A2H_01H, 0xA2, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1390 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1391 IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
1392 IAPDESCR(A2H_02H, 0xA2, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1393 IAP_F_SB | IAP_F_SBX),
1394 IAPDESCR(A2H_04H, 0xA2, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1395 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1396 IAP_F_BW | IAP_F_BWX),
1397 IAPDESCR(A2H_08H, 0xA2, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1398 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1399 IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
1400 IAPDESCR(A2H_10H, 0xA2, 0x10, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1401 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1402 IAP_F_BW | IAP_F_BWX),
1403 IAPDESCR(A2H_20H, 0xA2, 0x20, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1404 IAP_F_SB | IAP_F_SBX),
1405 IAPDESCR(A2H_40H, 0xA2, 0x40, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1406 IAP_F_SB | IAP_F_SBX),
1407 IAPDESCR(A2H_80H, 0xA2, 0x80, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1408 IAP_F_SB | IAP_F_SBX),
1410 IAPDESCR(A3H_01H, 0xA3, 0x01, IAP_F_FM | IAP_F_SBX | IAP_F_IBX | IAP_F_IB |
1411 IAP_F_HW | IAP_F_HWX | IAP_F_SL | IAP_F_SLX),
1412 IAPDESCR(A3H_02H, 0xA3, 0x02, IAP_F_FM | IAP_F_SBX | IAP_F_IBX | IAP_F_IB |
1413 IAP_F_HW | IAP_F_HWX | IAP_F_SL | IAP_F_SLX),
1414 IAPDESCR(A3H_04H, 0xA3, 0x04, IAP_F_FM | IAP_F_SBX | IAP_F_IBX | IAP_F_IB |
1415 IAP_F_SL | IAP_F_SLX),
1416 IAPDESCR(A3H_05H, 0xA3, 0x05, IAP_F_FM | IAP_F_HW | IAP_F_HWX | IAP_F_SL |
1418 IAPDESCR(A3H_06H, 0xA3, 0x06, IAP_F_FM | IAP_F_SL | IAP_F_SLX),
1419 IAPDESCR(A3H_08H, 0xA3, 0x08, IAP_F_FM | IAP_F_IBX | IAP_F_HW | IAP_F_IB |
1420 IAP_F_HWX | IAP_F_SL | IAP_F_SLX),
1421 IAPDESCR(A3H_0CH, 0xA3, 0x0C, IAP_F_FM | IAP_F_HW | IAP_F_HW | IAP_F_SL |
1423 IAPDESCR(A3H_10H, 0xA3, 0x10, IAP_F_FM | IAP_F_SL | IAP_F_SLX),
1424 IAPDESCR(A3H_14H, 0xA3, 0x14, IAP_F_FM | IAP_F_SL | IAP_F_SLX),
1426 IAPDESCR(A6H_01H, 0xA6, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SL |
1428 IAPDESCR(A6H_02H, 0xA6, 0x02, IAP_F_FM | IAP_F_SL | IAP_F_SLX),
1429 IAPDESCR(A6H_04H, 0xA6, 0x04, IAP_F_FM | IAP_F_SL | IAP_F_SLX),
1430 IAPDESCR(A6H_08H, 0xA6, 0x08, IAP_F_FM | IAP_F_SL | IAP_F_SLX),
1431 IAPDESCR(A6H_10H, 0xA6, 0x10, IAP_F_FM | IAP_F_SL | IAP_F_SLX),
1432 IAPDESCR(A6H_40H, 0xA6, 0x40, IAP_F_FM | IAP_F_SL | IAP_F_SLX),
1434 IAPDESCR(A7H_01H, 0xA7, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM ),
1436 IAPDESCR(A8H_01H, 0xA8, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_IBX |
1437 IAP_F_IB |IAP_F_SB | IAP_F_SBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW |
1438 IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
1440 IAPDESCR(AAH_01H, 0xAA, 0x01, IAP_F_FM | IAP_F_CC2),
1441 IAPDESCR(AAH_02H, 0xAA, 0x02, IAP_F_FM | IAP_F_CA),
1442 IAPDESCR(AAH_03H, 0xAA, 0x03, IAP_F_FM | IAP_F_CA),
1443 IAPDESCR(AAH_08H, 0xAA, 0x08, IAP_F_FM | IAP_F_CC2),
1445 IAPDESCR(ABH_01H, 0xAB, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
1446 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX),
1447 IAPDESCR(ABH_02H, 0xAB, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
1448 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_BW | IAP_F_BWX |
1449 IAP_F_SL | IAP_F_SLX),
1451 IAPDESCR(ACH_02H, 0xAC, 0x02, IAP_F_FM | IAP_F_SB | IAP_F_SBX | IAP_F_SL),
1452 IAPDESCR(ACH_08H, 0xAC, 0x08, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1453 IAP_F_SBX | IAP_F_IBX),
1454 IAPDESCR(ACH_0AH, 0xAC, 0x0A, IAP_F_FM | IAP_F_SB | IAP_F_SBX),
1456 IAPDESCR(AEH_01H, 0xAE, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1457 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1458 IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
1460 IAPDESCR(B0H_00H, 0xB0, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2),
1461 IAPDESCR(B0H_01H, 0xB0, 0x01, IAP_F_FM | IAP_F_WM | IAP_F_I7O |
1462 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1463 IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
1464 IAPDESCR(B0H_02H, 0xB0, 0x02, IAP_F_FM | IAP_F_WM | IAP_F_I7O | IAP_F_IB |
1465 IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX | IAP_F_SL |
1467 IAPDESCR(B0H_04H, 0xB0, 0x04, IAP_F_FM | IAP_F_WM | IAP_F_I7O |
1468 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1469 IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
1470 IAPDESCR(B0H_08H, 0xB0, 0x08, IAP_F_FM | IAP_F_WM | IAP_F_I7O |
1471 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1472 IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
1473 IAPDESCR(B0H_10H, 0xB0, 0x10, IAP_F_FM | IAP_F_WM | IAP_F_I7O | IAP_F_SL |
1475 IAPDESCR(B0H_20H, 0xB0, 0x20, IAP_F_FM | IAP_F_I7O),
1476 IAPDESCR(B0H_40H, 0xB0, 0x40, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
1477 IAPDESCR(B0H_80H, 0xB0, 0x80, IAP_F_FM | IAP_F_CA | IAP_F_WM | IAP_F_I7O |
1478 IAP_F_SL | IAP_F_SLX),
1480 IAPDESCR(B1H_00H, 0xB1, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2),
1481 IAPDESCR(B1H_01H, 0xB1, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1482 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_BW | IAP_F_BWX |
1483 IAP_F_SL | IAP_F_SLX),
1484 IAPDESCR(B1H_02H, 0xB1, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1485 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1486 IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
1487 IAPDESCR(B1H_04H, 0xB1, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
1488 IAPDESCR(B1H_08H, 0xB1, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
1489 IAPDESCR(B1H_10H, 0xB1, 0x10, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SL |
1491 IAPDESCR(B1H_1FH, 0xB1, 0x1F, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
1492 IAPDESCR(B1H_20H, 0xB1, 0x20, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
1493 IAPDESCR(B1H_3FH, 0xB1, 0x3F, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
1494 IAPDESCR(B1H_40H, 0xB1, 0x40, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
1495 IAPDESCR(B1H_80H, 0xB1, 0x80, IAP_F_FM | IAP_F_CA | IAP_F_I7 |
1498 IAPDESCR(B2H_01H, 0xB2, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1499 IAP_F_SB | IAP_F_SBX | IAP_F_SL | IAP_F_SLX),
1501 IAPDESCR(B3H_01H, 0xB3, 0x01, IAP_F_FM | IAP_F_ALLCPUSCORE2 |
1502 IAP_F_WM | IAP_F_I7O),
1503 IAPDESCR(B3H_02H, 0xB3, 0x02, IAP_F_FM | IAP_F_ALLCPUSCORE2 |
1504 IAP_F_WM | IAP_F_I7O),
1505 IAPDESCR(B3H_04H, 0xB3, 0x04, IAP_F_FM | IAP_F_ALLCPUSCORE2 |
1506 IAP_F_WM | IAP_F_I7O),
1507 IAPDESCR(B3H_08H, 0xB3, 0x08, IAP_F_FM | IAP_F_ALLCPUSCORE2),
1508 IAPDESCR(B3H_10H, 0xB3, 0x10, IAP_F_FM | IAP_F_ALLCPUSCORE2),
1509 IAPDESCR(B3H_20H, 0xB3, 0x20, IAP_F_FM | IAP_F_ALLCPUSCORE2),
1510 IAPDESCR(B3H_81H, 0xB3, 0x81, IAP_F_FM | IAP_F_CA),
1511 IAPDESCR(B3H_82H, 0xB3, 0x82, IAP_F_FM | IAP_F_CA),
1512 IAPDESCR(B3H_84H, 0xB3, 0x84, IAP_F_FM | IAP_F_CA),
1513 IAPDESCR(B3H_88H, 0xB3, 0x88, IAP_F_FM | IAP_F_CA),
1514 IAPDESCR(B3H_90H, 0xB3, 0x90, IAP_F_FM | IAP_F_CA),
1515 IAPDESCR(B3H_A0H, 0xB3, 0xA0, IAP_F_FM | IAP_F_CA),
1517 IAPDESCR(B4H_01H, 0xB4, 0x01, IAP_F_FM | IAP_F_WM),
1518 IAPDESCR(B4H_02H, 0xB4, 0x02, IAP_F_FM | IAP_F_WM),
1519 IAPDESCR(B4H_04H, 0xB4, 0x04, IAP_F_FM | IAP_F_WM),
1521 IAPDESCR(B6H_01H, 0xB6, 0x01, IAP_F_FM | IAP_F_SB | IAP_F_SBX),
1522 IAPDESCR(B6H_04H, 0xB6, 0x04, IAP_F_FM | IAP_F_CAS),
1524 IAPDESCR(B7H_01H, 0xB7, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1525 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_CAS |
1526 IAP_F_HWX |IAP_F_BW | IAP_F_BWX | IAP_F_SL),
1527 IAPDESCR(B7H_02H, 0xB7, 0x02, IAP_F_CAS),
1529 IAPDESCR(B8H_01H, 0xB8, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
1530 IAPDESCR(B8H_02H, 0xB8, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
1531 IAPDESCR(B8H_04H, 0xB8, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
1533 IAPDESCR(BAH_01H, 0xBA, 0x01, IAP_F_FM | IAP_F_I7O),
1534 IAPDESCR(BAH_02H, 0xBA, 0x02, IAP_F_FM | IAP_F_I7O),
1536 IAPDESCR(BBH_01H, 0xBB, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1537 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1538 IAP_F_BW | IAP_F_BWX | IAP_F_SL),
1540 IAPDESCR(BCH_11H, 0xBC, 0x11, IAP_F_FM | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX),
1541 IAPDESCR(BCH_12H, 0xBC, 0x12, IAP_F_FM | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX),
1542 IAPDESCR(BCH_14H, 0xBC, 0x14, IAP_F_FM | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX),
1543 IAPDESCR(BCH_18H, 0xBC, 0x18, IAP_F_FM | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX),
1544 IAPDESCR(BCH_21H, 0xBC, 0x21, IAP_F_FM | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX),
1545 IAPDESCR(BCH_22H, 0xBC, 0x22, IAP_F_FM | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX),
1546 IAPDESCR(BCH_24H, 0xBC, 0x24, IAP_F_FM | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX),
1547 IAPDESCR(BCH_28H, 0xBC, 0x28, IAP_F_FM | IAP_F_HW | IAP_F_HWX),
1549 IAPDESCR(BDH_01H, 0xBD, 0x01, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1550 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_SL | IAP_F_SLX), /* spec bug SL? */
1551 IAPDESCR(BDH_20H, 0xBD, 0x20, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1552 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_SLX),
1554 IAPDESCR(BFH_05H, 0xBF, 0x05, IAP_F_FM | IAP_F_SB | IAP_F_SBX),
1556 IAPDESCR(C0H_00H, 0xC0, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2 |
1557 IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW |
1558 IAP_F_CAS | IAP_F_HWX | IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
1559 IAPDESCR(C0H_01H, 0xC0, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
1560 IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX |
1561 IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX | IAP_F_SL |
1563 IAPDESCR(C0H_02H, 0xC0, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
1564 IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_BW | IAP_F_BWX),
1565 IAPDESCR(C0H_04H, 0xC0, 0x04, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
1566 IAP_F_I7 | IAP_F_WM),
1567 IAPDESCR(C0H_08H, 0xC0, 0x08, IAP_F_FM | IAP_F_CC2E),
1569 IAPDESCR(C1H_00H, 0xC1, 0x00, IAP_F_FM | IAP_F_CC),
1570 IAPDESCR(C1H_01H, 0xC1, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2),
1571 IAPDESCR(C1H_02H, 0xC1, 0x02, IAP_F_FM | IAP_F_SB | IAP_F_SBX),
1572 IAPDESCR(C1H_08H, 0xC1, 0x08, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1573 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX),
1574 IAPDESCR(C1H_10H, 0xC1, 0x10, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1575 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX),
1576 IAPDESCR(C1H_20H, 0xC1, 0x20, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1577 IAP_F_SBX | IAP_F_IBX),
1578 IAPDESCR(C1H_3FH, 0xC1, 0x3F, IAP_F_FM | IAP_F_SL | IAP_F_SLX),
1579 IAPDESCR(C1H_40H, 0xC1, 0x40, IAP_F_FM | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX),
1580 IAPDESCR(C1H_80H, 0xC1, 0x80, IAP_F_FM |IAP_F_IB | IAP_F_IBX),
1581 IAPDESCR(C1H_FEH, 0xC1, 0xFE, IAP_F_FM | IAP_F_CA | IAP_F_CC2),
1583 IAPDESCR(C2H_00H, 0xC2, 0x00, IAP_F_FM | IAP_F_CC),
1584 IAPDESCR(C2H_01H, 0xC2, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
1585 IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX |
1586 IAP_F_IBX | IAP_F_HW | IAP_F_CAS | IAP_F_HWX | IAP_F_BW | IAP_F_BWX |
1587 IAP_F_SL | IAP_F_SLX),
1588 IAPDESCR(C2H_02H, 0xC2, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
1589 IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX |
1590 IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX | IAP_F_SL |
1592 IAPDESCR(C2H_04H, 0xC2, 0x04, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
1593 IAP_F_I7 | IAP_F_WM),
1594 IAPDESCR(C2H_07H, 0xC2, 0x07, IAP_F_FM | IAP_F_CA | IAP_F_CC2),
1595 IAPDESCR(C2H_08H, 0xC2, 0x08, IAP_F_FM | IAP_F_CA | IAP_F_CC2),
1596 IAPDESCR(C2H_0FH, 0xC2, 0x0F, IAP_F_FM | IAP_F_CC2),
1597 IAPDESCR(C2H_10H, 0xC2, 0x10, IAP_F_FM | IAP_F_CA | IAP_F_CAS),
1599 IAPDESCR(C3H_00H, 0xC3, 0x00, IAP_F_FM | IAP_F_CC),
1600 IAPDESCR(C3H_01H, 0xC3, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
1601 IAP_F_I7 | IAP_F_WM | IAP_F_CAS | IAP_F_BW | IAP_F_BWX | IAP_F_SL |
1603 IAPDESCR(C3H_02H, 0xC3, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1604 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW |
1605 IAP_F_CAS | IAP_F_HWX | IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
1606 IAPDESCR(C3H_04H, 0xC3, 0x04, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
1607 IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX |
1608 IAP_F_IBX | IAP_F_HW | IAP_F_CAS | IAP_F_HWX | IAP_F_BW | IAP_F_BWX |
1609 IAP_F_SL | IAP_F_SLX),
1610 IAPDESCR(C3H_08H, 0xC3, 0x08, IAP_F_FM | IAP_F_CAS),
1611 IAPDESCR(C3H_10H, 0xC3, 0x10, IAP_F_FM | IAP_F_I7O),
1612 IAPDESCR(C3H_20H, 0xC3, 0x20, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1613 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX),
1615 IAPDESCR(C4H_00H, 0xC4, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2 |
1616 IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX |
1617 IAP_F_IBX | IAP_F_HW | IAP_F_CAS | IAP_F_HWX | IAP_F_BW | IAP_F_BWX |
1618 IAP_F_SL | IAP_F_SLX),
1619 IAPDESCR(C4H_01H, 0xC4, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
1620 IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX |
1621 IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX | IAP_F_SL |
1623 IAPDESCR(C4H_02H, 0xC4, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
1624 IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX |
1625 IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX | IAP_F_SL |
1627 IAPDESCR(C4H_04H, 0xC4, 0x04, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
1628 IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX |
1629 IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX | IAP_F_SL |
1631 IAPDESCR(C4H_08H, 0xC4, 0x08, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
1632 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW |
1633 IAP_F_HWX | IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
1634 IAPDESCR(C4H_0CH, 0xC4, 0x0C, IAP_F_FM | IAP_F_CA | IAP_F_CC2),
1635 IAPDESCR(C4H_0FH, 0xC4, 0x0F, IAP_F_FM | IAP_F_CA),
1636 IAPDESCR(C4H_10H, 0xC4, 0x10, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1637 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX |
1638 IAP_F_SL | IAP_F_SLX),
1639 IAPDESCR(C4H_20H, 0xC4, 0x20, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1640 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX |
1641 IAP_F_SL | IAP_F_SLX),
1642 IAPDESCR(C4H_40H, 0xC4, 0x40, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1643 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX |
1644 IAP_F_SL | IAP_F_SLX),
1645 IAPDESCR(C4H_7EH, 0xC4, 0x7E, IAP_F_FM | IAP_F_CAS),
1646 IAPDESCR(C4H_BFH, 0xC4, 0xBF, IAP_F_FM | IAP_F_CAS),
1647 IAPDESCR(C4H_EBH, 0xC4, 0xEB, IAP_F_FM | IAP_F_CAS),
1648 IAPDESCR(C4H_F7H, 0xC4, 0xF7, IAP_F_FM | IAP_F_CAS),
1649 IAPDESCR(C4H_F9H, 0xC4, 0xF9, IAP_F_FM | IAP_F_CAS),
1650 IAPDESCR(C4H_FBH, 0xC4, 0xFB, IAP_F_FM | IAP_F_CAS),
1651 IAPDESCR(C4H_FDH, 0xC4, 0xFD, IAP_F_FM | IAP_F_CAS),
1652 IAPDESCR(C4H_FEH, 0xC4, 0xFE, IAP_F_FM | IAP_F_CAS),
1654 IAPDESCR(C5H_00H, 0xC5, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2 |
1655 IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX |
1656 IAP_F_IBX | IAP_F_HW | IAP_F_CAS | IAP_F_HWX | IAP_F_BW | IAP_F_BWX |
1657 IAP_F_SL | IAP_F_SLX),
1658 IAPDESCR(C5H_01H, 0xC5, 0x01, IAP_F_FM | IAP_F_WM | IAP_F_SB |
1659 IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW |
1660 IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
1661 IAPDESCR(C5H_02H, 0xC5, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1662 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_SL | IAP_F_SLX),
1663 IAPDESCR(C5H_04H, 0xC5, 0x04, IAP_F_FM | IAP_F_WM | IAP_F_SB |
1664 IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW |
1665 IAP_F_BWX | IAP_F_SL),
1666 IAPDESCR(C5H_10H, 0xC5, 0x10, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1667 IAP_F_SBX | IAP_F_IBX),
1668 IAPDESCR(C5H_20H, 0xC5, 0x20, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1669 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_SL | IAP_F_SLX),
1670 IAPDESCR(C5H_7EH, 0xC5, 0x7E, IAP_F_FM | IAP_F_CAS),
1671 IAPDESCR(C5H_BFH, 0xC5, 0xBF, IAP_F_FM | IAP_F_CAS),
1672 IAPDESCR(C5H_EBH, 0xC5, 0xEB, IAP_F_FM | IAP_F_CAS),
1673 IAPDESCR(C5H_F7H, 0xC5, 0xF7, IAP_F_FM | IAP_F_CAS),
1674 IAPDESCR(C5H_F9H, 0xC5, 0xF9, IAP_F_FM | IAP_F_CAS),
1675 IAPDESCR(C5H_FBH, 0xC5, 0xFB, IAP_F_FM | IAP_F_CAS),
1676 IAPDESCR(C5H_FDH, 0xC5, 0xFD, IAP_F_FM | IAP_F_CAS),
1677 IAPDESCR(C5H_FEH, 0xC5, 0xFE, IAP_F_FM | IAP_F_CAS),
1679 IAPDESCR(C6H_00H, 0xC6, 0x00, IAP_F_FM | IAP_F_CC),
1680 /* For SL C6_01 needs EV_SEL? 0x11, 0x12, 0x13, 0x14, 0x15? */
1681 IAPDESCR(C6H_01H, 0xC6, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_SL |
1683 IAPDESCR(C6H_02H, 0xC6, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2),
1685 IAPDESCR(C7H_00H, 0xC7, 0x00, IAP_F_FM | IAP_F_CC),
1686 IAPDESCR(C7H_01H, 0xC7, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
1687 IAP_F_I7 | IAP_F_WM | IAP_F_SL | IAP_F_SLX),
1688 IAPDESCR(C7H_02H, 0xC7, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
1689 IAP_F_I7 | IAP_F_WM | IAP_F_SL | IAP_F_SLX),
1690 IAPDESCR(C7H_04H, 0xC7, 0x04, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
1691 IAP_F_I7 | IAP_F_WM | IAP_F_SL | IAP_F_SLX),
1692 IAPDESCR(C7H_08H, 0xC7, 0x08, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
1693 IAP_F_I7 | IAP_F_WM | IAP_F_SL | IAP_F_SLX),
1694 IAPDESCR(C7H_10H, 0xC7, 0x10, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
1695 IAP_F_I7 | IAP_F_WM | IAP_F_SL | IAP_F_SLX),
1696 IAPDESCR(C7H_1FH, 0xC7, 0x1F, IAP_F_FM | IAP_F_CA | IAP_F_CC2),
1697 IAPDESCR(C7H_20H, 0xC7, 0x20, IAP_F_FM | IAP_F_SL | IAP_F_SLX),
1698 IAPDESCR(C7H_40H, 0xc7, 0x40, IAP_F_FM | IAP_F_SLX),
1699 IAPDESCR(C7H_80H, 0xc7, 0x80, IAP_F_FM | IAP_F_SLX),
1701 IAPDESCR(C8H_00H, 0xC8, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2),
1702 IAPDESCR(C8H_01H, 0xC8, 0x01, IAP_F_FM | IAP_F_SLX),
1703 IAPDESCR(C8H_02H, 0xC8, 0x02, IAP_F_FM | IAP_F_SLX),
1704 IAPDESCR(C8H_04H, 0xC8, 0x04, IAP_F_FM | IAP_F_SLX),
1705 IAPDESCR(C8H_08H, 0xC8, 0x08, IAP_F_FM | IAP_F_SLX),
1706 IAPDESCR(C8H_10H, 0xC8, 0x10, IAP_F_FM | IAP_F_SLX),
1707 IAPDESCR(C8H_20H, 0xC8, 0x20, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SLX),
1708 IAPDESCR(C8H_40H, 0xC8, 0x40, IAP_F_FM | IAP_F_SLX),
1709 IAPDESCR(C8H_80H, 0xC8, 0x80, IAP_F_FM | IAP_F_SLX),
1711 IAPDESCR(C9H_00H, 0xC9, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2),
1712 IAPDESCR(C9H_01H, 0xC9, 0x01, IAP_F_FM | IAP_F_SLX),
1713 IAPDESCR(C9H_02H, 0xC9, 0x02, IAP_F_FM | IAP_F_SLX),
1714 IAPDESCR(C9H_04H, 0xC9, 0x04, IAP_F_FM | IAP_F_SLX),
1715 IAPDESCR(C9H_08H, 0xC9, 0x08, IAP_F_FM | IAP_F_SLX),
1716 IAPDESCR(C9H_10H, 0xC9, 0x10, IAP_F_FM | IAP_F_SLX),
1717 IAPDESCR(C9H_20H, 0xC9, 0x20, IAP_F_FM | IAP_F_SLX),
1718 IAPDESCR(C9H_40H, 0xC9, 0x40, IAP_F_FM | IAP_F_SLX),
1719 IAPDESCR(C9H_80H, 0xC9, 0x80, IAP_F_FM | IAP_F_SLX),
1721 IAPDESCR(CAH_00H, 0xCA, 0x00, IAP_F_FM | IAP_F_CC),
1722 IAPDESCR(CAH_01H, 0xCA, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_CAS),
1723 IAPDESCR(CAH_02H, 0xCA, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
1724 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1725 IAP_F_BW | IAP_F_BWX),
1726 IAPDESCR(CAH_04H, 0xCA, 0x04, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
1727 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1728 IAP_F_BW | IAP_F_BWX),
1729 IAPDESCR(CAH_08H, 0xCA, 0x08, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
1730 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1731 IAP_F_BW | IAP_F_BWX),
1732 IAPDESCR(CAH_10H, 0xCA, 0x10, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1733 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX),
1734 IAPDESCR(CAH_1EH, 0xCA, 0x1E, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1735 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX |
1736 IAP_F_SL | IAP_F_SLX),
1737 IAPDESCR(CAH_20H, 0xCA, 0x20, IAP_F_FM | IAP_F_CAS | IAP_F_BW | IAP_F_BWX),
1738 IAPDESCR(CAH_3FH, 0xCA, 0x3F, IAP_F_FM | IAP_F_CAS),
1739 IAPDESCR(CAH_50H, 0xCA, 0x50, IAP_F_FM | IAP_F_CAS),
1741 IAPDESCR(CBH_01H, 0xCB, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
1742 IAP_F_I7 | IAP_F_WM | IAP_F_CAS | IAP_F_SL | IAP_F_SLX),
1743 IAPDESCR(CBH_02H, 0xCB, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
1744 IAP_F_I7 | IAP_F_WM),
1745 IAPDESCR(CBH_04H, 0xCB, 0x04, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
1746 IAP_F_I7 | IAP_F_WM),
1747 IAPDESCR(CBH_08H, 0xCB, 0x08, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
1748 IAP_F_I7 | IAP_F_WM),
1749 IAPDESCR(CBH_10H, 0xCB, 0x10, IAP_F_FM | IAP_F_CC2 | IAP_F_I7 |
1751 IAPDESCR(CBH_1FH, 0xCB, 0x1F, IAP_F_FM | IAP_F_CAS),
1752 IAPDESCR(CBH_40H, 0xCB, 0x40, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
1753 IAPDESCR(CBH_80H, 0xCB, 0x80, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
1755 IAPDESCR(CCH_00H, 0xCC, 0x00, IAP_F_FM | IAP_F_CC),
1756 IAPDESCR(CCH_01H, 0xCC, 0x01, IAP_F_FM | IAP_F_ALLCPUSCORE2 |
1757 IAP_F_I7 | IAP_F_WM),
1758 IAPDESCR(CCH_02H, 0xCC, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
1759 IAP_F_I7 | IAP_F_WM),
1760 IAPDESCR(CCH_03H, 0xCC, 0x03, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
1761 IAPDESCR(CCH_20H, 0xCC, 0x20, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1762 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX |
1765 IAPDESCR(CDH_00H, 0xCD, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2),
1766 IAPDESCR(CDH_01H, 0xCD, 0x01, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1767 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_CAS | IAP_F_HWX | IAP_F_BW |
1768 IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
1769 IAPDESCR(CDH_02H, 0xCD, 0x02, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1770 IAP_F_SBX | IAP_F_IBX),
1772 IAPDESCR(CEH_00H, 0xCE, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2),
1773 IAPDESCR(CFH_00H, 0xCF, 0x00, IAP_F_FM | IAP_F_CA | IAP_F_CC2),
1775 /* Sandy Bridge / Sandy Bridge Xeon - 11, 12, 21, 41, 42, 81, 82 */
1776 IAPDESCR(D0H_00H, 0xD0, 0x00, IAP_F_FM | IAP_F_CC),
1777 IAPDESCR(D0H_01H, 0xD0, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
1778 IAPDESCR(D0H_11H, 0xD0, 0x11, IAP_F_FM | IAP_F_SB | IAP_F_SBX | IAP_F_IB |
1779 IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX | IAP_F_SL |
1781 IAPDESCR(D0H_12H, 0xD0, 0x12, IAP_F_FM | IAP_F_SB | IAP_F_SBX | IAP_F_IB |
1782 IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX | IAP_F_SL |
1784 IAPDESCR(D0H_21H, 0xD0, 0x21, IAP_F_FM | IAP_F_SB | IAP_F_SBX | IAP_F_BW |
1785 IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
1786 IAPDESCR(D0H_41H, 0xD0, 0x41, IAP_F_FM | IAP_F_SB | IAP_F_SBX | IAP_F_IB |
1787 IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX | IAP_F_SL |
1789 IAPDESCR(D0H_42H, 0xD0, 0x42, IAP_F_FM | IAP_F_SB | IAP_F_SBX | IAP_F_IB |
1790 IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX | IAP_F_SL |
1792 IAPDESCR(D0H_81H, 0xD0, 0x81, IAP_F_FM | IAP_F_SB | IAP_F_SBX | IAP_F_IB |
1793 IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX | IAP_F_SL |
1795 IAPDESCR(D0H_82H, 0xD0, 0x82, IAP_F_FM | IAP_F_SB | IAP_F_SBX | IAP_F_IB |
1796 IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX | IAP_F_SL |
1799 IAPDESCR(D1H_01H, 0xD1, 0x01, IAP_F_FM | IAP_F_WM | IAP_F_SB |
1800 IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW |
1801 IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
1802 IAPDESCR(D1H_02H, 0xD1, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1803 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1804 IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
1805 IAPDESCR(D1H_04H, 0xD1, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1806 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1807 IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
1808 IAPDESCR(D1H_08H, 0xD1, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_IB |
1809 IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX | IAP_F_SL |
1811 IAPDESCR(D1H_10H, 0xD1, 0x10, IAP_F_HW | IAP_F_IB | IAP_F_IBX | IAP_F_HWX |
1812 IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
1813 IAPDESCR(D1H_20H, 0xD1, 0x20, IAP_F_FM | IAP_F_SBX | IAP_F_IBX | IAP_F_IB |
1814 IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
1815 IAPDESCR(D1H_40H, 0xD1, 0x40, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1816 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX |
1817 IAP_F_SL | IAP_F_SLX),
1819 IAPDESCR(D2H_01H, 0xD2, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
1820 IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_SBX | IAP_F_IB |
1821 IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX | IAP_F_SL |
1823 IAPDESCR(D2H_02H, 0xD2, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
1824 IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_SBX | IAP_F_IB |
1825 IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX | IAP_F_SL |
1827 IAPDESCR(D2H_04H, 0xD2, 0x04, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
1828 IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_SBX | IAP_F_IB |
1829 IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX | IAP_F_SL |
1831 IAPDESCR(D2H_08H, 0xD2, 0x08, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
1832 IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_SBX | IAP_F_IB |
1833 IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX | IAP_F_SL |
1835 IAPDESCR(D2H_0FH, 0xD2, 0x0F, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
1836 IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_SBX | IAP_F_IB |
1837 IAP_F_IBX | IAP_F_HW | IAP_F_HWX),
1839 IAPDESCR(D2H_10H, 0xD2, 0x10, IAP_F_FM | IAP_F_CC2E),
1841 IAPDESCR(D3H_01H, 0xD3, 0x01, IAP_F_FM | IAP_F_IB | IAP_F_SBX |
1842 IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX | IAP_F_SLX),
1843 IAPDESCR(D3H_02H, 0xD3, 0x02, IAP_F_FM | IAP_F_SLX),
1844 IAPDESCR(D3H_03H, 0xD3, 0x03, IAP_F_FM | IAP_F_IBX),
1845 IAPDESCR(D3H_04H, 0xD3, 0x04, IAP_F_FM | IAP_F_SBX | IAP_F_IBX | IAP_F_SLX), /* Not defined for IBX */
1846 IAPDESCR(D3H_08H, 0xD3, 0x08, IAP_F_FM | IAP_F_SLX),
1847 IAPDESCR(D3H_0CH, 0xD3, 0x0C, IAP_F_FM | IAP_F_IBX),
1848 IAPDESCR(D3H_10H, 0xD3, 0x10, IAP_F_FM | IAP_F_IBX ),
1849 IAPDESCR(D3H_20H, 0xD3, 0x20, IAP_F_FM | IAP_F_IBX ),
1851 IAPDESCR(D4H_01H, 0xD4, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
1852 IAP_F_I7 | IAP_F_WM),
1853 IAPDESCR(D4H_02H, 0xD4, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
1854 IAP_F_SB | IAP_F_SBX),
1855 IAPDESCR(D4H_04H, 0xD4, 0x04, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_SLX),
1856 IAPDESCR(D4H_08H, 0xD4, 0x08, IAP_F_FM | IAP_F_CA | IAP_F_CC2),
1857 IAPDESCR(D4H_0FH, 0xD4, 0x0F, IAP_F_FM | IAP_F_CA | IAP_F_CC2),
1859 IAPDESCR(D5H_01H, 0xD5, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
1860 IAP_F_I7 | IAP_F_WM),
1861 IAPDESCR(D5H_02H, 0xD5, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2),
1862 IAPDESCR(D5H_04H, 0xD5, 0x04, IAP_F_FM | IAP_F_CA | IAP_F_CC2),
1863 IAPDESCR(D5H_08H, 0xD5, 0x08, IAP_F_FM | IAP_F_CA | IAP_F_CC2),
1864 IAPDESCR(D5H_0FH, 0xD5, 0x0F, IAP_F_FM | IAP_F_CA | IAP_F_CC2),
1866 IAPDESCR(D7H_00H, 0xD7, 0x00, IAP_F_FM | IAP_F_CC),
1868 IAPDESCR(D8H_00H, 0xD8, 0x00, IAP_F_FM | IAP_F_CC),
1869 IAPDESCR(D8H_01H, 0xD8, 0x01, IAP_F_FM | IAP_F_CC),
1870 IAPDESCR(D8H_02H, 0xD8, 0x02, IAP_F_FM | IAP_F_CC),
1871 IAPDESCR(D8H_03H, 0xD8, 0x03, IAP_F_FM | IAP_F_CC),
1872 IAPDESCR(D8H_04H, 0xD8, 0x04, IAP_F_FM | IAP_F_CC),
1874 IAPDESCR(D9H_00H, 0xD9, 0x00, IAP_F_FM | IAP_F_CC),
1875 IAPDESCR(D9H_01H, 0xD9, 0x01, IAP_F_FM | IAP_F_CC),
1876 IAPDESCR(D9H_02H, 0xD9, 0x02, IAP_F_FM | IAP_F_CC),
1877 IAPDESCR(D9H_03H, 0xD9, 0x03, IAP_F_FM | IAP_F_CC),
1879 IAPDESCR(DAH_00H, 0xDA, 0x00, IAP_F_FM | IAP_F_CC),
1880 IAPDESCR(DAH_01H, 0xDA, 0x01, IAP_F_FM | IAP_F_CC),
1881 IAPDESCR(DAH_02H, 0xDA, 0x02, IAP_F_FM | IAP_F_CC),
1883 IAPDESCR(DBH_00H, 0xDB, 0x00, IAP_F_FM | IAP_F_CC),
1884 IAPDESCR(DBH_01H, 0xDB, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
1886 IAPDESCR(DCH_01H, 0xDC, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2),
1887 IAPDESCR(DCH_02H, 0xDC, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2),
1888 IAPDESCR(DCH_04H, 0xDC, 0x04, IAP_F_FM | IAP_F_CA | IAP_F_CC2),
1889 IAPDESCR(DCH_08H, 0xDC, 0x08, IAP_F_FM | IAP_F_CA | IAP_F_CC2),
1890 IAPDESCR(DCH_10H, 0xDC, 0x10, IAP_F_FM | IAP_F_CA | IAP_F_CC2),
1891 IAPDESCR(DCH_1FH, 0xDC, 0x1F, IAP_F_FM | IAP_F_CA | IAP_F_CC2),
1893 IAPDESCR(E0H_00H, 0xE0, 0x00, IAP_F_FM | IAP_F_CC | IAP_F_CC2),
1894 IAPDESCR(E0H_01H, 0xE0, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_I7 |
1897 IAPDESCR(E2H_00H, 0xE2, 0x00, IAP_F_FM | IAP_F_CC),
1899 IAPDESCR(E4H_00H, 0xE4, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2),
1900 IAPDESCR(E4H_01H, 0xE4, 0x01, IAP_F_FM | IAP_F_I7O),
1902 IAPDESCR(E5H_01H, 0xE5, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
1904 IAPDESCR(E6H_00H, 0xE6, 0x00, IAP_F_FM | IAP_F_CC | IAP_F_CC2),
1905 IAPDESCR(E6H_01H, 0xE6, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_I7 |
1906 IAP_F_WM | IAP_F_SBX | IAP_F_CAS | IAP_F_SL | IAP_F_SLX),
1907 IAPDESCR(E6H_02H, 0xE6, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
1908 IAPDESCR(E6H_08H, 0xE6, 0x08, IAP_F_FM | IAP_F_CAS),
1909 IAPDESCR(E6H_10H, 0xE6, 0x10, IAP_F_FM | IAP_F_CAS),
1910 IAPDESCR(E6H_1FH, 0xE6, 0x1F, IAP_F_FM | IAP_F_IB |
1911 IAP_F_IBX | IAP_F_HW | IAP_F_HWX),
1913 IAPDESCR(E7H_01H, 0xE7, 0x01, IAP_F_FM | IAP_F_CAS),
1915 IAPDESCR(E8H_01H, 0xE8, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
1916 IAPDESCR(E8H_02H, 0xE8, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
1917 IAPDESCR(E8H_03H, 0xE8, 0x03, IAP_F_FM | IAP_F_I7O),
1919 IAPDESCR(ECH_01H, 0xEC, 0x01, IAP_F_FM | IAP_F_WM),
1921 IAPDESCR(F0H_00H, 0xF0, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2),
1922 IAPDESCR(F0H_01H, 0xF0, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1923 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1924 IAP_F_BW | IAP_F_BWX),
1925 IAPDESCR(F0H_02H, 0xF0, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1926 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1927 IAP_F_BW | IAP_F_BWX),
1928 IAPDESCR(F0H_04H, 0xF0, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1929 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1930 IAP_F_BW | IAP_F_BWX),
1931 IAPDESCR(F0H_08H, 0xF0, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1932 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1933 IAP_F_BW | IAP_F_BWX),
1934 IAPDESCR(F0H_10H, 0xF0, 0x10, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1935 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1936 IAP_F_BW | IAP_F_BWX),
1937 IAPDESCR(F0H_20H, 0xF0, 0x20, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1938 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1939 IAP_F_BW | IAP_F_BWX),
1940 IAPDESCR(F0H_40H, 0xF0, 0x40, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1941 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1942 IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX),
1943 IAPDESCR(F0H_80H, 0xF0, 0x80, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1944 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1945 IAP_F_BW | IAP_F_BWX),
1947 IAPDESCR(F1H_01H, 0xF1, 0x01, IAP_F_FM | IAP_F_SB | IAP_F_IB |
1948 IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | IAP_F_BWX),
1949 IAPDESCR(F1H_02H, 0xF1, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1950 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1951 IAP_F_BW | IAP_F_BWX),
1952 IAPDESCR(F1H_04H, 0xF1, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1953 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1954 IAP_F_BW | IAP_F_BWX ),
1955 IAPDESCR(F1H_07H, 0xF1, 0x07, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1956 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX |
1957 IAP_F_BW | IAP_F_BWX | IAP_F_SL),
1958 IAPDESCR(F1H_1FH, 0xF1, 0x1f, IAP_F_FM | IAP_F_SLX),
1960 IAPDESCR(F2H_01H, 0xF2, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1961 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_SLX),
1962 IAPDESCR(F2H_02H, 0xF2, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1963 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_SLX),
1964 IAPDESCR(F2H_04H, 0xF2, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1965 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_SLX),
1966 IAPDESCR(F2H_05H, 0xF2, 0x05, IAP_F_FM | IAP_F_HW | IAP_F_HWX | IAP_F_BW |
1968 IAPDESCR(F2H_06H, 0xF2, 0x06, IAP_F_FM | IAP_F_HW | IAP_F_HWX),
1969 IAPDESCR(F2H_08H, 0xF2, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1970 IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX),
1971 IAPDESCR(F2H_0AH, 0xF2, 0x0A, IAP_F_FM | IAP_F_SB | IAP_F_SBX |
1973 IAPDESCR(F2H_0FH, 0xF2, 0x0F, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
1975 IAPDESCR(F3H_01H, 0xF3, 0x01, IAP_F_FM | IAP_F_I7O),
1976 IAPDESCR(F3H_02H, 0xF3, 0x02, IAP_F_FM | IAP_F_I7O),
1977 IAPDESCR(F3H_04H, 0xF3, 0x04, IAP_F_FM | IAP_F_I7O),
1978 IAPDESCR(F3H_08H, 0xF3, 0x08, IAP_F_FM | IAP_F_I7O),
1979 IAPDESCR(F3H_10H, 0xF3, 0x10, IAP_F_FM | IAP_F_I7O),
1980 IAPDESCR(F3H_20H, 0xF3, 0x20, IAP_F_FM | IAP_F_I7O),
1982 IAPDESCR(F4H_01H, 0xF4, 0x01, IAP_F_FM | IAP_F_I7O),
1983 IAPDESCR(F4H_02H, 0xF4, 0x02, IAP_F_FM | IAP_F_I7O),
1984 IAPDESCR(F4H_04H, 0xF4, 0x04, IAP_F_FM | IAP_F_WM | IAP_F_I7O),
1985 IAPDESCR(F4H_08H, 0xF4, 0x08, IAP_F_FM | IAP_F_I7O),
1986 IAPDESCR(F4H_10H, 0xF4, 0x10, IAP_F_FM | IAP_F_I7 | IAP_F_WM |
1987 IAP_F_SB | IAP_F_SBX | IAP_F_SLX),
1989 IAPDESCR(F6H_01H, 0xF6, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
1991 IAPDESCR(F7H_01H, 0xF7, 0x01, IAP_F_FM | IAP_F_WM | IAP_F_I7),
1992 IAPDESCR(F7H_02H, 0xF7, 0x02, IAP_F_FM | IAP_F_WM | IAP_F_I7),
1993 IAPDESCR(F7H_04H, 0xF7, 0x04, IAP_F_FM | IAP_F_WM | IAP_F_I7),
1995 IAPDESCR(F8H_00H, 0xF8, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2),
1996 IAPDESCR(F8H_01H, 0xF8, 0x01, IAP_F_FM | IAP_F_I7O),
1998 IAPDESCR(FDH_01H, 0xFD, 0x01, IAP_F_FM | IAP_F_WM | IAP_F_I7),
1999 IAPDESCR(FDH_02H, 0xFD, 0x02, IAP_F_FM | IAP_F_WM | IAP_F_I7),
2000 IAPDESCR(FDH_04H, 0xFD, 0x04, IAP_F_FM | IAP_F_WM | IAP_F_I7),
2001 IAPDESCR(FDH_08H, 0xFD, 0x08, IAP_F_FM | IAP_F_WM | IAP_F_I7),
2002 IAPDESCR(FDH_10H, 0xFD, 0x10, IAP_F_FM | IAP_F_WM | IAP_F_I7),
2003 IAPDESCR(FDH_20H, 0xFD, 0x20, IAP_F_FM | IAP_F_WM | IAP_F_I7),
2004 IAPDESCR(FDH_40H, 0xFD, 0x40, IAP_F_FM | IAP_F_WM | IAP_F_I7),
2006 IAPDESCR(FEH_02H, 0xfe, 0x02, IAP_F_FM | IAP_F_SLX),
2007 IAPDESCR(FEH_04H, 0xfe, 0x04, IAP_F_FM | IAP_F_SLX),
2011 iap_perfctr_value_to_reload_count(pmc_value_t v)
2014 /* If the PMC has overflowed, return a reload count of zero. */
2015 if ((v & (1ULL << (core_iap_width - 1))) == 0)
2017 v &= (1ULL << core_iap_width) - 1;
2018 return (1ULL << core_iap_width) - v;
2022 iap_reload_count_to_perfctr_value(pmc_value_t rlc)
2024 return (1ULL << core_iap_width) - rlc;
2028 iap_pmc_has_overflowed(int ri)
2033 * We treat a Core (i.e., Intel architecture v1) PMC as has
2034 * having overflowed if its MSB is zero.
2037 return ((v & (1ULL << (core_iap_width - 1))) == 0);
2041 * Check an event against the set of supported architectural events.
2043 * If the event is not architectural EV_IS_NOTARCH is returned.
2044 * If the event is architectural and supported on this CPU, the correct
2045 * event+umask mapping is returned in map, and EV_IS_ARCH_SUPP is returned.
2046 * Otherwise, the function returns EV_IS_ARCH_NOTSUPP.
2050 iap_is_event_architectural(enum pmc_event pe, enum pmc_event *map)
2052 enum core_arch_events ae;
2055 case PMC_EV_IAP_ARCH_UNH_COR_CYC:
2056 ae = CORE_AE_UNHALTED_CORE_CYCLES;
2057 *map = PMC_EV_IAP_EVENT_3CH_00H;
2059 case PMC_EV_IAP_ARCH_INS_RET:
2060 ae = CORE_AE_INSTRUCTION_RETIRED;
2061 *map = PMC_EV_IAP_EVENT_C0H_00H;
2063 case PMC_EV_IAP_ARCH_UNH_REF_CYC:
2064 ae = CORE_AE_UNHALTED_REFERENCE_CYCLES;
2065 *map = PMC_EV_IAP_EVENT_3CH_01H;
2067 case PMC_EV_IAP_ARCH_LLC_REF:
2068 ae = CORE_AE_LLC_REFERENCE;
2069 *map = PMC_EV_IAP_EVENT_2EH_4FH;
2071 case PMC_EV_IAP_ARCH_LLC_MIS:
2072 ae = CORE_AE_LLC_MISSES;
2073 *map = PMC_EV_IAP_EVENT_2EH_41H;
2075 case PMC_EV_IAP_ARCH_BR_INS_RET:
2076 ae = CORE_AE_BRANCH_INSTRUCTION_RETIRED;
2077 *map = PMC_EV_IAP_EVENT_C4H_00H;
2079 case PMC_EV_IAP_ARCH_BR_MIS_RET:
2080 ae = CORE_AE_BRANCH_MISSES_RETIRED;
2081 *map = PMC_EV_IAP_EVENT_C5H_00H;
2084 default: /* Non architectural event. */
2085 return (EV_IS_NOTARCH);
2088 return (((core_architectural_events & (1 << ae)) == 0) ?
2089 EV_IS_ARCH_NOTSUPP : EV_IS_ARCH_SUPP);
2093 iap_event_corei7_ok_on_counter(enum pmc_event pe, int ri)
2099 * Events valid only on counter 0, 1.
2101 case PMC_EV_IAP_EVENT_40H_01H:
2102 case PMC_EV_IAP_EVENT_40H_02H:
2103 case PMC_EV_IAP_EVENT_40H_04H:
2104 case PMC_EV_IAP_EVENT_40H_08H:
2105 case PMC_EV_IAP_EVENT_40H_0FH:
2106 case PMC_EV_IAP_EVENT_41H_02H:
2107 case PMC_EV_IAP_EVENT_41H_04H:
2108 case PMC_EV_IAP_EVENT_41H_08H:
2109 case PMC_EV_IAP_EVENT_42H_01H:
2110 case PMC_EV_IAP_EVENT_42H_02H:
2111 case PMC_EV_IAP_EVENT_42H_04H:
2112 case PMC_EV_IAP_EVENT_42H_08H:
2113 case PMC_EV_IAP_EVENT_43H_01H:
2114 case PMC_EV_IAP_EVENT_43H_02H:
2115 case PMC_EV_IAP_EVENT_51H_01H:
2116 case PMC_EV_IAP_EVENT_51H_02H:
2117 case PMC_EV_IAP_EVENT_51H_04H:
2118 case PMC_EV_IAP_EVENT_51H_08H:
2119 case PMC_EV_IAP_EVENT_63H_01H:
2120 case PMC_EV_IAP_EVENT_63H_02H:
2125 mask = ~0; /* Any row index is ok. */
2128 return (mask & (1 << ri));
2132 iap_event_westmere_ok_on_counter(enum pmc_event pe, int ri)
2138 * Events valid only on counter 0.
2140 case PMC_EV_IAP_EVENT_60H_01H:
2141 case PMC_EV_IAP_EVENT_60H_02H:
2142 case PMC_EV_IAP_EVENT_60H_04H:
2143 case PMC_EV_IAP_EVENT_60H_08H:
2144 case PMC_EV_IAP_EVENT_B3H_01H:
2145 case PMC_EV_IAP_EVENT_B3H_02H:
2146 case PMC_EV_IAP_EVENT_B3H_04H:
2151 * Events valid only on counter 0, 1.
2153 case PMC_EV_IAP_EVENT_4CH_01H:
2154 case PMC_EV_IAP_EVENT_4EH_01H:
2155 case PMC_EV_IAP_EVENT_4EH_02H:
2156 case PMC_EV_IAP_EVENT_4EH_04H:
2157 case PMC_EV_IAP_EVENT_51H_01H:
2158 case PMC_EV_IAP_EVENT_51H_02H:
2159 case PMC_EV_IAP_EVENT_51H_04H:
2160 case PMC_EV_IAP_EVENT_51H_08H:
2161 case PMC_EV_IAP_EVENT_63H_01H:
2162 case PMC_EV_IAP_EVENT_63H_02H:
2167 mask = ~0; /* Any row index is ok. */
2170 return (mask & (1 << ri));
2174 iap_event_sb_sbx_ib_ibx_ok_on_counter(enum pmc_event pe, int ri)
2179 /* Events valid only on counter 0. */
2180 case PMC_EV_IAP_EVENT_B7H_01H:
2183 /* Events valid only on counter 1. */
2184 case PMC_EV_IAP_EVENT_C0H_01H:
2187 /* Events valid only on counter 2. */
2188 case PMC_EV_IAP_EVENT_48H_01H:
2189 case PMC_EV_IAP_EVENT_A2H_02H:
2190 case PMC_EV_IAP_EVENT_A3H_08H:
2193 /* Events valid only on counter 3. */
2194 case PMC_EV_IAP_EVENT_BBH_01H:
2195 case PMC_EV_IAP_EVENT_CDH_01H:
2196 case PMC_EV_IAP_EVENT_CDH_02H:
2200 mask = ~0; /* Any row index is ok. */
2203 return (mask & (1 << ri));
2207 iap_event_ok_on_counter(enum pmc_event pe, int ri)
2213 * Events valid only on counter 0.
2215 case PMC_EV_IAP_EVENT_10H_00H:
2216 case PMC_EV_IAP_EVENT_14H_00H:
2217 case PMC_EV_IAP_EVENT_18H_00H:
2218 case PMC_EV_IAP_EVENT_B3H_01H:
2219 case PMC_EV_IAP_EVENT_B3H_02H:
2220 case PMC_EV_IAP_EVENT_B3H_04H:
2221 case PMC_EV_IAP_EVENT_C1H_00H:
2222 case PMC_EV_IAP_EVENT_CBH_01H:
2223 case PMC_EV_IAP_EVENT_CBH_02H:
2228 * Events valid only on counter 1.
2230 case PMC_EV_IAP_EVENT_11H_00H:
2231 case PMC_EV_IAP_EVENT_12H_00H:
2232 case PMC_EV_IAP_EVENT_13H_00H:
2237 mask = ~0; /* Any row index is ok. */
2240 return (mask & (1 << ri));
2244 iap_allocate_pmc(int cpu, int ri, struct pmc *pm,
2245 const struct pmc_op_pmcallocate *a)
2248 enum pmc_event ev, map;
2249 struct iap_event_descr *ie;
2250 uint32_t c, caps, config, cpuflag, evsel, mask;
2252 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
2253 ("[core,%d] illegal CPU %d", __LINE__, cpu));
2254 KASSERT(ri >= 0 && ri < core_iap_npmc,
2255 ("[core,%d] illegal row-index value %d", __LINE__, ri));
2257 /* check requested capabilities */
2259 if ((IAP_PMC_CAPS & caps) != caps)
2261 map = 0; /* XXX: silent GCC warning */
2262 arch = iap_is_event_architectural(pm->pm_event, &map);
2263 if (arch == EV_IS_ARCH_NOTSUPP)
2264 return (EOPNOTSUPP);
2265 else if (arch == EV_IS_ARCH_SUPP)
2271 * A small number of events are not supported in all the
2272 * processors based on a given microarchitecture.
2274 if (ev == PMC_EV_IAP_EVENT_0FH_01H || ev == PMC_EV_IAP_EVENT_0FH_80H) {
2275 model = ((cpu_id & 0xF0000) >> 12) | ((cpu_id & 0xF0) >> 4);
2276 if (core_cputype == PMC_CPU_INTEL_COREI7 && model != 0x2E)
2280 switch (core_cputype) {
2281 case PMC_CPU_INTEL_COREI7:
2282 case PMC_CPU_INTEL_NEHALEM_EX:
2283 if (iap_event_corei7_ok_on_counter(ev, ri) == 0)
2286 case PMC_CPU_INTEL_SKYLAKE:
2287 case PMC_CPU_INTEL_SKYLAKE_XEON:
2288 case PMC_CPU_INTEL_BROADWELL:
2289 case PMC_CPU_INTEL_BROADWELL_XEON:
2290 case PMC_CPU_INTEL_SANDYBRIDGE:
2291 case PMC_CPU_INTEL_SANDYBRIDGE_XEON:
2292 case PMC_CPU_INTEL_IVYBRIDGE:
2293 case PMC_CPU_INTEL_IVYBRIDGE_XEON:
2294 case PMC_CPU_INTEL_HASWELL:
2295 case PMC_CPU_INTEL_HASWELL_XEON:
2296 if (iap_event_sb_sbx_ib_ibx_ok_on_counter(ev, ri) == 0)
2299 case PMC_CPU_INTEL_WESTMERE:
2300 case PMC_CPU_INTEL_WESTMERE_EX:
2301 if (iap_event_westmere_ok_on_counter(ev, ri) == 0)
2305 if (iap_event_ok_on_counter(ev, ri) == 0)
2310 * Look for an event descriptor with matching CPU and event id
2314 switch (core_cputype) {
2316 case PMC_CPU_INTEL_ATOM:
2319 case PMC_CPU_INTEL_ATOM_SILVERMONT:
2320 cpuflag = IAP_F_CAS;
2322 case PMC_CPU_INTEL_SKYLAKE_XEON:
2323 cpuflag = IAP_F_SLX;
2325 case PMC_CPU_INTEL_SKYLAKE:
2328 case PMC_CPU_INTEL_BROADWELL_XEON:
2329 cpuflag = IAP_F_BWX;
2331 case PMC_CPU_INTEL_BROADWELL:
2334 case PMC_CPU_INTEL_CORE:
2337 case PMC_CPU_INTEL_CORE2:
2338 cpuflag = IAP_F_CC2;
2340 case PMC_CPU_INTEL_CORE2EXTREME:
2341 cpuflag = IAP_F_CC2 | IAP_F_CC2E;
2343 case PMC_CPU_INTEL_COREI7:
2346 case PMC_CPU_INTEL_HASWELL:
2349 case PMC_CPU_INTEL_HASWELL_XEON:
2350 cpuflag = IAP_F_HWX;
2352 case PMC_CPU_INTEL_IVYBRIDGE:
2355 case PMC_CPU_INTEL_IVYBRIDGE_XEON:
2356 cpuflag = IAP_F_IBX;
2358 case PMC_CPU_INTEL_SANDYBRIDGE:
2361 case PMC_CPU_INTEL_SANDYBRIDGE_XEON:
2362 cpuflag = IAP_F_SBX;
2364 case PMC_CPU_INTEL_WESTMERE:
2369 for (n = 0, ie = iap_events; n < nitems(iap_events); n++, ie++)
2370 if (ie->iap_ev == ev && ie->iap_flags & cpuflag)
2373 if (n == nitems(iap_events))
2377 * A matching event descriptor has been found, so start
2378 * assembling the contents of the event select register.
2380 evsel = ie->iap_evcode;
2382 config = a->pm_md.pm_iap.pm_iap_config & ~IAP_F_CMASK;
2385 * If the event uses a fixed umask value, reject any umask
2386 * bits set by the user.
2388 if (ie->iap_flags & IAP_F_FM) {
2390 if (IAP_UMASK(config) != 0)
2393 evsel |= (ie->iap_umask << 8);
2398 * Otherwise, the UMASK value needs to be taken from
2399 * the MD fields of the allocation request. Reject
2400 * requests that specify reserved bits.
2405 if (ie->iap_umask & IAP_M_CORE) {
2406 if ((c = (config & IAP_F_CORE)) != IAP_CORE_ALL &&
2412 if (ie->iap_umask & IAP_M_AGENT)
2413 mask |= IAP_F_AGENT;
2415 if (ie->iap_umask & IAP_M_PREFETCH) {
2417 if ((c = (config & IAP_F_PREFETCH)) ==
2418 IAP_PREFETCH_RESERVED)
2421 mask |= IAP_F_PREFETCH;
2424 if (ie->iap_umask & IAP_M_MESI)
2427 if (ie->iap_umask & IAP_M_SNOOPRESPONSE)
2428 mask |= IAP_F_SNOOPRESPONSE;
2430 if (ie->iap_umask & IAP_M_SNOOPTYPE)
2431 mask |= IAP_F_SNOOPTYPE;
2433 if (ie->iap_umask & IAP_M_TRANSITION)
2434 mask |= IAP_F_TRANSITION;
2437 * If bits outside of the allowed set of umask bits
2438 * are set, reject the request.
2443 evsel |= (config & mask);
2448 * Only Atom and SandyBridge CPUs support the 'ANY' qualifier.
2450 if (core_cputype == PMC_CPU_INTEL_ATOM ||
2451 core_cputype == PMC_CPU_INTEL_ATOM_SILVERMONT ||
2452 core_cputype == PMC_CPU_INTEL_SANDYBRIDGE ||
2453 core_cputype == PMC_CPU_INTEL_SANDYBRIDGE_XEON)
2454 evsel |= (config & IAP_ANY);
2455 else if (config & IAP_ANY)
2459 * Check offcore response configuration.
2461 if (a->pm_md.pm_iap.pm_iap_rsp != 0) {
2462 if (ev != PMC_EV_IAP_EVENT_B7H_01H &&
2463 ev != PMC_EV_IAP_EVENT_BBH_01H)
2465 if (core_cputype == PMC_CPU_INTEL_COREI7 &&
2466 ev == PMC_EV_IAP_EVENT_BBH_01H)
2468 if ((core_cputype == PMC_CPU_INTEL_COREI7 ||
2469 core_cputype == PMC_CPU_INTEL_WESTMERE ||
2470 core_cputype == PMC_CPU_INTEL_NEHALEM_EX ||
2471 core_cputype == PMC_CPU_INTEL_WESTMERE_EX) &&
2472 a->pm_md.pm_iap.pm_iap_rsp & ~IA_OFFCORE_RSP_MASK_I7WM)
2474 else if ((core_cputype == PMC_CPU_INTEL_SANDYBRIDGE ||
2475 core_cputype == PMC_CPU_INTEL_SANDYBRIDGE_XEON ||
2476 core_cputype == PMC_CPU_INTEL_IVYBRIDGE ||
2477 core_cputype == PMC_CPU_INTEL_IVYBRIDGE_XEON) &&
2478 a->pm_md.pm_iap.pm_iap_rsp & ~IA_OFFCORE_RSP_MASK_SBIB)
2480 pm->pm_md.pm_iap.pm_iap_rsp = a->pm_md.pm_iap.pm_iap_rsp;
2483 if (caps & PMC_CAP_THRESHOLD)
2484 evsel |= (a->pm_md.pm_iap.pm_iap_config & IAP_F_CMASK);
2485 if (caps & PMC_CAP_USER)
2487 if (caps & PMC_CAP_SYSTEM)
2489 if ((caps & (PMC_CAP_USER | PMC_CAP_SYSTEM)) == 0)
2490 evsel |= (IAP_OS | IAP_USR);
2491 if (caps & PMC_CAP_EDGE)
2493 if (caps & PMC_CAP_INVERT)
2495 if (caps & PMC_CAP_INTERRUPT)
2498 pm->pm_md.pm_iap.pm_iap_evsel = evsel;
2504 iap_config_pmc(int cpu, int ri, struct pmc *pm)
2506 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
2507 ("[core,%d] illegal CPU %d", __LINE__, cpu));
2509 KASSERT(ri >= 0 && ri < core_iap_npmc,
2510 ("[core,%d] illegal row-index %d", __LINE__, ri));
2512 PMCDBG3(MDP,CFG,1, "iap-config cpu=%d ri=%d pm=%p", cpu, ri, pm);
2514 KASSERT(core_pcpu[cpu] != NULL, ("[core,%d] null per-cpu %d", __LINE__,
2517 core_pcpu[cpu]->pc_corepmcs[ri].phw_pmc = pm;
2523 iap_describe(int cpu, int ri, struct pmc_info *pi, struct pmc **ppmc)
2527 char iap_name[PMC_NAME_MAX];
2529 phw = &core_pcpu[cpu]->pc_corepmcs[ri];
2531 (void) snprintf(iap_name, sizeof(iap_name), "IAP-%d", ri);
2532 if ((error = copystr(iap_name, pi->pm_name, PMC_NAME_MAX,
2536 pi->pm_class = PMC_CLASS_IAP;
2538 if (phw->phw_state & PMC_PHW_FLAG_IS_ENABLED) {
2539 pi->pm_enabled = TRUE;
2540 *ppmc = phw->phw_pmc;
2542 pi->pm_enabled = FALSE;
2550 iap_get_config(int cpu, int ri, struct pmc **ppm)
2552 *ppm = core_pcpu[cpu]->pc_corepmcs[ri].phw_pmc;
2558 iap_get_msr(int ri, uint32_t *msr)
2560 KASSERT(ri >= 0 && ri < core_iap_npmc,
2561 ("[iap,%d] ri %d out of range", __LINE__, ri));
2569 iap_read_pmc(int cpu, int ri, pmc_value_t *v)
2574 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
2575 ("[core,%d] illegal cpu value %d", __LINE__, cpu));
2576 KASSERT(ri >= 0 && ri < core_iap_npmc,
2577 ("[core,%d] illegal row-index %d", __LINE__, ri));
2579 pm = core_pcpu[cpu]->pc_corepmcs[ri].phw_pmc;
2582 ("[core,%d] cpu %d ri %d pmc not configured", __LINE__, cpu,
2586 if (PMC_IS_SAMPLING_MODE(PMC_TO_MODE(pm)))
2587 *v = iap_perfctr_value_to_reload_count(tmp);
2589 *v = tmp & ((1ULL << core_iap_width) - 1);
2591 PMCDBG4(MDP,REA,1, "iap-read cpu=%d ri=%d msr=0x%x -> v=%jx", cpu, ri,
2598 iap_release_pmc(int cpu, int ri, struct pmc *pm)
2602 PMCDBG3(MDP,REL,1, "iap-release cpu=%d ri=%d pm=%p", cpu, ri,
2605 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
2606 ("[core,%d] illegal CPU value %d", __LINE__, cpu));
2607 KASSERT(ri >= 0 && ri < core_iap_npmc,
2608 ("[core,%d] illegal row-index %d", __LINE__, ri));
2610 KASSERT(core_pcpu[cpu]->pc_corepmcs[ri].phw_pmc
2611 == NULL, ("[core,%d] PHW pmc non-NULL", __LINE__));
2617 iap_start_pmc(int cpu, int ri)
2621 struct core_cpu *cc;
2623 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
2624 ("[core,%d] illegal CPU value %d", __LINE__, cpu));
2625 KASSERT(ri >= 0 && ri < core_iap_npmc,
2626 ("[core,%d] illegal row-index %d", __LINE__, ri));
2628 cc = core_pcpu[cpu];
2629 pm = cc->pc_corepmcs[ri].phw_pmc;
2632 ("[core,%d] starting cpu%d,ri%d with no pmc configured",
2633 __LINE__, cpu, ri));
2635 PMCDBG2(MDP,STA,1, "iap-start cpu=%d ri=%d", cpu, ri);
2637 evsel = pm->pm_md.pm_iap.pm_iap_evsel;
2639 PMCDBG4(MDP,STA,2, "iap-start/2 cpu=%d ri=%d evselmsr=0x%x evsel=0x%x",
2640 cpu, ri, IAP_EVSEL0 + ri, evsel);
2642 /* Event specific configuration. */
2643 switch (pm->pm_event) {
2644 case PMC_EV_IAP_EVENT_B7H_01H:
2645 wrmsr(IA_OFFCORE_RSP0, pm->pm_md.pm_iap.pm_iap_rsp);
2647 case PMC_EV_IAP_EVENT_BBH_01H:
2648 wrmsr(IA_OFFCORE_RSP1, pm->pm_md.pm_iap.pm_iap_rsp);
2654 wrmsr(IAP_EVSEL0 + ri, evsel | IAP_EN);
2656 if (core_cputype == PMC_CPU_INTEL_CORE)
2661 cc->pc_globalctrl |= (1ULL << ri);
2662 wrmsr(IA_GLOBAL_CTRL, cc->pc_globalctrl);
2663 } while (cc->pc_resync != 0);
2669 iap_stop_pmc(int cpu, int ri)
2672 struct core_cpu *cc;
2675 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
2676 ("[core,%d] illegal cpu value %d", __LINE__, cpu));
2677 KASSERT(ri >= 0 && ri < core_iap_npmc,
2678 ("[core,%d] illegal row index %d", __LINE__, ri));
2680 cc = core_pcpu[cpu];
2681 pm = cc->pc_corepmcs[ri].phw_pmc;
2684 ("[core,%d] cpu%d ri%d no configured PMC to stop", __LINE__,
2687 PMCDBG2(MDP,STO,1, "iap-stop cpu=%d ri=%d", cpu, ri);
2689 msr = rdmsr(IAP_EVSEL0 + ri) & ~IAP_EVSEL_MASK;
2690 wrmsr(IAP_EVSEL0 + ri, msr); /* stop hw */
2692 if (core_cputype == PMC_CPU_INTEL_CORE)
2698 cc->pc_globalctrl &= ~(1ULL << ri);
2699 msr = rdmsr(IA_GLOBAL_CTRL) & ~IA_GLOBAL_CTRL_MASK;
2700 wrmsr(IA_GLOBAL_CTRL, cc->pc_globalctrl);
2701 } while (cc->pc_resync != 0);
2707 iap_write_pmc(int cpu, int ri, pmc_value_t v)
2710 struct core_cpu *cc;
2712 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
2713 ("[core,%d] illegal cpu value %d", __LINE__, cpu));
2714 KASSERT(ri >= 0 && ri < core_iap_npmc,
2715 ("[core,%d] illegal row index %d", __LINE__, ri));
2717 cc = core_pcpu[cpu];
2718 pm = cc->pc_corepmcs[ri].phw_pmc;
2721 ("[core,%d] cpu%d ri%d no configured PMC to stop", __LINE__,
2724 if (PMC_IS_SAMPLING_MODE(PMC_TO_MODE(pm)))
2725 v = iap_reload_count_to_perfctr_value(v);
2727 v &= (1ULL << core_iap_width) - 1;
2729 PMCDBG4(MDP,WRI,1, "iap-write cpu=%d ri=%d msr=0x%x v=%jx", cpu, ri,
2733 * Write the new value to the counter (or it's alias). The
2734 * counter will be in a stopped state when the pcd_write()
2735 * entry point is called.
2737 wrmsr(core_iap_wroffset + IAP_PMC0 + ri, v);
2743 iap_initialize(struct pmc_mdep *md, int maxcpu, int npmc, int pmcwidth,
2746 struct pmc_classdep *pcd;
2748 KASSERT(md != NULL, ("[iap,%d] md is NULL", __LINE__));
2750 PMCDBG0(MDP,INI,1, "iap-initialize");
2752 /* Remember the set of architectural events supported. */
2753 core_architectural_events = ~flags;
2755 pcd = &md->pmd_classdep[PMC_MDEP_CLASS_INDEX_IAP];
2757 pcd->pcd_caps = IAP_PMC_CAPS;
2758 pcd->pcd_class = PMC_CLASS_IAP;
2759 pcd->pcd_num = npmc;
2760 pcd->pcd_ri = md->pmd_npmc;
2761 pcd->pcd_width = pmcwidth;
2763 pcd->pcd_allocate_pmc = iap_allocate_pmc;
2764 pcd->pcd_config_pmc = iap_config_pmc;
2765 pcd->pcd_describe = iap_describe;
2766 pcd->pcd_get_config = iap_get_config;
2767 pcd->pcd_get_msr = iap_get_msr;
2768 pcd->pcd_pcpu_fini = core_pcpu_fini;
2769 pcd->pcd_pcpu_init = core_pcpu_init;
2770 pcd->pcd_read_pmc = iap_read_pmc;
2771 pcd->pcd_release_pmc = iap_release_pmc;
2772 pcd->pcd_start_pmc = iap_start_pmc;
2773 pcd->pcd_stop_pmc = iap_stop_pmc;
2774 pcd->pcd_write_pmc = iap_write_pmc;
2776 md->pmd_npmc += npmc;
2780 core_intr(int cpu, struct trapframe *tf)
2784 struct core_cpu *cc;
2785 int error, found_interrupt, ri;
2788 PMCDBG3(MDP,INT, 1, "cpu=%d tf=0x%p um=%d", cpu, (void *) tf,
2789 TRAPF_USERMODE(tf));
2791 found_interrupt = 0;
2792 cc = core_pcpu[cpu];
2794 for (ri = 0; ri < core_iap_npmc; ri++) {
2796 if ((pm = cc->pc_corepmcs[ri].phw_pmc) == NULL ||
2797 !PMC_IS_SAMPLING_MODE(PMC_TO_MODE(pm)))
2800 if (!iap_pmc_has_overflowed(ri))
2803 found_interrupt = 1;
2805 if (pm->pm_state != PMC_STATE_RUNNING)
2808 error = pmc_process_interrupt(cpu, PMC_HR, pm, tf,
2809 TRAPF_USERMODE(tf));
2811 v = pm->pm_sc.pm_reloadcount;
2812 v = iap_reload_count_to_perfctr_value(v);
2815 * Stop the counter, reload it but only restart it if
2816 * the PMC is not stalled.
2818 msr = rdmsr(IAP_EVSEL0 + ri) & ~IAP_EVSEL_MASK;
2819 wrmsr(IAP_EVSEL0 + ri, msr);
2820 wrmsr(core_iap_wroffset + IAP_PMC0 + ri, v);
2825 wrmsr(IAP_EVSEL0 + ri, msr | (pm->pm_md.pm_iap.pm_iap_evsel |
2829 if (found_interrupt)
2830 lapic_reenable_pmc();
2832 atomic_add_int(found_interrupt ? &pmc_stats.pm_intr_processed :
2833 &pmc_stats.pm_intr_ignored, 1);
2835 return (found_interrupt);
2839 core2_intr(int cpu, struct trapframe *tf)
2841 int error, found_interrupt, n;
2842 uint64_t flag, intrstatus, intrenable, msr;
2844 struct core_cpu *cc;
2847 PMCDBG3(MDP,INT, 1, "cpu=%d tf=0x%p um=%d", cpu, (void *) tf,
2848 TRAPF_USERMODE(tf));
2851 * The IA_GLOBAL_STATUS (MSR 0x38E) register indicates which
2852 * PMCs have a pending PMI interrupt. We take a 'snapshot' of
2853 * the current set of interrupting PMCs and process these
2854 * after stopping them.
2856 intrstatus = rdmsr(IA_GLOBAL_STATUS);
2857 intrenable = intrstatus & core_pmcmask;
2859 PMCDBG2(MDP,INT, 1, "cpu=%d intrstatus=%jx", cpu,
2860 (uintmax_t) intrstatus);
2862 found_interrupt = 0;
2863 cc = core_pcpu[cpu];
2865 KASSERT(cc != NULL, ("[core,%d] null pcpu", __LINE__));
2867 cc->pc_globalctrl &= ~intrenable;
2868 cc->pc_resync = 1; /* MSRs now potentially out of sync. */
2871 * Stop PMCs and clear overflow status bits.
2873 msr = rdmsr(IA_GLOBAL_CTRL) & ~IA_GLOBAL_CTRL_MASK;
2874 wrmsr(IA_GLOBAL_CTRL, msr);
2875 wrmsr(IA_GLOBAL_OVF_CTRL, intrenable |
2876 IA_GLOBAL_STATUS_FLAG_OVFBUF |
2877 IA_GLOBAL_STATUS_FLAG_CONDCHG);
2880 * Look for interrupts from fixed function PMCs.
2882 for (n = 0, flag = (1ULL << IAF_OFFSET); n < core_iaf_npmc;
2885 if ((intrstatus & flag) == 0)
2888 found_interrupt = 1;
2890 pm = cc->pc_corepmcs[n + core_iaf_ri].phw_pmc;
2891 if (pm == NULL || pm->pm_state != PMC_STATE_RUNNING ||
2892 !PMC_IS_SAMPLING_MODE(PMC_TO_MODE(pm)))
2895 error = pmc_process_interrupt(cpu, PMC_HR, pm, tf,
2896 TRAPF_USERMODE(tf));
2898 intrenable &= ~flag;
2900 v = iaf_reload_count_to_perfctr_value(pm->pm_sc.pm_reloadcount);
2902 /* Reload sampling count. */
2903 wrmsr(IAF_CTR0 + n, v);
2905 PMCDBG4(MDP,INT, 1, "iaf-intr cpu=%d error=%d v=%jx(%jx)", cpu,
2906 error, (uintmax_t) v, (uintmax_t) rdpmc(IAF_RI_TO_MSR(n)));
2910 * Process interrupts from the programmable counters.
2912 for (n = 0, flag = 1; n < core_iap_npmc; n++, flag <<= 1) {
2913 if ((intrstatus & flag) == 0)
2916 found_interrupt = 1;
2918 pm = cc->pc_corepmcs[n].phw_pmc;
2919 if (pm == NULL || pm->pm_state != PMC_STATE_RUNNING ||
2920 !PMC_IS_SAMPLING_MODE(PMC_TO_MODE(pm)))
2923 error = pmc_process_interrupt(cpu, PMC_HR, pm, tf,
2924 TRAPF_USERMODE(tf));
2926 intrenable &= ~flag;
2928 v = iap_reload_count_to_perfctr_value(pm->pm_sc.pm_reloadcount);
2930 PMCDBG3(MDP,INT, 1, "iap-intr cpu=%d error=%d v=%jx", cpu, error,
2933 /* Reload sampling count. */
2934 wrmsr(core_iap_wroffset + IAP_PMC0 + n, v);
2938 * Reenable all non-stalled PMCs.
2940 PMCDBG2(MDP,INT, 1, "cpu=%d intrenable=%jx", cpu,
2941 (uintmax_t) intrenable);
2943 cc->pc_globalctrl |= intrenable;
2945 wrmsr(IA_GLOBAL_CTRL, cc->pc_globalctrl & IA_GLOBAL_CTRL_MASK);
2947 PMCDBG5(MDP,INT, 1, "cpu=%d fixedctrl=%jx globalctrl=%jx status=%jx "
2948 "ovf=%jx", cpu, (uintmax_t) rdmsr(IAF_CTRL),
2949 (uintmax_t) rdmsr(IA_GLOBAL_CTRL),
2950 (uintmax_t) rdmsr(IA_GLOBAL_STATUS),
2951 (uintmax_t) rdmsr(IA_GLOBAL_OVF_CTRL));
2953 if (found_interrupt)
2954 lapic_reenable_pmc();
2956 atomic_add_int(found_interrupt ? &pmc_stats.pm_intr_processed :
2957 &pmc_stats.pm_intr_ignored, 1);
2959 return (found_interrupt);
2963 pmc_core_initialize(struct pmc_mdep *md, int maxcpu, int version_override)
2965 int cpuid[CORE_CPUID_REQUEST_SIZE];
2966 int ipa_version, flags, nflags;
2968 do_cpuid(CORE_CPUID_REQUEST, cpuid);
2970 ipa_version = (version_override > 0) ? version_override :
2971 cpuid[CORE_CPUID_EAX] & 0xFF;
2972 core_cputype = md->pmd_cputype;
2974 PMCDBG3(MDP,INI,1,"core-init cputype=%d ncpu=%d ipa-version=%d",
2975 core_cputype, maxcpu, ipa_version);
2977 if (ipa_version < 1 || ipa_version > 4 ||
2978 (core_cputype != PMC_CPU_INTEL_CORE && ipa_version == 1)) {
2979 /* Unknown PMC architecture. */
2980 printf("hwpc_core: unknown PMC architecture: %d\n",
2982 return (EPROGMISMATCH);
2985 core_iap_wroffset = 0;
2986 if (cpu_feature2 & CPUID2_PDCM) {
2987 if (rdmsr(IA32_PERF_CAPABILITIES) & PERFCAP_FW_WRITE) {
2988 PMCDBG0(MDP, INI, 1,
2989 "core-init full-width write supported");
2990 core_iap_wroffset = IAP_A_PMC0 - IAP_PMC0;
2992 PMCDBG0(MDP, INI, 1,
2993 "core-init full-width write NOT supported");
2995 PMCDBG0(MDP, INI, 1, "core-init pdcm not supported");
3000 * Initialize programmable counters.
3002 core_iap_npmc = (cpuid[CORE_CPUID_EAX] >> 8) & 0xFF;
3003 core_iap_width = (cpuid[CORE_CPUID_EAX] >> 16) & 0xFF;
3005 core_pmcmask |= ((1ULL << core_iap_npmc) - 1);
3007 nflags = (cpuid[CORE_CPUID_EAX] >> 24) & 0xFF;
3008 flags = cpuid[CORE_CPUID_EBX] & ((1 << nflags) - 1);
3010 iap_initialize(md, maxcpu, core_iap_npmc, core_iap_width, flags);
3013 * Initialize fixed function counters, if present.
3015 if (core_cputype != PMC_CPU_INTEL_CORE) {
3016 core_iaf_ri = core_iap_npmc;
3017 core_iaf_npmc = cpuid[CORE_CPUID_EDX] & 0x1F;
3018 core_iaf_width = (cpuid[CORE_CPUID_EDX] >> 5) & 0xFF;
3020 iaf_initialize(md, maxcpu, core_iaf_npmc, core_iaf_width);
3021 core_pmcmask |= ((1ULL << core_iaf_npmc) - 1) << IAF_OFFSET;
3024 PMCDBG2(MDP,INI,1,"core-init pmcmask=0x%jx iafri=%d", core_pmcmask,
3027 core_pcpu = malloc(sizeof(*core_pcpu) * maxcpu, M_PMC,
3031 * Choose the appropriate interrupt handler.
3033 if (ipa_version == 1)
3034 md->pmd_intr = core_intr;
3036 md->pmd_intr = core2_intr;
3038 md->pmd_pcpu_fini = NULL;
3039 md->pmd_pcpu_init = NULL;
3045 pmc_core_finalize(struct pmc_mdep *md)
3047 PMCDBG0(MDP,INI,1, "core-finalize");
3049 free(core_pcpu, M_PMC);