2 * Copyright (c) 2008 Joseph Koshy
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 #ifndef _DEV_HWPMC_CORE_H_
30 #define _DEV_HWPMC_CORE_H_ 1
32 #define IA32_PERF_CAPABILITIES 0x345
33 #define PERFCAP_LBR_FORMAT 0x003f
34 #define PERFCAP_PEBS_TRAP 0x0040
35 #define PERFCAP_PEBS_SAVEARCH 0x0080
36 #define PERFCAP_PEBS_RECFORMAT 0x0f00
37 #define PERFCAP_SMM_FREEZE 0x1000
38 #define PERFCAP_FW_WRITE 0x2000 /* full width write aliases */
41 * Fixed-function PMCs.
43 struct pmc_md_iaf_op_pmcallocate {
44 uint16_t pm_iaf_flags; /* additional flags */
55 struct pmc_md_iap_op_pmcallocate {
56 uint32_t pm_iap_config;
60 #define IAP_EVSEL(C) ((C) & 0xFF)
61 #define IAP_UMASK(C) ((C) & 0xFF00)
62 #define IAP_USR (1 << 16)
63 #define IAP_OS (1 << 17)
64 #define IAP_EDGE (1 << 18)
65 #define IAP_INT (1 << 20)
66 #define IAP_ANY (1 << 21)
67 #define IAP_EN (1 << 22)
68 #define IAP_INV (1 << 23)
69 #define IAP_CMASK(C) (((C) & 0xFF) << 24)
71 #define IA_OFFCORE_RSP_MASK_I7WM 0x000000F7FF
72 #define IA_OFFCORE_RSP_MASK_SBIB 0x3F807F8FFF
77 * Fixed-function counters.
82 #define IAF_COUNTER_MASK 0x0000ffffffffffff
83 #define IAF_CTR0 0x309
84 #define IAF_CTR1 0x30A
85 #define IAF_CTR2 0x30B
88 * The IAF_CTRL MSR is laid out in the following way.
91 * 63 - 12 Reserved (do not touch)
93 * 10 Reserved (do not touch)
96 * 6 Reserved (do not touch)
99 * 2 Reserved (do not touch)
100 * 1-0 Ctr 0 Enable (3: All Levels, 2: User, 1: OS, 0: Disable)
103 #define IAF_OFFSET 32
104 #define IAF_CTRL 0x38D
105 #define IAF_CTRL_MASK 0x0000000000000bbb
108 * Programmable counters.
111 #define IAP_PMC0 0x0C1
112 #define IAP_A_PMC0 0x4C1
115 * IAP_EVSEL(n) is laid out in the following way.
118 * 63-31 Reserved (do not touch)
122 * 21 Reserved (do not touch)
123 * 20 APIC Interrupt Enable
132 #define IAP_EVSEL_MASK 0x00000000ffdfffff
133 #define IAP_EVSEL0 0x186
136 * Simplified programming interface in Intel Performance Architecture
140 #define IA_GLOBAL_STATUS 0x38E
141 #define IA_GLOBAL_CTRL 0x38F
144 * IA_GLOBAL_CTRL is laid out in the following way.
147 * 63-35 Reserved (do not touch)
148 * 34 IAF Counter 2 Enable
149 * 33 IAF Counter 1 Enable
150 * 32 IAF Counter 0 Enable
151 * 31-0 Depends on programmable counters
154 /* The mask is only for the fixed porttion of the register. */
155 #define IAF_GLOBAL_CTRL_MASK 0x0000000700000000
157 /* The mask is only for the programmable porttion of the register. */
158 #define IAP_GLOBAL_CTRL_MASK 0x00000000ffffffff
160 /* The mask is for both the fixed and programmable porttions of the register. */
161 #define IA_GLOBAL_CTRL_MASK 0x00000007ffffffff
163 #define IA_GLOBAL_OVF_CTRL 0x390
165 #define IA_GLOBAL_STATUS_FLAG_CONDCHG (1ULL << 63)
166 #define IA_GLOBAL_STATUS_FLAG_OVFBUF (1ULL << 62)
169 * Offcore response configuration.
171 #define IA_OFFCORE_RSP0 0x1A6
172 #define IA_OFFCORE_RSP1 0x1A7
174 struct pmc_md_iaf_pmc {
175 uint64_t pm_iaf_ctrl;
178 struct pmc_md_iap_pmc {
179 uint32_t pm_iap_evsel;
187 int pmc_core_initialize(struct pmc_mdep *_md, int _maxcpu,
188 int _version_override);
189 void pmc_core_finalize(struct pmc_mdep *_md);
191 int pmc_iaf_initialize(struct pmc_mdep *_md, int _maxcpu, int _npmc, int _width);
192 void pmc_iaf_finalize(struct pmc_mdep *_md);
194 int pmc_iap_initialize(struct pmc_mdep *_md, int _maxcpu, int _npmc, int _width,
196 void pmc_iap_finalize(struct pmc_mdep *_md);
199 #endif /* _DEV_HWPMC_CORE_H */