2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright (c) 2011,2013 Justin Hibbits
5 * Copyright (c) 2005, Joseph Koshy
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 #include <sys/cdefs.h>
32 __FBSDID("$FreeBSD$");
34 #include <sys/param.h>
36 #include <sys/pmckern.h>
37 #include <sys/sysent.h>
38 #include <sys/syslog.h>
39 #include <sys/systm.h>
41 #include <machine/pmc_mdep.h>
42 #include <machine/spr.h>
43 #include <machine/pte.h>
44 #include <machine/sr.h>
45 #include <machine/cpu.h>
46 #include <machine/stack.h>
48 #include "hwpmc_powerpc.h"
51 #define OFFSET 4 /* Account for the TOC reload slot */
56 struct powerpc_cpu **powerpc_pcpu;
57 struct pmc_ppc_event *ppc_event_codes;
58 size_t ppc_event_codes_size;
62 enum pmc_class ppc_class;
64 void (*powerpc_set_pmc)(int cpu, int ri, int config);
65 pmc_value_t (*powerpc_pmcn_read)(unsigned int pmc);
66 void (*powerpc_pmcn_write)(unsigned int pmc, uint32_t val);
67 void (*powerpc_resume_pmc)(bool ie);
71 pmc_save_kernel_callchain(uintptr_t *cc, int maxsamples,
78 cc[frames++] = PMC_TRAPFRAME_TO_PC(tf);
79 sp = (uintptr_t *)PMC_TRAPFRAME_TO_FP(tf);
80 osp = (uintptr_t *)PAGE_SIZE;
82 for (; frames < maxsamples; frames++) {
90 if ((pc & 3) || (pc < 0x100))
94 * trapexit() and asttrapexit() are sentinels
95 * for kernel stack tracing.
97 if (pc + OFFSET == (uintptr_t) &trapexit ||
98 pc + OFFSET == (uintptr_t) &asttrapexit)
103 sp = (uintptr_t *)*sp;
109 powerpc_switch_in(struct pmc_cpu *pc, struct pmc_process *pp)
116 powerpc_switch_out(struct pmc_cpu *pc, struct pmc_process *pp)
123 powerpc_describe(int cpu, int ri, struct pmc_info *pi, struct pmc **ppmc)
127 char powerpc_name[PMC_NAME_MAX];
129 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
130 ("[powerpc,%d], illegal CPU %d", __LINE__, cpu));
132 phw = &powerpc_pcpu[cpu]->pc_ppcpmcs[ri];
133 snprintf(powerpc_name, sizeof(powerpc_name), "POWERPC-%d", ri);
134 if ((error = copystr(powerpc_name, pi->pm_name, PMC_NAME_MAX,
137 pi->pm_class = powerpc_pcpu[cpu]->pc_class;
138 if (phw->phw_state & PMC_PHW_FLAG_IS_ENABLED) {
139 pi->pm_enabled = TRUE;
140 *ppmc = phw->phw_pmc;
142 pi->pm_enabled = FALSE;
150 powerpc_get_config(int cpu, int ri, struct pmc **ppm)
153 *ppm = powerpc_pcpu[cpu]->pc_ppcpmcs[ri].phw_pmc;
159 powerpc_pcpu_init(struct pmc_mdep *md, int cpu)
162 struct powerpc_cpu *pac;
166 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
167 ("[powerpc,%d] wrong cpu number %d", __LINE__, cpu));
168 PMCDBG1(MDP,INI,1,"powerpc-init cpu=%d", cpu);
170 powerpc_pcpu[cpu] = pac = malloc(sizeof(struct powerpc_cpu), M_PMC,
172 pac->pc_ppcpmcs = malloc(sizeof(struct pmc_hw) * ppc_max_pmcs,
173 M_PMC, M_WAITOK|M_ZERO);
175 md->pmd_classdep[PMC_MDEP_CLASS_INDEX_POWERPC].pcd_class;
178 first_ri = md->pmd_classdep[PMC_MDEP_CLASS_INDEX_POWERPC].pcd_ri;
179 KASSERT(pc != NULL, ("[powerpc,%d] NULL per-cpu pointer", __LINE__));
181 for (i = 0, phw = pac->pc_ppcpmcs; i < ppc_max_pmcs; i++, phw++) {
182 phw->phw_state = PMC_PHW_FLAG_IS_ENABLED |
183 PMC_PHW_CPU_TO_STATE(cpu) | PMC_PHW_INDEX_TO_STATE(i);
185 pc->pc_hwpmcs[i + first_ri] = phw;
192 powerpc_pcpu_fini(struct pmc_mdep *md, int cpu)
194 PMCDBG1(MDP,INI,1,"powerpc-fini cpu=%d", cpu);
196 free(powerpc_pcpu[cpu]->pc_ppcpmcs, M_PMC);
197 free(powerpc_pcpu[cpu], M_PMC);
203 powerpc_allocate_pmc(int cpu, int ri, struct pmc *pm,
204 const struct pmc_op_pmcallocate *a)
207 uint32_t caps, config = 0, counter = 0;
210 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
211 ("[powerpc,%d] illegal CPU value %d", __LINE__, cpu));
212 KASSERT(ri >= 0 && ri < ppc_max_pmcs,
213 ("[powerpc,%d] illegal row index %d", __LINE__, ri));
215 if (a->pm_class != ppc_class)
222 if (pe < ppc_event_first || pe > ppc_event_last)
225 for (i = 0; i < ppc_event_codes_size; i++) {
226 if (ppc_event_codes[i].pe_event == pe) {
227 config = ppc_event_codes[i].pe_code;
228 counter = ppc_event_codes[i].pe_flags;
232 if (i == ppc_event_codes_size)
235 if ((counter & (1 << ri)) == 0)
238 if (caps & PMC_CAP_SYSTEM)
239 config |= POWERPC_PMC_KERNEL_ENABLE;
240 if (caps & PMC_CAP_USER)
241 config |= POWERPC_PMC_USER_ENABLE;
242 if ((caps & (PMC_CAP_USER | PMC_CAP_SYSTEM)) == 0)
243 config |= POWERPC_PMC_ENABLE;
245 pm->pm_md.pm_powerpc.pm_powerpc_evsel = config;
247 PMCDBG3(MDP,ALL,1,"powerpc-allocate cpu=%d ri=%d -> config=0x%x",
253 powerpc_release_pmc(int cpu, int ri, struct pmc *pmc)
255 struct pmc_hw *phw __diagused;
257 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
258 ("[powerpc,%d] illegal CPU value %d", __LINE__, cpu));
259 KASSERT(ri >= 0 && ri < ppc_max_pmcs,
260 ("[powerpc,%d] illegal row-index %d", __LINE__, ri));
262 phw = &powerpc_pcpu[cpu]->pc_ppcpmcs[ri];
263 KASSERT(phw->phw_pmc == NULL,
264 ("[powerpc,%d] PHW pmc %p non-NULL", __LINE__, phw->phw_pmc));
270 powerpc_start_pmc(int cpu, int ri)
274 PMCDBG2(MDP,STA,1,"powerpc-start cpu=%d ri=%d", cpu, ri);
275 pm = powerpc_pcpu[cpu]->pc_ppcpmcs[ri].phw_pmc;
276 powerpc_set_pmc(cpu, ri, pm->pm_md.pm_powerpc.pm_powerpc_evsel);
282 powerpc_stop_pmc(int cpu, int ri)
284 PMCDBG2(MDP,STO,1, "powerpc-stop cpu=%d ri=%d", cpu, ri);
285 powerpc_set_pmc(cpu, ri, PMCN_NONE);
290 powerpc_config_pmc(int cpu, int ri, struct pmc *pm)
294 PMCDBG3(MDP,CFG,1, "powerpc-config cpu=%d ri=%d pm=%p", cpu, ri, pm);
296 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
297 ("[powerpc,%d] illegal CPU value %d", __LINE__, cpu));
298 KASSERT(ri >= 0 && ri < ppc_max_pmcs,
299 ("[powerpc,%d] illegal row-index %d", __LINE__, ri));
301 phw = &powerpc_pcpu[cpu]->pc_ppcpmcs[ri];
303 KASSERT(pm == NULL || phw->phw_pmc == NULL,
304 ("[powerpc,%d] pm=%p phw->pm=%p hwpmc not unconfigured",
305 __LINE__, pm, phw->phw_pmc));
313 powerpc_pmcn_read_default(unsigned int pmc)
317 if (pmc > ppc_max_pmcs)
318 panic("Invalid PMC number: %d\n", pmc);
322 val = mfspr(SPR_PMC1);
325 val = mfspr(SPR_PMC2);
328 val = mfspr(SPR_PMC3);
331 val = mfspr(SPR_PMC4);
334 val = mfspr(SPR_PMC5);
337 val = mfspr(SPR_PMC6);
340 val = mfspr(SPR_PMC7);
343 val = mfspr(SPR_PMC8);
351 powerpc_pmcn_write_default(unsigned int pmc, uint32_t val)
353 if (pmc > ppc_max_pmcs)
354 panic("Invalid PMC number: %d\n", pmc);
358 mtspr(SPR_PMC1, val);
361 mtspr(SPR_PMC2, val);
364 mtspr(SPR_PMC3, val);
367 mtspr(SPR_PMC4, val);
370 mtspr(SPR_PMC5, val);
373 mtspr(SPR_PMC6, val);
376 mtspr(SPR_PMC7, val);
379 mtspr(SPR_PMC8, val);
385 powerpc_read_pmc(int cpu, int ri, pmc_value_t *v)
388 pmc_value_t p, r, tmp;
390 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
391 ("[powerpc,%d] illegal CPU value %d", __LINE__, cpu));
392 KASSERT(ri >= 0 && ri < ppc_max_pmcs,
393 ("[powerpc,%d] illegal row index %d", __LINE__, ri));
395 pm = powerpc_pcpu[cpu]->pc_ppcpmcs[ri].phw_pmc;
397 ("[core,%d] cpu %d ri %d pmc not configured", __LINE__, cpu,
401 * After an interrupt occurs because of a PMC overflow, the PMC value
402 * is not always MAX_PMC_VALUE + 1, but may be a little above it.
403 * This may mess up calculations and frustrate machine independent
404 * layer expectations, such as that no value read should be greater
405 * than reload count in sampling mode.
406 * To avoid these issues, use MAX_PMC_VALUE as an upper limit.
408 p = MIN(powerpc_pmcn_read(ri), POWERPC_MAX_PMC_VALUE);
409 r = pm->pm_sc.pm_reloadcount;
411 if (PMC_IS_SAMPLING_MODE(PMC_TO_MODE(pm))) {
413 * Special case 1: r is too big
414 * This usually happens when a PMC write fails, the PMC is
415 * stopped and then it is read.
417 * Special case 2: PMC was reseted or has a value
418 * that should not be possible with current r.
420 * In the above cases, just return 0 instead of an arbitrary
423 if (r > POWERPC_MAX_PMC_VALUE || p + r <= POWERPC_MAX_PMC_VALUE)
426 tmp = POWERPC_PERFCTR_VALUE_TO_RELOAD_COUNT(p);
428 tmp = p + (POWERPC_MAX_PMC_VALUE + 1) * PPC_OVERFLOWCNT(pm);
430 PMCDBG5(MDP,REA,1,"ppc-read cpu=%d ri=%d -> %jx (%jx,%jx)",
431 cpu, ri, (uintmax_t)tmp, (uintmax_t)PPC_OVERFLOWCNT(pm),
438 powerpc_write_pmc(int cpu, int ri, pmc_value_t v)
443 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
444 ("[powerpc,%d] illegal CPU value %d", __LINE__, cpu));
445 KASSERT(ri >= 0 && ri < ppc_max_pmcs,
446 ("[powerpc,%d] illegal row-index %d", __LINE__, ri));
448 pm = powerpc_pcpu[cpu]->pc_ppcpmcs[ri].phw_pmc;
450 if (PMC_IS_COUNTING_MODE(PMC_TO_MODE(pm))) {
451 PPC_OVERFLOWCNT(pm) = v / (POWERPC_MAX_PMC_VALUE + 1);
452 vlo = v % (POWERPC_MAX_PMC_VALUE + 1);
453 } else if (v > POWERPC_MAX_PMC_VALUE) {
455 "powerpc-write cpu=%d ri=%d: PMC value is too big: %jx",
456 cpu, ri, (uintmax_t)v);
459 vlo = POWERPC_RELOAD_COUNT_TO_PERFCTR_VALUE(v);
461 PMCDBG5(MDP,WRI,1,"powerpc-write cpu=%d ri=%d -> %jx (%jx,%jx)",
462 cpu, ri, (uintmax_t)v, (uintmax_t)PPC_OVERFLOWCNT(pm),
465 powerpc_pmcn_write(ri, vlo);
470 powerpc_pmc_intr(struct trapframe *tf)
473 struct powerpc_cpu *pc;
474 int cpu, error, i, retval;
477 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
478 ("[powerpc,%d] out of range CPU %d", __LINE__, cpu));
480 PMCDBG3(MDP,INT,1, "cpu=%d tf=%p um=%d", cpu, (void *) tf,
484 pc = powerpc_pcpu[cpu];
487 * Look for a running, sampling PMC which has overflowed
488 * and which has a valid 'struct pmc' association.
490 for (i = 0; i < ppc_max_pmcs; i++) {
491 if (!POWERPC_PMC_HAS_OVERFLOWED(i))
493 retval = 1; /* Found an interrupting PMC. */
496 * Always clear the PMC, to make it stop interrupting.
497 * If pm is available and in sampling mode, use reload
498 * count, to make PMC read after stop correct.
499 * Otherwise, just reset the PMC.
501 if ((pm = pc->pc_ppcpmcs[i].phw_pmc) != NULL &&
502 PMC_IS_SAMPLING_MODE(PMC_TO_MODE(pm))) {
503 if (pm->pm_state != PMC_STATE_RUNNING) {
504 powerpc_write_pmc(cpu, i,
505 pm->pm_sc.pm_reloadcount);
509 if (pm != NULL) { /* !PMC_IS_SAMPLING_MODE */
510 PPC_OVERFLOWCNT(pm) = (PPC_OVERFLOWCNT(pm) +
511 1) % PPC_OVERFLOWCNT_MAX;
513 "cpu=%d ri=%d: overflowcnt=%d",
514 cpu, i, PPC_OVERFLOWCNT(pm));
517 powerpc_pmcn_write(i, 0);
521 error = pmc_process_interrupt(PMC_HR, pm, tf);
524 "cpu=%d ri=%d: error %d processing interrupt",
526 powerpc_stop_pmc(cpu, i);
529 /* Reload sampling count */
530 powerpc_write_pmc(cpu, i, pm->pm_sc.pm_reloadcount);
534 counter_u64_add(pmc_stats.pm_intr_processed, 1);
536 counter_u64_add(pmc_stats.pm_intr_ignored, 1);
539 * Re-enable PERF exceptions if we were able to find the interrupt
540 * source and handle it. Otherwise, it's better to disable PERF
541 * interrupts, to avoid the risk of processing the same interrupt
544 powerpc_resume_pmc(retval != 0);
547 "pmc_intr: couldn't find interrupting PMC on cpu %d - "
548 "disabling PERF interrupts\n", cpu);
556 struct pmc_mdep *pmc_mdep;
561 * Allocate space for pointers to PMC HW descriptors and for
562 * the MDEP structure used by MI code.
564 powerpc_pcpu = malloc(sizeof(struct powerpc_cpu *) * pmc_cpu_max(), M_PMC,
568 pmc_mdep = pmc_mdep_alloc(1);
570 vers = mfpvr() >> 16;
572 pmc_mdep->pmd_switch_in = powerpc_switch_in;
573 pmc_mdep->pmd_switch_out = powerpc_switch_out;
581 error = pmc_mpc7xxx_initialize(pmc_mdep);
586 error = pmc_ppc970_initialize(pmc_mdep);
592 error = pmc_power8_initialize(pmc_mdep);
598 error = pmc_e500_initialize(pmc_mdep);
606 pmc_mdep_free(pmc_mdep);
610 /* Set the value for kern.hwpmc.cpuid */
611 snprintf(pmc_cpuid, sizeof(pmc_cpuid), "%08x", mfpvr());
617 pmc_md_finalize(struct pmc_mdep *md)
620 free(powerpc_pcpu, M_PMC);
625 pmc_save_user_callchain(uintptr_t *cc, int maxsamples,
626 struct trapframe *tf)
631 cc[frames++] = PMC_TRAPFRAME_TO_PC(tf);
632 sp = (uintptr_t *)PMC_TRAPFRAME_TO_FP(tf);
635 for (; frames < maxsamples; frames++) {
640 /* Check if 32-bit mode. */
641 if (!(tf->srr1 & PSL_SF)) {
642 cc[frames] = fuword32((uint32_t *)sp + 1);
643 sp = (uintptr_t *)(uintptr_t)fuword32(sp);
645 cc[frames] = fuword(sp + 2);
646 sp = (uintptr_t *)fuword(sp);
649 cc[frames] = fuword32((uint32_t *)sp + 1);
650 sp = (uintptr_t *)fuword32(sp);