2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright (c) 2012 Fabien Thomas
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 #include <sys/cdefs.h>
30 __FBSDID("$FreeBSD$");
32 #include <sys/param.h>
34 #include <sys/pmckern.h>
35 #include <sys/systm.h>
36 #include <sys/mutex.h>
38 #include <machine/cpu.h>
39 #include <machine/cpufunc.h>
41 #include "hwpmc_soft.h"
44 * Software PMC support.
47 #define SOFT_CAPS (PMC_CAP_READ | PMC_CAP_WRITE | PMC_CAP_INTERRUPT | \
48 PMC_CAP_USER | PMC_CAP_SYSTEM)
51 struct pmc_descr pm_descr; /* "base class" */
54 static struct soft_descr soft_pmcdesc[SOFT_NPMCS] =
56 #define SOFT_PMCDESCR(N) \
61 .pd_class = PMC_CLASS_SOFT, \
62 .pd_caps = SOFT_CAPS, \
77 SOFT_PMCDESCR(SOFT10),
78 SOFT_PMCDESCR(SOFT11),
79 SOFT_PMCDESCR(SOFT12),
80 SOFT_PMCDESCR(SOFT13),
81 SOFT_PMCDESCR(SOFT14),
86 * Per-CPU data structure.
90 struct pmc_hw soft_hw[SOFT_NPMCS];
91 pmc_value_t soft_values[SOFT_NPMCS];
95 static struct soft_cpu **soft_pcpu;
98 soft_allocate_pmc(int cpu, int ri, struct pmc *pm,
99 const struct pmc_op_pmcallocate *a)
106 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
107 ("[soft,%d] illegal CPU value %d", __LINE__, cpu));
108 KASSERT(ri >= 0 && ri < SOFT_NPMCS,
109 ("[soft,%d] illegal row-index %d", __LINE__, ri));
111 if (a->pm_class != PMC_CLASS_SOFT)
114 if ((pm->pm_caps & SOFT_CAPS) == 0)
117 if ((pm->pm_caps & ~SOFT_CAPS) != 0)
121 if ((int)ev < PMC_EV_SOFT_FIRST || (int)ev > PMC_EV_SOFT_LAST)
124 /* Check if event is registered. */
125 ps = pmc_soft_ev_acquire(ev);
128 pmc_soft_ev_release(ps);
129 /* Module unload is protected by pmc SX lock. */
130 if (ps->ps_alloc != NULL)
137 soft_config_pmc(int cpu, int ri, struct pmc *pm)
141 PMCDBG3(MDP,CFG,1, "cpu=%d ri=%d pm=%p", cpu, ri, pm);
143 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
144 ("[soft,%d] illegal CPU value %d", __LINE__, cpu));
145 KASSERT(ri >= 0 && ri < SOFT_NPMCS,
146 ("[soft,%d] illegal row-index %d", __LINE__, ri));
148 phw = &soft_pcpu[cpu]->soft_hw[ri];
150 KASSERT(pm == NULL || phw->phw_pmc == NULL,
151 ("[soft,%d] pm=%p phw->pm=%p hwpmc not unconfigured", __LINE__,
160 soft_describe(int cpu, int ri, struct pmc_info *pi, struct pmc **ppmc)
164 const struct soft_descr *pd;
167 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
168 ("[soft,%d] illegal CPU %d", __LINE__, cpu));
169 KASSERT(ri >= 0 && ri < SOFT_NPMCS,
170 ("[soft,%d] illegal row-index %d", __LINE__, ri));
172 phw = &soft_pcpu[cpu]->soft_hw[ri];
173 pd = &soft_pmcdesc[ri];
175 if ((error = copystr(pd->pm_descr.pd_name, pi->pm_name,
176 PMC_NAME_MAX, &copied)) != 0)
179 pi->pm_class = pd->pm_descr.pd_class;
181 if (phw->phw_state & PMC_PHW_FLAG_IS_ENABLED) {
182 pi->pm_enabled = TRUE;
183 *ppmc = phw->phw_pmc;
185 pi->pm_enabled = FALSE;
193 soft_get_config(int cpu, int ri, struct pmc **ppm)
197 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
198 ("[soft,%d] illegal CPU %d", __LINE__, cpu));
199 KASSERT(ri >= 0 && ri < SOFT_NPMCS,
200 ("[soft,%d] illegal row-index %d", __LINE__, ri));
202 *ppm = soft_pcpu[cpu]->soft_hw[ri].phw_pmc;
207 soft_pcpu_fini(struct pmc_mdep *md, int cpu)
212 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
213 ("[soft,%d] illegal cpu %d", __LINE__, cpu));
214 KASSERT(soft_pcpu[cpu] != NULL, ("[soft,%d] null pcpu", __LINE__));
216 free(soft_pcpu[cpu], M_PMC);
217 soft_pcpu[cpu] = NULL;
219 ri = md->pmd_classdep[PMC_CLASS_INDEX_SOFT].pcd_ri;
221 KASSERT(ri >= 0 && ri < SOFT_NPMCS,
222 ("[soft,%d] ri=%d", __LINE__, ri));
225 pc->pc_hwpmcs[ri] = NULL;
231 soft_pcpu_init(struct pmc_mdep *md, int cpu)
235 struct soft_cpu *soft_pc;
239 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
240 ("[soft,%d] illegal cpu %d", __LINE__, cpu));
241 KASSERT(soft_pcpu, ("[soft,%d] null pcpu", __LINE__));
242 KASSERT(soft_pcpu[cpu] == NULL, ("[soft,%d] non-null per-cpu",
245 soft_pc = malloc(sizeof(struct soft_cpu), M_PMC, M_WAITOK|M_ZERO);
248 KASSERT(pc != NULL, ("[soft,%d] cpu %d null per-cpu", __LINE__, cpu));
250 soft_pcpu[cpu] = soft_pc;
251 phw = soft_pc->soft_hw;
252 first_ri = md->pmd_classdep[PMC_CLASS_INDEX_SOFT].pcd_ri;
254 for (n = 0; n < SOFT_NPMCS; n++, phw++) {
255 phw->phw_state = PMC_PHW_FLAG_IS_ENABLED |
256 PMC_PHW_CPU_TO_STATE(cpu) | PMC_PHW_INDEX_TO_STATE(n);
258 pc->pc_hwpmcs[n + first_ri] = phw;
265 soft_read_pmc(int cpu, int ri, pmc_value_t *v)
268 const struct pmc_hw *phw;
270 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
271 ("[soft,%d] illegal CPU value %d", __LINE__, cpu));
272 KASSERT(ri >= 0 && ri < SOFT_NPMCS,
273 ("[soft,%d] illegal row-index %d", __LINE__, ri));
275 phw = &soft_pcpu[cpu]->soft_hw[ri];
279 ("[soft,%d] no owner for PHW [cpu%d,pmc%d]", __LINE__, cpu, ri));
281 PMCDBG1(MDP,REA,1,"soft-read id=%d", ri);
283 *v = soft_pcpu[cpu]->soft_values[ri];
289 soft_write_pmc(int cpu, int ri, pmc_value_t v)
292 const struct soft_descr *pd;
294 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
295 ("[soft,%d] illegal cpu value %d", __LINE__, cpu));
296 KASSERT(ri >= 0 && ri < SOFT_NPMCS,
297 ("[soft,%d] illegal row-index %d", __LINE__, ri));
299 pm = soft_pcpu[cpu]->soft_hw[ri].phw_pmc;
300 pd = &soft_pmcdesc[ri];
303 ("[soft,%d] cpu %d ri %d pmc not configured", __LINE__, cpu, ri));
305 PMCDBG3(MDP,WRI,1, "soft-write cpu=%d ri=%d v=%jx", cpu, ri, v);
307 soft_pcpu[cpu]->soft_values[ri] = v;
313 soft_release_pmc(int cpu, int ri, struct pmc *pmc)
321 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
322 ("[soft,%d] illegal CPU value %d", __LINE__, cpu));
323 KASSERT(ri >= 0 && ri < SOFT_NPMCS,
324 ("[soft,%d] illegal row-index %d", __LINE__, ri));
326 phw = &soft_pcpu[cpu]->soft_hw[ri];
328 KASSERT(phw->phw_pmc == NULL,
329 ("[soft,%d] PHW pmc %p non-NULL", __LINE__, phw->phw_pmc));
333 /* Check if event is registered. */
334 ps = pmc_soft_ev_acquire(ev);
336 ("[soft,%d] unregistered event %d", __LINE__, ev));
337 pmc_soft_ev_release(ps);
338 /* Module unload is protected by pmc SX lock. */
339 if (ps->ps_release != NULL)
345 soft_start_pmc(int cpu, int ri)
351 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
352 ("[soft,%d] illegal CPU value %d", __LINE__, cpu));
353 KASSERT(ri >= 0 && ri < SOFT_NPMCS,
354 ("[soft,%d] illegal row-index %d", __LINE__, ri));
357 pm = pc->soft_hw[ri].phw_pmc;
360 ("[soft,%d] cpu %d ri %d pmc not configured", __LINE__, cpu, ri));
362 ps = pmc_soft_ev_acquire(pm->pm_event);
365 atomic_add_int(&ps->ps_running, 1);
366 pmc_soft_ev_release(ps);
372 soft_stop_pmc(int cpu, int ri)
378 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
379 ("[soft,%d] illegal CPU value %d", __LINE__, cpu));
380 KASSERT(ri >= 0 && ri < SOFT_NPMCS,
381 ("[soft,%d] illegal row-index %d", __LINE__, ri));
384 pm = pc->soft_hw[ri].phw_pmc;
387 ("[soft,%d] cpu %d ri %d pmc not configured", __LINE__, cpu, ri));
389 ps = pmc_soft_ev_acquire(pm->pm_event);
390 /* event unregistered ? */
392 atomic_subtract_int(&ps->ps_running, 1);
393 pmc_soft_ev_release(ps);
400 pmc_soft_intr(struct pmckern_soft *ks)
404 int ri, processed, error, user_mode;
406 KASSERT(ks->pm_cpu >= 0 && ks->pm_cpu < pmc_cpu_max(),
407 ("[soft,%d] CPU %d out of range", __LINE__, ks->pm_cpu));
410 pc = soft_pcpu[ks->pm_cpu];
412 for (ri = 0; ri < SOFT_NPMCS; ri++) {
414 pm = pc->soft_hw[ri].phw_pmc;
416 pm->pm_state != PMC_STATE_RUNNING ||
417 pm->pm_event != ks->pm_ev) {
422 if (PMC_IS_SAMPLING_MODE(PMC_TO_MODE(pm))) {
423 if ((pc->soft_values[ri]--) <= 0)
424 pc->soft_values[ri] += pm->pm_sc.pm_reloadcount;
427 user_mode = TRAPF_USERMODE(ks->pm_tf);
428 error = pmc_process_interrupt(PMC_SR, pm, ks->pm_tf);
430 soft_stop_pmc(ks->pm_cpu, ri);
435 /* If in user mode setup AST to process
436 * callchain out of interrupt context.
438 curthread->td_flags |= TDF_ASTPENDING;
441 pc->soft_values[ri]++;
444 counter_u64_add(pmc_stats.pm_intr_processed, 1);
446 counter_u64_add(pmc_stats.pm_intr_ignored, 1);
452 pmc_soft_initialize(struct pmc_mdep *md)
454 struct pmc_classdep *pcd;
457 soft_pcpu = malloc(sizeof(struct soft_cpu *) * pmc_cpu_max(), M_PMC,
460 pcd = &md->pmd_classdep[PMC_CLASS_INDEX_SOFT];
462 pcd->pcd_caps = SOFT_CAPS;
463 pcd->pcd_class = PMC_CLASS_SOFT;
464 pcd->pcd_num = SOFT_NPMCS;
465 pcd->pcd_ri = md->pmd_npmc;
468 pcd->pcd_allocate_pmc = soft_allocate_pmc;
469 pcd->pcd_config_pmc = soft_config_pmc;
470 pcd->pcd_describe = soft_describe;
471 pcd->pcd_get_config = soft_get_config;
472 pcd->pcd_get_msr = NULL;
473 pcd->pcd_pcpu_init = soft_pcpu_init;
474 pcd->pcd_pcpu_fini = soft_pcpu_fini;
475 pcd->pcd_read_pmc = soft_read_pmc;
476 pcd->pcd_write_pmc = soft_write_pmc;
477 pcd->pcd_release_pmc = soft_release_pmc;
478 pcd->pcd_start_pmc = soft_start_pmc;
479 pcd->pcd_stop_pmc = soft_stop_pmc;
481 md->pmd_npmc += SOFT_NPMCS;
485 pmc_soft_finalize(struct pmc_mdep *md)
490 ncpus = pmc_cpu_max();
491 for (i = 0; i < ncpus; i++)
492 KASSERT(soft_pcpu[i] == NULL, ("[soft,%d] non-null pcpu cpu %d",
495 KASSERT(md->pmd_classdep[PMC_CLASS_INDEX_SOFT].pcd_class ==
496 PMC_CLASS_SOFT, ("[soft,%d] class mismatch", __LINE__));
498 free(soft_pcpu, M_PMC);