2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright (c) 2008 Joseph Koshy
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 #include <sys/cdefs.h>
30 __FBSDID("$FreeBSD$");
32 #include <sys/param.h>
34 #include <sys/pmckern.h>
35 #include <sys/systm.h>
37 #include <machine/specialreg.h>
43 #define TSC_CAPS PMC_CAP_READ
46 struct pmc_descr pm_descr; /* "base class" */
49 static struct tsc_descr tsc_pmcdesc[TSC_NPMCS] =
55 .pd_class = PMC_CLASS_TSC,
63 * Per-CPU data structure for TSCs.
70 static struct tsc_cpu **tsc_pcpu;
73 tsc_allocate_pmc(int cpu, int ri, struct pmc *pm,
74 const struct pmc_op_pmcallocate *a)
78 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
79 ("[tsc,%d] illegal CPU value %d", __LINE__, cpu));
80 KASSERT(ri >= 0 && ri < TSC_NPMCS,
81 ("[tsc,%d] illegal row index %d", __LINE__, ri));
83 if (a->pm_class != PMC_CLASS_TSC)
86 if ((pm->pm_caps & TSC_CAPS) == 0)
89 if ((pm->pm_caps & ~TSC_CAPS) != 0)
92 if (a->pm_ev != PMC_EV_TSC_TSC ||
93 a->pm_mode != PMC_MODE_SC)
100 tsc_config_pmc(int cpu, int ri, struct pmc *pm)
104 PMCDBG3(MDP,CFG,1, "cpu=%d ri=%d pm=%p", cpu, ri, pm);
106 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
107 ("[tsc,%d] illegal CPU value %d", __LINE__, cpu));
108 KASSERT(ri == 0, ("[tsc,%d] illegal row-index %d", __LINE__, ri));
110 phw = &tsc_pcpu[cpu]->tc_hw;
112 KASSERT(pm == NULL || phw->phw_pmc == NULL,
113 ("[tsc,%d] pm=%p phw->pm=%p hwpmc not unconfigured", __LINE__,
122 tsc_describe(int cpu, int ri, struct pmc_info *pi, struct pmc **ppmc)
126 const struct tsc_descr *pd;
129 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
130 ("[tsc,%d] illegal CPU %d", __LINE__, cpu));
131 KASSERT(ri == 0, ("[tsc,%d] illegal row-index %d", __LINE__, ri));
133 phw = &tsc_pcpu[cpu]->tc_hw;
134 pd = &tsc_pmcdesc[ri];
136 if ((error = copystr(pd->pm_descr.pd_name, pi->pm_name,
137 PMC_NAME_MAX, &copied)) != 0)
140 pi->pm_class = pd->pm_descr.pd_class;
142 if (phw->phw_state & PMC_PHW_FLAG_IS_ENABLED) {
143 pi->pm_enabled = TRUE;
144 *ppmc = phw->phw_pmc;
146 pi->pm_enabled = FALSE;
154 tsc_get_config(int cpu, int ri, struct pmc **ppm)
158 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
159 ("[tsc,%d] illegal CPU %d", __LINE__, cpu));
160 KASSERT(ri == 0, ("[tsc,%d] illegal row-index %d", __LINE__, ri));
162 *ppm = tsc_pcpu[cpu]->tc_hw.phw_pmc;
168 tsc_get_msr(int ri, uint32_t *msr)
172 KASSERT(ri >= 0 && ri < TSC_NPMCS,
173 ("[tsc,%d] ri %d out of range", __LINE__, ri));
181 tsc_pcpu_fini(struct pmc_mdep *md, int cpu)
186 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
187 ("[tsc,%d] illegal cpu %d", __LINE__, cpu));
188 KASSERT(tsc_pcpu[cpu] != NULL, ("[tsc,%d] null pcpu", __LINE__));
190 free(tsc_pcpu[cpu], M_PMC);
191 tsc_pcpu[cpu] = NULL;
193 ri = md->pmd_classdep[PMC_MDEP_CLASS_INDEX_TSC].pcd_ri;
196 pc->pc_hwpmcs[ri] = NULL;
202 tsc_pcpu_init(struct pmc_mdep *md, int cpu)
206 struct tsc_cpu *tsc_pc;
209 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
210 ("[tsc,%d] illegal cpu %d", __LINE__, cpu));
211 KASSERT(tsc_pcpu, ("[tsc,%d] null pcpu", __LINE__));
212 KASSERT(tsc_pcpu[cpu] == NULL, ("[tsc,%d] non-null per-cpu",
215 tsc_pc = malloc(sizeof(struct tsc_cpu), M_PMC, M_WAITOK|M_ZERO);
217 tsc_pc->tc_hw.phw_state = PMC_PHW_FLAG_IS_ENABLED |
218 PMC_PHW_CPU_TO_STATE(cpu) | PMC_PHW_INDEX_TO_STATE(0) |
219 PMC_PHW_FLAG_IS_SHAREABLE;
221 tsc_pcpu[cpu] = tsc_pc;
223 ri = md->pmd_classdep[PMC_MDEP_CLASS_INDEX_TSC].pcd_ri;
225 KASSERT(pmc_pcpu, ("[tsc,%d] null generic pcpu", __LINE__));
229 KASSERT(pc, ("[tsc,%d] null generic per-cpu", __LINE__));
231 pc->pc_hwpmcs[ri] = &tsc_pc->tc_hw;
237 tsc_read_pmc(int cpu, int ri, pmc_value_t *v)
241 const struct pmc_hw *phw;
243 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
244 ("[tsc,%d] illegal CPU value %d", __LINE__, cpu));
245 KASSERT(ri == 0, ("[tsc,%d] illegal ri %d", __LINE__, ri));
247 phw = &tsc_pcpu[cpu]->tc_hw;
251 ("[tsc,%d] no owner for PHW [cpu%d,pmc%d]", __LINE__, cpu, ri));
253 mode = PMC_TO_MODE(pm);
255 KASSERT(mode == PMC_MODE_SC,
256 ("[tsc,%d] illegal pmc mode %d", __LINE__, mode));
258 PMCDBG1(MDP,REA,1,"tsc-read id=%d", ri);
266 tsc_release_pmc(int cpu, int ri, struct pmc *pmc)
272 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
273 ("[tsc,%d] illegal CPU value %d", __LINE__, cpu));
275 ("[tsc,%d] illegal row-index %d", __LINE__, ri));
277 phw = &tsc_pcpu[cpu]->tc_hw;
279 KASSERT(phw->phw_pmc == NULL,
280 ("[tsc,%d] PHW pmc %p non-NULL", __LINE__, phw->phw_pmc));
289 tsc_start_pmc(int cpu, int ri)
293 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
294 ("[tsc,%d] illegal CPU value %d", __LINE__, cpu));
295 KASSERT(ri == 0, ("[tsc,%d] illegal row-index %d", __LINE__, ri));
297 return (0); /* TSCs are always running. */
301 tsc_stop_pmc(int cpu, int ri)
303 (void) cpu; (void) ri;
305 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
306 ("[tsc,%d] illegal CPU value %d", __LINE__, cpu));
307 KASSERT(ri == 0, ("[tsc,%d] illegal row-index %d", __LINE__, ri));
309 return (0); /* Cannot actually stop a TSC. */
313 tsc_write_pmc(int cpu, int ri, pmc_value_t v)
315 (void) cpu; (void) ri; (void) v;
317 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
318 ("[tsc,%d] illegal CPU value %d", __LINE__, cpu));
319 KASSERT(ri == 0, ("[tsc,%d] illegal row-index %d", __LINE__, ri));
322 * The TSCs are used as timecounters by the kernel, so even
323 * though some i386 CPUs support writeable TSCs, we don't
324 * support writing changing TSC values through the HWPMC API.
330 pmc_tsc_initialize(struct pmc_mdep *md, int maxcpu)
332 struct pmc_classdep *pcd;
334 KASSERT(md != NULL, ("[tsc,%d] md is NULL", __LINE__));
335 KASSERT(md->pmd_nclass >= 1, ("[tsc,%d] dubious md->nclass %d",
336 __LINE__, md->pmd_nclass));
338 tsc_pcpu = malloc(sizeof(struct tsc_cpu *) * maxcpu, M_PMC,
341 pcd = &md->pmd_classdep[PMC_MDEP_CLASS_INDEX_TSC];
343 pcd->pcd_caps = PMC_CAP_READ;
344 pcd->pcd_class = PMC_CLASS_TSC;
345 pcd->pcd_num = TSC_NPMCS;
346 pcd->pcd_ri = md->pmd_npmc;
349 pcd->pcd_allocate_pmc = tsc_allocate_pmc;
350 pcd->pcd_config_pmc = tsc_config_pmc;
351 pcd->pcd_describe = tsc_describe;
352 pcd->pcd_get_config = tsc_get_config;
353 pcd->pcd_get_msr = tsc_get_msr;
354 pcd->pcd_pcpu_init = tsc_pcpu_init;
355 pcd->pcd_pcpu_fini = tsc_pcpu_fini;
356 pcd->pcd_read_pmc = tsc_read_pmc;
357 pcd->pcd_release_pmc = tsc_release_pmc;
358 pcd->pcd_start_pmc = tsc_start_pmc;
359 pcd->pcd_stop_pmc = tsc_stop_pmc;
360 pcd->pcd_write_pmc = tsc_write_pmc;
362 md->pmd_npmc += TSC_NPMCS;
368 pmc_tsc_finalize(struct pmc_mdep *md)
373 ncpus = pmc_cpu_max();
374 for (i = 0; i < ncpus; i++)
375 KASSERT(tsc_pcpu[i] == NULL, ("[tsc,%d] non-null pcpu cpu %d",
378 KASSERT(md->pmd_classdep[PMC_MDEP_CLASS_INDEX_TSC].pcd_class ==
379 PMC_CLASS_TSC, ("[tsc,%d] class mismatch", __LINE__));
385 free(tsc_pcpu, M_PMC);